Automatic gain control method, device, equipment and medium

Abstract

The invention provides an automatic gain control method and device, equipment and a medium, and the method comprises the steps: carrying out the superframe synchronization processing of received data, and obtaining a superframe header and superframe data of the received data; starting from the superframe header of the received data, extracting N segments of data according to a preset rule; each segment of data comprises M pieces of data; performing real and imaginary part analysis processing on all data in the N segments of data, and calculating an average power value; determining a power adjustment factor according to the average power value; the power adjustment factor is used for dynamically adjusting received data; and performing gain control on the whole superframe data by using the power adjustment factor to obtain data after gain control. According to the scheme, the operand can be reduced, the requirement for the hardware memory capacity is lowered, meanwhile, waiting time consumption caused by storage of a large amount of data is avoided, and the performance of a receiving system is improved.

Description

Technical Field

[0001] The present application relates to the field of communication technology, and in particular to an automatic gain control method, apparatus, device, and medium. Background Art

[0002] With the rapid development of communication systems, receiver accuracy is one of the core factors that determine communication performance when processing received data. To improve the processing accuracy of received data, it is usually necessary to perform automatic gain control (AGC) on the received data. By first calculating the gain adjustment factor from the received data, and then using this factor to adjust the data gain, the effective number of bits of the data is increased, providing a guarantee for subsequent data processing. Among them, in the forward receive link of the Digital Video Broadcasting (DVB) protocol, data processing is based on the superframe as the processing unit. In the high-bandwidth scenario used by the DVB protocol, a superframe contains a large number of symbols, up to approximately 200,000, and the amount of data is large.

[0003] Currently, when performing AGC on data received in the DVB protocol forward receive link, the conventional approach is to calculate a gain adjustment factor using the entire data of a superframe, and then use this gain adjustment factor to control the gain of the superframe's data. However, since the gain adjustment factor needs to be calculated based on 200,000 symbols of data in a superframe, the computational complexity increases significantly, increasing the processor burden and easily leading to data processing delays. Furthermore, when performing AGC, the entire superframe's data must be stored first. However, conventional hardware memory cannot store such a large amount of data, making the hardware memory unable to meet the storage requirements, resulting in a long wait for data reception. Summary of the Invention

[0004] The embodiments of the present application provide an automatic gain control method, apparatus, device, and medium.

[0005] A first aspect of an embodiment of the present application provides an automatic gain control method, the method comprising:

[0006] Performing superframe synchronization processing on the received data to obtain a superframe header and superframe data of the received data;

[0007] Starting from the superframe header of the received data, extracting N segments of data according to a preset rule; each segment of data includes M data, (N*M) < the length of a single superframe data;

[0008] Perform real and imaginary part analysis on all data in the N segments of data to calculate the average power value;

[0009] Determining a power adjustment factor based on the average power value; the power adjustment factor is used to achieve dynamic adjustment of received data;

[0010] The power adjustment factor is used to perform gain control on the entire super-frame data to obtain gain-controlled data.

[0011] A second aspect of the embodiments of the present application provides an automatic gain control device, comprising:

[0012] An acquisition module, configured to perform superframe synchronization processing on received data and obtain a superframe header and superframe data of the received data;

[0013] An extraction module is configured to extract N segments of data starting from the superframe header of the received data according to a preset rule; each segment of data includes M data, and (N*M) is less than the length of a single superframe data;

[0014] An analysis module is used to perform real and imaginary part analysis on all the data in the N segments of data and calculate an average power value;

[0015] a determination module, configured to determine a power adjustment factor according to the average power value; the power adjustment factor being used to implement dynamic adjustment of received data;

[0016] The gain control module is used to perform gain control on the entire super-frame data using the power adjustment factor to obtain gain-controlled data.

[0017] According to a third aspect of an embodiment of the present application, a computer device is provided, comprising: a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of any of the above methods when executing the computer program.

[0018] A fourth aspect of the embodiments of the present application provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program implements the steps of any of the above methods when executed by a processor.

[0019] An embodiment of the present application provides an automatic gain control method, which includes: performing superframe synchronization processing on received data to obtain a superframe header and superframe data of the received data; starting from the superframe header of the received data, extracting N segments of data according to preset rules; each segment of data includes M data, (N*M) < the length of a single superframe data; performing real and imaginary part analysis processing on all data in the N segments of data to calculate an average power value; determining a power adjustment factor based on the average power value; the power adjustment factor is used to achieve dynamic adjustment of the received data; and using the power adjustment factor to perform gain control on the entire superframe data to obtain gain-controlled data. Compared with the prior art, the technical solution in the present application performs super-frame synchronization processing on the received data to obtain the super-frame header and super-frame data, which can provide an accurate benchmark for subsequent operations such as extracting data from the super-frame header and performing gain control, thereby ensuring the accuracy of data extraction and gain control; and extracts N segments of data according to preset rules starting from the super-frame header of the received data, and each segment contains M data and N*M < the length of a single super-frame data, and only part of the data is used for subsequent calculations, without the need to use all 200,000 symbol data of the super-frame, which can greatly reduce the amount of calculated data, reduce the amount of calculation, reduce the burden on the processor, and avoid data processing delays; the real and imaginary parts of the N segments of data are analyzed and processed and the average power value is calculated, and the partial data is used for calculation instead Calculating the gain adjustment factor based on the full amount of super-frame data can simplify the calculation logic, further reduce the calculation complexity and improve the calculation efficiency; determining the power adjustment factor used to dynamically adjust the received data according to the average power value, without having to wait for the reception of all the super-frame data before calculating the relevant factors, can shorten the waiting time for factor determination and speed up the gain control preparation process; using the power adjustment factor to control the gain of the entire super-frame data, the control of the entire super-frame data can be completed based on the factor determined based on part of the data, without having to store all the super-frame data first, which can reduce the requirements for hardware memory capacity and enable the solution to be implemented on conventional hardware equipment. At the same time, it avoids the waiting time caused by storing a large amount of data, thereby improving the performance of the receiving system. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0021] Figure 1 A schematic diagram of the structure of a computer device provided in one embodiment of the present application;

[0022] Figure 2 A flowchart of an automatic gain control method provided by one embodiment of the present application;

[0023] Figure 3 A flowchart of a method for determining an average power value provided in one embodiment of the present application;

[0024] Figure 4 A schematic flow chart of an automatic gain control method provided in another embodiment of the present application;

[0025] Figure 5 A schematic diagram of the structure of an automatic gain control device provided in one embodiment of the present application. DETAILED DESCRIPTION

[0026] In the process of implementing this application, the inventors found that the traditional AGC operation on the received data of the DVB protocol forward receiving link has a large amount of calculation, which makes the hardware memory unable to meet the storage requirements, resulting in a long waiting time for data reception.

[0027] In order to make the technical solutions and advantages of the embodiments of the present application more clearly understood, the exemplary embodiments of the present application are further described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present application, and are not an exhaustive list of all the embodiments. It should be noted that the embodiments and features in the embodiments of the present application can be combined with each other unless they conflict.

[0028] Based on the above-mentioned defects, the present application provides an automatic gain control method. Compared with the related art, the technical solution in the present application performs super-frame synchronization processing on the received data to obtain the super-frame header and super-frame data, which can provide a precise benchmark for subsequent operations such as extracting data from the super-frame header and performing gain control, thereby ensuring the accuracy of data extraction and gain control; and extracting N segments of data (each segment contains M data and N*M < single super-frame data length) from the super-frame header of the received data according to preset rules, and only using part of the data for subsequent calculations, without using all 200,000 symbol data of the super-frame, which can greatly reduce the amount of calculated data, reduce the amount of calculation, reduce the burden on the processor, and avoid data processing delays; performing real and imaginary part analysis on the N segments of data and calculating the average Power value, using partial data calculation instead of full super-frame data to calculate the gain adjustment factor, can simplify the calculation logic, further reduce the calculation complexity, and improve the calculation efficiency; determine the power adjustment factor used to dynamically adjust the received data according to the average power value, without having to wait for the reception of all super-frame data before calculating the relevant factors, which can shorten the waiting time for factor determination and speed up the gain control preparation process; use the power adjustment factor to control the gain of the entire super-frame data, and the control of the entire super-frame data can be completed based on the factor determined based on partial data, without having to store all the super-frame data first, which can reduce the requirements for hardware memory capacity and enable the solution to be implemented on conventional hardware equipment. At the same time, it avoids the waiting time caused by storing large amounts of data, thereby improving the performance of the receiving system.

[0029] Among them, the solutions in the embodiments of the present application can be implemented using various computer languages, for example, the object-oriented programming language Java and the directly interpreted scripting language JavaScript.

[0030] See Figure 1 , a schematic diagram of the structure of a computer device provided in an embodiment of the present application. Figure 1 As shown, the computer device includes a processor, memory, network interface, display screen, and input device connected via a system bus. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium may be, for example, a disk. The non-volatile storage medium stores files (which may be files to be processed or processed files), an operating system, and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage medium. The network interface of the computer device is used to communicate with an external terminal via a network connection. When the computer program is executed by the processor, an automatic gain control method is implemented. The display screen of the computer device may be a liquid crystal display or an electronic ink display screen. The input device of the computer device may be a touch layer covering the display screen, or may be a button, trackball, or touchpad provided on the computer device housing, or may be an external keyboard, touchpad, or mouse. The computer device has wireless communication transceiver capabilities, and may include, for example, ad hoc network communication equipment, data link communication equipment, and Bluetooth communication equipment.

[0031] See Figure 2 The following embodiments use the aforementioned computer device as the execution subject and specifically illustrate the automatic gain control method provided in the embodiments of the present application by applying the aforementioned computer device to perform data processing. The automatic gain control method provided in the embodiments of the present application includes the following steps 201 to 205:

[0032] Step 201: Perform superframe synchronization processing on received data to obtain a superframe header and superframe data of the received data.

[0033] It is understandable that during the transmission process, received data may be interfered with by various factors such as channel noise, signal attenuation, and clock offset, resulting in data misalignment or confusion in the time sequence. Therefore, superframe synchronization processing is required for the received data.

[0034] Specifically, after obtaining the received data, the superframe synchronization processing determines the starting position of the superframe by identifying the specific synchronization identifier contained in the received data, such as the frame header feature sequence specified by the DVB protocol. As the superframe header position, it eliminates the time offset and phase deviation in the data transmission process, ensures that all subsequent data processing operations can be carried out based on the correct time reference, avoids subsequent processing failures caused by incorrect judgment of the data starting position, and provides a stable and reliable foundation for the entire gain control process.

[0035] Obtaining the superframe header and superframe data of the received data is a direct result of superframe synchronization processing and a key prerequisite for subsequent data processing. As the superframe's identifier, the superframe header can contain key metadata such as the superframe's length, type, and checksum information. This information can help the receiving end clarify the basic attributes of the current superframe and provide a basis for the execution of subsequent data extraction rules, such as determining the starting position for extracting N segments of data used to calculate average power. Superframe data is the target object of gain control. Through synchronization processing, the complete data range of a single superframe is accurately divided to avoid confusing data from different superframes. At the same time, clear superframe data boundaries allow subsequent gain control operations to act precisely on the target superframe without interfering with other superframe data, ensuring the targeted and accurate processing of gain control.

[0036] Step 202: Starting from the super-frame header of the received data, extract N segments of data according to a preset rule; each segment of data includes M data, and (N*M) is less than the length of a single super-frame data.

[0037] It's important to note that after obtaining the super-frame header of the received data, data can be extracted starting from the super-frame header. This is because the super-frame header marks the beginning of the super-frame data, and the data near it is generally more stable and representative. Starting with the super-frame header ensures that the extracted data is from the current super-frame to be processed, avoiding data from other super-frames and ensuring the accuracy of subsequent calculations.

[0038] Extract N segments of data according to preset rules. The preset rules here can be set according to the actual needs of the system. For example, the preset rule can be to extract a segment of data every certain number of symbols, or to continuously extract several segments of data at the beginning. This preset extraction method can make the data extraction process more regular and controllable, and facilitate hardware implementation and process management. At the same time, extracting data in N segments instead of extracting a large continuous segment of data can, to a certain extent, avoid the excessive impact of local data anomalies (such as sudden noise interference) on the overall calculation results, thereby improving the representativeness of the data.

[0039] In this step, each segment of data extracted contains M data, and (N*M) is less than the length of a single superframe data. The values ​​of N and M, and the position of each segment of data can be determined based on the system's computing power, accuracy requirements, hardware level, application scenarios, and time consumption. The more data taken, the greater the amount of calculation and the more accurate it is. Generally, 2048 data are taken from the frame header position. Conventional solutions require the use of 200,000 symbol data of the entire superframe to calculate the gain adjustment factor, while the present application replaces the full amount of data by extracting partial data (N*M). Since (N*M) is much smaller than the data length of a single superframe, on the one hand, the amount of data involved in the calculation is greatly reduced, which can significantly reduce the amount of calculation, reduce the burden on the processor, and reduce data processing delays; on the other hand, there is no need to store the data of the entire superframe, only the extracted N*M data need to be stored, which greatly reduces the requirements for hardware memory, so that ordinary hardware devices can also meet storage requirements, avoiding excessive time spent waiting to store large amounts of data. Moreover, by reasonably selecting the values ​​of N and M, it is possible to reduce the amount of data while ensuring that the extracted data sufficiently represents the characteristics of the entire super-frame data, thereby making the average power value and power adjustment factor calculated based on this data more reliable and ensuring the effect of gain control.

[0040] Step 203: Perform real and imaginary part analysis on all data in the N segments of data to calculate the average power value.

[0041] It is understandable that in digital communication systems, received data is usually represented in complex form, which together reflect key information such as the amplitude and phase of the signal.

[0042] Specifically, the real and imaginary part analysis process separates the real and imaginary parts of each data point within the N segments and processes them separately. The squares of the real and imaginary parts of each data point are then calculated and summed, and then averaged over the total amount of data (N*M) (for example, by performing a division operation using a shift operation) to obtain the average power value. This process adheres to the basic principle of signal power calculation, which states that the power of a signal is related to the sum of the squares of its real and imaginary parts. This analysis and calculation accurately reflects the signal power level represented by the N extracted data points.

[0043] In this step, only the N extracted segments of data are processed, rather than the entire superframe data. Since the amount of data is significantly reduced, the computational effort required for real and imaginary part analysis and power calculation is also reduced, enabling rapid results. This reduces the processor's computational burden and improves processing efficiency. Furthermore, the average power value calculated based on the real and imaginary parts accurately reflects the power characteristics of this portion of data. Because the N extracted segments of data are selected according to preset rules and are representative, this average power value also effectively represents the power situation of the entire superframe data, providing a reliable basis for subsequently determining the power adjustment factor and ensuring the accuracy of subsequent gain control.

[0044] Step 204: Determine a power adjustment factor according to the average power value; the power adjustment factor is used to achieve dynamic adjustment of received data.

[0045] Step 205: Perform gain control on the entire superframe data using the power adjustment factor to obtain gain-controlled data.

[0046] Specifically, determining the power adjustment factor based on the average power value is a key step in converting signal power characteristics into specific adjustment parameters. The average power value directly reflects the power level of the N extracted data segments, which in turn represents the approximate power situation of the entire superframe data. When determining the power adjustment factor, the system's preset target power (i.e., the ideal power level the signal is expected to achieve) is taken into account. The difference between the average power value and the target power is calculated to obtain the power adjustment factor, providing a precise basis for subsequent dynamic adjustments.

[0047] After obtaining the power adjustment factor, it is used to perform gain control on the entire superframe data to optimize the actual signal. Superframe data contains all symbol information for that superframe within the received data. The power of this data may fluctuate, directly affecting the accuracy of subsequent demodulation, decoding, and other processing. During gain control, each data point within the superframe is uniformly adjusted based on the power adjustment factor. If the adjustment factor is shifted left by a certain number of bits, the data is amplified, increasing its power; if it is shifted right by a certain number of bits, the data is attenuated, reducing its power. This adjustment is not a local operation but covers the entire superframe data, ensuring that the adjusted superframe data power reaches the target level and reducing interference caused by power fluctuations. Furthermore, because the power adjustment factor is determined based on N representative data segments, the adjusted superframe data power is consistent with the actual signal characteristics and meets the system processing requirements. The resulting gain-controlled data provides a more stable and higher-quality signal source for subsequent processing.

[0048] An embodiment of the present application provides an automatic gain control method, which includes: performing super-frame synchronization processing on received data to obtain a super-frame header and super-frame data of the received data; starting from the super-frame header of the received data, extracting N segments of data according to preset rules; each segment of data includes M data; performing real and imaginary part analysis processing on all data in the N segments of data to calculate an average power value; determining a power adjustment factor based on the average power value; the power adjustment factor is used to achieve dynamic adjustment of the received data; and using the power adjustment factor to perform gain control on the entire super-frame data to obtain gain-controlled data. Compared with the prior art, the technical solution in the present application performs super-frame synchronization processing on the received data to obtain the super-frame header and super-frame data, which can provide an accurate benchmark for subsequent operations such as extracting data from the super-frame header and performing gain control, thereby ensuring the accuracy of data extraction and gain control; and extracts N segments of data (each segment contains M data and N*M < single super-frame data length) from the super-frame header of the received data according to preset rules, and only uses part of the data for subsequent calculations, without using all 200,000 symbol data of the super-frame, which can greatly reduce the amount of calculated data, reduce the amount of calculation, reduce the burden on the processor, and avoid data processing delays; performs real and imaginary part analysis on the N segments of data and calculates the average power value, and uses part of the data for calculation instead. Calculating the gain adjustment factor based on the full amount of super-frame data can simplify the calculation logic, further reduce the calculation complexity and improve the calculation efficiency; determining the power adjustment factor used to dynamically adjust the received data according to the average power value, without having to wait for the reception of all the super-frame data before calculating the relevant factors, can shorten the waiting time for factor determination and speed up the gain control preparation process; using the power adjustment factor to control the gain of the entire super-frame data, the control of the entire super-frame data can be completed based on the factor determined based on part of the data, without having to store all the super-frame data first, which can reduce the requirements for hardware memory capacity and enable the solution to be implemented on conventional hardware equipment. At the same time, it avoids the waiting time caused by storing a large amount of data, thereby improving the performance of the receiving system.

[0049] In an optional embodiment of the present application, all data in the N segments are analyzed for real and imaginary parts, and the average power value is calculated. Figure 3 As shown, the method includes the following steps:

[0050] Step 301: Calculate the square sum of all the real parts of the data, and shift the square sum of the real parts to the right by a preset value to obtain a real power value; the preset value is log2(N*M).

[0051] Step 302: Calculate the square sum of all the imaginary parts of the data, and shift the square sum of the imaginary parts rightward by a preset value to obtain the imaginary power value.

[0052] Step 303: Add the real power value and the imaginary power value to obtain an average power value.

[0053] Specifically, after extracting N segments of data according to a preset rule, the real part square of each data segment is calculated, and the real part squares of all data segments are added together to obtain the square sum of the real parts of all data segments. The square sum of the real parts of all data segments is then right-shifted by log2(N*M) bits to obtain the real power value power_imag. The imaginary part square of each data segment is calculated, and the imaginary part squares of all data segments are added together to obtain the square sum of the imaginary parts of all data segments. The square sum of the imaginary parts of all data segments is then right-shifted by log2(N*M) bits to obtain the imaginary power value power_imag.

[0054] After obtaining the real power value power_imag and the imaginary power value power_imag, the real power value power_imag and the imaginary power value power_imag are added to obtain the average power value avg_power.

[0055] In this embodiment, the real power value is obtained by calculating the square sum of all the real parts of the data and shifting it right by log2(N*M) bits, and the imaginary power value is obtained by calculating the square sum of all the imaginary parts of the data and shifting it right by log2(N*M) bits. From the perspective of computational efficiency, the right shift operation essentially replaces the division operation. Compared with division, the shift operation is simpler and less time-consuming to implement in digital circuits, which can significantly reduce the complexity of the calculation process and reduce the computing time and burden of the processor. From the perspective of hardware adaptation, the shift operation has lower hardware resource requirements and does not require a complex division operation unit. It is more suitable for implementation on conventional hardware devices, reducing the requirements for hardware performance. In terms of computational accuracy, using log2(N×M) as the preset shift value just corresponds to the mathematical effect of dividing the square sum by (N×M), which can accurately achieve the average calculation of the real and imaginary power, ensuring that the obtained real and imaginary power values ​​can accurately reflect the power characteristics of the extracted data, providing a reliable basis for the subsequent calculation of the average power value and the determination of the power adjustment factor.

[0056] In an optional embodiment of the present application, calculating the sum of the squares of the real parts of all data includes:

[0057] For each data, the real part of each data is multiplied by the real part to obtain a multiplication result; and the multiplication results of all data are added together to obtain the square sum of the real parts of all data.

[0058] Specifically, after extracting multiple data points, for each data point, the real part of each data point is multiplied by the real part to obtain the multiplication result. Essentially, this is calculating the square of the real part of each data point. From a mathematical perspective, the result of multiplying the real part by the real part is the square value of the real part. This value can reflect the energy characteristics of the signal component corresponding to the real part of the data point. Signal energy is proportional to the square of the amplitude. The larger the square value of the real part, the stronger the energy of the signal component corresponding to the real part of the data point.

[0059] Based on this, the multiplication results of all data are added together to obtain the sum of the squares of the real parts of all data. This sum summarizes the energy of all real parts in the N extracted data segments. Because the N extracted data segments are selected according to preset rules and can represent the characteristics of the entire superframe data, this real part square sum represents the total real part energy of the data. Through this calculation, the real part energy information originally scattered among each data point is integrated, providing the basic data for the subsequent calculation of the real part power value.

[0060] In this embodiment, for each data, the real part of each data is multiplied by the real part to obtain the multiplication result, and the sum is processed. This conforms to the logic of hardware processing and can be implemented by simple multipliers and adders, avoiding complex calculation logic, reducing the difficulty of hardware implementation, and ensuring the efficiency and accuracy of the calculation process.

[0061] In an optional embodiment of the present application, determining the power adjustment factor according to the average power value includes:

[0062] The average power value is converted into binary to determine the highest bit exponent value; the highest bit exponent value is the exponent value corresponding to the most significant bit after conversion to binary; the shift amount is calculated based on the highest bit exponent value; the target factor of the time domain gain adjustment is obtained, and the shift amount is subtracted from the target factor to obtain the power adjustment factor.

[0063] Specifically, after obtaining the average power value, it is converted into a form that better matches the hardware's operational logic, accurately capturing the key power magnitude operations. Binary is the fundamental language of digital circuits. After converting the average power value to binary, its most significant bit (MSB)—the most significant bit exponent value (shift_tmp)—directly corresponds to the magnitude of the value. The larger the MSB exponent value, the higher the average power magnitude.

[0064] For example, if the binary value of the average power value is "1011", the most significant bit is the third bit from the right (counting from 0), and the most significant bit exponent value is 3, which means that the power value is between 8 (2 3 ) to 16(2 4) between . Calculating the shift amount based on the highest-order exponent value essentially converts the power level into a specific parameter that can be used for adjustment. This shift amount is dynamically determined based on characteristics such as the parity of the highest-order exponent value, ensuring that subsequent adjustments are adapted to the current power level.

[0065] It should be noted that the target factor for time-domain gain adjustment is an ideal gain benchmark preset by the system based on system processing requirements. It represents the target adjustment level that the signal needs to achieve, for example, to ensure that the signal is within the linear range of the ADC / DAC.

[0066] Furthermore, after obtaining the target factor of the time domain gain adjustment, the shift amount is subtracted from it to obtain the power adjustment factor, which is equivalent to correcting the target adjustment level based on the actual power level of the current signal (reflected by the shift amount). If the shift amount is small, the corrected power adjustment factor will be larger to enhance the signal; if the shift amount is reached, the power adjustment factor will be reduced accordingly to avoid signal overload.

[0067] In this embodiment, the average power value is converted into binary, the highest bit index value is determined, and the shift amount is accurately calculated based on the highest bit index value. Then, the target factor of the time domain gain adjustment is obtained, and the shift amount is subtracted from the target factor to obtain the power adjustment factor. The determined power adjustment factor not only meets the target requirements of the system, but also can adapt to the actual situation of the signal, providing an accurate and dynamic adjustment basis for the subsequent gain control of the super-frame data.

[0068] In an optional embodiment of the present application, calculating the shift amount according to the highest bit exponent value includes:

[0069] When the average power value is equal to the power of the highest exponent value of 2 and the highest exponent value is an even number, the highest bit corresponding to the highest exponent value is shifted right by one position to obtain the shift amount;

[0070] When the average power value is not equal to the power of the highest exponent value of 2, or the highest exponent value is not an even number, the highest bit corresponding to the highest exponent value is shifted right by one bit and then added by one to obtain the shift amount.

[0071] Specifically, after obtaining the highest bit exponent value shift_tmp, it is determined whether the average power value avg_power is equal to 2^shift_tmp. If avg_power is equal to 2^shift_tmp and shift_tmp is an even number, shift_tmp is shifted right by one position to obtain the shift amount shift_value. If avg_power is not equal to 2^shift_tmp, or if shift_tmp is not an even number, shift_tmp is shifted right by one position and then added by 1 to obtain the shift amount shift_value.

[0072] When the average power value is exactly equal to the power of the highest exponent value of 2, that is, the average power value is an integer power of 2, and the highest exponent value is an even number, it means that the binary representation of the power value is regular at this time, and the highest exponent value itself can accurately reflect the magnitude of the power. Shift the highest exponent value right by one position (equivalent to dividing by 2), and the shift amount obtained can just correspond to half the magnitude of the power value, avoiding over-adjustment. For example, if the average power value is 16 (2 4 ), the highest exponent value is 4 (an even number), then a right shift of one bit results in a shift amount of 2, which can accurately adapt to the adjustment requirements of the power level.

[0073] When the average power value is not equal to the power of the highest exponent value of 2, that is, the power value is between two integer powers of 2, or the highest exponent value is an odd number, it means that the magnitude characteristics of the power value are relatively complex, and it may not be possible to fully cover the actual power range by only shifting one bit to the right. In this case, adding one after shifting one bit to the right is equivalent to adding a compensation value on the basis of the basic magnitude to ensure that the shift amount can cover the actual range of the power value. For example, the average power value is 10 (between 8=2 3 Sum 16 = 2 4 The highest exponent value is 3 (odd number), and the right shift is 1 and then add 1, and the final shift amount is 2. This result can better adapt to the power value of 10, which is not an integer power of 2. For example, the average power value is 32 (2 5 ), the highest exponent is 5 (an odd number). Shifting right one bit yields 2, then adding one, for a shift of 3. This avoids the adjustment error caused by an odd exponent. This case-by-case calculation logic ensures that the shift amount can accommodate both regular and irregular power values.

[0074] In this embodiment, the shift amount is calculated in a refined manner based on the numerical characteristics of the average power value and the parity of the highest bit exponent value, so that the shift amount can match the actual power level more accurately, thereby making it possible for the shift amount to match the actual power level more accurately in the future.

[0075] In an optional embodiment of the present application, gain control is performed on the entire superframe data using a power adjustment factor to obtain gain-controlled data, including:

[0076] The entire super-frame data is shifted left by the power adjustment factor number of bits to perform gain control on the entire super-frame data to obtain gain-controlled data.

[0077] Specifically, in a digital system, data is stored and processed in binary form. Shifting one bit to the left is equivalent to multiplying the data by 2. For example, binary "101" shifted left by 1 bit becomes "1010", corresponding to decimal 5 becoming 10; shifting n bits to the left is equivalent to multiplying by 2 to the power of n. Therefore, shifting the power adjustment factor power_factor bits to the left is essentially a proportional amplification of the super-frame data through a binary shift operation. The larger the power adjustment factor, the more bits are shifted left, the higher the data is amplified, and the signal power is increased accordingly. This operation in the present application does not require complex multiplication operations and can be implemented only through a shift register. It takes very little time at the hardware level and can quickly complete the overall gain adjustment of the super-frame data.

[0078] In this implementation, the entire superframe data is left-shifted by the same power adjustment factor, ensuring that the adjusted data maintains its original relative power relationship and does not disrupt the internal structure and signal relevance of the superframe data. Furthermore, this power adjustment factor is derived from the target power and the shift amount based on the actual signal, accurately matching the power requirements of the superframe data. If the original signal power is low, the power can be raised to the target level by left-shifting by an appropriate number of bits. If fine-tuning the power is required, precise adjustment can also be achieved through the precise factor value. The resulting gain-controlled data has stable power and meets the requirements of subsequent system processing (such as demodulation and decoding), effectively avoiding signal distortion or processing errors caused by power fluctuations.

[0079] In an optional embodiment of the present application, starting from the superframe header of the received data, N segments of data are extracted according to a preset rule, including:

[0080] Starting from the super-frame header position, 2048 data are continuously extracted as the initial segment data; data after the initial segment data are extracted according to the system parameter interval to obtain N segments of data.

[0081] Specifically, based on the characteristics of the superframe structure and engineering practice requirements, 2048 data points are continuously extracted from the superframe header as the initial segment data. The superframe header serves as the starting marker for the superframe, and the data near it typically contains synchronization information and stable signal characteristics, with a low probability of transmission interference and strong representativeness. Continuously extracting 2048 data points ensures that the initial segment data volume is sufficient to support basic power signature analysis, avoiding errors caused by too little data, while also not increasing the computational and storage burden due to excessive data volume. Furthermore, 2048 is 2 to the 11th power, which facilitates rapid processing through shift operations in binary operations and adapts to the hardware's computational logic. This initial segment data acts as a baseline sample, providing a reliable starting point for subsequent analysis of the power level of the entire superframe.

[0082] The above-mentioned system parameter interval can be set according to actual needs. For example, according to the symbol distribution of the super-frame data, channel stability or hardware processing capabilities, it is set to extract a segment of data every 1000 symbols. After extracting the initial segment of data, the data after the initial segment of data is extracted according to the system parameter interval to obtain N segments of data. By extracting according to the system parameter interval, it is possible to avoid data concentration in a local area where data characteristics may be distorted due to burst noise, so that the extracted N segments of data cover a wider range of positions in the super-frame, thereby more comprehensively reflecting the data characteristics of the entire super-frame. For example, if there is power fluctuation in the super-frame data, interval extraction can capture samples at different fluctuation stages, making the subsequent calculated average power value closer to the actual situation. At the same time, the total number of N segments of data (N×M) is still much smaller than the total length of the super-frame, thereby reducing the amount of data, while ensuring analysis accuracy and maintaining lightweight computing and storage.

[0083] For example, see Figure 4 As shown, after receiving the data, superframe synchronization processing is performed on the received data to obtain the superframe header and superframe data of the received data. Starting from the superframe header of the received data, N segments of data are extracted according to preset rules. Each segment of data includes M data. The square sum of the real and imaginary parts of all the data in the N segments is calculated, and the square sum is shifted right by log2(N*M) bits to obtain the real power value power_imag and the imaginary power value power_imag, respectively. The real power value and the imaginary power value are then added together to obtain the average power value avg_power. The average power value avg_power is converted to binary, the highest bit shift_tmp is calculated, and the shift amount shift_value is calculated using shift_tmp. The target factor of time domain gain modulation is obtained, and the target factor minus shift_value is subtracted to obtain the power adjustment factor power_factor. The power adjustment factor power_factor is used to perform gain control on the entire superframe data to obtain the gain-controlled data.

[0084] In this embodiment, data is extracted starting from the super-frame header, which can accurately lock the range of the current super-frame to be processed, avoid extracting data from other super-frames, and ensure the pertinence and accuracy of the extracted data; the extraction method under preset rules (such as continuous extraction of the initial segment, interval extraction of subsequent segments, etc.) not only takes advantage of the strong stability of the data near the super-frame header, but also allows the N segments of data to better represent the characteristics of the entire super-frame data by reasonably distributing the extraction positions, thereby ensuring the representativeness of the data; at the same time, the total amount of the N segments of data extracted is much smaller than the length of a single super-frame data, which greatly reduces the amount of data required for subsequent calculations, reduces the processor's computing burden and the storage requirements for hardware memory, and effectively avoids data processing delays and long waiting times for storage.

[0085] In an optional embodiment of the present application, step 205 of performing gain control on the entire superframe data using the power adjustment factor to obtain gain-controlled data includes:

[0086] Performing time-domain AGC processing on the orthogonal frequency division multiplexing symbols of the super-frame data to obtain a time-domain output signal of the super-frame data; wherein the time-domain output signal is calculated according to the following formula:

[0087]

[0088] Among them, G t (q, l) represents the time domain AGC factor, r t-agc (q,l,n) represents the time domain output signal, G target Indicates the target time domain AGC factor, N FFT Indicates the number of sampling points, r in (q, l, n) represents the signal to be processed sampled by the ADC, q represents the antenna number, l represents the symbol number, and n represents the sampling point number within the symbol.

[0089] Performing fast Fourier transform calculations in stages according to the time domain output signal and the number of sampling points to obtain an FFT operation output result; performing subcarrier shifting on the FFT operation output result according to a pre-configured number of RBs; extracting actually occupied subcarriers from the shifted subcarriers to obtain the frequency domain signal;

[0090] The frequency domain AGC factor adjustment calculation unit performs frequency domain AGC processing on the frequency domain signal to obtain a frequency domain output signal; wherein the frequency domain output signal is calculated according to the following formula:

[0091]

[0092] Among them, G f (q,l,k RBG ) represents the frequency domain AGC factor, R f-agc (q,l,n) represents the frequency domain output signal; R(q,l,k) represents the FFT operation output result, q represents the antenna number, l represents the symbol number, k represents the index of the actually occupied subcarrier, real(R(q,l,k)) represents the real part of R(q,l,k), imag(R(q,l,k)) represents the imaginary part of R(q,l,k), N RBG Indicates the number of RBs included in the calculation unit, k RBG Indicates the index of the frequency domain AGC factor adjustment calculation unit, The value range is 0 to 272.

[0093] The frequency domain output signal is de-resourced according to the scheduling information of each uplink channel and then sent to each channel for processing.

[0094] It should be understood that although the various steps in the flowchart are shown in sequence as indicated by the arrows, these steps are not necessarily performed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order restriction on the execution of these steps, and these steps can be performed in other orders. Moreover, at least a portion of the steps in the figure may include multiple sub-steps or multiple stages, and these sub-steps or stages are not necessarily performed at the same time, but can be performed at different times. The execution order of these sub-steps or stages is not necessarily to be performed in sequence, but can be performed in turn or alternately with other steps or at least a portion of the sub-steps or stages of other steps.

[0095] In another embodiment provided by the present application, an automatic gain control device is also provided, see Figure 5 As shown, the device includes:

[0096] An acquisition module 810 is configured to perform superframe synchronization processing on received data and obtain a superframe header and superframe data of the received data;

[0097] Extraction module 820, configured to extract N segments of data starting from the super-frame header of the received data according to a preset rule; each segment of data includes M data, and (N*M) is less than the length of a single super-frame data;

[0098] An analysis module 830 is configured to perform real and imaginary part analysis on all data in the N segments of data and calculate an average power value;

[0099] Determining module 840, configured to determine a power adjustment factor based on the average power value; the power adjustment factor is used to implement dynamic adjustment of received data;

[0100] The gain control module 850 is configured to perform gain control on the entire super-frame data using the power adjustment factor to obtain gain-controlled data.

[0101] Optionally, the analysis module 830 is specifically configured to:

[0102] Calculate the square sum of all the real parts of the data and shift the square sum of the real parts to the right by a preset value to obtain the real power value; the preset value is log2(N×M);

[0103] Calculate the sum of the squares of the imaginary parts of all data, and shift the sum of the squares of the imaginary parts to the right by a preset value to obtain the imaginary power value;

[0104] Add the real power value and the imaginary power value to obtain the average power value.

[0105] Optionally, the analysis module 830 is further configured to:

[0106] For each data, multiply the real part of each data by the real part to obtain the multiplication result;

[0107] The multiplication results of all data are added together to obtain the square sum of the real parts of all data.

[0108] Optionally, the determination module 840 is specifically configured to:

[0109] Convert the average power value into binary and determine the highest bit exponent value; the highest bit exponent value is the exponent value corresponding to the most significant bit after conversion to binary;

[0110] Calculate the shift amount according to the highest bit index value;

[0111] Obtain a target factor for time domain gain adjustment, subtract the shift amount from the target factor, and obtain a power adjustment factor.

[0112] Optionally, the determination module 840 is further configured to:

[0113] When the average power value is equal to the power of the highest exponent value of 2 and the highest exponent value is an even number, the highest bit corresponding to the highest exponent value is shifted right by one position to obtain the shift amount;

[0114] When the average power value is not equal to the power of the highest exponent value of 2, or the highest exponent value is not an even number, the highest bit corresponding to the highest exponent value is shifted right by one bit and then added by one to obtain the shift amount.

[0115] Optionally, the gain control module 850 is specifically configured to:

[0116] The entire super-frame data is shifted left by the power adjustment factor number of bits to perform gain control on the entire super-frame data to obtain gain-controlled data.

[0117] Optionally, the extraction module 820 is specifically configured to:

[0118] Starting from the super-frame header, 2048 data are continuously extracted as the initial segment data;

[0119] The data after the initial segment data is extracted according to the system parameter interval to obtain N segments of data.

[0120] The specific definitions of the automatic gain control device described above can be found in the definitions of the automatic gain control method described above and will not be further elaborated here. Each module in the automatic gain control device described above may be implemented in whole or in part via software, hardware, or a combination thereof. Each module may be embedded in or independent of a processor in a computer device in hardware form, or may be stored in a memory in the computer device in software form, so that the processor can call and execute the corresponding operations of each module.

[0121] In one embodiment, a computer device is provided. The internal structure diagram of the computer device can be as follows: Figure 1 As shown. The computer device includes a processor, a memory, a network interface and a database connected via a system bus. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store data. The network interface of the computer device is used to communicate with an external terminal via a network connection. When the computer program is executed by the processor, an automatic gain control method as described above is implemented. It includes: a memory and a processor, the memory stores a computer program, and when the processor executes the computer program, any step in the automatic gain control method as described above is implemented.

[0122] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, any step in the above automatic gain control method can be implemented.

[0123] Those skilled in the art will appreciate that the embodiments of the present application can be provided as methods, systems, or computer program products. Therefore, the present application can adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application can adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code.

[0124] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the steps in the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0125] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0126] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0127] Although the preferred embodiments of the present application have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present application.

[0128] Obviously, those skilled in the art may make various changes and modifications to this application without departing from the spirit and scope of this application. Thus, if these modifications and variations of this application fall within the scope of the claims of this application and their equivalents, this application is intended to include these modifications and variations.

Claims

1. An automatic gain control method, characterized in that: The automatic gain control method comprises: Performing superframe synchronization processing on the received data to obtain a superframe header and superframe data of the received data; Starting from the superframe header of the received data, extracting N segments of data according to a preset rule; each segment of data includes M data, (N*M) < the length of a single superframe data; Perform real and imaginary part analysis on all data in the N segments of data to calculate the average power value; Determining a power adjustment factor based on the average power value; the power adjustment factor is used to achieve dynamic adjustment of received data; The power adjustment factor is used to perform gain control on the entire super-frame data to obtain gain-controlled data.

2. The automatic gain control method according to claim 1, wherein: Performing real and imaginary part analysis on all data in the N segments of data to calculate an average power value includes: Calculate the square sum of all the real parts of the data, and shift the square sum of the real parts to the right by a preset value to obtain a real power value; the preset value is log2(N×M); Calculating the sum of the squares of the imaginary parts of all data, and shifting the sum of the squares of the imaginary parts to the right by the preset value to obtain an imaginary part power value; The real power value and the imaginary power value are added to obtain the average power value.

3. The automatic gain control method according to claim 2, wherein: Calculate the sum of the squares of the real parts of all data, including: For each data, multiply the real part of each data by the real part to obtain a multiplication result; The multiplication results of all the data are added together to obtain the square sum of the real parts of all the data.

4. The automatic gain control method according to claim 1, wherein: Determining a power adjustment factor according to the average power value includes: Convert the average power value into binary and determine the highest bit exponent value; the highest bit exponent value is the exponent value corresponding to the most significant bit after conversion to binary; Calculate the shift amount according to the highest bit index value; A target factor for time domain gain adjustment is obtained, and the shift amount is subtracted from the target factor to obtain the power adjustment factor.

5. The automatic gain control method according to claim 4, wherein: Calculating a shift amount according to the highest bit exponent value includes: When the average power value is equal to the highest bit exponent value of 2 to the power of the highest bit exponent value, and the highest bit exponent value is an even number, shifting the highest bit corresponding to the highest bit exponent value right by one position to obtain the shift amount; When the average power value is not equal to the power of the highest bit exponent value of 2, or the highest bit exponent value is not an even number, the highest bit corresponding to the highest bit exponent value is shifted right by one bit and then added by one to obtain the shift amount.

6. The automatic gain control method according to claim 1, wherein: Performing gain control on the entire superframe data using the power adjustment factor to obtain gain-controlled data includes: The entire super-frame data is shifted leftward by the power adjustment factor number of bits to perform gain control on the entire super-frame data to obtain gain-controlled data.

7. The automatic gain control method according to claim 1, wherein: Starting from the superframe header of the received data, extracting N segments of data according to a preset rule, including: Starting from the super-frame header position, continuously extracting 2048 data as initial segment data; The data after the initial segment data is extracted according to the system parameter interval to obtain the N segments of data.

8. An automatic gain control device, characterized in that: The automatic gain control device comprises: An acquisition module, configured to perform superframe synchronization processing on received data and obtain a superframe header and superframe data of the received data; An extraction module is configured to extract N segments of data starting from the superframe header of the received data according to a preset rule; each segment of data includes M data, and (N*M) is less than the length of a single superframe data; An analysis module is used to perform real and imaginary part analysis on all the data in the N segments of data and calculate an average power value; a determination module, configured to determine a power adjustment factor according to the average power value; the power adjustment factor being used to implement dynamic adjustment of received data; The gain control module is used to perform gain control on the entire super-frame data using the power adjustment factor to obtain gain-controlled data.

9. A computer device comprising: A memory and a processor, wherein the memory stores a computer program, and wherein the processor implements the steps of the method according to any one of claims 1 to 7 when executing the computer program.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.

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