Lamp strip output mode identification method based on distributed voltage-controlled sampling equalization mechanism

Abstract

The invention relates to a lamp strip output mode identification method based on a distributed voltage-controlled sampling equalization mechanism, and the method carries out the one-by-one identification of a lamp strip connected with the output ends of a plurality of color channels through the cooperation of a single voltage detection path and a time-sharing driving mode. The system collects voltage-controlled response voltage during the independent excitation period of each output end, constructs an initial voltage sampling sequence, and performs normalization processing on the sequence to form a voltage response intensity vector. The response amplitude, the response time sequence and the relative change characteristics of each channel are extracted and compared with a preset output mode standard, so that accurate identification of single-channel, double-color-temperature, RGB, RGBW or RGBCW lamp strips is realized. An identification result is written into a control logic unit in a mode coding form, and a light emitting strategy matched with the control logic unit is driven by the control logic, so that the type of the accessed lamp strip is automatically identified without manual intervention, and mode matching and output control are completed.

Description

Technical Field

[0001] The present invention relates to the technical field of light strip control, and in particular to a light strip output pattern recognition method based on a distributed voltage-controlled sampling and balancing mechanism. Background Art

[0002] Currently, existing technologies in the field of smart lighting and multi-channel light strip control generally use independent detection circuits to identify the connected status of different light strip types. Controllers are typically equipped with multiple current or voltage detection modules, one for each output channel, to detect the presence of a load. These controllers often manually switch output modes using a button, or rely on parallel identification of the electrical characteristics of each channel individually sampled to match the corresponding driving strategy. These solutions have a certain degree of adaptability in terms of functional implementation and can cover the driving requirements of mainstream light strips such as RGB and RGBW.

[0003] Existing technologies commonly suffer from issues such as reliance on redundant hardware structures, complex control processes, poor detection path independence, and high false positive rates. On the one hand, to achieve multi-channel recognition, the controller must be equipped with multiple op amps, sampling resistors, and ADC paths, resulting in large board space requirements, high costs, and uncontrollable EMC interference. On the other hand, during the actual recognition process, if there are unstable light strip connections, voltage fluctuations, or load interference between channels, the system is prone to recognition failures, mismatching, and the inability to automatically switch, affecting the overall user experience and hindering mass production and product standardization.

[0004] Based on this, it is necessary to develop a new light strip output pattern recognition method based on distributed voltage-controlled sampling and equalization mechanism. Summary of the Invention

[0005] The present application provides a light strip output mode recognition method based on a distributed voltage-controlled sampling and balancing mechanism to improve the automatic recognition accuracy and adaptation efficiency of various light strip output modes.

[0006] This application provides a method for identifying light strip output patterns based on a distributed voltage-controlled sampling and balancing mechanism, including:

[0007] Time-sharingly driving various light strips connected to a plurality of universal output terminals through a single voltage detection path, wherein the plurality of universal output terminals include a first output terminal to a fifth output terminal, each output terminal corresponding to a predefined color channel identifier;

[0008] During the period when each output terminal is independently driven, a voltage-controlled response voltage value flowing through a single voltage detection path is collected to form a set of initial voltage sampling sequences, wherein the initial voltage sampling sequences correspond to voltage changes when different output terminals are driven;

[0009] performing level difference normalization processing on the initial voltage sampling sequence, wherein the normalization processing includes proportionally adjusting each voltage value based on a range between a minimum sampling voltage and a maximum sampling voltage, thereby constructing a set of voltage response intensity vectors;

[0010] Performing a feature extraction operation on the voltage response intensity vector, wherein the feature extraction includes identifying the response amplitude, response start time, and relative change amplitude of each output terminal, and comparing them one by one with a preset output mode standard;

[0011] Based on the comparison results, determine whether the current light strip connection state corresponds to one of the single-channel mode, dual-color temperature mode, RGB mode, RGBW mode, or RGBCW mode, and write the corresponding mode code into the internal storage space of the control logic unit;

[0012] According to the judgment result, the output mode code is determined and sent to the control logic unit, and the control logic unit drives the lighting strategy matching the current output mode accordingly.

[0013] The beneficial effects of the technical solution provided by this application include:

[0014] (1) A single voltage detection path is used to perform time-sharing sampling on multiple common output light strips, significantly reducing hardware complexity and circuit cost, avoiding hardware redundancy and signal interference problems in traditional multi-channel independent sampling schemes, and improving system integration and reliability. (2) By constructing a voltage response intensity vector and performing normalization processing, the voltage deviation caused by factors such as different light strip models and power supply fluctuations can be effectively suppressed, improving the accuracy of feature extraction and output pattern recognition, and ensuring that the recognition results are stable in various usage environments. (3) The voltage response characteristics are compared one by one in combination with the preset output mode standard, enabling the system to accurately distinguish between multiple common light strip connection states such as single channel, dual color temperature, RGB, RGBW, RGBCW, etc., realizing intelligent recognition and automatic adaptation, avoiding manual configuration by users, and improving ease of use. (4) The identified output mode code is written into the control logic unit and passed to the control logic to automatically drive the lighting strategy that matches the actual connection mode. This not only realizes plug-and-play functionality, but also significantly enhances the versatility and intelligence level of the control system to adapt to diverse lighting application needs. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 This is a flowchart of a light strip output mode recognition method based on a distributed voltage-controlled sampling and balancing mechanism provided in the first embodiment of the present application.

[0016] Figure 2This is a hardware working principle diagram of a light strip output pattern recognition method based on a distributed voltage-controlled sampling and balancing mechanism involved in the first embodiment of the present application. DETAILED DESCRIPTION

[0017] The following description sets forth many specific details to facilitate a thorough understanding of the present application. However, the present application can be implemented in many other ways than those described herein, and those skilled in the art can make similar generalizations without violating the scope of the present application. Therefore, the present application is not limited to the specific implementations disclosed below.

[0018] In order to quickly understand the working principle of the present invention, Figure 2 Please explain in detail. Figure 2 As shown, the MCU controller 201 is internally provided with five PWM control output ports, which are named PWM_R, PWM_G, PWM_B, PWM_C and PWM_W. These five PWM output ports are respectively connected to the R+ port, G+ port, B+ port, C+ port and W+ port for connection of external light strips. The external light strips include R light strip, G light strip, B light strip, C light strip and W light strip, which correspond to the red light, green light, blue light, cold white light and warm white light channels in actual applications. When connecting the light strips, the user may only connect some of the ports to form different channel combinations. The controller provided by the present invention does not rely on the user's preset output mode, but automatically determines the type of the light strip by detecting the flow state of the access end, and matches the corresponding control logic.

[0019] When the MCU controller 201 is working, it controls each PWM output end to activate in sequence. Only one PWM output channel is activated at a time, and the rest remain closed. At this time, if a port is connected to a light strip, the corresponding channel will be turned on and current will flow into the common negative path. The negative poles of all light strips are aggregated to a common ground point, and a low-resistance sampling resistor 202 is connected in series in the common negative path. When current flows through the resistor 202, a small voltage difference is generated at both ends of it. After the voltage difference signal is amplified by the operational amplifier, it is sent to the ADC (analog-to-digital converter) input port inside or outside the MCU for sampling. The MCU controller 201 reads the ADC value to determine whether there is a load connected to the currently activated PWM channel, and then generates a set of voltage sampling sequences.

[0020] After activating and sampling all PWM channels one by one, the MCU controller 201 normalizes this set of voltage sampling sequences and extracts the response characteristics of each channel, including response amplitude, starting timing, and variation characteristics. The MCU controller 201 has a built-in set of preset output mode standards corresponding to various common light strip types, including single-channel mode, dual-color temperature mode, RGB mode, RGBW mode, and RGBCW mode. By matching the sampled channel response vectors with the preset rule set, the output mode type of the connected light strip can be accurately determined.

[0021] The so-called single-channel mode means that the user only connects the C+ or W+ port to the light strip, and the other ports are not connected to any load. It is usually used for monochrome cool white light or warm white light lighting purposes; dual color temperature mode means that the user connects to the C+ and W+ ports at the same time to achieve mixed control of cool white and warm white lamp beads; RGB mode means only connecting to the R+, G+ and B+ three-way ports, which is commonly used in color light atmosphere lamp applications; RGBW mode adds the W+ port on the basis of RGB, which is used to mix color light and independent white light channels; RGBCW mode means that all five ports are connected to achieve complex scenes of simultaneous control of five RGB color, cool white and warm white lamp beads.

[0022] Based on the recognition results, the MCU writes the determined output mode code into an internal register and simultaneously activates the corresponding PWM control strategy to ensure the normal operation of the light strip. The controller can also be configured with a status indicator or use the color emitted by the light strip itself as feedback to indicate successful pattern recognition. If the channel response combination does not match any of the preset patterns during the recognition process, the controller outputs an abnormality warning signal to alert the user to a possible wiring error. The automatic recognition process can be retriggered by pressing a button or cycling the power.

[0023] The present invention is achieved by Figure 2 The single MCU architecture, unified voltage sampling path, five-channel PWM time-sharing drive, and pattern recognition logic shown in the figure create a light strip controller solution with simple hardware, efficient recognition, and user-friendly design.

[0024] The first embodiment of the present application provides a method for identifying light strip output patterns based on a distributed voltage-controlled sampling and balancing mechanism. Figure 1 , which is a schematic diagram of the first embodiment of this application. Figure 1 The first embodiment of the present application provides a light strip output mode recognition method based on a distributed voltage-controlled sampling and balancing mechanism, which is described in detail.

[0025] Step S101: Time-sharingly driving various light strips connected to a plurality of universal output terminals through a single voltage detection path, wherein the plurality of universal output terminals include a first output terminal to a fifth output terminal, and each output terminal corresponds to a predefined color channel identifier.

[0026] In the lamp strip output mode recognition method provided by the application, the implementation of step S101 constitutes the basis of the whole recognition process, which realizes the sequential excitation control of the multi-channel lamp strip control end through a unified and simplified hardware architecture, thereby providing separable electrical excitation conditions for subsequent voltage response sampling and output mode determination. To implement this step, a lamp strip controller with at least five output ports is first prepared, and each output port is defined as a first output port to a fifth output port. The above output ports are respectively identified as R (red light), G (green light), B (blue light), C (cool white light) and W (warm white light) according to the general interface specification of the lamp strip industry, and respectively correspond to the RGB color light channel and the dual-color temperature white light channel.

[0027] A micro control logic unit (MCU) with PWM (pulse width modulation) control capability is integrated inside the controller, and the MCU has at least five PWM control output pins electrically connected to the above-mentioned R, G, B, C and W five ports. Each PWM pin can set control parameters such as output period, duty cycle, start time and shutdown condition through programming. After the system is powered on, the MCU calls the built-in recognition program and enters the excitation control stage in the automatic recognition process. In this stage, the MCU activates a single PWM output channel in a set order and ensures that only one output channel is in the on state at any time, and the remaining channels are all off. In the actual control process, the PWM output can be set to a stable high-level output mode or a continuous output state with a 100% duty cycle to ensure that the driving signal is sufficient to activate the connected lamp strip load circuit.

[0028] For example, when the MCU activates PWM_R output, only the R+ port outputs a high-level driving signal, and if the port is connected to the red light channel of the lamp strip, a closed current loop of R+→ lamp strip load→ common negative path→ ground will be formed. The negative connection end of all lamp strips in the system is connected to the common negative loop through a wire, and a precision low-resistance sampling resistor with a typical resistance of 0.05Ω to 0.1Ω is connected in series in the loop to generate a small voltage difference when current passes through, for the collection of the later detection circuit.

[0029] Subsequently, the MCU closes the PWM_R channel and activates PWM_G, PWM_B, PWM_C and PWM_W in turn, which is exactly the same as the above operation. Each activation only lasts for several milliseconds to several tens of milliseconds to ensure that a stable current loop is formed and sufficient response is obtained. Through this control mechanism of "single-channel excitation + time-sharing driving", the voltage detection circuit can realize the identification of multiple output channels one by one, which not only avoids electrical interference between channels, but also greatly simplifies the hardware structure and improves the scalability of the system.

[0030] This step converts the traditional multi-channel parallel detection method into a controllable serial time-sharing excitation process. This allows subsequent voltage sampling and channel response feature extraction to be completed within a single sampling path. Each measured voltage signal can be clearly attributed to the currently activated output terminal, enabling accurate and reliable response identification. This approach not only effectively reduces circuit complexity and cost, but also improves the system's adaptability to scenarios such as wiring errors and load changes.

[0031] Step S102 : While each output terminal is independently driven, the voltage-controlled response voltage value flowing through a single voltage detection path is collected to form a set of initial voltage sampling sequences, wherein the initial voltage sampling sequences correspond to voltage changes when different output terminals are driven.

[0032] In the light strip output pattern recognition method of the present invention, step S102 collects the voltage-controlled response voltage values ​​obtained through the unified voltage detection path in real time, based on the time-sharing driving of each output terminal, and forms a complete initial voltage sampling sequence based on this data. This step is not only a key signal acquisition link in the recognition process, but also the core technical support for the establishment of the entire recognition mechanism.

[0033] In step S101, the controller sequentially activates multiple output terminals in a time-sharing manner, activating only one channel at a time. For example, the R channel is enabled first, while the remaining G, B, C, and W channels are all disabled. At this time, if the load connected to the R channel is an actual light strip, the current drawn from the output terminal of this channel will flow through the load into the negative circuit, generating a small voltage drop across the sampling resistor in the common circuit. This voltage difference is linearly amplified by a high-input impedance operational amplifier, and its output voltage signal is introduced into an analog-to-digital converter (ADC) module inside or outside the MCU, forming a set of voltage response values ​​corresponding to the current PWM channel activation state.

[0034] The above process is repeated once for each channel activation period. Specifically, the system records the voltage response once when PWM_R outputs, once again when PWM_G outputs, and so on, until the corresponding PWM_W channel activation is complete. Five activation processes generate a total of five sets of voltage-controlled response voltage values ​​at the corresponding output terminals. These voltage values ​​together constitute an initial voltage sampling sequence, which is stored in the controller's internal sampling buffer area or array in the order of activation.

[0035] To ensure accurate data sampling, voltage sampling should be performed after the PWM output stabilizes, avoiding sampling at the edge of the PWM duty cycle or during load charging. To this end, the MCU can delay each channel activation for a certain period (e.g., 10 to 20 microseconds) to stabilize the system state before invoking the ADC module for synchronous sampling. It is recommended that the sampling results retain at least 12 bits of accuracy to ensure the dynamic range required for subsequent normalization and fine-grained recognition.

[0036] Furthermore, to prevent voltage sampling anomalies caused by grid fluctuations, uneven loads, or power supply interference, filtering strategies can be introduced during the sampling process. For example, multiple sampling steps can be performed to average the results, a sliding window filter can be introduced, or upper and lower thresholds can be set to eliminate abnormal data. If an external ADC chip is used, it can also be configured for single-ended input mode, with the reference ground being the ground terminal at the bottom of the sampling resistor, ensuring a consistent reference for all sampled values.

[0037] The resulting initial voltage sampling sequence should be a five-dimensional vector, with each element representing the voltage response generated when the five PWM channels (R, G, B, C, and W) are independently activated. This voltage sequence will serve as the basic data input for subsequent normalization and pattern recognition, so the sampling must be accurate, stable, and repeatable.

[0038] Furthermore, during the period when each output terminal is independently driven, the voltage-controlled response voltage value flowing through a single voltage detection path is collected to form a set of initial voltage sampling sequences, including:

[0039] During the period when each output terminal is independently driven, a voltage-controlled driving voltage signal with graded variation is applied to the output terminal, and an independent voltage-controlled response voltage sampling window is set during the period when each level of voltage-controlled driving voltage is continuously stable, so as to cover the response behavior of different electrical characteristic sections;

[0040] In each voltage-controlled response voltage sampling window, a differential change rate extraction algorithm is applied to process the sampled voltage-controlled response voltage value sequence to construct a set of differential vectors reflecting the voltage response change rate and trend turning points, which are used to characterize the response characteristics of different electrical states.

[0041] Based on the similarity, delay alignment, and response strength distribution differences between the differential vector sets of each output port, a set of voltage-controlled response difference matrices between the output ports are constructed. The low-coupling regions marked in the matrix are then used to filter out the valid response data segments that can most independently reflect the current output port connection status during the voltage-controlled driving process.

[0042] The valid response data segments are integrated in order of the output terminals, and the integration result is used as the initial voltage sampling sequence for subsequent level difference normalization processing and voltage response intensity vector construction operations.

[0043] In the light strip output pattern recognition method described in the present invention, to form a set of initial voltage sampling sequences with high resolution and discrimination, a sophisticated processing process, including voltage-controlled voltage application, sampling window delineation, differential feature extraction, and response difference identification, is required while each output terminal is independently driven. This process begins with voltage-controlled driving of the output terminal. The control logic unit applies a set of graded voltage-controlled driving voltage signals to the currently driven output terminal. These voltage-controlled driving voltage signals are not fixed constant values ​​but are adjusted sequentially according to preset voltage levels within a continuous driving cycle. Each voltage level remains stable for a period of time before switching to the next voltage level, thereby constructing a set of discrete but stable voltage-controlled driving voltage platforms.

[0044] For each stable voltage plateau, the system sets a corresponding voltage sampling window. This window's time range covers the stable range of the voltage-controlled drive voltage at that level, ensuring the representativeness of the collected voltage-controlled response voltage values ​​and minimizing interference during voltage variations. These sampling windows are strictly aligned with the switching timing of the voltage-controlled voltage, ensuring that the entire response behavior is captured segmented and fully presenting the electrical response characteristics of the light strip feedback path under different drive intensities.

[0045] Within each sampling window, the system applies a differential rate-of-change extraction algorithm to process the sequence of voltage values ​​in the voltage-controlled response within that period. This algorithm calculates the instantaneous slope of the voltage change, the second-order difference, and the dynamic fluctuation between adjacent sampling points to generate a set of differential vectors that quantify the voltage response's changing trend, sudden change boundaries, and stable transition regions. Each output terminal generates a set of differential vectors representing its dynamic response characteristics at different voltage-controlled levels.

[0046] Next, the system compares the differential vector sets from different output terminals, focusing on their similarity (such as Euclidean distance or cosine similarity), the degree of time alignment of response delays, and the distribution differences of intensity responses in each voltage-controlled interval. Based on these comparison indicators, the system further constructs a set of voltage-controlled response difference matrices. Each cell of this matrix describes the degree of response difference between two output terminals at the same voltage-controlled level. Through matrix analysis, low-coupling regions are identified, that is, those response data segments that have minimal impact on the responses of other channels and can independently reflect the electrical characteristics of the channel.

[0047] Ultimately, the system integrates these filtered valid response data fragments according to the driving order of each output terminal to form a stable and highly reliable initial voltage sampling sequence. This sequence not only retains the typical voltage-controlled response characteristics of each output terminal, but also effectively eliminates interference factors such as multi-channel mutual interference and common-mode background fluctuations. This provides a stable and accurate data foundation for subsequent level difference normalization processing and the construction of voltage response intensity vectors, ensuring sufficient discrimination and environmental adaptability during the light strip output pattern recognition process.

[0048] Taking the RGBW mode light strip as an example, the light strip includes four color channels: red, green, blue, and white, which are connected to predefined universal output terminals 1 through 4. The control logic unit independently drives these four output terminals in sequence according to a preset strategy, applying a set of graded voltage-controlled drive voltage signals during each drive cycle. Taking the first output terminal as an example, the voltage levels applied to this channel are 1.0V, 1.5V, 2.0V, 2.5V, and 3.0V, with each level lasting 10ms, forming a graded drive platform. An 8ms voltage-controlled response voltage sampling window is set in the middle of each voltage platform to ensure stable and reliable data acquisition and avoid edge interference caused by up and down transitions.

[0049] Within the sampling window at the first output, the system performs high-speed sampling of the voltage-controlled response voltage flowing through a single voltage detection path, assuming 80 sampling points are collected within each window. Using a differential rate-of-change extraction algorithm, the system calculates the differences between adjacent points in this set of voltage values ​​and constructs a differential sequence. This sequence then extracts response features such as the slope of the rising segment, the location of the inflection point in the falling segment, the peak position, and the number of local fluctuations. Assuming the sampling results show a steady upward trend on the 1.0V plateau, peak at the 2.0V plateau, and then fall slightly, the constructed differential vector might contain the following data: [0.12, 0.15, 0.18, 0.21, 0.17, 0.12, -0.03, -0.08], where each value represents the rate of change between adjacent sampling points. This vector describes the dynamic behavior of the voltage response.

[0050] Similarly, the system performs the above operations on the second (green), third (blue), and fourth (white light) output terminals, and extracts the corresponding differential vector sets. The system then calculates the similarity between these differential vector sets (for example, using the cosine similarity calculation method), while measuring the time difference between the peaks of each response characteristic (for example, the timestamp difference of the maximum response value) and the mean and standard deviation of each vector value. Through these calculations, a 4×4 voltage-controlled response difference matrix is ​​constructed, in which each element M(i,j) represents the difference in response characteristics between the i-th output terminal and the j-th output terminal. Assume that the matrix is ​​as follows:

[0051] Red Channel Green Channel Blue Channel White channel Red Channel 0 0.63 0.75 0.68 Green Channel 0.63 0 0.58 0.71 Blue Channel 0.75 0.58 0 0.69 White channel 0.68 0.71 0.69 0

[0052] This matrix represents the degree of coupling of each output terminal in the voltage-controlled response characteristics. The higher the value, the greater the difference and the lower the coupling. Based on this, the system selects the voltage segment with the largest difference between each output terminal and other channels as the valid response data segment. For example, the first output terminal (red channel) and the third output terminal (blue channel) have a maximum value of 0.75 in the difference matrix. The system thus determines that the current response of the red channel can better independently reflect the state of the channel and selects its voltage sequence during the 2.0V drive platform period as the valid segment. This process is repeated for each output terminal, and the best difference segment is recorded separately.

[0053] Finally, the valid response data segments from the four output terminals are concatenated in the driving order to form an initial voltage sampling sequence with high variance and low coupling. The overall length is determined by the cumulative number of sampling points in each segment, assuming a total of 320 points (80 points per channel). This sampling sequence will be used in subsequent processing for normalization scaling and voltage response intensity vector construction, ensuring that the final output pattern recognition is highly discriminative and robust at the physical voltage characteristic level.

[0054] Step S103: performing level difference normalization processing on the initial voltage sampling sequence, wherein the normalization processing includes proportionally adjusting each voltage value based on a range between a minimum sampling voltage and a maximum sampling voltage, thereby constructing a set of voltage response intensity vectors.

[0055] After completing time-sharing excitation and collecting the corresponding voltage-controlled response voltage values ​​for each output channel, step S103 of the present invention normalizes the initial voltage sampling sequence to eliminate voltage amplitude variations caused by system power supply fluctuations, LED load characteristics, or cable voltage drops. This ensures comparability and relative consistency of the sampled data from different light strips. This step essentially maps the voltage response values ​​generated by each independently driven output channel into standardized intensity values ​​within a uniform scale, thereby forming a stable voltage response intensity vector that can be used for subsequent analysis.

[0056] Specifically, after the light strip controller completes independent excitation and voltage sampling for the five R, G, B, C, and W channels, it generates a voltage vector consisting of five floating-point voltage values. Each value in this vector represents the voltage drop across the sampling resistor in the common detection path when the corresponding output channel is turned on. This signal is amplified and then collected by the ADC. In real-world environments, the response values ​​for different light strips, wire diameters, and power supply conditions will vary in magnitude. Even if the user only connects a single light strip, different batches may result in inconsistent voltage drop magnitudes. Therefore, the raw voltage vector needs to be normalized and standardized.

[0057] In this embodiment, normalization uses a minimum-maximum mapping method. First, the maximum and minimum voltage values ​​are searched for in the initial sampling sequence, denoted as Vmax and Vmin, respectively. Then, for any voltage value Vi in the original sequence, the following mapping operation is performed: it is converted to a normalized voltage Vi' = (Vi - Vmin) / (Vmax - Vmin). This process results in the minimum value in the original voltage vector being mapped to 0, the maximum value being mapped to 1, and the remaining values ​​being distributed between 0 and 1, reflecting the proportional relationship between the relative response strengths of each channel.

[0058] The normalized voltage response intensity vector not only has a uniform scale but also exhibits good robustness, significantly reducing recognition errors caused by differences in the absolute values ​​of the channel response amplitudes. This normalization process can be implemented using the MCU's internal floating-point unit or integer approximation. To avoid division by zero anomalies, fault-tolerant logic should be implemented when Vmax and Vmin are close to or equal. For example, a minimum difference threshold should be set to skip normalization or the condition should be directly marked as invalid recognition input.

[0059] This step converts the actual sampled data from raw voltage measurements, which are subject to environmental interference, into relative intensity indicators that can be used to determine channel status, providing a standardized numerical basis for subsequent feature extraction and pattern recognition. This processing method is not only applicable to the five-channel recognition controller described in this invention, but also has good horizontal scalability, allowing it to be expanded to output structures with seven or even more channels.

[0060] Furthermore, the performing level difference normalization processing on the initial voltage sampling sequence includes:

[0061] After forming the initial voltage sampling sequence, performing upper and lower limit elimination processing on the sampled voltage values ​​corresponding to each output terminal, wherein edge sampling points in the sampled value sequence that are 5% of the maximum and minimum values ​​in the current sequence are eliminated, to obtain a set of sampled voltage subsequences with corrected upper and lower limits;

[0062] Based on the sampled voltage subsequence after the upper and lower limit corrections, calculate the central mean and central span of the sampled voltage subsequence, where the central mean is the average of the two middle sampling points, and the central span is the difference between the upper and lower correction limits, which are used as the normalized reference interval;

[0063] Each sampling point in the original initial voltage sampling sequence is normalized by dividing the difference between it and the central mean by the central span to obtain a set of normalized voltage response intensity vectors. All normalized values ​​are limited to the range of [-1, 1] to avoid interference of extreme response values ​​on subsequent feature extraction.

[0064] In the light strip output mode recognition method based on the distributed voltage-controlled sampling equalization mechanism, in order to realize the uniform alignment and comparability of the voltage response characteristics under different connection light strip states, the initial voltage sampling sequence formed needs to be subjected to level difference normalization processing. The normalization processing process is based on the voltage response curve of each output end, and under the premise of maintaining the effectiveness of the response characteristics, eliminates the amplitude drift and response deviation caused by electrical parameter difference, connection mode difference or power supply disturbance, thereby establishing a consistent quantization standard for subsequent feature extraction and mode comparison.

[0065] The normalization processing operation first identifies the sampling value set corresponding to each output end from the initial voltage sampling sequence, and performs upper and lower limit rejection processing on each set. Specifically, all data points in the sampling value set are sorted in ascending order of value, and the edge sampling points located at the positions of 5% outside the maximum and minimum values in the current sequence are located, that is, the discrete values of 5% at both ends are removed. This operation can effectively exclude extreme samples that occur under atypical conditions such as signal interference, voltage transient jitter or unstable contact, ensuring that subsequent calculations are performed within a statistically stable range.

[0066] After rejecting the edge outliers, the center statistical parameter extraction operation is performed on the corrected sampling subsequence, that is, the center mean and center span of the subsequence are calculated. The center mean is obtained by locating the middle two sampling points and averaging them, and is used to represent the typical level of the current output channel under stable response state; and the center span is defined as the difference between the upper and lower rejection limits, and is used as the standardized amplitude interval of the sampling data, to characterize the variable amplitude of the response curve under effective state.

[0067] Subsequently, all sampling points in the original initial voltage sampling sequence are subjected to standardization calculation one by one. The calculation method is: subtract the center mean from the voltage value of each sampling point, and divide the difference by the center span, thereby forming a set of normalized response intensity values. In order to enhance the model robustness and avoid the pulling effect of extreme response values on subsequent comparison operations, all normalized values are limited to the fixed interval [-1, 1]. In this way, the response characteristics of different channels and different modes can be brought into a unified scale space, facilitating subsequent operations such as mode recognition, feature alignment and fault tolerance judgment on the voltage response intensity vector.

[0068] The level difference normalization processing completed through the above steps not only improves the expression clarity and comparison feasibility of the sampling data, but also lays a unified, stable and reliable foundation for system identification of multi-channel lamp strip connection state. This method is especially suitable for actual installation scenes with complex and variable electrical environment and significant voltage response fluctuation, and can realize accurate identification and stable operation while simplifying the hardware resource demand, which has significant application value.

[0069] Suppose in practical application, the system needs to identify the output mode of a certain lamp strip. In the pre-operation, the system drives the general channels connected to the first to fifth output ends in time-sharing mode, and collects a group of initial voltage sampling sequences through a single voltage detection path. Taking the first output end as an example, the corresponding group of initial sampling values (unit: millivolt) is as follows:

[0070] [302, 310, 315, 318, 320, 325, 329, 332, 340, 390]

[0071] Firstly, the system sorts the voltage sampling sequence and performs upper and lower limit rejection processing. The sequence sorting result is:

[0072] [302, 310, 315, 318, 320, 325, 329, 332, 340, 390]

[0073] The edge points of 5% on the upper and lower sides correspond to the head and tail values, i.e. 302 and 390. These two extreme values may be caused by power transient fluctuation or poor wire contact, so after rejecting them, the sampling voltage sub-sequence after upper and lower limit correction is:

[0074] [310, 315, 318, 320, 325, 329, 332, 340]

[0075] Next, the system extracts the center statistical parameters in the sub-sequence. Since there are 8 sampling points, the two points in the middle are the 4th and 5th items, which are 320 and 325 respectively. The average value is the center mean value, which is calculated as follows:

[0076] Center mean value = (320 + 325) / 2 = 322.5 millivolt

[0077] The maximum value after upper and lower limit correction is 340, and the minimum value is 310, so the center span is:

[0078] Center span = 340 - 310 = 30 millivolt

[0079] Taking this as a benchmark, the system performs normalization processing on each value of the original initial voltage sampling sequence, and the formula used is:

[0080] Normalized value = (sample value - center mean) / center span

[0081] For example, when processing sample value 318:

[0082] Normalized value = (318-322.5) / 30 = -0.15

[0083] Continue to process all sample values ​​as follows (the results are rounded to two decimal places):

[0084]

[0085] Since all normalized values ​​need to be limited to the interval [-1,1], the normalized result of 390 is forcibly truncated to 1.00. The processed normalized voltage response intensity vector is:

[0086] [-0.68,-0.42,-0.25,-0.15,-0.08,0.08,0.22,0.32,0.58,1.00]

[0087] The vector is fed into the subsequent modules for feature extraction and pattern comparison.

[0088] This example clearly demonstrates that this normalization process effectively eliminates anomalous sampling points, establishes a unified scale standard, and eliminates deviations in the raw voltage values ​​due to non-connection factors, effectively improving the accuracy and robustness of light strip connection status recognition. In multi-channel output systems, this normalization method creates a consistent response for each signal, providing a stable foundation for subsequent judgment of single-channel mode, dual-color temperature mode, RGB mode, RGBW mode, and RGBCW mode.

[0089] Step S104: performing a feature extraction operation on the voltage response intensity vector, wherein the feature extraction includes identifying the response amplitude, response start time and relative change amplitude of each output terminal, and comparing them one by one with a preset output mode standard.

[0090] In the light strip output mode recognition method of this invention, after normalization, the system obtains a standardized voltage response intensity vector, which reflects the distribution of current response strengths of each of the five channels when driven independently. Based on this response intensity vector, deeper feature extraction is performed to further clarify the response differences and distribution patterns between channels. Based on this, the current state of the connected light strip is compared against the preset output mode.

[0091] In the actual implementation process, the feature extraction operation mainly revolves around three types of information. The first is the response amplitude, that is, the size of the normalized voltage value corresponding to each channel during its activation. This amplitude is between 0 and 1 after normalization. The closer the value is to 1, the stronger the current response is, and the more likely the channel is connected to the actual light strip. By setting a response recognition threshold, such as 0.3 or 0.5, the system can determine whether a channel is "effectively responding". Among all channels, those with a normalized voltage higher than the threshold can be regarded as "connected channels", and those below the threshold are regarded as "unconnected".

[0092] The second factor is the response start time. While this metric can be ignored in simple modes, in some improved solutions, the relative time between channel activation and response can be recorded to determine whether there is a delay in certain current responses. For example, when a channel is powered on, it takes a certain amount of time for a significant response to occur. This may be related to factors such as the type of LED connected, cable length, and power supply stability. By detecting the offset of the start response time point, auxiliary judgments can be made on certain incorrect connection behaviors (such as cross-channel connection) or light strips with low load current characteristics.

[0093] The third dimension is the relative amplitude of change. This is mainly used to distinguish situations where the response intensity differences are close or overlapping. For example, if the response values ​​of the three channels R, G, and B are 0.82, 0.85, and 0.80 respectively, and C and W are 0.12 and 0.09, then it can be easily determined that the light strip is an RGB three-channel light strip. However, if the responses of R, G, and W are 0.80, 0.79, and 0.82 respectively, and B and C are 0.13 and 0.11, then looking only at the amplitude will cause misjudgment as RGBW or RGBCW. At this time, calculating the difference gradient between the responses, that is, the relative amplitude change rate between the channels, becomes an important basis for auxiliary mode judgment. The system can construct a difference vector (such as the absolute value of the difference between adjacent channels) or a sorted difference ratio to assist in identification.

[0094] After the extraction of the above three feature dimensions is completed, the system matches the current voltage response intensity vector with the preset output mode standard. The preset standard can be hard-coded in the controller memory using a lookup table. Each mode (such as single channel, dual color temperature, RGB, etc.) corresponds to a specific response channel combination template. The matching is based on the combination of channel response states, supplemented by the amplitude order or gradient. For example, if only the W channel response value is greater than the threshold and the rest are lower than the threshold, it is identified as a single-channel mode; if C and W have high responses at the same time, it is a dual color temperature mode; if the R / G / B three channels are significantly higher than the other channels, it is an RGB mode; if the R / G / B / W four channels all have high responses, it is RGBW, and if all five channels have effective responses, it is RGBCW mode.

[0095] The entire comparison process should be fault-tolerant. A credibility scoring mechanism can be implemented for channels whose response amplitudes approach a threshold. For edge cases, "fuzzy recognition" or user rewiring prompts can be supported. This comparison module can be implemented within the MCU through rule-based judgment, or the algorithm logic can be simplified through methods such as state vector hash mapping and pattern mask matching.

[0096] In summary, feature extraction and pattern comparison are the key processes for converting normalized sampled data into recognition decisions. This requires both that the extracted data features are distinguishable and that the comparison logic is stable and robust.

[0097] Furthermore, the performing a feature extraction operation on the voltage response intensity vector includes:

[0098] After obtaining the voltage response strength vector, performing a first-order derivative transformation operation on the voltage response strength change curve corresponding to each output terminal to identify the slope change area and the response mutation point in each curve, so as to extract the dynamic response inflection point characteristics of the curve;

[0099] Based on the dynamic response inflection point characteristics, a set of response behavior time segments is constructed, and the set is input into the dynamic time warping matching algorithm to perform nonlinear time alignment matching with the historical response sequence in the preset output mode standard library to obtain the dynamic matching distance matrix between each output mode and the current response;

[0100] Applying a channel weight coefficient adjustment mechanism to the dynamic matching distance matrix. The channel weight coefficient is determined based on the predefined color channel identifiers of each output end and the empirical statistical value of historical recognition accuracy to enhance the matching influence of channels with key recognition value.

[0101] The output mode that matches the current light strip connection state is determined based on the preset output mode standard corresponding to the minimum distance in the adjusted dynamic matching distance matrix.

[0102] In the light strip output pattern recognition method based on a distributed voltage-controlled sampling and balancing mechanism described in the present invention, the feature extraction operation of the voltage response intensity vector is not just a static judgment of a set of values. Instead, through a multi-stage dynamic analysis process, key structural and discriminative feature information is mined from the time domain behavior, and multi-dimensional matching and decision-making are performed based on this information and preset pattern standards.

[0103] Specifically, after completing the level difference normalization processing of the initial voltage sampling sequence, the system first obtains the voltage response intensity vectors corresponding to multiple output terminals, which are in the form of a set of vectors of consistent length, each of which represents the response curve of an output terminal during its independent driving. At this stage, the system performs a first-order derivative transformation operation on each voltage response intensity change curve by dividing the difference between the voltage values ​​of two adjacent sampling points by their time interval, and then constructing a first-order derivative sequence of the curve. This derivative sequence can reveal the instantaneous change trend of the response intensity, thereby identifying the slope change area, slope mutation point and local extreme point of the curve. These mutation points are regarded as dynamic response inflection point features, which are used to define typical behavioral characteristics of the light strip such as the activation start, peak response, and attenuation stage under a specific channel.

[0104] Furthermore, based on these dynamic response inflection point features, the system extracts multiple response behavior time segments corresponding to each output end. These segments are usually bounded by inflection points, and the voltage change trend in each segment is basically consistent, making them suitable for matching as units. After the extraction is completed, the set of response behavior time segments of all channels is input into the dynamic time warping (DTW) algorithm. DTW is a nonlinear matching method commonly used for alignment between variable-length sequences, and can find the optimal pairing path when the time axes of different sequences are misaligned. During the matching process, the system uses the response time segment set of the current light strip as the sequence to be matched, and performs pairwise matching with each historical response time segment sequence in the preset output mode standard library, and calculates the DTW distance between them.

[0105] The matching results form a dynamic matching distance matrix. Each row of the matrix corresponds to a certain output end response behavior time segment of the current light strip. Each column of the matrix corresponds to a certain output end standard sequence in the preset output mode standard library. Each element D ij It represents the matching distance between the i-th channel of the current output end and the j-th channel in the pattern library in terms of dynamic response structure. The smaller the distance, the closer their response curves are and the more consistent their shapes are.

[0106] In order to more accurately express the contribution of different output terminals in the overall recognition process, the system introduces a channel weight coefficient adjustment mechanism to the dynamic matching distance matrix. The calculation basis of the channel weight coefficient wi is the predefined color channel identification of each output terminal (such as red, green, blue, cold white, warm white, etc.) and the historical recognition accuracy experience statistics. Specifically, it can be calculated by weighted average accuracy, recognition contribution score, etc. In the process of channel weight adjustment, the system multiplies all distance values ​​of each row by the weight coefficient corresponding to the channel to obtain the adjusted weighted distance matrix D' ij =w i ×D ij .

[0107] After obtaining a complete weighted distance matrix, the system sums the weighted distances for each column to determine the total weighted matching distance between each preset output mode and the current response data. Ultimately, the system selects the output mode standard corresponding to the column with the smallest total weighted matching distance as the output mode matching the current light strip connection state and writes this mode code into the internal storage space of the control logic unit. The control logic unit then uses this code to invoke the matching lighting strategy for correct drive control.

[0108] Through the above approach, the present invention not only fully considers the temporal dynamics and structural nature of the response behavior in feature extraction, but also improves the model's adaptability to the structural differences of different color channels by introducing an asymmetric weight mechanism, significantly enhancing the robustness and discrimination accuracy of the light strip output pattern recognition.

[0109] For example, in a typical five-channel light strip connection scenario, assume that the first to fifth output terminals correspond to the five color channels of red, green, blue, cool white, and warm white, respectively. The control logic unit drives each output terminal independently in turn. During each channel driving period, after the level difference is normalized, the corresponding voltage response intensity vector is obtained, which is recorded as V1 to V5. The system first calculates each vector V i Perform the first-order derivative transformation. Assuming V1 = [0.1, 0.2, 0.35, 0.45, 0.47, 0.46, 0.43], the derivative sequence is ΔV1 = [+0.1, +0.15, +0.1, +0.02, -0.01, -0.03]. From this, we can identify the 4th to 5th points as the response deceleration turning points, and the 5th to 6th points as the response attenuation segments, thereby extracting three response time segments with these inflection points as boundaries: the rising segment, the slowing segment, and the attenuation segment.

[0110] After all output terminals have completed the above processing, the system dynamically time-warps the response segments from each output terminal against each standard segment sequence in the preset output pattern library. Assume that the response corresponding to the current light strip is C = {C1, C2, C3, C4, C5}, and the standard output pattern library includes RGB pattern S1 = {R1, G1, B1, 0, 0}, RGBW pattern S2 = {R2, G2, B2, W1, 0}, and RGBCW pattern S3 = {R3, G3, B3, CW1, WW1}. DTW matching is performed on C and each S, forming distance matrices D1, D2, and D3.

[0111] Assume that in the DTW matching process of RGBCW mode S3, the following dynamic matching distance matrix (unit: normalized distance) is obtained:

[0112]

[0113] The system introduces predefined channel weight coefficients into the above matrix: w1 = 0.8 (red), w2 = 0.9 (green), w3 = 0.85 (blue), w4 = 1.1 (cold white), w5 = 1.2 (warm white). After calculating the weighted distance, the total distance of the five-channel matching in RGBCW mode is summarized:

[0114] Weighted matching distance = Σ(w i ×D ij )=(0.8×0.15+0.9×0.10+0.85×0.12+1.1×0.15+1.2×0.10)≈0.12+0.09+0.102+0.165+0.12=0.597

[0115] After comparing the matching results with other modes, it was found that the weighted distance of the RGBCW mode was the smallest. The system therefore determined that the current light strip connection status was the RGBCW output mode, and wrote the mode code into the control logic unit for subsequent drive control.

[0116] Furthermore, the light strip output mode recognition method based on the distributed voltage-controlled sampling and balancing mechanism further includes:

[0117] After determining the output mode matched by the current light strip connection state according to the preset output mode standard corresponding to the minimum distance in the adjusted dynamic matching distance matrix, generating a set of output mode encoding data structures, the output mode encoding data structures including: an original mode identification code field of the output mode matched by the current light strip connection state, a response consistency score value field for the voltage response intensity vector, and a check bit field based on the dynamic matching distance matrix;

[0118] Taking the output pattern coding data structure as input, executing a pattern coding redundancy construction process to generate a redundant pattern coding structure with error detection and fuzzy check capabilities, wherein the redundant pattern coding structure includes a parity check segment and a weight perturbation tolerance segment generated by the check bit field, and is used to improve the anti-interference robustness of the output pattern coding data structure during the control logic writing process;

[0119] Writing the redundant mode encoding structure into an internal register of a control logic unit and triggering a lighting strategy configuration process based on the original mode identification code field and the response consistency score value field. The lighting strategy configuration process calculates a fade-in and fade-out time curve for the PWM drive waveform generation method of each output terminal according to different output modes to avoid high-frequency visual jumps, and adjusts the initial brightness level of each output terminal according to the score value field;

[0120] After the luminescence strategy configuration process is completed, if the difference in response consistency score between the voltage response intensity vector subsequently re-identified and the currently written output mode encoding data structure exceeds the set fuzzy adaptation tolerance threshold, the control logic unit enters the fuzzy adaptation mode path and reconstructs the candidate output mode set based on the voltage control response difference matrix between the current output ends. Each item in the candidate output mode set serves as a luminescence strategy compatible reference template for the control logic to maintain system operation stability without triggering the error indication process.

[0121] In this implementation, the generation and application of the output mode encoding data structure aims to achieve stable writing of recognition results and coordinated execution of fault-tolerant control logic under the voltage-controlled sampling and balancing mechanism. This ensures that the entire light strip system can still accurately and stably complete recognition and lighting strategy control despite connection anomalies, changes in the number of output terminals, or response disturbances. This process is based on the in-depth application of the output results of the "dynamic matching distance matrix" and utilizes multiple links, including redundant encoding mechanisms, response scoring mechanisms, fault-tolerant threshold determination mechanisms, and adaptive lighting strategy adjustment mechanisms, to form a complete output strategy recognition and writing linkage system.

[0122] First, after determining the output mode that matches the current light strip connection state according to the preset output mode standard corresponding to the minimum distance in the adjusted dynamic matching distance matrix, the system will enter the output coding data construction stage. Specifically, the dynamic matching distance matrix is ​​a two-dimensional matrix with a dimension of M×N, where M represents the number of modes in the preset output mode library and N represents the number of current light strip recognition sampling channels. Each element D(i,j) in the matrix represents the matching distance calculated by dynamic time warping (DTW) between the i-th preset output mode and the current j-th channel response vector. The system first looks for the minimum cumulative distance of all rows in the matrix, and the output mode represented by the row corresponding to the minimum distance is regarded as the current recognition result.

[0123] Once the recognition result is determined, the system constructs the output mode encoding data structure. This data structure includes at least the following three fields: (1) the original mode identification code field, which is the unique number of the matched output mode, generally a fixed-length hexadecimal code or ASCII string; (2) the response consistency score field, which is used to quantify the overall matching degree between the current voltage response intensity vector and the output mode. The score value can be a normalized score method, usually set in the range of 0 to 100, with a higher score indicating a better match; (3) the check bit field, which is used to record the feature verification results extracted from the currently selected mode and its matching status. The generation logic of this field will be expanded in the subsequent encoding construction stage.

[0124] After the output pattern encoding data structure is constructed, the system enters the pattern encoding redundancy construction process. During this process, a redundant and fault-tolerant encoding mechanism is introduced to the output pattern encoding data structure to protect the control logic from transient interference or data distortion during writing. The specific implementation is as follows: The system first calculates an additional parity segment based on the check bit field using a parity rule. This parity rule is calculated by taking the sum of the bytes in each field and performing a modulo-2 operation. This segment is appended to the end of the encoding structure as an additional field. Next, the system generates a weighted perturbation tolerance segment based on the current recognized response consistency score and historical operational stability data. This segment records the control logic's tolerance for potential perturbations in the recognition score. This tolerance segment is typically an 8-bit fixed-length numeric code, indicating that the current recognition state can still be considered the same pattern within an error range of ±x%. The concatenation of these two segments ultimately forms a complete redundant pattern encoding structure.

[0125] The generated redundant pattern encoding structure will be written into the internal register of the control logic unit. The write operation needs to be completed in an address-aligned manner, and different fields will be mapped to different register bit segments in the controller memory. After the write is completed, the system triggers the lighting strategy configuration process, which uses the original mode identification code field as an index to extract key lighting strategy information such as the brightness curve, color configuration, PWM control parameters, etc. of the corresponding mode from the internal preset lighting configuration table. On this basis, combined with the response consistency score value field, the system further adjusts the PWM waveform generation logic of each output end, especially fine-tuning the initialization brightness level, fade-in and fade-out time period, color transition buffer zone, etc., to ensure that the final light effect output can stably reflect the characteristics of the current recognition result, while avoiding the discomfort caused by high-frequency visual flicker.

[0126] After the lighting strategy configuration is complete, the system enters the fuzzy adaptation detection preparation state. If the voltage response intensity vector obtained by re-identification is then used to complete the response feature extraction and dynamic matching distance matrix construction again, and a new response consistency score is obtained, when the difference between this score and the score field currently written into the redundant pattern encoding structure exceeds the set fuzzy adaptation tolerance threshold, the system does not directly report an error, but instead enters the fuzzy adaptation mode path. In this path, the system recalls the voltage-controlled response difference matrix between the current output terminals. This matrix structure is a symmetric N×N matrix, and the element R(i,j) represents the difference in response between the i-th and j-th output terminals under standard voltage-controlled excitation. It is usually expressed in the form of normalized Euclidean distance or slope difference, and is used to identify the synergy or independence of the responses between the output channels.

[0127] Based on this difference matrix, the system selects the channel combinations with the greatest differences and reconstructs a set of candidate output modes. This set typically includes multiple output modes with close matches and differences within a tolerable range. Each candidate output mode in the set is stored as a structured template, including fields for the lighting strategy and a scoring tolerance. After entering fuzzy adaptation mode, the control logic does not immediately change the output mode. Instead, it dynamically selects the optimal compatible template from the candidate set for temporary lighting strategy override, maintaining the normal operation of the light strip system and avoiding frequent switching or erroneous shutdowns caused by minor recognition disturbances.

[0128] The following is a specific example of a complete implementation path for the above-mentioned steps of output mode encoding writing and lighting strategy matching.

[0129] Assume the target system is a digital light strip control system with six independent PWM control outputs, supporting 12 preset output modes, including full red, full green, full blue, alternating red and green, blue-white gradient, and breathing mode. The current system configuration uses a distributed voltage-controlled sampling and balancing mechanism. Under uniform excitation, each output generates an initial voltage sampling sequence, which then forms a voltage response intensity vector to complete the recognition process.

[0130] During one identification process, the system obtained a voltage response intensity vector of V = [0.82, 0.81, -0.79, -0.80, 0.04, -0.02]. These values ​​were normalized to the range [-1, 1] through steps such as upper and lower limit removal and center mean difference normalization. The system then performed a first-order derivative calculation on this vector, identifying significant negative transitions at output terminals 3 and 4, while output terminals 1 and 2 maintained high responses. Based on this, the system extracted the inflection point locations and channel sequence characteristics, and constructed a set of response time segments.

[0131] This set is fed into the Dynamic Time Warping (DTW) algorithm, which calculates the nonlinear matching distance between each historical response sequence in the preset output pattern library. The resulting dynamic matching distance matrix is ​​a 12×6 two-dimensional matrix, where each element D(i,j) represents the distance between the i-th standard pattern and the current j-th output channel. For example, the element D(5,3) = 0.134 in the 5th row and 3rd column represents the distance between the "blue-white gradient" pattern and the current response of output terminal 3.

[0132] The system determines that the weighted cumulative distance for row 8 (corresponding to the "alternating red and green" pattern) in this matrix is ​​the smallest. After weighting the channel weight coefficients, it confirms that "alternating red and green" is the current recognition result. Its channel weight coefficients are [1.2, 1.2, 0.9, 0.9, 0.5, 0.5], corresponding to the RGB channel importance order. Based on this, the system writes the unique number "0xA8" of the output pattern as the original pattern identification code field and calculates the response consistency score as 93 (out of 100), indicating a high-confidence recognition. At the same time, it extracts key verification information from the dynamic matching distance matrix and generates the check bit field "0x3F".

[0133] Combining the three fields, the system constructs the output mode encoding data structure as follows:

[0134] {

[0135] Original mode identification code field: 0xA8,

[0136] Response consistency score value field: 93,

[0137] Check bit field: 0x3F

[0138] }

[0139] In order to improve the anti-interference capability, the system further performs redundant coding construction on the above structure. The check bit field participates in the generation of a parity check segment, which is 1 byte, that is, binary "11001100". Combined with the ±5% tolerance range corresponding to the score value field 93 (that is, it is allowed to fluctuate between 88.35 and 97.65), a weight perturbation tolerance segment "0x0A" is generated, indicating that the tolerance value is ±5. Finally, the redundant mode coding structure is as follows (field sequence splicing): 0xA8|0x5D|0x3F|0xCC|0x0A

[0140] The structure is written into the internal storage area of ​​the control logic unit in sequence in the register address mapping mode. The addresses are:

[0141] Register 0x10: Mode Identification Code Field

[0142] Register 0x11: Rating Value Field

[0143] Register 0x12: Parity Field

[0144] Register 0x13: Parity Segment

[0145] Register 0x14: Disturbance Tolerance Band

[0146] Once the write is complete, the control logic unit immediately triggers the lighting strategy configuration process. This process first retrieves the PWM parameters for the alternating red-green mode from the mode configuration table based on "0xA8." For example, outputs 1 and 3 are set to the red channel, 2 and 4 to the green channel, and all other outputs are disabled. The fade curve is controlled using sinusoidal interpolation with an 800ms time span. The initial brightness level is calculated based on the score of 93, resulting in a maximum brightness of 255 × (93 / 100) ≈ 237. The control logic then generates a complete PWM timing table and sends it to each output driver.

[0147] The system continuously monitors subsequent states. After the recognition module acquires a new set of voltage response intensity vectors, V' = [0.76, 0.79, -0.81, -0.78, 0.03, -0.01], it repeats the aforementioned recognition process, resulting in a new score of 86. Because the difference between 86 and the score of 93 recorded in the current encoding structure is 7, which is outside the set tolerance of ±5, the system does not immediately enter error mode, but instead switches to the fuzzy adaptation mode path.

[0148] In the fuzzy adaptation process, in order to determine whether there is a structural deviation between the current voltage response and the existing pattern, the system constructs a six-channel response difference matrix R, which records the numerical difference in the voltage response intensity between any two output terminals. Specifically, each element of the matrix R i,j It represents the absolute value of the difference between the voltage response strengths at output terminals i and j. The matrix is ​​symmetrical, with all diagonal elements being zero, indicating no difference between channels.

[0149] For example, in one recognition, the system collected the normalized response intensity vectors of the six output terminals as 0.76, 0.79, -0.81, -0.78, 0.03, and -0.01, respectively. The system then calculates the response difference between each pair of channels. For example, the difference between output terminals 1 and 3 is |0.76-(-0.81)|=1.57, the difference between output terminals 2 and 4 is |0.79-(-0.78)|=1.57, and the difference between output terminals 5 and 6 is |0.03-(-0.01)|=0.04. In this way, the differences between each pair of channels are constructed, forming a six-dimensional symmetric matrix R.

[0150] This matrix reflects the "similarity" and "structural distribution" of responses between channels. For example, the difference between output 1 and output 2 is only 0.03, indicating that they are in similar high-response areas; while the difference between output 3 and output 5 is close to 0.84, indicating that they belong to different response areas.

[0151] By analyzing the channel pairs with larger differences in the matrix, such as 1 and 3, 2 and 4, the system infers that the current connection state of the light strip has the channel structure characteristics of alternating red and green.

[0152] Step S105: According to the comparison result, it is judged whether the current lamp strip connection state corresponds to one of the single-channel mode, the dual-color temperature mode, the RGB mode, the RGBW mode or the RGBCW mode, and the corresponding mode code is written into the internal storage space of the control logic unit.

[0153] After completing the feature extraction of the voltage response strength vector and the one-by-one comparison with the preset mode standard, the controller needs to clearly identify the type of the currently connected lamp strip based on the comparison result, and record the corresponding mode type in a structured manner to the internal control logic unit, which is the key target of step S105 in the present application. This step is no longer a signal processing or data operation stage, but a state establishment and result writing stage in the identification process, which directly determines the entry condition of the subsequent execution logic of the entire control system.

[0154] In the specific execution process, the control logic unit is usually a non-volatile storage unit or a RAM cache area in the MCU. The storage structure needs to be pre-designed for recording the storage location and data format of the output mode. The mode code generally uses fixed-length unsigned integer data, such as 8 bits or 16 bits, which is defined according to the actual number of supported output modes. For example, the single-channel mode is coded as 0x01, the dual-color temperature mode as 0x02, the RGB mode as 0x03, the RGBW mode as 0x04, and the RGBCW mode as 0x05. After the identification process is completed, the MCU selects one of the code values according to the comparison result, and writes the value into the specified internal variable or EEPROM storage address through assignment statements or register write operations.

[0155] The basis for identification comes from the matching result of the channel response features extracted in the previous step and the mode rules. If the system identifies that only the C or W channel responds, the mode is confirmed as single-channel; if C and W respond at the same time, it is confirmed as dual-color temperature; if R, G, B channels respond and C, W do not respond, it is confirmed as RGB; if R, G, B, W respond at the same time, it is RGBW; and when all five channels meet the response condition, it is the RGBCW mode. The system can use conditional judgment statements or lookup table logic to select the mode, and the structure should ensure that only one output mode code is mapped for each response combination to avoid logical ambiguity.

[0156] In system design, the balance between recognition stability and access fluctuations should be considered. In order to prevent misjudgment caused by poor line contact or transient interference, it is recommended to introduce a confirmation mechanism for the identification result, such as writing the mode code only when the identification result is consistent for two consecutive times, or performing a delay verification before writing. In addition, the controller should prioritize calling the mode code and initializing the control logic accordingly when the system is powered on, to avoid entering the wrong mode in the boot state.

[0157] The writing of this mode code can also be linked with the status indication. For example, after the writing operation is completed, the status LED indicator light is controlled to change color, or the corresponding channel of the light strip is driven to flash to prompt the user "recognition successful, the current mode is X", thereby forming a closed-loop feedback system and enhancing the user experience.

[0158] For products that need to retain the identification status across power-on cycles, the mode code can also be written into the MCU's EEPROM or FLASH segment to support non-volatile storage and provide it for subsequent logic calls.

[0159] By executing this step, the system completes the logical mapping from analog electrical signals to control states, so that the automatic identification process has inheritable and callable structured result outputs, and provides the necessary basis for the accurate execution of downstream luminescence control strategies.

[0160] Step S106: Send the output mode code to the control logic unit, and the control logic unit drives the lighting strategy that matches the current output mode accordingly.

[0161] After identifying the light strip's output mode and storing the mode code, the controller must use the identification result to actually control the output channels to achieve a lighting strategy that matches the identification result. This process is the task required to be completed in step S106, that is, the identified output mode code is sent to the control logic unit, which then drives the correct channel combination based on the current mode to make the connected light strip operate as expected.

[0162] The core of this step is to ensure that the controller can dynamically construct and issue the appropriate driver instruction set based on the identification results, ensuring that the output state strictly corresponds to the type of connected light strip. The control logic unit typically exists as a control flow module within the MCU or an independent state scheduling function. It determines the current channel output configuration by reading the mode code value stored in a register or variable. The mode code value is defined in step S105. For example, single channel is 0x01, dual color temperature is 0x02, RGB is 0x03, and so on. These values ​​serve as status codes for branching decisions in the control logic.

[0163] At the program execution level, the control logic unit first calls the corresponding output strategy based on the currently recognized mode. Taking single-channel mode as an example, the control logic only turns on the W channel or the C channel, and keeps the other four PWM output pins at a low level or disabled. If it is identified as a dual color temperature mode, the W and C output terminals should be turned on at the same time, and the corresponding PWM channels should be started. The duty cycle can be determined according to the preset brightness or subsequent user control. For RGB mode, it is necessary to activate the three PWM outputs R, G, and B, and perform dimming control on the three colors according to the RGB color light synthesis principle. The RGBW mode adds output control of the white light W channel on the basis of RGB, while the RGBCW mode activates all five channels to achieve complex multi-color mixing and cold and warm white balance output.

[0164] This process is typically performed via a one-time register assignment, enabling fast response in the MCU program through a switch-case structure or table lookup. The system can further bind the recognized pattern to a lighting effect strategy. For example, when an RGBW pattern is recognized, in addition to channel lighting, it activates lighting effects such as gradient, breathing, or running, and calls the dimming module to load the corresponding color sequence. These strategies can be preset in a pattern matching table or dynamically configured by the user or the host control system via the communication interface.

[0165] To enhance the system's intuitive feedback and user experience, the control logic can also be linked to the multi-color LED indicators on the controller panel. For example, after identifying and switching to RGB mode, the status LED can be illuminated in red, yellow if it is identified as dual-color temperature, and blue if it is identified as RGBCW. Furthermore, the controller can directly drive the actual light strip to emit the corresponding color. For example, after the mode switch is completed, the three RGB colors will be instantly illuminated to indicate that the user has entered the RGB control state. This feedback not only serves as a prompt for identification confirmation, but can also be used for quick verification during factory inspection or installation and commissioning.

[0166] From a system design perspective, the control logic unit should support interrupt management and state locking mechanisms during execution to prevent premature activation of channel outputs before recognition is complete. Status flags can be set to ensure that the control logic receives this information and executes the light-emitting operation only after successful recognition and code writing, ensuring strict system logic and clear timing. For certain low-power applications, the control logic can also automatically set the PWM frequency based on the mode type and shut down unused channels to reduce overall power consumption.

[0167] Furthermore, the light strip output mode recognition method based on the distributed voltage-controlled sampling and balancing mechanism further includes:

[0168] When the voltage response intensity vector does not meet any preset output mode standard, the control logic unit activates the error indication process and controls the indication signal output device to output a status prompt signal that is different from any standard mode to remind the user to correct the wiring and re-trigger the identification.

[0169] The light strip output mode recognition method described in this invention further incorporates an error indication process to address situations where the preset output mode cannot be matched due to improper or abnormal wiring. This process operates in addition to the normal mode recognition process and is intended to improve the robustness of the overall system and the user interaction experience. It ensures that the output control strategy is triggered only when valid modes are recognized, thus preventing the inadvertent activation of light strips with incorrect wiring.

[0170] In practice, after the system normalizes the initial voltage sampling sequence and forms a voltage response intensity vector, it extracts the multiple eigenvalues ​​contained in this vector, including but not limited to the response amplitude corresponding to each output terminal, the response start time, and the magnitude of its change relative to other channels. The control logic unit then accurately compares this vector with a set of pre-stored standard output mode templates, covering a variety of common light strip types and wiring combinations, including single-channel, dual-color temperature, RGB, RGBW, and RGBCW.

[0171] If the comparison process finds that the voltage response intensity vector fails to match any standard template across multiple key characteristic parameters, meaning the current light strip type cannot be determined, the system will determine that the state is non-standard connection mode. This non-standard state can often be caused by user wiring errors, incorrect output channel connections, failure to connect all necessary channels, or connecting an unsupported light strip type. In this case, the control logic unit will not continue to generate and issue the lighting strategy, but will automatically enter the error indication process.

[0172] The core operation of the error indication process is to call the preset error prompt signal output device, which usually includes but is not limited to human-machine interaction components such as indicator lights, buzzers or display screens. The control logic unit sends a set of specific error status instructions to the device, causing it to output a prompt signal that is clearly distinguishable from all standard identification modes. For example, the indicator light can flash red at a fixed frequency to indicate a wiring error state, the buzzer can emit intermittent beeps at a specific frequency, and the display screen can directly display words such as "Wiring abnormality, please check the light strip connection." This prompt signal is not only obviously different in appearance from the status display during normal operation, but also continuous and repeatable until the user completes the wiring correction and re-triggers the identification process.

[0173] After the user adjusts the wiring configuration according to the error message, re-energizing the system or pressing the identification trigger button restarts the standard process for the light strip output pattern recognition method. The system will then re-enter the steps of output time-sharing drive, voltage sampling, normalization, feature extraction, and pattern comparison to achieve pattern recognition for the newly connected light strip. This mechanism ensures that the system will never issue erroneous control signals to light strips that fail recognition or are in an abnormal state, thereby avoiding the risk of hardware damage or abnormal lighting. It also provides users with clear and intuitive debugging feedback, effectively improving the stability, fault tolerance, and maintainability of the entire system during actual deployment.

[0174] A second embodiment of the application provides an electronic device, comprising:

[0175] processor;

[0176] The memory is used to store a program. When the program is read and executed by the processor, it executes a light strip output mode recognition method based on a distributed voltage-controlled sampling and balancing mechanism provided in the first embodiment of the present application.

[0177] The third embodiment of the present application provides a computer-readable storage medium having a computer program stored thereon. When the program is executed by a processor, a light strip output pattern recognition method based on a distributed voltage-controlled sampling and balancing mechanism provided in the first embodiment of the present application is executed.

[0178] Although the present application is disclosed as above with the preferred embodiments, it is not intended to limit the present application. Any person skilled in the art may make possible changes and modifications without departing from the spirit and scope of the present application. Therefore, the scope of protection of the present application shall be based on the scope defined by the claims of the present application.

Claims

1. A method for identifying light strip output patterns based on a distributed voltage-controlled sampling and balancing mechanism, characterized in that: include: Time-sharingly driving various light strips connected to a plurality of universal output terminals through a single voltage detection path, wherein the plurality of universal output terminals include a first output terminal to a fifth output terminal, each output terminal corresponding to a predefined color channel identifier; During the period when each output terminal is independently driven, a voltage-controlled response voltage value flowing through a single voltage detection path is collected to form a set of initial voltage sampling sequences, wherein the initial voltage sampling sequences correspond to voltage changes when different output terminals are driven; performing level difference normalization processing on the initial voltage sampling sequence, wherein the normalization processing includes proportionally adjusting each voltage value based on a range between a minimum sampling voltage and a maximum sampling voltage, thereby constructing a set of voltage response intensity vectors; Performing a feature extraction operation on the voltage response intensity vector, wherein the feature extraction includes identifying the response amplitude, response start time, and relative change amplitude of each output terminal, and comparing them one by one with a preset output mode standard; Based on the comparison results, determine whether the current light strip connection state corresponds to one of the single-channel mode, dual-color temperature mode, RGB mode, RGBW mode, or RGBCW mode, and write the corresponding mode code into the internal storage space of the control logic unit; According to the judgment result, the output mode code is determined and sent to the control logic unit, and the control logic unit drives the lighting strategy matching the current output mode accordingly.

2. The method for recognizing light strip output patterns based on a distributed voltage-controlled sampling and balancing mechanism according to claim 1, characterized in that: Also includes: When the voltage response intensity vector does not meet any preset output mode standard, the control logic unit activates the error indication process and controls the indication signal output device to output a status prompt signal that is different from any standard mode to remind the user to correct the wiring and re-trigger the identification.

3. The method for recognizing light strip output patterns based on a distributed voltage-controlled sampling and balancing mechanism according to claim 1, characterized in that: During the period when each output terminal is independently driven, the voltage-controlled response voltage value flowing through a single voltage detection path is collected to form a set of initial voltage sampling sequences, including: During the period when each output terminal is independently driven, a voltage-controlled driving voltage signal with graded variation is applied to the output terminal, and an independent voltage-controlled response voltage sampling window is set during the period when each level of voltage-controlled driving voltage is continuously stable, so as to cover the response behavior of different electrical characteristic sections; In each voltage-controlled response voltage sampling window, a differential change rate extraction algorithm is applied to process the sampled voltage-controlled response voltage value sequence to construct a set of differential vectors reflecting the voltage response change rate and trend turning points, which are used to characterize the response characteristics of different electrical states. Based on the similarity, delay alignment, and response strength distribution differences between the differential vector sets of each output port, a set of voltage-controlled response difference matrices between the output ports are constructed. The low-coupling regions marked in the matrix are then used to filter out the valid response data segments that can most independently reflect the current output port connection status during the voltage-controlled driving process. The valid response data segments are integrated in order of the output terminals, and the integration result is used as the initial voltage sampling sequence for subsequent level difference normalization processing and voltage response intensity vector construction operations.

4. The method for recognizing light strip output patterns based on a distributed voltage-controlled sampling and balancing mechanism according to claim 1, characterized in that: The performing level difference normalization processing on the initial voltage sampling sequence includes: After forming the initial voltage sampling sequence, performing upper and lower limit elimination processing on the sampled voltage values ​​corresponding to each output terminal, wherein edge sampling points in the sampled value sequence that are 5% of the maximum and minimum values ​​in the current sequence are eliminated, to obtain a set of sampled voltage subsequences with corrected upper and lower limits; Based on the sampled voltage subsequence after the upper and lower limit corrections, calculate the central mean and central span of the sampled voltage subsequence, where the central mean is the average of the two middle sampling points, and the central span is the difference between the upper and lower correction limits, which are used as the normalized reference interval; Each sampling point in the original initial voltage sampling sequence is normalized by dividing the difference between it and the central mean by the central span to obtain a set of normalized voltage response intensity vectors. All normalized values ​​are limited to the range of [-1, 1] to avoid interference of extreme response values ​​on subsequent feature extraction.

5. The method for identifying light strip output patterns based on a distributed voltage-controlled sampling and balancing mechanism according to claim 1, characterized in that: The performing a feature extraction operation on the voltage response intensity vector includes: After obtaining the voltage response strength vector, performing a first-order derivative transformation operation on the voltage response strength change curve corresponding to each output terminal to identify the slope change area and the response mutation point in each curve, so as to extract the dynamic response inflection point characteristics of the curve; Based on the dynamic response inflection point characteristics, a set of response behavior time segments is constructed, and the set is input into the dynamic time warping matching algorithm to perform nonlinear time alignment matching with the historical response sequence in the preset output mode standard library to obtain the dynamic matching distance matrix between each output mode and the current response; Applying a channel weight coefficient adjustment mechanism to the dynamic matching distance matrix. The channel weight coefficient is determined based on the predefined color channel identifiers of each output end and the empirical statistical value of historical recognition accuracy to enhance the matching influence of channels with key recognition value. The output mode that matches the current light strip connection state is determined based on the preset output mode standard corresponding to the minimum distance in the adjusted dynamic matching distance matrix.

6. The method for recognizing light strip output patterns based on a distributed voltage-controlled sampling and balancing mechanism according to claim 5, characterized in that: Also includes: After determining the output mode matched by the current light strip connection state according to the preset output mode standard corresponding to the minimum distance in the adjusted dynamic matching distance matrix, generating a set of output mode encoding data structures, the output mode encoding data structures including: an original mode identification code field of the output mode matched by the current light strip connection state, a response consistency score value field for the voltage response intensity vector, and a check bit field based on the dynamic matching distance matrix; Taking the output pattern coding data structure as input, executing a pattern coding redundancy construction process to generate a redundant pattern coding structure with error detection and fuzzy check capabilities, wherein the redundant pattern coding structure includes a parity check segment and a weight perturbation tolerance segment generated by the check bit field, and is used to improve the anti-interference robustness of the output pattern coding data structure during the control logic writing process; Writing the redundant mode encoding structure into an internal register of a control logic unit and triggering a lighting strategy configuration process based on the original mode identification code field and the response consistency score value field. The lighting strategy configuration process calculates a fade-in and fade-out time curve for the PWM drive waveform generation method of each output terminal according to different output modes to avoid high-frequency visual jumps, and adjusts the initial brightness level of each output terminal according to the score value field; After the luminescence strategy configuration process is completed, if the difference in response consistency score between the voltage response intensity vector subsequently re-identified and the currently written output mode encoding data structure exceeds the set fuzzy adaptation tolerance threshold, the control logic unit enters the fuzzy adaptation mode path and reconstructs the candidate output mode set based on the voltage control response difference matrix between the current output ends. Each item in the candidate output mode set serves as a luminescence strategy compatible reference template for the control logic to maintain system operation stability without triggering the error indication process.

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