Differential Manchester encoding generation method and system based on operational amplifier
By co-designing operational amplifiers and digital logic devices, differential Manchester encoded signals are generated, solving the problems of high cost and difficult maintenance of dedicated chips, and realizing a flexible multi-protocol adaptation and low-cost hardware solution.
Patent Information
- Application Number
- CN202510962780.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-14
- Publication Date
- 2025-10-28
AI Technical Summary
In the existing technology, aerospace communication protocol chips based on application-specific integrated circuits (ASICs) are expensive, have poor scalability, and are difficult to maintain, resulting in bottlenecks in flexibility and economy.
It adopts a co-design of general-purpose operational amplifiers and digital logic devices. By generating a single binary digital logic signal, it utilizes the bandwidth limitation characteristics of the operational amplifier to generate a three-state analog signal, and generates a differential Manchester encoded signal through an inverting operational amplifier, which is compatible with multiple Manchester encoding bus standards.
It achieves a low-cost, highly flexible, and highly maintainable Manchester coding solution, reducing hardware implementation costs, supporting multi-protocol adaptation, and simplifying the repair process by requiring only the replacement of a single component.
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Figure CN120856153A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to a differential Manchester encoding generation method and system based on operational amplifiers, belonging to the field of electronic circuit technology. Background Technology
[0002] Differential Manchester encoding, as a synchronous clock encoding technique, represents data by level transitions at the beginning of data bits (a transition to 0 indicates a transition, no transition indicates a transition to 1), and a fixed transition is used in the middle of each clock cycle to achieve self-synchronization. This encoding has advantages such as not requiring dedicated synchronization lines, DC balance, and resistance to low-frequency interference, and is widely used in aerospace wired communication protocols such as MIL-STD-1553, ARINC429, and ARINC717. However, current industry implementations generally use application-specific integrated circuit (ASIC) chips, integrating data link layer protocols with physical layer encoding functions. Due to the narrow application areas and limited market capacity of these protocols, ASIC chips suffer from high prices (cost per unit reaching hundreds of yuan), long procurement cycles (typically exceeding 6 months), and a scarcity of available models.
[0003] Furthermore, in traditional solutions, the physical layer encoder is highly coupled with the protocol layer, requiring the replacement of the entire chip module in case of interface failure, resulting in high maintenance costs. Therefore, there is an urgent need for a low-cost, scalable solution based on general-purpose components to address the flexibility and cost bottlenecks caused by dedicated chips. Summary of the Invention
[0004] The purpose of this invention is to provide a differential Manchester encoding generation method and system based on operational amplifiers, which can solve the problems of high cost, poor scalability and difficult maintenance of traditional dedicated protocol chips. By leveraging the bandwidth limiting characteristics of general operational amplifiers and the synergistic cooperation of digital logic signals, it can achieve low-cost and flexible generation of three-state analog signals and adapt to various Manchester encoding bus standards.
[0005] To solve the above-mentioned technical problems, the present invention is implemented using the following technical solution.
[0006] In a first aspect, the present invention provides a differential Manchester encoding generation method based on an operational amplifier, comprising: A single binary digital logic signal is generated using digital logic devices; The single binary digital logic signal is input to the pre-amplifier circuit, and a single-ended tri-state analog signal is output. The single-ended tri-state analog signal is then input into the subsequent inverting operational amplifier circuit to generate an inverted analog signal that is symmetrical to the single-ended tri-state analog signal. The single-ended tri-state analog signal and the inverted analog signal are combined to obtain the differential Manchester encoded signal.
[0007] In conjunction with the first aspect, the single binary digital logic signal further includes a steady-state high level, a steady-state low level, and a high-frequency flip state.
[0008] In conjunction with the first aspect, further, a single binary digital logic signal is generated using digital logic devices, including: In digital logic devices, the communication timing rules of the target bus protocol are parsed to determine the level mapping relationship of Manchester encoding; wherein, steady-state high level is mapped to positive level state, steady-state low level is mapped to negative level state, and high-frequency flip state is mapped to zero level state.
[0009] Based on the level mapping relationship, a single binary digital excitation signal that satisfies the timing rules is generated.
[0010] In conjunction with the first aspect, further, the single binary digital logic signal is input into the pre-amplifier circuit to output a single-ended tri-state analog signal, including: By adjusting the proportional parameters in the preamplifier circuit, its amplification factor is set, thereby establishing a configuration mapping relationship between a single binary digital logic signal and a Manchester-encoded analog signal level. Based on the configuration mapping relationship, the level amplitude of different bus standards is generated; The configuration mapping relationship specifically includes: According to the electrical standard requirements of the target bus protocol, the input offset compensation value and closed-loop gain value of the operational amplifier circuit are set so that the steady-state high level is converted to output an analog level with a positive target amplitude, the steady-state low level is converted to output an analog level with a negative target amplitude, and when a single binary digital logic signal is in a high-frequency flip state and exceeds the gain-bandwidth product of the preceding operational amplifier, it maintains a zero-level output. The three together constitute a single-ended tri-state analog signal.
[0011] In conjunction with the first aspect, further, the square wave frequency corresponding to the high-frequency flip state is greater than the product of the preset safety factor threshold of the frequency response threshold of the pre-amplifier.
[0012] In conjunction with the first aspect, the square wave frequency of the high-frequency flip state further satisfies the following condition: ; in, This indicates the square wave frequency corresponding to the high-frequency flip state; This represents the gain-bandwidth product of the preamplifier; A represents the closed-loop gain value; and N represents the safety factor threshold.
[0013] In conjunction with the first aspect, the single-ended tri-state analog signal is further input into the subsequent inverting operational amplifier circuit to generate an inverted analog signal symmetrical to the single-ended tri-state analog signal, including: The polarity of the single-ended tri-state analog signal is reversed by a preset inverse phase ratio to generate an inverse analog signal with the same amplitude but opposite polarity and symmetrical to the single-ended tri-state analog signal, thereby forming the negative output of the differential Manchester encoded signal.
[0014] In conjunction with the first aspect, further, by combining the single-ended tri-state analog signal and the inverted analog signal, a differential Manchester coded signal is obtained, including: The single-ended tri-state analog signal is directly output as the positive terminal of the differential Manchester encoded signal; The inverted analog signal is directly output as the negative end of the differential Manchester encoded signal; The amplitude difference between the positive and negative output signals forms a differential voltage signal pair, thus constituting a differential Manchester encoded signal.
[0015] Secondly, a differential Manchester encoding generation system based on an operational amplifier includes: A digital encoding generation engine is used to generate single binary digital logic signals using digital logic devices; An electrical signal conversion unit is used to input the single binary digital logic signal into the pre-amplifier circuit for conversion and output a single-ended tri-state analog signal. The symmetrical signal generation unit is used to input the single-ended analog signal back into the subsequent inverting operational amplifier circuit to generate an inverse analog signal that is symmetrical to the single-ended tri-state analog signal, and to combine the single-ended tri-state analog signal and the inverse analog signal to generate a differential Manchester encoded signal.
[0016] Compared with the prior art, the beneficial effects achieved by the present invention are as follows: This invention, through the co-design of a general-purpose operational amplifier and digital logic devices, achieves three significant benefits: First, by utilizing the inherent characteristics of the operational amplifier's gain-bandwidth product, the high-frequency switching state (50% duty cycle square wave) in a single binary digital logic signal is automatically converted into a zero-level analog signal, greatly simplifying the traditional three-state circuit structure and reducing implementation complexity. Simultaneously, by adjusting the closed-loop gain and input offset compensation value of the preceding operational amplifier, the digital level and the analog level amplitude of the target bus can be flexibly mapped. Only external resistor parameters need to be modified to adapt to different electrical standards, overcoming the inherent limitations of dedicated protocol chips. Furthermore, the differential signal generated based on the symmetrical inverting circuit not only enhances anti-interference capabilities but also reduces system maintenance costs by an order of magnitude—in case of failure, only a single general-purpose component (such as an operational amplifier / resistor) needs to be replaced, without discarding the entire dedicated chip. Ultimately, this achieves a low-cost, highly flexible, and highly maintainable Manchester encoding solution. Attached Figure Description
[0017] Figure 1 The figure shown is a block diagram of a differential Manchester encoding generation system based on an operational amplifier provided in an embodiment of the present invention; Figure 2 The diagram shown is a schematic of the differential Manchester encoding generation method based on an operational amplifier provided in an embodiment of the present invention. Figure 3 The diagram shows a flowchart illustrating the configurable mapping relationship between digital logic signals and Manchester-encoded analog signal levels provided in an embodiment of the present invention. Detailed Implementation
[0018] The technical solution of the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the embodiments of the present invention and the specific features in the embodiments are detailed descriptions of the technical solution of the present invention, rather than limitations thereof. In the absence of conflict, the embodiments of the present invention and the technical features in the embodiments can be combined with each other.
[0019] The term "and / or" simply describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone. Additionally, the character " / " generally indicates that the preceding and following related objects have an "or" relationship. Example 1
[0020] See Figure 2 This embodiment introduces a differential Manchester encoding generation method based on operational amplifiers, including the following steps: Step S1: Generate a single binary digital logic signal using a digital logic device (FPGA / CPU); Step S2: Input a single binary digital logic signal to the preamplifier circuit and output a single-ended tri-state analog signal; By utilizing the boundedness of the gain-bandwidth product and the adjustable amplification factor of the preamplifier, the conversion from a single binary digital logic signal to a three-state analog signal is achieved. That is, the preamplifier circuit converts the three states of the single binary digital logic signal into corresponding analog levels: the steady-state high level is mapped to the positive target amplitude level, the steady-state low level is mapped to the negative target amplitude level, and the high-frequency flip state (frequency exceeding the safety factor threshold set by the op-amp response threshold) outputs a stable zero level because the circuit cannot respond. Finally, the three together constitute the positive output of the single-ended three-state analog signal (positive signal).
[0021] Step S3: Input the single-ended tri-state analog signal back into the subsequent inverting operational amplifier circuit to generate an inverted analog signal that is symmetrical to the single-ended tri-state analog signal, i.e., the negative terminal signal; Step S4: Combine the single-ended tri-state analog signal and the inverted analog signal to obtain the differential Manchester encoded signal.
[0022] This method breaks through the limitations of traditional dedicated chips, reducing the hardware implementation cost of single interfaces for protocols such as ARINC429 and ARINC717 by an order of magnitude. During maintenance, only a single faulty component (such as operational amplifier, capacitor, resistor, etc.) needs to be replaced. At the same time, it supports flexible adaptation to different bus electrical standards by adjusting operational amplifier parameters and supports modular expansion of interface scale. Example 2
[0023] Based on the method described in Example 1, this example further defines the specific generation rules and state definitions of the single binary digital logic signal, including: The communication timing rules of the target bus protocol (such as ARINC429, ARINC717) are analyzed by digital logic devices (FPGA / CPU) to determine the level mapping relationship of Manchester encoding; Based on the mapping relationship, a single binary digital logic signal containing three states is generated; wherein, the single binary digital logic signal includes: Steady-state high level: The logic value is always "1", which is mapped to a positive level state in Manchester encoding; Steady-state low level: The logic value is always "0", which is mapped to a negative level state in Manchester encoding; High-frequency flip state: A square wave output with a 50% duty cycle is mapped to a Manchester-coded zero-level state.
[0024] See Figure 3A single binary digital logic signal is input to the preamplifier circuit. By adjusting the scaling parameters in the preamplifier circuit and setting its amplification factor, a configuration mapping relationship between the single binary digital logic signal and the Manchester-encoded analog signal level is established, generating the level amplitude of different bus standards.
[0025] Based on the electrical standard requirements of the target bus protocol, the input offset compensation value and closed-loop gain value A of the operational amplifier circuit are set, and the specific mapping logic is as follows: Steady-state high level → Outputs an analog level with a positive target amplitude (positive analog signal). Steady-state low level → Outputs an analog level with a negative target amplitude (negative level analog signal). High-frequency flip state → Maintain zero-level output (0-level analog signal) For example: based on the logic levels of 0V and 3.3 / 5V output by the digital encoding engine for "0" and "1", the following is achieved through the pre-amplifier circuit: a. Subtraction operation: Input level minus 2.5V offset (input offset compensation), turning 0V → -2.5V and 5V → +2.5V; b. Scale up Set the closed-loop gain value A=2, and change -2.5V→-5V and +2.5V→+5V.
[0026] Ultimately, the conversion from 5V TTL level to ±5V Manchester encoding level is achieved.
[0027] Since the preamplifier circuit has a fixed gain-bandwidth product GBP, after the closed-loop gain A of the preamplifier circuit is determined by the external resistor in the negative feedback amplifier circuit, the frequency response threshold of the corresponding preamplifier circuit is obtained, and its expression is: (1) in, This indicates the frequency response threshold of the operational amplifier circuit.
[0028] When the frequency of the input signal is higher than the frequency response threshold Subsequently, the output of the preamplifier circuit will be unable to respond promptly to changes in the input signal. To reduce the ripple of the 0V output signal from the op-amp, the frequency of the high-frequency switching signal is generally selected to be at least... The above means that the square wave frequency corresponding to the high-frequency switching state is greater than the product of the frequency response threshold of the preceding operational amplifier and the preset safety factor threshold, and the square wave frequency of the high-frequency switching state must satisfy: (2) in, This indicates the square wave frequency corresponding to the high-frequency flip state; This represents the gain-bandwidth product of the preamplifier; A represents the closed-loop gain value; and N represents the safety factor threshold.
[0029] Utilizing the characteristics of the above formula (2), the digital encoding engine inputs a square wave with a duty cycle of 50% that exceeds the frequency response range into the operational amplifier circuit. Since the equivalent voltage of the square wave is equivalent to 1.65V / 2.5V, the output voltage of the operational amplifier circuit is approximately 0V, which can effectively simulate the 0V state of Manchester code. This stage of the operational amplifier circuit completes the generation of the positive terminal signal of Manchester code.
[0030] Furthermore, the polarity of the single-ended tri-state analog signal is reversed by a preset inverse phase ratio to generate an inverse analog signal with the same amplitude, opposite polarity, and symmetry as the single-ended tri-state analog signal, thereby forming the negative output of the differential Manchester encoded signal.
[0031] Finally, the single-ended tri-state analog signal is directly used as the positive output of the differential Manchester encoded signal, and the inverted analog signal is directly used as the negative output of the differential Manchester encoded signal. The amplitude difference between the positive and negative output signals forms a differential voltage signal pair, thereby constituting the differential Manchester encoded signal. Example 3
[0032] See Figure 1 A differential Manchester encoding generation system based on an operational amplifier, comprising: A digital encoding generation engine is used to generate single binary digital logic signals using digital logic devices; An electrical signal conversion unit is used to input the single binary digital logic signal into the pre-amplifier circuit for conversion and output a single-ended tri-state analog signal. The symmetrical signal generation unit is used to input the single-ended analog signal back into the subsequent inverting operational amplifier circuit to generate an inverse analog signal that is symmetrical to the single-ended tri-state analog signal, and to combine the single-ended tri-state analog signal and the inverse analog signal to generate a differential Manchester encoded signal.
[0033] This system significantly optimizes the limitations of traditional dedicated chip solutions through innovative architecture design, and achieves multi-dimensional advantages by utilizing general-purpose digital logic devices (such as FPGAs / CPUs) in conjunction with basic analog circuits (operational amplifiers): 1. Significantly reduced costs: Binary excitation signals are directly generated through a digital encoding engine (FPGA / CPU), replacing expensive dedicated protocol chips. The electrical signal conversion unit uses general-purpose operational amplifiers and passive components (resistors, capacitors), with material costs only one-tenth or even less of those of dedicated chips, offering a particularly significant advantage in small-batch applications.
[0034] 2. Flexible adaptation to multiple protocols: The digital encoding generation engine can simulate the timing rules of different bus protocols (such as ARINC429 and ARINC717) through software programming, while the preamplifier only needs to adjust the gain and bandwidth parameters (such as modifying the feedback resistor value) to match different electrical standards. This combination of "digital programmable + analog parameter adjustable" enables the same hardware platform to support multiple Manchester encoding protocols, breaking through the functional limitations of dedicated chips.
[0035] 3. Improved maintenance convenience: In traditional solutions, physical layer failures require the replacement of the entire dedicated chip, while this system adopts a modular design, meaning that digital logic device failures only require updating the FPGA program; circuit failures can be located to a single operational amplifier or resistor / capacitor device, and the procurement cycle for general-purpose components is much shorter than that for custom chips.
[0036] The embodiments of the present invention have been described above with reference to the accompanying drawings. However, the present invention is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of the present invention without departing from the spirit and scope of the claims. All of these forms are within the protection scope of the present invention.
Claims
1. A differential Manchester code generation method based on operational amplifiers, characterized in that, include: A single binary digital logic signal is generated using digital logic devices; The single binary digital logic signal is input to the pre-amplifier circuit, and a single-ended tri-state analog signal is output. The single-ended tri-state analog signal is then input into the subsequent inverting operational amplifier circuit to generate an inverted analog signal that is symmetrical to the single-ended tri-state analog signal. The single-ended tri-state analog signal and the inverted analog signal are combined to obtain the differential Manchester encoded signal.
2. The differential Manchester encoding generation method based on operational amplifier according to claim 1, characterized in that, The single binary digital logic signal includes a steady-state high level, a steady-state low level, and a high-frequency toggle state.
3. The differential Manchester encoding generation method based on operational amplifier according to claim 2, characterized in that, Generating a single binary digital logic signal using digital logic devices includes: In digital logic devices, the communication timing rules of the target bus protocol are analyzed to determine the level mapping relationship of Manchester encoding; Based on the level mapping relationship, a single binary digital excitation signal that satisfies the timing rules is generated.
4. The differential Manchester encoding generation method based on operational amplifier according to claim 3, characterized in that, The single binary digital logic signal is input to the preamplifier circuit, and a single-ended tri-state analog signal is output, including: By adjusting the proportional parameters in the preamplifier circuit, its amplification factor is set, thereby establishing a configuration mapping relationship between a single binary digital logic signal and a Manchester-encoded analog signal level. Based on the configuration mapping relationship, the level amplitude of different bus standards is generated; The configuration mapping relationship specifically includes: According to the electrical standard requirements of the target bus protocol, the input offset compensation value and closed-loop gain value of the operational amplifier circuit are set so that the steady-state high level is converted to output an analog level with a positive target amplitude, the steady-state low level is converted to output an analog level with a negative target amplitude, and when a single binary digital logic signal is in a high-frequency flip state and exceeds the gain-bandwidth product of the preceding operational amplifier, it maintains a zero-level output. The three together constitute a single-ended tri-state analog signal.
5. The differential Manchester encoding generation method based on operational amplifier according to claim 4, characterized in that, The square wave frequency corresponding to the high-frequency flip state is greater than the product of the frequency response threshold of the preamplifier and the preset safety factor threshold.
6. The differential Manchester encoding generation method based on operational amplifier according to claim 5, characterized in that, The square wave frequency of the high-frequency flip state satisfies the following condition: ； in, This indicates the square wave frequency corresponding to the high-frequency flip state; This represents the gain-bandwidth product of the preamplifier; A represents the closed-loop gain value; and N represents the safety factor threshold.
7. The differential Manchester encoding generation method based on operational amplifier according to claim 1, characterized in that, The single-ended tri-state analog signal is then input into the subsequent inverting operational amplifier circuit to generate an inverted analog signal symmetrical to the single-ended tri-state analog signal, including: The polarity of the single-ended tri-state analog signal is reversed by a preset inverse phase ratio to generate an inverse analog signal with the same amplitude but opposite polarity and symmetrical to the single-ended tri-state analog signal, thereby forming the negative output of the differential Manchester encoded signal.
8. The differential Manchester encoding generation method based on operational amplifier according to claim 1, characterized in that, Combining the single-ended tri-state analog signal and the inverted analog signal yields the differential Manchester coded signal, including: The single-ended tri-state analog signal is output as the positive terminal of the differential Manchester encoded signal; The inverted analog signal is output as the negative end of the differential Manchester encoded signal; The amplitude difference between the positive and negative output signals forms a differential voltage signal pair, thus constituting a differential Manchester encoded signal.
9. A differential Manchester encoding generation system based on an operational amplifier, characterized in that, include: A digital encoding generation engine is used to generate single binary digital logic signals using digital logic devices; An electrical signal conversion unit is used to input the single binary digital logic signal into the pre-amplifier circuit for conversion and output a single-ended tri-state analog signal. The symmetrical signal generation unit is used to input the single-ended analog signal back into the subsequent inverting operational amplifier circuit to generate an inverse analog signal that is symmetrical to the single-ended tri-state analog signal, and to combine the single-ended tri-state analog signal and the inverse analog signal to generate a differential Manchester encoded signal.