Intelligent power module and power electronic device

Abstract

The invention provides an intelligent power module and a power electronic device, which are used for avoiding the problems of reliability and complexity of the existing intelligent power module through an IPM (Intelligent Power Module) which takes a hybrid device consisting of a normally open MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) and a low-voltage silicon MOSFET as a core power unit. The intelligent power module comprises at least one power unit, and the power unit comprises a normally open MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) and a low-voltage silicon MOSFET; the drain electrode of the low-voltage silicon MOSFET is electrically connected with the source electrode of the normally open type MOSFET; and the source electrode of the low-voltage silicon MOSFET is electrically connected with the grid electrode of the normally open MOSFET.

Description

Technical Field

[0001] This invention relates to the field of semiconductor device technology, and in particular to an intelligent power module and a power electronic device. Background Technology

[0002] With the development of new energy and power electronics technologies, traditional silicon-based power devices can no longer meet the application requirements of high voltage, high frequency, and high power density. Third-generation semiconductor materials (represented by silicon carbide and gallium nitride) have become key to breaking through traditional technological bottlenecks due to their wide bandgap, high critical electric field, and high thermal conductivity. Among them, silicon carbide (SiC) MOSFETs and GaNFETs have shown significant potential in the field of medium- and high-voltage power conversion due to their advantages such as low conduction loss, high switching speed, and high temperature resistance.

[0003] However, despite their excellent performance, SiC MOSFETs and GaN FETs, as core devices of third-generation semiconductors, face the following key challenges in practical applications: Driving complexity: Conventional SiC MOSFETs suffer from threshold voltage (Vth) drift, which is significantly affected by temperature and gate voltage fluctuations. This necessitates complex gate drive circuitry (such as negative gate voltage bias) to prevent false turn-on, increasing system design difficulty and cost. Furthermore, their narrow gate voltage range places extremely high demands on the stability of the drive signal, making them susceptible to noise interference that can lead to switching abnormalities.

[0004] There is a contradiction between switching characteristics and reliability: While the high switching speed of SiC MOSFETs and GaN FETs can reduce switching losses, it also leads to high di / dt and dv / dt during switching, causing severe voltage overshoot, ringing, and electromagnetic interference (EMI). Additional snubber circuits (such as RC snubbers) are required to suppress transient stress, which not only increases the circuit size but may also introduce additional losses.

[0005] To address the above issues, integrating silicon carbide and gallium nitride into IPM modules is challenging, requires specialized driver design, and is difficult to make functionally identical to existing IPM modules, leading to significant changes in the application. Summary of the Invention

[0006] This invention provides an intelligent power module and power electronic device, which uses an IPM module with a hybrid device composed of normally open MOSFETs and low-voltage silicon MOSFETs as the core power unit to avoid the reliability and complexity problems of existing intelligent power modules.

[0007] In a first aspect, the present invention provides an intelligent power module, comprising: at least one power unit, the power unit comprising a normally open MOSFET and a low-voltage silicon MOSFET; the drain of the low-voltage silicon MOSFET is electrically connected to the source of the normally open MOSFET; and the source of the low-voltage silicon MOSFET is electrically connected to the gate of the normally open MOSFET.

[0008] In one embodiment, the system further includes a driving unit, wherein the gate of the low-voltage silicon MOSFET is connected to the driving unit and is used to receive a driving signal emitted by the driving unit.

[0009] In one embodiment, the drive unit is configured as follows: When the power unit needs to be turned off, a low-level signal is output to turn off the low-voltage silicon MOSFET, thereby cutting off the gate voltage path of the normally open MOSFET and turning it off synchronously. When the power unit needs to be turned on, a high-level signal is output to turn on the low-voltage silicon MOSFET, thereby providing a forward bias voltage to the gate of the normally open MOSFET and turning it on.

[0010] In one embodiment, the driving unit includes: The processing and allocation unit is used to receive the original control signals and perform preliminary processing and allocation. The control unit, electrically connected to the processing and distribution unit, is used to drive the power unit.

[0011] In one embodiment, the number of power units is six, wherein the gates of the low-voltage silicon MOSFETs of three power units are electrically connected to the processing and distribution unit; the gates of the low-voltage silicon MOSFETs of the remaining three power units are electrically connected to the control unit; the six power units constitute a three-phase full-bridge inverter circuit topology; the midpoints of the three bridge arms of the three-phase full-bridge inverter circuit topology are respectively led out as three-phase AC output terminals.

[0012] In one embodiment, the drain of the normally open MOSFET is electrically connected to an external module as the output terminal.

[0013] In one embodiment, the low-voltage silicon MOSFET is electrically connected to the normally open MOSFET via an aluminum wire.

[0014] In one implementation, it further includes: The power unit and the drive unit are encapsulated within the encapsulation housing; Multiple external pins, some of which are electrically connected to the drain output and source input of the power unit, and some of which are electrically connected to the input of the drive unit.

[0015] In one embodiment, the normally open MOSFET is a normally open silicon carbide MOSFET or a normally open gallium nitride MOSFET.

[0016] In a second aspect, the present invention provides a power electronic device, including an intelligent power module as described in any of the preceding claims.

[0017] As can be seen from the above technical solutions, the present invention has the following advantages: This invention provides an intelligent power module and power electronic device, comprising: at least one power unit, the power unit including a normally open MOSFET and a low-voltage silicon MOSFET; the drain of the low-voltage silicon MOSFET is electrically connected to the source of the normally open MOSFET; the source of the low-voltage silicon MOSFET is electrically connected to the gate of the normally open MOSFET. By employing a normally open MSOFET, the reliability problem of gate drift in normally open MOSFETs is avoided; by introducing a conventional silicon MOSFET, its Vth is stable and easily improved, allowing the drive to be compatible with existing silicon chip drives without the need for specially designed negative voltage turn-off, Miller clamping, and other circuitry, making the drive circuit simpler and easier to implement; normally open MOSFETs have an inherent disadvantage in inductive load systems due to their short-circuit capability. This invention introduces a low-voltage silicon MSOFET, and by controlling the saturation current of the silicon MSOFET, the short-circuit capability of the normally open MOSFET can be improved, making the chip more suitable for inductive load applications; this hybrid device, by changing the capacitor structure of the normally open MOSFET, can effectively slow down the turn-off speed and effectively suppress voltage spikes and ringing problems. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a schematic diagram of the structure of a power unit provided in an embodiment of the present invention; Figure 2 A circuit connection diagram of an intelligent power module provided in an embodiment of the present invention; Figure 3This is a schematic flowchart illustrating a method for fabricating a smart power module according to an embodiment of the present invention.

[0020] Figure 4 This is a schematic diagram of the structure of an intelligent power module provided in an embodiment of the present invention.

[0021] Figure 5 This is a flowchart illustrating a method for fabricating a smart power module according to another embodiment of the present invention.

[0022] Figure 6 This is a schematic diagram of the structure of an intelligent power module provided in another embodiment of the present invention. Detailed Implementation

[0023] This invention provides an intelligent power module and power electronic device, which uses an IPM module with a hybrid device composed of normally open MOSFETs and low-voltage silicon MOSFETs as the core power unit to avoid the reliability and complexity problems of existing intelligent power modules.

[0024] To make the objectives, features, and advantages of this invention more apparent and understandable, the technical solutions of the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the embodiments described below are only some embodiments of this invention, and not all embodiments. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0025] Example 1 Figure 1 This is a schematic diagram of a power unit according to an embodiment of the present invention; see reference. Figure 1 As shown, this embodiment provides a smart power module, which includes at least one power unit 100. The power unit 100 includes a normally open MOSFET 110 (Metal-Oxide-Semiconductor Field-Effect Transistor) and a low-voltage silicon MOSFET 120. The drain of the low-voltage silicon MOSFET 120 is electrically connected to the source of the normally open MOSFET 110; the source of the low-voltage silicon MOSFET 120 is electrically connected to the gate of the normally open MOSFET 110. The drain of the normally open MOSFET 110 serves as an output terminal and is electrically connected to an external module.

[0026] As is understandable, the normally open MOSFET 110, also known as a "depletion-mode MOSFET," refers to a device that is in the on-state (channel already present) when no external control signal is applied (i.e., gate-source voltage Vgs = 0V), allowing current to flow freely between the drain and source. Because it lacks certain design constraints introduced to achieve "turn-off" in normally closed devices, normally open SiC MOSFETs can theoretically achieve lower intrinsic on-resistance, resulting in lower losses and higher efficiency during conduction. Their channel electron mobility may also be higher, contributing to improved frequency performance.

[0027] Optionally, the normally open MOSFET 110 described in this invention can be a normally open silicon carbide MOSFET or a normally open gallium nitride MOSFET, etc.

[0028] It's understandable that low-voltage silicon MOSFET 120 is an important subclass of conventional silicon MOSFETs. Their physical basis and operating principle are completely identical; the core difference lies in their voltage ratings and the resulting emphasis on performance optimization. Low-voltage silicon MOSFET 120 typically refers to MOSFETs with drain-source voltage ratings (Vds) below 200V, commonly available in 30V, 40V, 60V, 100V, and 150V ratings.

[0029] Optionally, the low-voltage silicon MOSFET 120 and the normally open MOSFET 110 can be electrically connected by an aluminum wire; or the low-voltage silicon MOSFET 120 and the normally open MOSFET 110 can be connected by sintered silver.

[0030] The intelligent power module and power electronic device disclosed in this embodiment avoid the reliability problem of gate drift of normally open MOSFET 110 by adopting normally open MSOFET. The introduction of a conventional silicon MOSFET ensures stable and easily boosted Vth, allowing the drive to be compatible with existing silicon chip drives without the need for specially designed negative voltage turn-off and Miller clamping circuits, making the drive circuit simpler and easier to implement. Normally open MOSFET 110 has an inherent disadvantage in inductive load systems due to its short-circuit capability. This invention introduces a low-voltage silicon MSOFET, and by controlling the saturation current of the silicon MSOFET, the short-circuit capability of the normally open MOSFET 110 can be improved, making the chip more suitable for inductive load applications. This hybrid device, by changing the capacitor structure of the normally open MOSFET 110, can effectively slow down the turn-off speed and effectively suppress voltage spikes and ringing problems.

[0031] Example 2 Based on the above embodiments, Figure 1This is a schematic diagram of the structure of a power unit provided in an embodiment of the present invention; Figure 2 This is a circuit connection diagram of an intelligent power module according to an embodiment of the present invention; see reference. Figure 1 and Figure 2 As shown, the power unit 100 is composed of a normally open SiC MOSFET and a low-voltage Si MOSFET connected in a specific manner. The drain of the low-voltage Si MOSFET is electrically connected to the source of the normally open SiC MOSFET, forming a first connection point; the source of the low-voltage Si MOSFET is electrically connected to the gate of the normally open SiC MOSFET, forming a second connection point. The power unit 100 presents three functional terminals externally: High voltage input terminal (D): led out from the drain of a normally open SiC MOSFET; Source output terminal (S): led out from the first connection point mentioned above; Control terminal (G): Taken from the gate of the low-voltage Si MOSFET.

[0032] Furthermore, the intelligent power module also includes a drive unit 200, wherein the gate of the low-voltage silicon MOSFET 120 is connected to the drive unit 200 for receiving drive signals emitted by the drive unit 200.

[0033] The drive unit 200 is configured as follows: When the power unit 100 needs to be turned off, a low-level signal is output to turn off the low-voltage silicon MOSFET 120, thereby cutting off the gate voltage path of the normally open MOSFET 110 and turning it off synchronously. Specifically, when the drive unit 200 applies a low-level signal (e.g., 0V or negative voltage) to the control terminal (G), the low-voltage Si MOSFET turns off. This cuts off the voltage path of the normally open SiC MOSFET's gate, leaving its gate floating or discharging to the source potential through an internal or external resistor, thus reliably turning off the normally open SiC MOSFET. At this time, the circuit between the high-voltage input terminal (D) and the source output terminal (S) is disconnected.

[0034] When the power unit 100 needs to be turned on, a high-level signal is output to turn on the low-voltage silicon MOSFET 120, thereby providing a forward bias voltage to the gate of the normally open MOSFET 110, making it conduct. Specifically, when the drive unit 200 applies a high-level signal (e.g., +12V) to the control terminal (G), the low-voltage Si MOSFET turns on, and its source potential is pulled high, thereby providing a forward bias voltage to the gate of the normally open SiC MOSFET, making it conduct. At this time, the current path is: flowing in from the high-voltage input terminal (D), through the turned-on normally open SiC MOSFET, and flowing out from the source output terminal (S).

[0035] Further, the drive unit 200 includes a processing and distribution unit 210 and a control unit 220. The processing and distribution unit 210 is used to receive the original control signal and perform preliminary processing and distribution; the control unit 220 is electrically connected to the processing and distribution unit 210 and is used to drive the power unit 100.

[0036] By employing the aforementioned connection method, a normally open device is cleverly transformed into a composite power switch that outwardly exhibits normally closed characteristics, fundamentally solving the reliability problem of gate drift in normally open MOSFET 110. The external controller can control the entire power unit 100 simply by providing a standard drive signal through the drive unit 200, just like driving a regular normally closed MOSFET, eliminating the need for complex negative voltage turn-off circuits and simplifying system design.

[0037] Optionally, the number of power units 100 is six, wherein the gates of the low-voltage silicon MOSFETs 120 of three power units 100 are electrically connected to the processing and distribution unit 210; the gates of the low-voltage silicon MOSFETs 120 of the remaining three power units 100 are electrically connected to the control unit 220; the six power units 100 form a three-phase full-bridge inverter circuit topology; the midpoints of the three bridge arms of the three-phase full-bridge inverter circuit topology are respectively led out as three-phase AC output terminals.

[0038] The first bridge arm consists of a series connection of hybrid power units Q1 and Q2; the second bridge arm consists of a series connection of Q3 and Q4; and the third bridge arm consists of a series connection of Q5 and Q6. The high-voltage input terminals (D) of the two power units in each bridge arm are connected to the positive terminal (P terminal) of the DC bus, and their source output terminals (S) are connected to the negative terminal (N terminal) of the DC bus. The midpoint of each bridge arm (i.e., the connection point between Q1 and Q2, Q3 and Q4, and Q5 and Q6) serves as the three-phase AC output terminals (U, V, W). The gates of Q1, Q3, and Q5 are electrically connected to the processing and distribution unit 210; the gates of Q2, Q4, and Q6 are electrically connected to the control unit 220.

[0039] Furthermore, the drive unit 200 is electrically connected to an external MCU (Microcontroller Unit). The processing and distribution unit 210 receives six PWM control signals from the external MCU, processes them, and then uses the microcontroller unit to drive the control terminals (G) (i.e., the gates of the low-voltage Si MOSFETs inside) of the three upper bridge arm hybrid power units (Q1, Q3, Q5) respectively, and directly drives the control terminals (G) of the three lower bridge arm hybrid power units (Q2, Q4, Q6).

[0040] Optionally, the processing and distribution unit 210 may be an LVIC (Low Voltage Integrated Circuit); the control unit 220 may be an HVIC (High Voltage Integrated Circuit).

[0041] Furthermore, the intelligent power module also includes a package housing and multiple external pins. The power unit 100 and the drive unit 200 are packaged within the package housing; some of the external pins are electrically connected to the drain output terminal and the source input terminal of the power unit 100, and some of the external pins are electrically connected to the input terminal of the drive unit 200.

[0042] Optionally, the encapsulation housing is an insulating encapsulation housing, such as epoxy resin.

[0043] This embodiment improves safety performance by controlling the series connection of low-voltage Si MOSFETs, making the normally open SiC MOSFETs exhibit normally closed characteristics externally. It fully utilizes the low on-resistance advantage of normally open SiC MOSFETs and takes advantage of the excellent switching characteristics of low-voltage Si MOSFETs. It can be directly controlled by a standard driver IC without the need for a complex negative voltage turn-off circuit, reducing system cost and complexity. Furthermore, this intelligent power module highly integrates the functions of power unit 100 and driver unit 200 into one module, improving power density and system reliability.

[0044] Example 3 Based on the above embodiments, this embodiment provides a power electronic device including the aforementioned intelligent power module. Optionally, this power electronic device can be widely used in the home appliance industry (e.g., air conditioners, refrigerators, washing machines, etc.), industrial control (e.g., frequency converters, industrial fans, water pumps, etc.), electric vehicles (e.g., automotive air conditioners, etc.). Compared with traditional power electronic devices, power electronic devices with the intelligent power module described in this invention have better switching characteristics, can effectively reduce turn-off ringing problems, can significantly improve the overall EMC performance, and can improve short-circuit conditions, making the product more suitable for inductive loads, thereby upgrading and broadening the application scenarios.

[0045] Example 4 Figure 3 This is a schematic flowchart illustrating a method for fabricating a smart power module according to an embodiment of the present invention. Figure 4 This is a schematic diagram of a smart power module according to an embodiment of the present invention. (Reference) Figure 3 and Figure 4 As shown, this embodiment provides a method for fabricating a smart module. The core of this module lies in using solder paste sintering technology and aluminum wire bonding technology to achieve the integration and interconnection of a normally open SiC MOSFET and a low-voltage Si MOSFET hybrid power unit 100. Specifically, it includes the following steps: S1: Incoming material inspection and warehousing All incoming raw materials undergo rigorous inspection, including but not limited to: Chips: Normally open SiC MOSFET chips, low-voltage Si MOSFET chips, driver IC chips (HVIC, LVIC, etc.).

[0046] Substrate: Direct-bonded copper (DBC) ceramic substrate (such as AlN or Al2O3).

[0047] Auxiliary materials: solder paste, silver paste, aluminum wire / palladium-plated copper wire / gold wire 002, molding compound, lead frame, etc.

[0048] After the raw materials pass inspection, they are put into storage and stored in order for use by the production line.

[0049] S2: Front-end process - chip mounting This step uses traditional solder paste technology for chip bonding, which can be divided into two parallel processes: Line A (solder paste die bonding): Printing: High-temperature solder paste is precisely printed onto the designated positions on the DBC substrate 005 using a stencil.

[0050] Surface mount technology (SMT): Using a high-precision automatic feeder and surface mount equipment, normally open silicon carbide MOSFET chips and low-voltage silicon MOSFET chips are picked up and placed on solder paste.

[0051] Vacuum reflow soldering: The DBC substrate with the chip mounted is transferred to a vacuum reflow oven for soldering. The vacuum environment effectively avoids voids and ensures a low-resistance, high-reliability mechanical and electrical connection between the chip and the substrate.

[0052] B-line (silver paste die bonding): For chips such as driver ICs that do not have high requirements for matching thermal expansion coefficients, silver paste process can be used.

[0053] Apply adhesive: Apply insulating silver paste to the corresponding positions on the DBC substrate of the copper frame 001.

[0054] Surface mount: mounting driver IC chips.

[0055] Silver paste baking: The silver paste is transferred to a curing oven and cured at a specific temperature profile.

[0056] S3: Chip Interconnect - Aluminum Wire Bonding After chip mounting is completed, the internal electrical connections of the module are made: Plasma cleaning: Plasma is used to clean the surface of the soldered chip, thoroughly removing organic contaminants and oxide layers, significantly improving the bonding strength and consistency of wire bonds.

[0057] Soldering: Using an ultrasonic bonding machine, aluminum wire is used to electrically connect the source (S) of the normally open silicon carbide MOSFET 110 to the drain (D) of the low-voltage silicon MOSFET 120. Simultaneously, palladium-plated copper wire or gold wire (002) is used to complete other internal interconnections (such as connections between chip electrodes and DBC pads, and between driver circuits and power units). Aluminum wire is preferred for high-current power interconnects due to its cost advantage and good reliability.

[0058] Optionally, the DBC substrate 005 is bonded to the normally open silicon carbide MOSFET 110 using 5mil aluminum wires; the DBC substrate 005 is bonded to the low-voltage silicon MOSFET 120 using 15mil aluminum wires.

[0059] S4: Post-processing - Module packaging and molding Assembly and gate inspection: Assemble the bonded DBC substrate onto the lead frame and perform preliminary inspection (gate inspection).

[0060] Plastic encapsulation: The assembled semi-finished product is transferred to the molding system and transferred and molded using epoxy molding compound (EMC) to form a protective shell, which isolates the internal structure from the environment and provides mechanical protection and insulation.

[0061] Post-molding processing: The module is electroplated (e.g., tin-plated on the lead frame pins to prevent oxidation), inspected after electroplating, and baked to remove internal moisture.

[0062] S5: Final Molding and Testing Lead forming: The connected lead frame units are cut and separated, and the outer leads are bent into the final desired shape.

[0063] Laser marking: Laser engraving of product model, serial number, production date and other information on the surface of the module housing.

[0064] Electrical testing includes: Room temperature test: Test the basic static parameters (such as on-state voltage drop) and input / output characteristics of the module.

[0065] Withstand voltage test: Apply high voltage to test whether the module's insulation capability and leakage current meet the standards.

[0066] RQA Electrical Testing: Performs comprehensive reliability quality assessment (RQA) testing, which may include dynamic parameter testing at high temperatures.

[0067] Visual inspection and RQA testing: Perform a final visual inspection on the finished module and complete other non-electrical reliability tests.

[0068] Finished product packaging: Pack qualified products in accordance with anti-static requirements and put them into the warehouse for shipment.

[0069] The method for fabricating the intelligent power module provided in this embodiment has the following technical advantages: Mature technology and controllable cost: It makes full use of the industry's mature solder paste printing-reflow soldering process and aluminum wire bonding technology, avoiding expensive nano-silver sintering or copper wire bonding processes, effectively controlling manufacturing costs while ensuring performance.

[0070] Reliable connection: Vacuum reflow soldering reduces the void ratio of the chip solder layer, improving heat dissipation performance and reliability; aluminum wire bonding technology is mature and has strong bonding force, meeting the long-term reliability requirements of power modules.

[0071] High-efficiency integration: This process efficiently integrates multiple chips, such as hybrid devices (SiC + Si), drive circuits, and protection circuits, into a compact module, demonstrating the high integration advantages of intelligent power modules.

[0072] Example 5 Figure 5 This is a schematic flowchart illustrating a method for fabricating a smart power module according to an embodiment of the present invention. Figure 6 This is a schematic diagram of a smart power module according to an embodiment of the present invention. (Reference) Figure 5 and Figure 6As shown, this embodiment provides a method for fabricating a smart module. The core of this module lies in the integration and interconnection of a normally-on SiC MOSFET and a low-voltage Si MOSFET hybrid power unit using a sintering silver process. Specifically, it includes the following steps: S1: Incoming Material Inspection and Pre-processing Incoming material inspection and warehousing: All raw materials are subject to strict inspection, with a focus on normally open SiC MOSFET chips, low-voltage Si MOSFET chips (whose surfaces have been pre-plated with silver to adapt to the subsequent sintering silver process), driver IC chips, DBC ceramic substrates, high-temperature sintered silver paste / silver film, copper-plated steel wire, gold wire, molding compound and lead frame, etc.

[0073] Automated loading: The inspected and qualified chips and substrates are loaded into a high-precision automated feeding system.

[0074] S2: Sintered silver chip mounting (a key component of multilayer packaging) This step employs an advanced sintering silver process for crystal fixation, and consists of two sub-processes: Mounting of low-voltage silicon MOSFET 120 (frame preparation and chip sintering): Frame solder paste: For parts that need to be connected to external lead frames, solder paste is used for pre-processing.

[0075] Silicon MOSFET silver film transfer and die bonding: A pre-formed silver film or printed silver paste is transferred to a designated location on the DBC substrate 005 using precision equipment. Subsequently, the silver-plated silicon MOSFET chip is picked up and placed on the silver film. This silver plating layer significantly improves the wettability and bonding strength between the metallization layer on the back of the chip and the sintered silver material.

[0076] Mounting of silicon carbide MOSFETs (layered sintering to achieve multilayer structure): Silicon carbide MOSFET silver film transfer and die bonding: Next, a small piece of high-temperature sintered silver film is transferred onto a specific electrode (such as the source) on the front side of the already mounted low-voltage silicon MOSFET 120 chip. Then, the normally open silicon carbide MOSFET chip is picked up and precisely placed on this silver film. This is not a simple side-by-side arrangement, but rather a vertical stacking of silicon carbide MOSFETs on top of silicon MOSFETs, forming a preliminary multilayer package structure.

[0077] Vacuum reflow soldering / sintering: The substrate with completed chip stacking is transferred to a vacuum sintering furnace. Under specific temperature, pressure, and atmosphere profiles, the silver film undergoes a sintering reaction to form a porous nano-silver sintered layer. This sintered layer simultaneously forms a high-strength, high-thermal-conductivity mechanical and electrical connection with the back side of the normally open silicon carbide MOSFET, the silver-plated electrodes on the front side of the low-voltage silicon MOSFET 120, and the DBC copper layer.

[0078] S3: Other chip mounting and interconnection Driver IC mounting (silver paste die bonding and baking): For heat-sensitive or non-current-dependent driver IC chips, insulating silver paste is used for mounting and then cured and baked.

[0079] Plasma cleaning: Before bonding, the entire substrate is thoroughly cleaned with plasma to remove organic matter and micro-oxides, ensuring that the bonding interface is absolutely clean.

[0080] Interconnection bonding: Internal electrical connections are performed using a high-performance wire bonding machine. Copper wire bonding is used to interconnect high-current paths, such as connecting the DBC pads on the copper frame 001 to the electrodes. Compared to traditional aluminum wire, copper wire has lower resistivity and higher current capability, further reducing conduction losses.

[0081] Optionally, the DBC substrate is bonded to the normally open silicon carbide MOSFET 110 using 5mil aluminum wires; or the DBC substrate is bonded to the low-voltage silicon MOSFET 120 using 15mil aluminum wires.

[0082] The gold wire 002 is used to complete the fine signal connection between the drive circuit and the power unit.

[0083] Key interconnects: Using thick copper-plated steel wires, the source (S) of the SiC MOSFET is connected to the drain (D) of the low-voltage silicon MOSFET 120 and the related DBC substrate 005 traces to complete the final circuit construction of the hybrid power unit.

[0084] S4: Module Packaging, Molding, and Testing Gate inspection: 100% online optical inspection (AOI) of interconnected components.

[0085] Encapsulation: The process employs transfer molding, using low-stress, high-thermal-conductivity epoxy molding compound (EMC) for encapsulation.

[0086] Post-molding curing: This process allows the molding compound to fully cure and achieve its final mechanical properties.

[0087] Post-processing: electroplating (tin plating of lead frame pins), post-plating inspection and baking, laser marking, and lead cutting and shaping.

[0088] Comprehensive testing: Finished modules undergo room temperature testing, withstand voltage testing (Hi-POT), and rigorous RSA (Reliability Sample Assessment) electrical testing and visual inspection to ensure that their performance and reliability fully meet the standards.

[0089] Finished product packaging: Qualified products are packaged for moisture protection and anti-static purposes before being put into storage.

[0090] The method for fabricating the intelligent power module provided in this embodiment has the following advantages and innovations: A leap in performance: Compared to traditional solder paste, the nano-silver sintered layer exhibits higher thermal conductivity (>200 W / mK) and electrical conductivity, as well as superior high-temperature reliability (melting point is much higher than that of solder paste). This significantly reduces the thermal resistance from the chip to the substrate, improving the power density and overload capacity of the module.

[0091] Breakthrough in integration: By vertically stacking and sintering normally open silicon carbide MOSFETs on top of low-voltage silicon MOSFET 120, instead of placing them side-by-side as in the traditional method, the planar area occupied by the chip on the substrate is significantly reduced. This makes it possible to integrate more functions (such as more bridge arms and more complex drive protection) within a module of the same size, or directly realizes the miniaturization of the module.

[0092] High-frequency performance optimization: The multi-layer stacked structure significantly reduces the physical distance between the silicon carbide and silicon chips. Combined with low-inductance sintered silver connections and copper-plated wire bonding, stray inductance and parasitic resistance in the power circuit are significantly reduced. This is crucial for fully utilizing the high-speed switching characteristics of silicon carbide devices and suppressing voltage overshoot and oscillations, enabling the module to operate at higher frequencies.

[0093] Reliability Improvement (Material Compatibility): Silver plating pretreatment is applied to the surface of the low-voltage silicon MOSFET 120, which perfectly solves the compatibility problem between the chip metallization layer and the sintered silver material, ensuring the consistency of the sintering interface and long-term reliability, and avoiding delamination or performance degradation caused by material incompatibility.

[0094] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0095] In the several embodiments provided in this application, it should be understood that the methods, apparatuses, electronic devices, and storage media disclosed in this invention can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the displayed or discussed mutual couplings, direct couplings, or communication connections may be through some interfaces; indirect couplings or communication connections between devices or units may be electrical, mechanical, or other forms.

[0096] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0097] Furthermore, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0098] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a readable storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned readable storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0099] The above-described embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A smart power module, characterized in that, include: At least one power unit, the power unit comprising a normally open MOSFET and a low-voltage silicon MOSFET; The drain of the low-voltage silicon MOSFET is electrically connected to the source of the normally open MOSFET; the source of the low-voltage silicon MOSFET is electrically connected to the gate of the normally open MOSFET.

2. The intelligent power module according to claim 1, characterized in that, Also includes: The driving unit has its gate connected to the low-voltage silicon MOSFET and is used to receive the driving signal emitted by the driving unit.

3. The intelligent power module according to claim 2, characterized in that, The drive unit is configured as follows: When the power unit needs to be turned off, a low-level signal is output to turn off the low-voltage silicon MOSFET, thereby cutting off the gate voltage path of the normally open MOSFET and turning it off synchronously. When the power unit needs to be turned on, a high-level signal is output to turn on the low-voltage silicon MOSFET, thereby providing a forward bias voltage to the gate of the normally open MOSFET and turning it on.

4. The intelligent power module according to claim 2, characterized in that, The driving unit includes: The processing and allocation unit is used to receive the original control signals and perform preliminary processing and allocation. The control unit, electrically connected to the processing and distribution unit, is used to drive the power unit.

5. The intelligent power module according to claim 4, characterized in that, The number of power units is six, wherein the gates of the low-voltage silicon MOSFETs of three of the power units are electrically connected to the processing and distribution unit; the gates of the low-voltage silicon MOSFETs of the remaining three power units are electrically connected to the control unit; the six power units form a three-phase full-bridge inverter circuit topology; the midpoints of the three bridge arms of the three-phase full-bridge inverter circuit topology are respectively led out as three-phase AC output terminals.

6. The intelligent power module according to claim 1, characterized in that, The drain of the normally open MOSFET is electrically connected to the external module as the output terminal.

7. The intelligent power module according to claim 1, characterized in that, The low-voltage silicon MOSFET is electrically connected to the normally open MOSFET via an aluminum wire.

8. The intelligent power module according to claim 2, characterized in that, Also includes: The power unit and the drive unit are encapsulated within the encapsulation housing; Multiple external pins, some of which are electrically connected to the drain output and source input of the power unit, and some of which are electrically connected to the input of the drive unit.

9. The intelligent power module according to claim 1, characterized in that, The normally open MOSFET is a normally open silicon carbide MOSFET or a normally open gallium nitride MOSFET.

10. A power electronic device, characterized in that, Includes the intelligent power module as described in any one of claims 1 to 9 above.

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