Solid-state power controller based on SiC MOSFET and control method thereof

Abstract

The invention relates to a SiC MOSFET-based solid-state power controller and a control method thereof, and belongs to the field of high-voltage direct-current intelligent power distribution. The SiC MOSFET-based solid-state power controller comprises a control circuit for outputting a control signal and a power circuit; the control circuit comprises an isolation driving unit and a power supply isolation and control conversion unit; the power circuit comprises a pre-charging circuit and a double-switch Boost circuit; the double-switch Boost circuit comprises a first SiC MOSFET circuit and a second SiC MOSFET circuit; and under the action of the control signal, the pre-charging circuit supplies power to a load when the power circuit is started, and after the power circuit is started, the second SiC MOSFET circuit is independently conducted or alternately conducted with the first SiC MOSFET circuit, and is used for supplying power to the load connected between the positive output end and the negative output end of the double-switch Boost circuit. The solid-state power controller is efficient, stable and reliable.

Description

Technical Field

[0001] This invention relates to the field of high voltage DC intelligent power distribution technology, and in particular to a solid-state power controller based on SiC MOSFET and its control method. Background Technology

[0002] With the rapid development of power supply and distribution systems for my country's aerospace equipment towards higher efficiency, higher voltage, and higher power density, solid-state power controllers in power supply and distribution systems must also develop towards higher efficiency, higher voltage, and higher power density.

[0003] As the on-resistance of silicon-based power devices increases with their voltage rating, IGBTs have become the mainstream choice for high-voltage applications. However, IGBTs generate tail current during turn-off, resulting in significant switching losses. Furthermore, existing solid-state power controllers using ordinary silicon-based power transistors are bulky and heavy, have low switching frequencies, and cannot address the issue of output voltage decreasing with battery voltage.

[0004] Therefore, in the field of power supply and distribution for aerospace equipment, there is an urgent need for a solid-state power controller and corresponding control method that is small in size and light in weight, has high power distribution efficiency and has a boost function. Summary of the Invention

[0005] Based on the above analysis, the present invention aims to provide a solid-state power controller based on SiC MOSFET and its control method, in order to solve the problems of large size and weight, low power distribution efficiency, and reduced output voltage of solid-state power controllers in existing high-voltage DC power distribution systems for aerospace equipment.

[0006] On one hand, embodiments of the present invention provide a solid-state power controller based on SiC MOSFET, including a control circuit for outputting control signals and a power circuit;

[0007] The control circuit includes an isolation drive unit and a power isolation and control conversion unit; the power isolation and control conversion unit outputs drive control signals and isolation power supply voltage to the isolation drive unit, and the isolation drive unit outputs control signals to the power circuit.

[0008] The power circuit includes a pre-charge circuit and a dual-switch Boost circuit; the dual-switch Boost circuit includes a first SiC MOSFET circuit and a second SiC MOSFET circuit; under the action of the control signal, the pre-charge circuit supplies power to the load when the power circuit is started, and after startup, the second SiC MOSFET circuit is turned on alone or alternately turned on with the first SiC MOSFET circuit to supply power to the load connected between the positive and negative output terminals of the dual-switch Boost circuit.

[0009] Furthermore, the power isolation and control conversion unit includes a power isolation circuit and a main control unit; the main control unit is used to output the drive control signal; the power isolation circuit is used to generate a first voltage to a third voltage; the first voltage is used to supply power to the main control unit and the isolation drive unit; the second voltage and the third voltage are used to generate control signals for the power circuit under the action of the drive control signal.

[0010] Furthermore, the control signal includes a first control signal to a third control signal;

[0011] The first control signal is connected to the control terminal of the first SiC MOSFET circuit, the second control signal is connected to the control terminal of the second SiC MOSFET circuit, and the third control signal is connected to the control terminal of the pre-charge circuit.

[0012] The first control signal and the second control signal are used to control the second SiC MOSFET circuit to be turned on independently when the power supply unit voltage is normal; and to control the second SiC MOSFET circuit and the first SiC MOSFET circuit to be turned on alternately when the power supply unit voltage drops below a set threshold and the duration is greater than the undervoltage protection preset time threshold; and to control the first and second SiC MOSFET circuits to be turned off when the power circuit current is greater than a set current threshold and the duration reaches the short circuit protection preset time threshold.

[0013] The third control signal is used to control the pre-charge circuit to be turned on during startup; and to control the pre-charge circuit to be turned off when the power circuit current is greater than a set current threshold and the duration reaches a short-circuit protection preset time threshold.

[0014] Furthermore, the control circuit also includes voltage and current acquisition sensors, which are connected in series in the branch where the positive output terminal of the power circuit is located.

[0015] Furthermore, the dual-switch Boost circuit also includes a power supply unit, a first energy storage unit, and a second energy storage unit; one end of the first energy storage unit is connected to the positive terminal of the power supply unit, and the other end is connected to the positive terminals of the first SiC MOSFET circuit and the second SiC MOSFET circuit, respectively; the negative terminal of the first SiC MOSFET circuit is connected to the negative output terminal of the dual-switch Boost circuit, and the negative terminal of the second SiC MOSFET circuit is connected to the positive output terminal of the dual-switch Boost circuit; the second energy storage unit is connected between the positive and negative output terminals of the dual-switch Boost circuit.

[0016] Furthermore, the first SiC MOSFET circuit includes a first SiC MOSFET branch, a second SiC MOSFET branch, and a first resistor; the first SiC MOSFET branch includes a first SiC MOSFET and a third resistor; the second SiC MOSFET branch includes a second SiC MOSFET and a second resistor; the source of the first SiC MOSFET is connected to the source of the second SiC MOSFET as the negative terminal of the first SiC MOSFET circuit; the drain of the first SiC MOSFET is connected to the drain of the second SiC MOSFET as the positive terminal of the first SiC MOSFET circuit; the gate of the first SiC MOSFET is connected to one end of the third resistor, the gate of the second SiC MOSFET is connected to one end of the second resistor, the other ends of the third resistor and the second resistor are connected together and then connected to one end of the first resistor, and the other end of the first resistor is the control terminal.

[0017] Furthermore, the second SiC MOSFET circuit includes a third to a sixth SiC MOSFET and a fifth to an eighth resistor; the sources of the third and fifth SiC MOSFETs are connected; the sources of the fourth and sixth SiC MOSFETs are connected; the drains of the third and fourth SiC MOSFETs are connected as the positive terminal of the second SiC MOSFET circuit; the drains of the fifth and sixth SiC MOSFETs are connected as the negative terminal of the second SiC MOSFET circuit; one end of the fifth resistor is connected to the gate of the fourth SiC MOSFET, one end of the sixth resistor is connected to the gate of the third SiC MOSFET, one end of the seventh resistor is connected to the gate of the sixth SiC MOSFET, one end of the eighth resistor is connected to the gate of the fifth SiC MOSFET, and the other ends of the fifth to eighth resistors are connected to the control terminal.

[0018] Furthermore, the isolation driving unit includes a driving chip, a Miller clamping circuit, and a desaturation detection circuit; the driving chip includes a first to a third driving chip; each of the first to third driving chips includes a Miller clamping pin; the third driving chip includes a second voltage detection pin; the Miller clamping circuit includes a first to a third Miller clamping circuit; the first Miller clamping circuit is connected between the Miller clamping pin of the first driving chip and the control terminal of the pre-charge circuit; the second Miller clamping circuit is connected between the Miller clamping pin of the second driving chip and the control terminal of the first SiC MOSFET circuit; the third Miller clamping circuit is connected between the Miller clamping pin of the third driving chip and the control terminal of the second SiC MOSFET circuit; the positive voltage detection input of the desaturation detection circuit is connected to the drain of the third or fourth SiC MOSFET, and the negative voltage detection input is connected to the source of the corresponding third or fourth SiC MOSFET; the positive voltage detection output of the desaturation detection circuit is connected to the second voltage detection pin of the third driving chip, and the negative voltage detection output of the desaturation detection circuit is connected to the ground pin of the third driving chip.

[0019] Furthermore, the pre-charging circuit is connected in parallel between the positive terminal of the power supply unit and the positive output terminal in the dual-switch Boost circuit;

[0020] The pre-charge circuit includes a seventh SiC MOSFET and ninth to eleventh resistors;

[0021] The gate of the seventh SiC MOSFET is connected to the control terminal of the pre-charge circuit through the ninth resistor, and the drain of the seventh SiC MOSFET is connected to the positive terminal of the power supply unit; the source of the seventh SiC MOSFET is connected to the positive output terminal of the dual-switch Boost circuit through the tenth resistor and the eleventh resistor in sequence.

[0022] On the other hand, embodiments of the present invention also provide a control method based on the aforementioned solid-state power controller, including steps S1-S4:

[0023] S1. During the startup phase, the control circuit generates a third control signal to activate the pre-charging circuit, which pre-charges the capacitive load in the load.

[0024] S2. Under the premise that the pre-charging circuit is turned on, the control circuit outputs the second control signal to control the second SiC MOSFET circuit in the dual-switch Boost circuit to turn on. After a preset time, the pre-charging circuit is turned off by the third control signal, and the second SiC MOSFET circuit supplies power to the load alone.

[0025] S3. Real-time acquisition of voltage and current information. If the acquired current is greater than the set current threshold and the duration is greater than the short-circuit protection preset time threshold, the control circuit turns off all SiC MOSFETs. If the acquired voltage is lower than the set voltage threshold and the duration is greater than the undervoltage protection preset time threshold, the control circuit sends alternating first and second PWM control signals to the dual-switch Boost circuit. The first and second SiC MOSFET circuits are alternately turned on, keeping the dual-switch Boost circuit in a boost continuous conduction state. The PWM control signals must satisfy the following formula:

[0026] Among them, t on The on-time of the first SiC MOSFET circuit in each cycle, t off The first SiCMOSFET circuit turn-off time in each cycle, VIN is the power supply unit voltage, and VOUT is the voltage required by the load.

[0027] S4, during the stage of stopping power supply to the load, the control circuit controls all SiC MOSFETs in the power circuit to turn off.

[0028] Compared with the prior art, the present invention can achieve at least one of the following beneficial effects:

[0029] 1. The solid-state power controller of this invention uses SiC MOSFETs, enabling it to operate under high voltage conditions above 1000V and adapt to high-temperature environments. Compared to Si-based power devices currently used in aerospace equipment, it significantly reduces the size and weight of the solid-state power controller and allows for stable operation with lower on-resistance and higher switching frequency. It also features higher power distribution efficiency, greater environmental adaptability, and higher reliability.

[0030] 2. This invention innovatively proposes a dual-switch Boost circuit U3 design. This circuit can efficiently distribute power to downstream devices when the battery voltage is normal, and simultaneously boost the input voltage to power downstream devices when the battery voltage is low, ensuring the continuous and efficient operation of downstream devices. It ensures that the output voltage does not decrease with the decrease in the power supply battery voltage, guaranteeing the efficient operation of downstream devices. Compared to current solid-state power controllers that only handle power distribution without dynamically adjusting the distribution voltage, this invention ensures that the output voltage is continuously maintained within a certain range, guaranteeing the continuous and efficient operation of downstream devices.

[0031] 3. This invention designs a short-circuit protection method based on a desaturation detection circuit (via hardware) and a short-circuit protection method based on a current and voltage detection circuit to detect the existence of a short circuit in real time and send control commands according to the detected voltage and current information (via software). That is, this solid-state power controller adopts a dual short-circuit protection scheme, which greatly improves the reliability of the product when dealing with short circuits compared to the single short-circuit protection method commonly used in current solid-state power controllers.

[0032] 4. Both the first SiC MOSFET circuit and the second SiC MOSFET circuit of this invention include two identical parallel branches to share the current required by the subsequent load of the aerospace equipment. Each branch of the second SiC MOSFET circuit includes two SiC MOSFETs connected in series, and the sources of the third and fifth SiC MOSFETs are connected; the sources of the fourth and sixth SiC MOSFETs are connected, thus preventing the output voltage from flowing back from the negative terminal to the positive terminal of the second SiC MOSFET circuit when the first SiC MOSFET circuit is turned on.

[0033] 5. This invention designs a pre-charge circuit. The source of the pre-charge circuit has two resistors to avoid the sudden increase in current caused by the capacitive load or servo system acting as the load part during startup due to no-load, which could cause damage or even burnout of the power circuit due to the surge current of a large energy at the moment of conduction, thereby improving the reliability of the power circuit.

[0034] 6. The present invention adopts a scheme of multiple pre-charging resistors connected in series in the pre-charging circuit, which reduces the probability of the power circuit burning out due to short circuit of the pre-charging resistor, thus improving the reliability of the circuit.

[0035] In this invention, the above-described technical solutions can be combined with each other to achieve more preferred combinations. Other features and advantages of this invention will be set forth in the following description, and some advantages may become apparent from the description or be learned by practicing the invention. The objects and other advantages of this invention can be realized and obtained from what is particularly pointed out in the description and drawings. Attached Figure Description

[0036] The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Throughout the drawings, the same reference numerals denote the same parts.

[0037] Figure 1 This is a schematic diagram illustrating the composition and connection relationship of a solid-state power controller based on SiC MOSFET according to the present invention.

[0038] Figure 2 This is a schematic diagram of a power circuit based on SiC MOSFET according to the present invention;

[0039] Figure 3 This is a schematic diagram of the circuit principle of a SiC MOSFET-based driving chip and desaturation detection circuit according to the present invention.

[0040] Figure label:

[0041] 1-Driver chip;

[0042] 2-Desaturation detection circuit;

[0043] 3-Third Miller clamping circuit. Detailed Implementation

[0044] Preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings, which form part of this application and are used together with the embodiments of the present invention to illustrate the principles of the present invention, but are not intended to limit the scope of the present invention.

[0045] One specific embodiment of the present invention discloses a solid-state power controller based on SiC MOSFETs, such as... Figure 1 As shown. It includes a control circuit for outputting control signals, and a power circuit;

[0046] The control circuit includes an isolation drive unit U2 and a power isolation and control conversion unit U1; the power isolation and control conversion unit U1 outputs drive control signals and isolation power supply voltage to the isolation drive unit U2, and the isolation drive unit U2 outputs control signals to the power circuit.

[0047] The power circuit includes a pre-charge circuit U4 and a dual-switch Boost circuit U3; the dual-switch Boost circuit U3 includes a first SiC MOSFET circuit and a second SiC MOSFET circuit; under the action of the control signal, the pre-charge circuit U4 supplies power to the load when the power circuit is started, and after startup, the second SiC MOSFET circuit is turned on alone or alternately turned on with the first SiC MOSFET circuit to supply power to the load connected between the positive and negative output terminals of the dual-switch Boost circuit U3.

[0048] The power isolation and control conversion unit U1 includes a power isolation circuit and a main control unit; the main control unit is used to output the drive control signal; the power isolation circuit is used to generate a first voltage to a third voltage; the first voltage is used to power the main control unit and the isolation drive unit U2; the second voltage and the third voltage are used to generate control signals for the power circuit under the action of the drive control signal.

[0049] The control signals include the first control signal Vg1 to the third control signal Vg3;

[0050] The first control signal Vg1 is connected to the control terminal of the first SiC MOSFET circuit, the second control signal Vg2 is connected to the control terminal of the second SiC MOSFET circuit, and the third control signal Vg3 is connected to the control terminal of the pre-charge circuit U4.

[0051] The first control signal Vg1 and the second control signal Vg2 are used to control the second SiC MOSFET circuit to be turned on independently when the voltage of the power supply unit (battery UDC) is normal; and to control the second SiC MOSFET circuit and the first SiC MOSFET circuit to be turned on alternately when the voltage value of the power supply unit (battery UDC) drops below a set threshold and the duration is greater than the undervoltage protection preset time threshold; and to control the first and second SiC MOSFET circuits to be turned off when the power circuit current is greater than a set current threshold and the duration reaches the short circuit protection preset time threshold.

[0052] The third control signal Vg3 is used to control the pre-charge circuit U4 to be turned on during startup; and to control the pre-charge circuit U4 to be turned off when the power circuit current is greater than the set current threshold and the duration reaches the short-circuit protection preset time threshold.

[0053] Specifically, the power isolation and control conversion unit U1 isolates the external power supply (power input positive VCC, power input reference ground B) through a power isolation circuit to generate a positive voltage VCC1 (first voltage) connected to ground GND, a positive voltage VCC2 (second voltage) dedicated to the SiC MOSFET, and a negative voltage VCC3 (third voltage). The power isolation and control conversion unit U1 also receives external command control on / off commands CTL ON and CTL OFF, along with sampled voltage and current information FB1. Based on this, it outputs drive control signals (Dri1-Dri3) to the isolation drive unit U2 to control the on / off state of the power circuit, and reports power distribution information FB2 to the upper-level device. This power distribution information includes current, voltage, and the switching status of each SiC MOSFET. The isolation drive unit U2 is powered by VCC1. Under the high / low level control of Dri1-Dri3, it converts VCC2 and VCC3 into control signals Vg1-Vg3 and transmits them to the corresponding control terminals of the power circuit.

[0054] When the power isolation and control conversion unit U1 receives a pulse-type control on command CTL ON, the drive control signal Dri3 first outputs a high level to activate the pre-charge circuit U4 using Vg3. At this moment, Dri1 and Dri2 remain at low levels. After the pre-charge circuit U4 completes pre-charging of the load, Dri3 and Dri2 simultaneously output high levels to control the pre-charge circuit U4 and the second SiC MOSFET circuit to turn on simultaneously using Vg3 and Vg2. After maintaining this state for a period of time, Dri3 outputs a low level to turn off the pre-charge circuit U4 using Vg3. During this process, Dri1 always maintains a low output state to turn off the first SiC MOSFET circuit using Vg1. When U1 receives a pulse-type control on / off command CTL OFF, the level control commands Dri1-Dri3 output low levels to ensure that the pre-charge circuit U4 and the first and second SiC MOSFET circuits are all in the off state using Vg1-Vg3. When U1 receives voltage and current data, it makes a comprehensive judgment. If the current exceeds the set short-circuit current threshold and the time exceeding the threshold reaches the short-circuit protection preset time threshold, U1 will output the level control commands Dri1-Dri3 as low level to keep the pre-charge circuit U4, the first and second SiC MOSFET circuits in the off state using Vg1-Vg3. If the output voltage is lower than the set threshold and the time exceeding the threshold reaches the undervoltage protection preset time threshold, it will output the level control commands Dri1 and Dri2 as PWM waveforms to control the dual-switch Boost circuit U3 in the power circuit to enter the boost continuous conduction mode using Vg1 and Vg2, so as to keep the output voltage from decreasing as the battery voltage decreases.

[0055] like Figure 3As shown, the isolation drive unit includes a drive chip 1, a Miller clamp circuit, and a desaturation detection circuit 2. The drive chip includes a first to a third drive chip. Each of the first to third drive chips includes a Miller clamp pin. The third drive chip includes a second voltage detection pin. The Miller clamp circuit includes a first to a third Miller clamp circuit. The first Miller clamp circuit is connected between the Miller clamp pin of the first drive chip and the control terminal of the pre-charge circuit. The second Miller clamp circuit is connected between the Miller clamp pin of the second drive chip and the control terminal of the first SiC MOSFET circuit. The third Miller clamp circuit 3 is connected between the Miller clamp pin of the third drive chip and the control terminal of the second SiC MOSFET circuit. The positive voltage detection input of the desaturation detection circuit is connected to the drain of the third or fourth SiC MOSFET, and the negative voltage detection input is connected to the source of the corresponding third or fourth SiC MOSFET. The positive voltage detection output of the desaturation detection circuit is connected to the second voltage detection pin of the third drive chip, and the negative voltage detection output of the desaturation detection circuit is connected to the ground pin of the third drive chip.

[0056] The first to third Miller clamping circuits have the same principle and the same circuit composition.

[0057] The driving chip must be an isolated driving chip with Miller clamping (CLAMP) and desaturation detection (DESAT) functions. The positive terminal of the desaturation detection circuit's voltage detection input is connected to the drain of the third or fourth SiC MOSFET (M3 or M4), and the negative terminal is connected to the source of the corresponding third or fourth SiC MOSFET (M3 or M4). The positive terminal of the desaturation detection circuit's voltage detection output is connected to the second voltage detection pin of the third driving chip 1 (the second voltage detection pin is the DESAT pin of the third driving chip 1), and the negative terminal of the desaturation detection circuit's voltage detection output is connected to the ground pin (GND2 pin) of the third driving chip 1.

[0058] When the driver chip 1 receives a high-level control command Dri1-Dri3 from the power isolation and control conversion unit U1, it outputs the positive voltage VCC2 generated by U1 to form the control signals Vg1-Vg3 required for the power circuit to turn on. When the control command Dri1-Dri3 is low, it outputs the negative voltage VCC3 generated by U1 to form the control signals Vg1-Vg3 required for the power circuit to turn off. At the same time, it also drives the Miller clamp circuit to turn on, ensuring that the controlled SiC MOSFET in the power circuit can be stably turned off.

[0059] The Miller clamp circuit is controlled by the main control unit. When it is necessary to turn off the SiC MOSFET in the power circuit, the Miller clamp circuit turns on to ensure that the controlled SiC MOSFET in the power circuit can be stably turned off.

[0060] The desaturation detection circuit 2 monitors the drain-source voltage Vds of the SiC MOSFET controlled in the power circuit in real time. When a short circuit occurs, the current through the SiC MOSFET increases, causing Vds to rise, thus causing desaturation. When the third driver chip 1 detects this situation through the desaturation detection circuit 2, it outputs a negative voltage VCC3 to the control terminal (gate) of the controlled SiC MOSFET to ensure that the controlled SiC MOSFET is turned off immediately, thereby protecting the power circuit and the downstream load.

[0061] Specifically, since the pre-charge circuit U4 only operates during the startup phase and the current is relatively small, the desaturation detection circuit 2 in this embodiment is located in the second SiC MOSFET circuit. Because the positive and negative terminals of the two branches in the second SiC MOSFET circuit are connected, detecting the short-circuit state of one branch is sufficient. Furthermore, because the body diodes in M5 and M6 are positioned with their negative terminals connected to the positive output terminal of the power circuit, a short circuit may cause the source-drain voltage of M5 and M6 to exceed the forward voltage of their body diodes, resulting in the body diodes conducting and shunting current, which could lead to a drop in the voltage across their source and drain terminals. Therefore, M5 and M6 are not as sensitive to desaturation detection as M3 and M4. Thus, the positive terminal of the voltage detection input of the desaturation detection circuit 2 is connected to the drain of the third or fourth SiC MOSFET, and the negative terminal is connected to the source of the corresponding third or fourth SiC MOSFET.

[0062] Specifically, the power circuit performs power distribution actions according to the first to third control signals (Vg1 to Vg3) of the control circuit; when the power circuit is distributing power, the power circuit outputs the power distribution output voltage VOUT to the external load.

[0063] The pre-charging circuit U4 is connected in parallel between the positive terminal and the positive output terminal of the power supply unit (battery UDC) in the dual-switch Boost circuit U3;

[0064] The pre-charge circuit U4 includes a seventh SiC MOSFET (M7) and ninth to eleventh resistors (R9 to R11);

[0065] The gate of the seventh SiC MOSFET (M7) is connected to the control terminal of the pre-charge circuit U4 through the ninth resistor (R9), and the drain of the seventh SiC MOSFET (M7) is connected to the positive terminal of the power supply unit (battery UDC); the source of the seventh SiC MOSFET (M7) is connected to the positive output terminal of the dual-switch Boost circuit U3 through the tenth resistor (R10) and the eleventh resistor (R11) in sequence.

[0066] Specifically, the pre-charging circuit U4 is used to supply power to the load based on the third control signal Vg3 when the power circuit is started.

[0067] Specifically, when the power circuit starts up, the pre-charge circuit U4 pre-charges the capacitive load in the load with a small current. This prevents damage to the SiC MOSFET due to excessive surge current.

[0068] Preferably, the pre-charge circuit U4 receives the third control signal Vg3 to control the switching state of the seventh SiC MOSFET (M7); the other end of R10 is connected to a pre-charge resistor R11 of the same specification as R10. Using two pre-charge resistors can effectively avoid the situation where a single pre-charge resistor is short-circuited, causing damage or even burnout to M7 due to the surge current passing through M7 at the moment of conduction, thereby improving the reliability of the pre-charge circuit U4.

[0069] The control circuit also includes voltage and current acquisition sensors, which are connected in series in the branch where the positive output terminal of the power circuit is located.

[0070] In a specific embodiment of the present invention, the control circuit further includes voltage and current acquisition circuits. The voltage circuit uses a voltage divider resistor to divide the high voltage to a low voltage, and then the low voltage signal is input to the AD chip after passing through an isolation amplifier. The current acquisition circuit uses a Hall chip connected in series in the branch where the positive output terminal of the power circuit is located, and then transmits the output of the Hall chip to the AD chip.

[0071] Specifically, when the voltage acquired by the voltage acquisition circuit is normal, the main control unit controls the second SiC MOSFET circuit to be turned on independently; when the voltage acquired by the voltage acquisition sensor is lower than the set voltage threshold and the time exceeding the threshold reaches the undervoltage protection preset time threshold, the main control unit controls the second SiC MOSFET circuit and the first SiC MOSFET circuit to be turned on alternately; when the current acquired by the current acquisition sensor is greater than the set current threshold and the time exceeding the threshold reaches the short-circuit protection preset time threshold, the main control unit controls the first and second SiC MOSFET circuits to be turned off.

[0072] The dual-switch Boost circuit U3 also includes a power supply unit (battery UDC) and first and second energy storage units (L1, C2); one end of the first energy storage unit (L1) is connected to the positive terminal of the power supply unit (battery UDC), and the other end is connected to the positive terminals of the first SiC MOSFET circuit and the second SiC MOSFET circuit respectively; the negative terminal of the first SiC MOSFET circuit is connected to the negative output terminal of the dual-switch Boost circuit U3, and the negative terminal of the second SiC MOSFET circuit is connected to the positive output terminal of the dual-switch Boost circuit U3; the second energy storage unit is connected between the positive and negative output terminals of the dual-switch Boost circuit U3.

[0073] To improve load capacity and operating margin, both the first SiC MOSFET circuit and the second SiC MOSFET circuit adopt a dual-branch parallel connection.

[0074] like Figure 2 As shown, the first SiC MOSFET circuit includes a first SiC MOSFET branch, a second SiC MOSFET branch, and a first resistor R1; the first SiC MOSFET branch includes a first SiC MOSFET (M1) and a third resistor R3; the second SiC MOSFET branch includes a second SiC MOSFET (M2) and a second resistor R2; the source of the first SiC MOSFET is connected to the source of the second SiC MOSFET as the negative terminal of the first SiC MOSFET circuit; the drain of the first SiC MOSFET is connected to the drain of the second SiC MOSFET as the positive terminal of the first SiC MOSFET circuit; the gate of the first SiC MOSFET is connected to one end of the third resistor R3, the gate of the second SiC MOSFET is connected to one end of the second resistor R2, the other ends of the third resistor R3 and the second resistor R2 are connected together and then connected to one end of the first resistor R1, and the other end of the first resistor R1 is the control terminal.

[0075] In a specific embodiment of the present invention, the second resistor R2 and the third resistor R3 are typically chosen to have the same resistance value. The first resistor R1 to the third resistor R3 are set to suppress oscillations in the gate drive circuit caused by parasitic inductance and capacitance on the printed circuit board. Simultaneous switching of the first and second SiC MOSFETs ensures the stability of the power circuit operation and the consistency of the actions of each parallel switch. In a specific embodiment of the present invention, when the power circuit conduction time is 500ms, the sum of the resistance values ​​of R1 and R2, and the sum of the resistance values ​​of R1 and R3, is 20kΩ-30kΩ.

[0076] The second SiC MOSFET circuit includes the third to sixth SiC MOSFETs (M3 to M6) and the fifth to eighth resistors (R5 to R8); the sources of the third and fifth SiC MOSFETs (M3 and M5) are connected; the sources of the fourth and sixth SiC MOSFETs (M3 and M5) are connected; the drains of the third and fourth SiC MOSFETs (M3 and M4) are connected as the positive terminal of the second SiC MOSFET circuit; the drains of the fifth and sixth SiC MOSFETs are connected as the negative terminal of the second SiC MOSFET circuit; one end of the fifth resistor R5 is connected to the gate of the fourth SiC MOSFET (M4), one end of the sixth resistor R6 is connected to the gate of the third SiC MOSFET (M3), one end of the seventh resistor R7 is connected to the gate of the sixth SiC MOSFET (M6), one end of the eighth resistor R8 is connected to the gate of the fifth SiC MOSFET (M5), and the other ends of the fifth to eighth resistors (R5 to R8) are connected to the control terminal.

[0077] The second SiC MOSFET circuit alternately conducts with the first SiC MOSFET circuit to provide a boost continuous conduction mode when the voltage of the power supply unit (battery UDC) decreases.

[0078] In one specific embodiment of the present invention, the fifth to eighth resistors (R5 to R8) are all identical, and the third to sixth SiC MOSFETs (M3 to M6) are all identical. The design of completely symmetrical branches ensures that the conduction times of the two branches are synchronized, avoiding safety hazards caused by excessive current in one branch.

[0079] In another specific embodiment of the present invention, the second SiC MOSFET circuit further includes a fourth resistor R4; one end of the fourth resistor R4 is a control terminal, and the other end is connected to the connection terminals of the fifth to eighth resistors (R5-R8).

[0080] Specifically, the gates of the third to sixth SiC MOSFETs (M3-M6) are all connected to the same resistor, and then a fourth resistor R4 is connected in the main circuit. The purpose is to ensure that the isolation drive unit connected to the gate has both the current sharing capability to ensure the consistency of the operation of each SiC MOSFET and the ability to resist gate voltage oscillation.

[0081] In this embodiment, the first to seventh SiC MOSFETs (M1-M7) used in the power circuit have on-resistance values ​​in the milliohm range, ensuring high power distribution efficiency and significantly reducing circuit power loss. The second SiC MOSFET circuit has two source-interconnected SiC MOSFETs in each branch, providing short-circuit protection. The pre-charge circuit U4 has surge suppression, and the dual Boost circuit provides voltage boosting, efficiently meeting the power distribution needs of both conventional loads and loads with servo characteristics. If the output voltage falls below the set threshold and the time exceeding the threshold reaches the undervoltage protection preset time threshold, the level control commands Vg1 and Vgi2 will be output as PWM waveforms. This controls the dual-switch Boost circuit U3 in the power circuit to enter a continuous boost conduction mode, maintaining the output voltage from decreasing as the battery voltage drops.

[0082] The first energy storage unit is an energy storage inductor; the second energy storage unit is an energy storage capacitor.

[0083] The dual-switch Boost circuit U3 also includes a SiC Schottky diode; the negative terminal of the SiC Schottky diode is connected to the positive output terminal of the dual-switch Boost circuit U3, and the positive terminal is connected to the negative terminal of the power supply unit (battery UDC).

[0084] The dual-switch Boost circuit U3 also includes a filter capacitor, one end of which is connected to the positive terminal of the power supply unit (battery UDC), and the other end is connected to the negative terminal of the power supply unit (battery UDC).

[0085] Specifically, such as Figure 2As shown, the dual-switch Boost circuit U3 receives the control signal Vg1 output from the SiC MOSFET isolation drive module to control the switching states of the first SiC MOSFET (M1) and the second SiC MOSFET (M2), and receives Vg2 to control the states of the third to sixth SiC MOSFETs (M3-M6). Before the supply voltage VIN enters the first and second SiC MOSFET circuits, it first passes through the high-frequency filter capacitor C1. After filtering, it passes through the energy storage inductor L1, and then splits into two paths. One path connects to the drains of M1 and M2, and the sources of M1 and M2 are connected to the negative terminal of the battery UDC. The gate of M1 is connected to the gate resistor R3 (the third resistor), and the gate of M2 is connected to the gate resistor R2 (the second resistor). The other ends of R2 and R3 are connected to one end of the gate resistor R1 (the first resistor), and the other end of R1 is connected to the SiC MOSFET. The output terminal of the corresponding drive circuit in the MOSFET isolation drive module U2; the other end of the energy storage inductor L1 is connected to the common drain of M3 and M4, M3 and M5 are connected in series, M4 and M6 are connected in series, and the two series branches are connected in parallel. The common drain of M5 and M6 is connected to the output capacitor C2, the negative terminal of the SiC Schottky diode D1 for freewheeling, and the positive terminal of the load. The filter capacitor C1, the output capacitor C2, the SiC Schottky diode D1, and the negative terminal of the load are all connected to the negative terminal of the power supply battery UDC.

[0086] The control logic of the solid-state power controller is as follows: When the solid-state power controller starts, the control circuit first drives the pre-charge circuit U4 to conduct, pre-charging the capacitive load. After a period of pre-charging, the control circuit controls M3-M6 of the dual-switch Boost circuit U3 to conduct while the pre-charge circuit U4 is conducting. After maintaining this state for a period of time, the pre-charge circuit U4 is turned off, leaving only M3-M6 of the dual-switch Boost circuit U3 conducting to supply power to the load. During this stage, the control circuit collects voltage and current information in real time. If a short circuit is detected, all SiC MOSFETs are immediately turned off. If the output voltage VOUT is found to be lower than the set threshold voltage and the time exceeding the threshold reaches the undervoltage protection preset time threshold, the main control circuit will send a PWM control signal to the dual-switch Boost circuit U3 in the power circuit to keep the dual-switch Boost circuit U3 in a boost continuous conduction state, ensuring that the output voltage VOUT does not decrease as the battery voltage VIN decreases, thereby ensuring that the downstream equipment can work efficiently.

[0087] Another specific embodiment of the present invention discloses a control method for a solid-state power controller, including steps S1-S4:

[0088] S1. During the startup phase, the control circuit generates a third control signal to activate the pre-charging circuit, which pre-charges the capacitive load in the load.

[0089] S2. Under the premise that the pre-charging circuit is turned on, the control circuit outputs the second control signal to control the second SiC MOSFET circuit in the dual-switch Boost circuit to turn on. After a preset time, the pre-charging circuit is turned off by the third control signal, and the second SiC MOSFET circuit supplies power to the load alone.

[0090] S3. Real-time acquisition of voltage and current information. If the acquired current is greater than the set current threshold and the duration is greater than the short-circuit protection preset time threshold, the control circuit turns off all SiC MOSFETs. If the acquired voltage is lower than the set voltage threshold and the duration is greater than the undervoltage protection preset time threshold, the control circuit sends alternating first and second PWM control signals to the dual-switch Boost circuit. The first and second SiC MOSFET circuits are alternately turned on, keeping the dual-switch Boost circuit in a boost continuous conduction state. The PWM control signals must satisfy the following formula:

[0091] Among them, t on The on-time of the first SiC MOSFET circuit in each cycle, t off The first SiCMOSFET circuit turn-off time in each cycle, VIN is the power supply unit voltage, and VOUT is the voltage required by the load.

[0092] S4, during the stage of stopping power supply to the load, the control circuit controls all SiC MOSFETs in the power circuit to turn off.

[0093] Specifically, the working process of this SiC MOSFET-based solid-state power controller is as follows:

[0094] Phase 1: After the solid-state power controller receives the control turn-on command CTL ON, the control circuit will first drive M7 in the pre-charge circuit U4 to conduct. Because there are resistors R10 and R11 in this circuit, the capacitive load in the load will be pre-charged with a small current at this time, so as to prevent damage to SiC MOSFET due to excessive surge current.

[0095] Phase Two: After a period of pre-charging, the control circuit will control M3-M6 in the dual-switch Boost circuit U3 to conduct, provided that the pre-charging circuit U4 is on. After maintaining this state for a period of time (several hundred milliseconds), the pre-charging circuit U4 will be turned off, leaving only M3-M6 in the dual-switch Boost circuit U3 conducting to supply power to the load. The reason for using M3-M6, i.e., two sets of transistors connected in parallel, is to ensure power supply to the main power distribution circuit when the dual-switch Boost circuit U3 is not operating in the boost continuous conduction mode. The on / off control of the (dual Boost circuit) requires the drains of M3 and M4 to be connected to the energy storage inductor L1. When entering the boost continuous conduction mode, when M1 and M2 are on, the voltage at the common drain of M3 and M4 is significantly lower than the voltage across the output capacitor C2. This voltage difference will cause the parasitic diodes in M3 and M4 to conduct, thus preventing them from functioning as diode cutoff. Therefore, M5 and M6 need to be connected in series after M3 and M4, and the sources of M3 and M4 will be connected to the sources of M5 and M6 respectively, so that the second SiC MOSFET circuit has the function of diode cutoff.

[0096] Phase 3: The control circuit will collect voltage and current information in real time. If a short circuit is detected, all SiC MOSFETs will be immediately turned off. If the output voltage VOUT is found to be lower than the set threshold voltage and the time exceeding the threshold reaches the undervoltage protection preset time threshold, the main control unit in the control circuit will send a PWM control signal to the control terminal of the dual-switch Boost circuit U3 in the power circuit, so that the dual-switch Boost circuit U3 is in the boost continuous conduction state, ensuring that the output voltage VOUT will not decrease as the battery voltage VIN decreases, thereby ensuring that the downstream equipment can work efficiently.

[0097] The working principle of the dual-switch Boost circuit U3 is as follows: When M1 and M2 are turned on and M3-M6 are turned off, the current I output by the battery UDC charges the energy storage inductor L1, and the energy obtained in the inductor at this time is E1 = VIN * I * t. on , where t on During the on-time of M1 and M2, the voltage across the output capacitor C2 supplies power to the load. When M1 and M2 are off, and M3-M6 are on simultaneously, the energy storage inductor L1 and the battery UDC together charge the output capacitor C2 and supply power to the load. The energy released in the energy storage inductor during this stage is E2 = (VOUT - VIN) * I * t. off , where t off Let M1 and M2 be the turn-off times. Based on the principle that the energy stored and released by the inductor are consistent, we can obtain E1 = E2, i.e., VIN * I * t. on = (VOUT - VIN) * I * t off Simplifying, we can obtain By adjusting the duty cycle of the control signals Vg1 and Vg2 in the dual-switch Boost circuit U3, the battery voltage VIN can be boosted to the required voltage VOUT, thereby ensuring the continuous and efficient operation of downstream equipment.

[0098] Phase 4: After the solid-state power controller receives the control shutdown command CTL OFF, the control circuit will transfer a negative voltage VCC3 to the gate of all SiC MOSFETs to shut them off. Due to the inherent inductance of the load itself, and the parasitic inductance of the control circuit and power circuit lines, after the power is turned off, the relevant inductors will generate a large reverse electromotive force, which will cause the voltage across the drain and source of the SiC MOSFET to increase sharply and instantaneously, which can easily lead to its breakdown. In this solution, a SiC Schottky diode D1 is connected in parallel at the output to provide a freewheeling effect for the energy in the aforementioned inductor, thereby maintaining the voltage across the drain and source of the SiC MOSFET at a voltage level that is almost the same as VIN.

[0099] Compared to existing technologies, the solid-state power controller provided in this invention uses SiC MOSFETs, enabling it to operate under high voltage conditions above 1000V and adapt to high-temperature environments. Compared to Si-based power devices currently used in aerospace equipment, it significantly reduces the size and weight of the solid-state power controller and allows for stable operation with lower on-resistance and higher switching frequency. It offers higher power distribution efficiency, greater environmental adaptability, and higher reliability. This embodiment innovatively proposes a dual-switch Boost circuit U3 design. This circuit can efficiently distribute power to downstream devices when the battery voltage is normal, and simultaneously boost the input voltage to power downstream devices when the battery voltage is low, ensuring the continuous and efficient operation of downstream devices. It ensures that the output voltage does not decrease with the decrease in the battery voltage, guaranteeing the efficient operation of downstream devices. Compared to current solid-state power controllers that only handle power distribution without dynamically adjusting the distribution voltage, this invention ensures that the output voltage remains within a certain range, guaranteeing the continuous and efficient operation of downstream devices. This embodiment provides a short-circuit protection method based on desaturation detection circuit 2 (via hardware) and a short-circuit protection method based on real-time detection of short circuits by current and voltage sensors, and switching on and off based on the detected voltage and current information (via software). That is, this solid-state power controller adopts a dual short-circuit protection scheme, which greatly improves the reliability of the product in the face of short circuits compared to the single short-circuit protection method commonly used in current solid-state power controllers. In this embodiment, both the first and second SiC MOSFET circuits include two identical parallel branches to share the current required by the subsequent load of the aerospace equipment. Each branch of the second SiC MOSFET circuit includes two SiC MOSFETs connected in series, with the sources of the third and fifth SiC MOSFETs (M3 and M5) connected; and the sources of the fourth and sixth SiC MOSFETs (M4 and M6) connected, preventing the output voltage from flowing back from the negative terminal to the positive terminal of the second SiC MOSFET circuit when the first SiC MOSFET circuit is turned on. This embodiment incorporates a pre-charge circuit U4. The source of U4 has two resistors to prevent a sudden increase in current due to no-load conditions during startup of the servo system, thus avoiding damage or even burnout of the seventh SiC MOSFET (M7) caused by a large surge current at the moment of conduction. This improves the reliability of the pre-charge circuit U4. Furthermore, this embodiment employs a multi-series pre-charge resistor scheme in U4, reducing the probability of power circuit burnout due to short circuits in the pre-charge resistors, thereby enhancing the circuit's reliability.

[0100] Those skilled in the art will understand that all or part of the processes of the methods described in the above embodiments can be implemented by a computer program instructing related hardware, and the program can be stored in a computer-readable storage medium. The computer-readable storage medium may be a disk, optical disk, read-only memory, or random access memory, etc.

[0101] The above description is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention.

Claims

1. A solid-state power controller based on SiC MOSFET, characterized in that, This includes control circuitry for outputting control signals, and power circuitry; The control circuit includes an isolation drive unit and a power isolation and control conversion unit; the power isolation and control conversion unit outputs drive control signals and isolation power supply voltage to the isolation drive unit, and the isolation drive unit outputs control signals to the power circuit. The power circuit includes a pre-charge circuit and a dual-switch Boost circuit; the dual-switch Boost circuit includes a first SiC MOSFET circuit and a second SiC MOSFET circuit; under the action of the control signal, the pre-charge circuit supplies power to the load when the power circuit is started, and after startup, the second SiC MOSFET circuit is turned on alone or alternately turned on with the first SiC MOSFET circuit to supply power to the load connected between the positive and negative output terminals of the dual-switch Boost circuit.

2. The solid-state power controller according to claim 1, characterized in that, The power isolation and control conversion unit includes a power isolation circuit and a main control unit; the main control unit is used to output the drive control signal; the power isolation circuit is used to generate a first voltage to a third voltage; the first voltage is used to supply power to the main control unit and the isolation drive unit; the second voltage and the third voltage are used to generate control signals for the power circuit under the action of the drive control signal.

3. The solid-state power controller according to claim 2, characterized in that, The control signals include the first control signal to the third control signal; The first control signal is connected to the control terminal of the first SiC MOSFET circuit, the second control signal is connected to the control terminal of the second SiC MOSFET circuit, and the third control signal is connected to the control terminal of the pre-charge circuit. The first control signal and the second control signal are used to control the second SiC MOSFET circuit to be turned on independently when the power supply unit voltage is normal; and to control the second SiC MOSFET circuit and the first SiC MOSFET circuit to be turned on alternately when the power supply unit voltage drops below a set threshold and the duration is greater than the undervoltage protection preset time threshold. And, used to control the first and second SiC MOSFET circuits to turn off when the power circuit current is greater than a set current threshold and the duration reaches a short-circuit protection preset time threshold; The third control signal is used to control the pre-charge circuit to be turned on during startup; and to control the pre-charge circuit to be turned off when the power circuit current is greater than a set current threshold and the duration reaches a short-circuit protection preset time threshold.

4. The solid-state power controller according to claim 2, characterized in that, The control circuit also includes voltage and current acquisition sensors, which are connected in series in the branch where the positive output terminal of the power circuit is located.

5. The solid-state power controller according to claim 1, characterized in that, The dual-switch Boost circuit also includes a power supply unit, a first energy storage unit, and a second energy storage unit. One end of the first energy storage unit is connected to the positive terminal of the power supply unit, and the other end is connected to the positive terminals of the first SiC MOSFET circuit and the second SiC MOSFET circuit, respectively. The negative terminal of the first SiC MOSFET circuit is connected to the negative output terminal of the dual-switch Boost circuit, and the negative terminal of the second SiC MOSFET circuit is connected to the positive output terminal of the dual-switch Boost circuit. The second energy storage unit is connected between the positive and negative output terminals of the dual-switch Boost circuit.

6. The solid-state power controller according to claim 5, characterized in that, The first SiC MOSFET circuit includes a first SiC MOSFET branch, a second SiC MOSFET branch, and a first resistor; the first SiC MOSFET branch includes a first SiC MOSFET and a third resistor; the second SiC MOSFET branch includes a second SiC MOSFET and a second resistor; the source of the first SiC MOSFET is connected to the source of the second SiC MOSFET as the negative terminal of the first SiC MOSFET circuit; the drain of the first SiC MOSFET is connected to the drain of the second SiC MOSFET as the positive terminal of the first SiC MOSFET circuit; the gate of the first SiC MOSFET is connected to one end of the third resistor, the gate of the second SiC MOSFET is connected to one end of the second resistor, the other ends of the third resistor and the second resistor are connected together and then connected to one end of the first resistor, the other end of the first resistor is the control terminal.

7. The solid-state power controller according to claim 6, characterized in that, The second SiC MOSFET circuit includes the third to sixth SiC MOSFETs and the fifth to eighth resistors; the sources of the third and fifth SiC MOSFETs are connected; the sources of the fourth and sixth SiC MOSFETs are connected; the drains of the third and fourth SiC MOSFETs are connected as the positive terminal of the second SiC MOSFET circuit. The drains of the fifth and sixth SiC MOSFETs are connected as the negative terminal of the second SiC MOSFET circuit; one end of the fifth resistor is connected to the gate of the fourth SiC MOSFET, one end of the sixth resistor is connected to the gate of the third SiC MOSFET, one end of the seventh resistor is connected to the gate of the sixth SiC MOSFET, one end of the eighth resistor is connected to the gate of the fifth SiC MOSFET, and the other ends of the fifth to eighth resistors are connected to the control terminal.

8. The solid-state power controller according to claim 7, characterized in that, The isolated driving unit includes a driving chip, a Miller clamping circuit, and a desaturation detection circuit. The driving chip includes a first to a third driving chip. Each of the first to third driving chips includes a Miller clamping pin. The third driving chip includes a second voltage detection pin. The Miller clamping circuit includes a first to a third Miller clamping circuit. The first Miller clamping circuit is connected between the Miller clamping pin of the first driving chip and the control terminal of the pre-charge circuit. The second Miller clamping circuit is connected between the Miller clamping pin of the second driving chip and the control terminal of the first SiC MOSFET circuit. The third Miller clamping circuit is connected between the Miller clamping pin of the third driving chip and the control terminal of the second SiC MOSFET circuit. The positive voltage detection input of the desaturation detection circuit is connected to the drain of the third or fourth SiC MOSFET, and the negative voltage detection input is connected to the source of the corresponding third or fourth SiC MOSFET. The positive voltage detection output of the desaturation detection circuit is connected to the second voltage detection pin of the third driving chip, and the negative voltage detection output of the desaturation detection circuit is connected to the ground pin of the third driving chip.

9. The solid-state power controller according to claim 5, characterized in that, The pre-charging circuit is connected in parallel between the positive terminal of the power supply unit and the positive output terminal in the dual-switch Boost circuit. The pre-charge circuit includes a seventh SiC MOSFET and ninth to eleventh resistors; The gate of the seventh SiC MOSFET is connected to the control terminal of the pre-charge circuit through the ninth resistor, and the drain of the seventh SiC MOSFET is connected to the positive terminal of the power supply unit; the source of the seventh SiC MOSFET is connected to the positive output terminal of the dual-switch Boost circuit through the tenth resistor and the eleventh resistor in sequence.

10. A control method based on the solid-state power controller according to any one of claims 1-9, characterized in that, Including steps S1-S4: S1. During the startup phase, the control circuit generates a third control signal to activate the pre-charging circuit, which pre-charges the capacitive load in the load. S2. Under the premise that the pre-charging circuit is turned on, the control circuit outputs the second control signal to control the second SiC MOSFET circuit in the dual-switch Boost circuit to turn on. After a preset time, the pre-charging circuit is turned off by the third control signal, and the second SiC MOSFET circuit supplies power to the load alone. S3. Real-time acquisition of voltage and current information. If the acquired current is greater than the set current threshold and the duration is greater than the short-circuit protection preset time threshold, the control circuit turns off all SiC MOSFETs. If the acquired voltage is lower than the set voltage threshold and the duration is greater than the undervoltage protection preset time threshold, the control circuit sends alternating first and second PWM control signals to the dual-switch Boost circuit. The first and second SiC MOSFET circuits are alternately turned on, keeping the dual-switch Boost circuit in a boost continuous conduction state. The PWM control signals must satisfy the following formula: Among them, t on The on-time of the first SiC MOSFET circuit in each cycle, t off The first SiCMOSFET circuit turn-off time in each cycle, VIN is the power supply unit voltage, and VOUT is the voltage required by the load. S4, during the stage of stopping power supply to the load, the control circuit controls all SiC MOSFETs in the power circuit to turn off.

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