Control circuit for airborne radar or conduction switch

Abstract

The invention provides a control circuit for an airborne radar or a conduction switch, belongs to the technical field of airborne computers, and particularly ensures that a system continues to output stable signals only after an FPGA (Field Programmable Gate Array) is normally operated by utilizing heartbeat signals of the FPGA and a watchdog circuit, and bus driver enabling is timely cut off in an abnormal state. The uncertainty of the IO port output state of the FPGA is converted into a determinable safe output state through the XOR and logic combination operation of the judgment circuit, and the fault-tolerant capability of the system is enhanced. And reading back the opening and closing state of the magnetic latching relay by using the FPGA, and confirming the power-on state of the magnetic latching relay. The safety state design not only improves the reliability of the system, but also simplifies the circuit design, and significantly reduces the risk of failure of the whole circuit caused by a single-point fault, thereby ensuring the high safety of airborne radar or conduction switch control.

Description

Technical Field

[0001] This application relates to the field of airborne computers, and more particularly to a control circuit for airborne radar or conduction switches. Background Technology

[0002] Ensuring the reliable operation of various subsystems and secure communication between them in highly complex avionics systems is a significant challenge. During flight, aircraft frequently face extreme environmental conditions, including extreme temperatures and high vibrations. These external factors pose potential threats to the stable operation of the control system. For example, at high temperatures, some components may overheat and fail; at low temperatures, cold start problems may lead to system instability. The lack of effective protection mechanisms, the inability to guarantee that control signals are in a deterministic and safe output state, and the risk of a single point of failure causing the entire circuit to fail are all safety hazards in the control system. Therefore, in airborne radar or conduction switch control circuits, safety and stability are critical aspects of circuit design. Summary of the Invention

[0003] In view of this, this application provides a control circuit for airborne radar or a pass / follow switch, which solves the problems in the prior art, simplifies circuit design, reduces the risk of overall circuit failure caused by a single fault point, ensures high safety of airborne radar or pass / follow switch control, and realizes safe output of airborne radar or pass / follow switch control signals.

[0004] The control circuit for airborne radar or conduction switch provided in this application adopts the following technical solution: A control circuit for airborne radar or conduction switch includes an FPGA, a watchdog circuit, a bus driver, a judgment circuit, and a magnetic latching relay. The FPGA sends a connection control open or close signal to the bus driver through the connection control channel, and sends a disconnect control open or close signal to the bus driver through the disconnect control channel. At the same time, the FPGA outputs a first status signal and a second status signal to the bus driver. The first status signal indicates the connection control open or close status, and the second status signal indicates the disconnect control open or close status. The bus driver sends the open or closed signal of the connection control, the open or closed signal of the disconnection control, the first state signal, and the second state signal to the judgment circuit. When the states of the first state signal and the second state signal are different, the judgment circuit determines that the open or closed signal of the connection control or the open or closed signal of the disconnection control sent by the bus driver is valid, and sends a connection or disconnection signal to the magnetic latching relay. The magnetic latching relay performs a connection or disconnection action according to the received signal to control the opening and closing of the radar or communication system. When the FPGA is working normally, it periodically sends a heartbeat signal to the watchdog circuit. When the watchdog circuit receives the heartbeat signal normally, it outputs a low-level signal to the enable terminal of the bus driver. When the bus driver is working normally, it stops sending heartbeat signals to the watchdog circuit when the FPGA is malfunctioning. When the watchdog circuit receives a heartbeat signal malfunctioning, it outputs a high-level signal to the enable terminal of the bus driver, and the bus driver stops working.

[0005] Optionally, the magnetic latching relay is a dual-coil magnetic latching relay. The judgment circuit outputs two signals: a first signal is a voltage signal for connection control, and a second signal is a voltage signal for disconnection control. The first signal is connected to the first coil of the dual-coil magnetic latching relay, and the second signal is connected to the second coil of the dual-coil magnetic latching relay. The first switch in the dual-coil magnetic latching relay is used to connect to the power supply circuit of the radar or the conduction circuit. The dual-coil magnetic latching relay switches between connection and disconnection states according to the voltage of the two signals output by the judgment circuit.

[0006] Optionally, the judgment circuit includes an XOR gate, a first AND gate, and a second AND gate. The bus driver is used to send an open or closed signal for connection control to the first AND gate, and the bus driver is used to send an open or closed signal for disconnection control to the second AND gate. The first and second status signals output by the bus driver are sent to the XOR gate. The judgment results of the XOR gate are both output to the first and second AND gates. The output terminal of the first AND gate is connected to one end of the first coil of the dual-coil magnetic latching relay, and the output terminal of the second AND gate is connected to one end of the second coil of the dual-coil magnetic latching relay. When the connection control channel outputs 1, it indicates that the connection control is open and the first state signal is 1; when the connection control channel outputs 0, it indicates that the connection control is closed and the first state signal is 0. When the disconnect control channel outputs 1, it indicates that the connection control is open and the second state signal is 1; when the disconnect control channel outputs 0, it indicates that the connection control is closed and the second state signal is 0. When the first state signal and the second state signal received by the XOR gate are the same, the XOR gate outputs 0; when the first state signal and the second state signal received by the XOR gate are not the same, the XOR gate outputs 1. When all signals received by the first AND gate are 1, the first coil generates an electromagnetic field and the dual-coil magnetic latching relay is in a connected state. When all signals received by the second AND gate are 1, the second coil generates an electromagnetic field and the dual-coil magnetic latching relay is in a closed state.

[0007] Optionally, the watchdog circuit includes a monostable multivibrator and a NOT gate. The output of the NOT gate is connected to the enable terminal of the bus driver. The FPGA periodically sends a heartbeat line to the monostable multivibrator. When the monostable multivibrator receives the heartbeat line normally, it sends a high-level signal to the NOT gate, and the NOT gate outputs a low-level signal. When the monostable multivibrator receives a heartbeat line abnormality, it sends a low-level signal to the NOT gate, and the NOT gate outputs a high-level signal.

[0008] Optionally, a status readback circuit is also included, which is connected to the magnetic latching relay and is used to send the on / off status information of the magnetic latching relay to the bus driver. The bus driver then sends the on / off status information of the magnetic latching relay to the FPGA.

[0009] Optionally, the readback circuit includes an optocoupler, the input of which is connected to the second switch of a dual-coil magnetic latching relay, and one end of the second switch is connected to a power supply. The output of the optocoupler is connected to the bus driver.

[0010] In summary, this application includes the following beneficial technical effects: This application utilizes the FPGA's heartbeat signal and watchdog circuit to ensure that the system continues to output a stable signal only after the FPGA is running normally, and to promptly disconnect the bus driver enable in abnormal conditions.

[0011] Furthermore, the uncertainty of the FPGA's I / O port output state is transformed into a deterministic and safe output state through the XOR and logical combination operations of the judgment circuit, thereby enhancing the system's fault tolerance.

[0012] Furthermore, this application uses an FPGA to read back the opening and closing state of the magnetic latching relay to confirm its state when powered on.

[0013] The safe-state design of this application not only improves the reliability of the system, but also simplifies the circuit design and significantly reduces the risk of overall circuit failure due to a single point of failure, thereby ensuring high security of airborne radar or conduction switch control. Attached Figure Description

[0014] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0015] Figure 1 This is a circuit block diagram of the control circuit for the radar or communication system of this application. Detailed Implementation

[0016] The embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0017] The following specific examples illustrate the implementation of this application. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. This application can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this application. It should be noted that, in the absence of conflict, the following embodiments and features in the embodiments can be combined with each other. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0018] It should be noted that various aspects of embodiments within the scope of the appended claims are described below. It will be apparent that the aspects described herein can be embodied in a wide variety of forms, and any particular structure and / or function described herein is merely illustrative. Based on this application, those skilled in the art will understand that one aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number of aspects set forth herein can be used to implement the device and / or practice the method. Additionally, this device and / or method can be implemented using other structures and / or functionalities besides one or more of the aspects set forth herein.

[0019] It should also be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of this application. The illustrations only show the components related to this application and are not drawn according to the number, shape and size of the components in actual implementation. In actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0020] Furthermore, specific details are provided in the following description to facilitate a thorough understanding of the examples. However, those skilled in the art will understand that the described aspects can be practiced without these specific details.

[0021] This application provides a control circuit for an airborne radar or a conduction switch.

[0022] like Figure 1 As shown, a control circuit for airborne radar or conduction switch includes an FPGA, a watchdog circuit, a bus driver, a judgment circuit, and a magnetic latching relay.

[0023] The FPGA sends a connection control open or close signal to the bus driver via a connection control channel, and a disconnect control open or close signal to the bus driver via a disconnect control channel. Simultaneously, the FPGA outputs a first state signal (State A) and a second state signal (State B) to the bus driver. The first state signal indicates the connection control open or close state, and the second state signal indicates the disconnect control open or close state. Specifically, the connection control open signal indicates initiating connection, i.e., turning on the radar or conduction; the connection control close signal indicates closing connection, i.e., turning off the radar or conduction; the disconnect control open signal indicates initiating disconnection, i.e., turning off the radar or conduction; and the disconnect control close signal indicates turning off disconnection, i.e., turning on the radar or conduction. In this application, when the FPGA sends a connection control open signal via the connection control channel, the disconnect control channel sends a disconnect control close signal to put the magnetic latching relay in the connected state to turn on the radar or conduction. When the FPGA sends a disconnect control open signal via the disconnect control channel, the connection control channel sends a connection control close signal to put the magnetic latching relay in the disconnected state to turn off the radar or conduction. The open signal is high, and the close signal is low.

[0024] The bus driver sends the on / off signal for connection control, the on / off signal for disconnection control, a first state signal, and a second state signal to the judgment circuit. When the states of the first state signal and the second state signal are different, the judgment circuit determines that the on / off signal for connection control and the on / off signal for disconnection control sent by the bus driver are valid, and sends a connection or disconnection signal to the magnetic latching relay. The magnetic latching relay performs a connection or disconnection action according to the received signal to control the opening and closing of the radar or communication system. Since the radar or communication system is either in an open state or a closed state, during normal operation of the control circuit, one of the connection control channel and the disconnection control channel will definitely output an open signal, and the other will output a closed signal. The connection control channel and the disconnection control channel cannot simultaneously output open or closed signals. Therefore, the FPGA outputs the states of connection control and disconnection control while outputting the control signal. Only when the states of connection control and disconnection control are inconsistent are the connection control signal and disconnection control signal sent to the magnetic latching relay valid. This ensures the determinism of the signal in the fixed operation mode and allows for safe output to the magnetic latching relay, guaranteeing the safety and stability of the system.

[0025] When the FPGA is working normally, it periodically sends heartbeat signals to the watchdog circuit. When the watchdog circuit receives the heartbeat signal normally, it outputs a low-level signal to the enable terminal of the bus driver, indicating normal operation. When the FPGA malfunctions, it stops sending heartbeat signals to the watchdog circuit. If the watchdog circuit receives an abnormal heartbeat signal, it outputs a high-level signal to the enable terminal of the bus driver, causing the bus driver to stop working. The watchdog circuit ensures that the bus driver is automatically shut down in the event of an FPGA malfunction or fault. The bus driver can only transmit data normally when the FPGA is working properly. At this time, the control and status signals of the radar or communication system are converted by the bus driver and then transmitted to the judgment circuit. Once the FPGA malfunctions or malfunctions, the bus driver will also stop data transmission. This mechanism ensures that the circuit can automatically cut off data communication when the FPGA malfunctions, further guaranteeing the stability and reliability of the system.

[0026] In this application embodiment, a set of control circuits is used to control the radar to turn on or off, and another set of control circuits with the same structure is used to control the opening or closing of the conduction.

[0027] The magnetic latching relay is a dual-coil magnetic latching relay. The judgment circuit outputs two signals: a first signal for connection control and a second signal for disconnection control. The first signal is connected to the first coil of the dual-coil magnetic latching relay, and the second signal is connected to the second coil. The first switch in the dual-coil magnetic latching relay is used to connect to the power supply circuit of the radar or communication system. The dual-coil magnetic latching relay switches between connection and disconnection states based on the voltage of the two signals output by the judgment circuit. When the connection control is open and the first and second state signals are inconsistent, the first coil of the dual-coil magnetic latching relay is energized to generate a magnetic field, the second coil is de-energized and has no magnetic field, the internal switch of the dual-coil magnetic latching relay is closed, the dual-coil magnetic latching relay is in the connection state, and the radar or communication system is in the open state. When the disconnection control is open and the first and second state signals are inconsistent, the first coil of the dual-coil magnetic latching relay is de-energized and has no magnetic field, the second coil is energized to generate a magnetic field, the internal switch of the dual-coil magnetic latching relay is open, the dual-coil magnetic latching relay is in the disconnection state, and the radar or communication system is in the closed state.

[0028] This application employs a magnetic latching relay, which receives the final control signal generated by the judgment circuit and drives the opening and closing operation of the internal switch contacts by triggering the coil magnetic field with a pulse current. Upon receiving the final result from the judgment circuit, the magnetic latching relay generates an instantaneous pulse current, which excites the coil to produce a magnetic field. This generated magnetic field is superimposed on the magnetic field of the built-in permanent magnet, driving the contacts to open and close according to the principle of "like poles repel, unlike poles attract." After the pulse disappears, the relay maintains its current switching state due to the action of the permanent magnet. A key feature of the magnetic latching relay is that it does not require continuous power to maintain its state. Once set to the open or closed state, it will continue to maintain that state until a new command is received. This characteristic gives the magnetic latching relay the advantages of high efficiency, energy saving, and long-term stability, meeting the application requirements of airborne radar and communication / navigation fields, and is particularly suitable for use in airborne switch control circuits requiring high reliability and performance stability.

[0029] The judgment circuit includes an XOR gate, a first AND gate, and a second AND gate. The bus driver is used to send an open or closed signal for connection control to the first AND gate, and the bus driver is used to send an open or closed signal for disconnection control to the second AND gate. The first and second status signals output by the bus driver are sent to the XOR gate. The judgment results of the XOR gate are output to both the first and second AND gates. The output of the first AND gate serves as the first signal of the judgment circuit, and the output terminal of the first AND gate is connected to one end of the first coil of the dual-coil magnetic latching relay. The output of the second AND gate serves as the second signal of the judgment circuit, and the output terminal of the second AND gate is connected to one end of the second coil of the dual-coil magnetic latching relay.

[0030] When the connection control channel outputs 1, it indicates that the connection control is open and the first state signal is 1; when the connection control channel outputs 0, it indicates that the connection control is closed and the second state signal is 0. When the disconnect control channel outputs 1, it indicates that the connection control is open and the first state signal is 1; when the disconnect control channel outputs 0, it indicates that the connection control is closed and the second state signal is 0. When the first state signal and the second state signal received by the XOR gate are the same, the XOR gate outputs 0; when the first state signal and the second state signal received by the XOR gate are different, the XOR gate outputs 1. When all signals received by the first AND gate are 1, the signals received by the second AND gate are not all 1. The first coil generates an electromagnetic field, and the second coil does not generate an electromagnetic field. The dual-coil magnetic latching relay is in the connected state. When all signals received by the second AND gate are 1, the signals received by the first AND gate are not all 1. The second coil generates an electromagnetic field, and the first coil does not generate an electromagnetic field. The dual-coil magnetic latching relay is in the closed state.

[0031] The watchdog circuit includes a monostable multivibrator and a NOT gate. The output of the NOT gate is connected to the enable terminal of the bus driver. The FPGA periodically sends a heartbeat signal to the monostable multivibrator. When the monostable multivibrator receives the heartbeat signal normally, it sends a high-level signal to the NOT gate, and the NOT gate outputs a low-level signal. When the monostable multivibrator receives an abnormal heartbeat signal, it sends a low-level signal to the NOT gate, and the NOT gate outputs a high-level signal.

[0032] The control circuit also includes a status readback circuit, which is connected to the magnetic latching relay and is used to send the on / off status information of the magnetic latching relay to the bus driver. The bus driver then sends the on / off status information of the magnetic latching relay to the FPGA.

[0033] The readback circuit includes an optocoupler, the input of which is connected to the second switch of a dual-coil magnetic latching relay, and one end of the second switch is connected to a power supply. The output of the optocoupler is connected to the bus driver.

[0034] By setting up a status readback circuit, the switching status information of the magnetic latching relay is fed back to the FPGA. When the FPGA powers on, it reads the open / closed state of the magnetic latching relay. This process uses an optocoupler to achieve physical isolation between the input and output signals, effectively preventing external interference and signal noise from adversely affecting the circuit. Through this feedback mechanism, when the FPGA is powered on again, the status signal is sent back to the FPGA via the bus driver. At this time, the open / closed state of the relay before power failure can be read, ensuring that the system is in a deterministic and safe state.

[0035] In this embodiment, the power supply design for the dual-coil magnetic latching relay and the status readback circuit is as follows: The first AND gate and the first terminal of the first coil of the dual-coil magnetic latching relay are connected through a first transistor. The second AND gate and the first terminal of the second coil of the dual-coil magnetic latching relay are connected through a second transistor. The second terminals of the first and second coils are connected to a +5V power supply. One end of the second switch is connected to this +5V power supply. The optocoupler in the readback circuit is used to reflect the on / off state of the dual-coil magnetic latching relay based on the different on / off states formed by the closed and open states of the second switch and the +5V power supply.

[0036] The base of the first transistor is connected to the first AND gate, the collector of the first transistor is connected to the first end of the first coil, and the emitter of the first transistor is grounded; the base of the second transistor is connected to the second AND gate, the collector of the second transistor is connected to the first end of the second coil, and the emitter of the second transistor is grounded.

[0037] When the connection control is an open signal, the first AND gate receives a signal of 1, outputs 5V, the first transistor is turned on, and the first coil and the ground emitter of the first transistor are connected. The first terminal of the first coil is grounded (0V) and the second terminal is +5V. The first coil generates a magnetic field, which drives the first and second switches of the dual-coil magnetic latching relay to be closed, and the dual-coil magnetic latching relay is in the connected state. At this time, the second AND gate receives a disconnect control signal of 0, that is, one of the signals received by the second AND gate is 0 and the other is 1. The second AND gate has no voltage output, that is, the output voltage signal of the second AND gate is 0V, the second transistor is in the off state, and no current flows through the second coil.

[0038] Similarly, when the disconnection control is an open signal, the signals received by the second AND gate are all 1, the second AND gate outputs a 5V voltage, the second transistor is turned on, the second coil and the ground emitter of the second transistor are connected, the first terminal of the second coil is grounded (0V), and the second terminal is +5V. The second coil generates a magnetic field, which drives the first and second switches of the dual-coil magnetic latching relay to be in the open state, and the dual-coil magnetic latching relay is in the open state. At this time, the connection control received by the first AND gate is a close signal, that is, one of the signals received by the first AND gate is 0 and the other is 1. The first AND gate has no voltage output, that is, the output voltage signal of the first AND gate is 0V, the first transistor is in the off state, and no current flows through the first coil.

[0039] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A control circuit for airborne radar or conduction switch, characterized in that, This includes FPGA, watchdog circuit, bus driver, decision circuit, and magnetic latching relay; The FPGA sends a connection control open or close signal to the bus driver through the connection control channel, and sends a disconnect control open or close signal to the bus driver through the disconnect control channel. At the same time, the FPGA outputs a first status signal and a second status signal to the bus driver. The first status signal indicates the connection control open or close status, and the second status signal indicates the disconnect control open or close status. The bus driver sends the open or closed signal of the connection control, the open or closed signal of the disconnection control, the first state signal, and the second state signal to the judgment circuit. When the states of the first state signal and the second state signal are different, the judgment circuit determines that the open or closed signal of the connection control or the open or closed signal of the disconnection control sent by the bus driver is valid, and sends a connection or disconnection signal to the magnetic latching relay. The magnetic latching relay performs a connection or disconnection action according to the received signal to control the opening and closing of the radar or communication system. When the FPGA is working normally, it periodically sends a heartbeat signal to the watchdog circuit. When the watchdog circuit receives the heartbeat signal normally, it outputs a low-level signal to the enable terminal of the bus driver. When the bus driver is working normally, it stops sending heartbeat signals to the watchdog circuit when the FPGA is malfunctioning. When the watchdog circuit receives a heartbeat signal malfunctioning, it outputs a high-level signal to the enable terminal of the bus driver, and the bus driver stops working.

2. The control circuit for airborne radar or conduction switch according to claim 1, characterized in that, The magnetic latching relay is a dual-coil magnetic latching relay. The judgment circuit outputs two signals: a first signal is a voltage signal for connection control, and a second signal is a voltage signal for disconnection control. The first signal is connected to the first coil of the dual-coil magnetic latching relay, and the second signal is connected to the second coil of the dual-coil magnetic latching relay. The first switch in the dual-coil magnetic latching relay is used to connect to the power supply circuit of the radar or the conduction circuit. The dual-coil magnetic latching relay switches between connection and disconnection states according to the voltage of the two signals output by the judgment circuit.

3. The control circuit for airborne radar or conduction switch according to claim 2, characterized in that, The judgment circuit includes an XOR gate, a first AND gate, and a second AND gate. The bus driver is used to send an open or closed signal for connection control to the first AND gate, and the bus driver is used to send an open or closed signal for disconnection control to the second AND gate. The first and second status signals output by the bus driver are sent to the XOR gate. The judgment results of the XOR gate are both output to the first and second AND gates. The output terminal of the first AND gate is connected to one end of the first coil of the dual-coil magnetic latching relay, and the output terminal of the second AND gate is connected to one end of the second coil of the dual-coil magnetic latching relay. When the connection control channel outputs 1, it indicates that the connection control is open and the first state signal is 1; when the connection control channel outputs 0, it indicates that the connection control is closed and the first state signal is 0. When the disconnect control channel outputs 1, it indicates that the connection control is open and the second state signal is 1; when the disconnect control channel outputs 0, it indicates that the connection control is closed and the second state signal is 0. When the first state signal and the second state signal received by the XOR gate are the same, the XOR gate outputs 0; when the first state signal and the second state signal received by the XOR gate are not the same, the XOR gate outputs 1. When all signals received by the first AND gate are 1, the first coil generates an electromagnetic field and the dual-coil magnetic latching relay is in a connected state. When all signals received by the second AND gate are 1, the second coil generates an electromagnetic field and the dual-coil magnetic latching relay is in a closed state.

4. The control circuit for airborne radar or conduction switch according to claim 1, characterized in that, The watchdog circuit includes a monostable multivibrator and a NOT gate. The output of the NOT gate is connected to the enable terminal of the bus driver. The FPGA periodically sends a heartbeat line to the monostable multivibrator. When the monostable multivibrator receives the heartbeat line normally, it sends a high-level signal to the NOT gate, and the NOT gate outputs a low-level signal. When the monostable multivibrator receives a heartbeat line abnormality, it sends a low-level signal to the NOT gate, and the NOT gate outputs a high-level signal.

5. The control circuit for airborne radar or conduction switch according to claim 2, characterized in that, It also includes a status readback circuit, which is connected to the magnetic latching relay and is used to send the on or off status information of the magnetic latching relay to the bus driver. The bus driver then sends the on or off status information of the magnetic latching relay to the FPGA.

6. The control circuit for airborne radar or conduction switch according to claim 5, characterized in that, The readback circuit includes an optocoupler, the input of which is connected to the second switch of a dual-coil magnetic latching relay, and one end of the second switch is connected to a power supply. The output of the optocoupler is connected to the bus driver.

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