Profile-based trace file generation method, electronic device, and medium

Abstract

This invention relates to the field of chip technology, and more particularly to a method for generating trace files based on configuration files, an electronic device, and a medium. The method includes step S1: obtaining the configuration file {F1, F2, ..., F...} corresponding to the chip. n ,...,F N}, F n ={A n B n F1 n F2 n ,...,F i n ,...,F g(n) n Step S2, based on {F1} n F2 n ,...,F i n ,...,F g(n) n Generate an A n Corresponding interface C n and in A n C is built in the corresponding chip component module n and each F i n The connection, in C n Setting B in the middle n Step S3: Perform simulation based on the chip. When B is satisfied... n At that time, through C n Get each corresponding F i n The invention obtains tracking information and generates corresponding tracking files. It can acquire information corresponding to signals within the chip to track and locate design problems in the chip.

Description

TECHNICAL FIELD

[0001] The present application relates to the chip technical field, and particularly to a configuration file-based trace file generation method, an electronic device and a medium. BACKGROUND

[0002] A chip is usually a multi-level design with a huge scale, and chip design and chip verification are important stages in the research and development process. In the chip verification process, the chip design problem points need to be tracked and located for timely correction. The existing method can only obtain the corresponding information of the chip interface to generate a trace file, and cannot track the information corresponding to the internal signals of the chip. However, in some application scenarios, the chip design problem points may be related to the internal signals of the chip, and the information corresponding to the internal signals of the chip needs to be obtained for tracking. Therefore, how to obtain the information corresponding to the internal signals of the chip to track and locate the chip design problem points becomes a technical problem to be solved. SUMMARY

[0003] The present application aims to provide a configuration file-based trace file generation method, an electronic device and a medium, which can obtain the information corresponding to the internal signals of the chip to track and locate the chip design problem points.

[0004] According to a first aspect of the present application, a configuration file-based trace file generation method is provided, comprising:

[0005] Step S1, obtaining the configuration file {F1, F2,..., Fn} corresponding to the chip. n ,...,Fn N}, Fn is the nth group of configuration information of the configuration file, n is in the range of 1 to N, N is the number of configuration information, Fn={A n ,B n ,F1 n ,F2 n ,...,Fn n n i n ,...,Fn g(n) n}, A n is the chip module identifier corresponding to Fn, B n is the trigger condition corresponding to Fn, and Fi n n is the ith to-be-traced signal information corresponding to Fn, i is in the range of 1 to g(n), g(n) is the number of to-be-traced signals corresponding to Fn, g(n)≥1, and at least one of Fn i n in the configuration file is an internal signal of the chip. n n n i ​​​​​​n These are internal signals of the chip;

[0006] Step S2, based on {F1 n F2 n ,...,F i n ,...,F g(n) n Generate an A n Corresponding interface C n and in A n C is built in the corresponding chip component module n and each F i n The connection, in C n Setting B in the middle n ;

[0007] Step S3: Perform simulation based on the chip, when B is satisfied. n At that time, through C n Get each corresponding F i n The tracking information is used to generate the corresponding tracking file.

[0008] According to a second aspect of the present invention, an electronic device is provided, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being configured to perform the method described in the first aspect of the present invention.

[0009] According to a third aspect of the present invention, a computer-readable storage medium is provided, storing computer-executable instructions for performing the method described in the first aspect of the present invention.

[0010] Compared with existing technologies, this invention has significant advantages and beneficial effects. Through the above technical solution, the present invention provides a configuration file-based tracking file generation method, electronic device, and medium that achieve considerable technological advancement and practicality, and has broad industrial application value. It has at least the following beneficial effects:

[0011] This invention establishes a configuration file containing at least one signal that is internal to the chip. The configuration files group signal information and corresponding trigger conditions, generate corresponding interfaces based on the configuration file, and establish connections between these interfaces and the signals in the configuration file. Then, based on the trigger conditions, the interface retrieves the tracking information corresponding to each signal in the configuration file. This invention enables the acquisition of information corresponding to internal signals of the chip, achieving the tracking of these signals. By using the tracking file to refine the chip design, it improves the efficiency of chip design and verification. Attached Figure Description

[0012] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings needed in the embodiments description. Obviously, the drawings in the following description only show some of the embodiments of the present application, and other drawings can be obtained by those of ordinary skill in the art without any creative effort based on these drawings.

[0013] Figure 1 The configuration file based tracking file generation method flow chart provided by the embodiments of the present application is shown in the following. DETAILED DESCRIPTION

[0014] The technical solutions in the embodiments of the present application will be clearly and completely described with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without any creative effort fall within the scope of the present application.

[0015] The embodiments of the present application provide a configuration file based tracking file generation method, as shown in the following. Figure 1 The method comprises the following steps.

[0016] Step S1, obtaining the configuration file corresponding to the chip {F1, F2,..., Fn,..., FN}, where n is an integer, and n is in the range of 1 to N, N is the number of configuration information, and FN is the configuration information of the nth group. n N n n n n n n i n g(n) n n n n n i n n n n i n

[0017] It should be noted that, in the configuration file, at least one F​​​​​​​​​​​​​​​​​​​n F in i n Can be a chip internal signal, chip internal signal refers to the signal located in the chip module, can not be directly based on the chip input interface (interface), output interface detected signal. F n F in i n Can be a chip internal signal or non-chip internal signal, non-chip internal signal is able to directly through the chip input interface, output interface detected signal. Preferably, F n F in i n All are chip internal signal, or chip internal signal and tracking chip internal signal related non-chip internal signal. Chip is composed of multiple chip module level settings, chip module through the chip input interface, output interface interconnection. Configuration file can be specifically JSON, YAML, XML and other forms of file.

[0018] Step S2, based on {F1 n ,F2 n ,...,F i n ,...,F g(n) n} generates an A n Corresponding interface C n , and A n Corresponding chip module C n And each F i n The connection is set in C n B n .

[0019] It should be noted that based on each group of configuration information, a corresponding interface is generated for the corresponding chip module, and the tracking information of the chip internal signal is obtained through the interface subsequently.

[0020] Step S3, based on chip simulation, when B n , the tracking information of each F n i Corresponding is obtained through C n , and the corresponding tracking file is generated.

[0021] It should be noted that during the simulation process based on the chip, each signal will generate corresponding signal value in different periods, when B n , the tracking information of corresponding F i n Is triggered to obtain, when B n , no need to obtain the corresponding Fi n tracking information. The method can realize signal tracking for any chip internal signal.

[0022] As an embodiment, F i n {F1 in ,F2 in ,F3 in}, F1 in is F i n In A n corresponding chip composition module, F2 in is F i n corresponding signal name, F i n corresponding signal is a signal to be tracked, F3 in is F i n corresponding signal width. F i n corresponding A n is module G, the submodule of module G includes module R, the submodule of module R includes module T and module P, the chip internal signal to be tracked in module T includes signal t1, the signal width corresponding to signal t1 is w t1 , and the hierarchical information corresponding to signal t1 in module G is G.R.T. Then the signal to be tracked information corresponding to signal t1 is {G.R.T, t1, w t1}. The chip internal signal to be tracked in module R includes signal r1, the signal width corresponding to signal r1 is w r1 , and the hierarchical information corresponding to signal r1 in module G is G.R. Then the signal to be tracked information corresponding to signal r1 is {G.R, r1, w r1}. The chip internal signal to be tracked in module G includes signal g1, the signal width corresponding to signal g1 is w g1 , and the hierarchical information corresponding to signal g1 in module G is G. Then the signal to be tracked information corresponding to signal g1 is {G, g1, w g1}. The chip internal signal to be tracked in module P includes signal p1 and signal p2, the signal width corresponding to signal p1 is w p1 , the signal width corresponding to signal p2 is w p2 , the hierarchical information corresponding to signal p1 in module G is G.R.P, the hierarchical information corresponding to signal p2 in module G is G.R.P, the signal to be tracked information corresponding to signal p1 is {G.R.P, p1, w p1}, and the signal to be tracked information corresponding to signal p2 is {G.R.P, p2, wp2}

[0023] As one embodiment, F1, F2, ..., F n ,...,F N Set in a configuration file, or for each F n Set up a separate configuration file, or A n The same F n This is set in a configuration file. It's worth noting that configuration files can be used to set settings across different levels; if it's already set to A... n By setting a set of configuration information, you can then configure A. n Set another set or more sets of configuration information, but not for A. n Configure the submodules and grandchild modules. Still using F... i n Corresponding A n Taking module G as an example, module R is a submodule of module G, and module T and P are submodules of module R. If a corresponding configuration file has already been set for module G, it already covers the configuration information of module G and its sub-modules. Therefore, it is not necessary to set configuration information for modules R, T and P.

[0024] As one example, B n For one or more signals, the signal values ​​must meet preset conditions. These preset conditions include the signal value being equal to a preset value and the multiple signal values ​​conforming to a preset logical relationship. B n It may correspond to one signal, or it may correspond to multiple signals, B n The corresponding signal can be F n The corresponding internal signal of the chip may not be F. n The corresponding internal signal of the chip can also be F. n The corresponding internal signals of the chip and not F n The combination of the corresponding internal signals of the chip can be flexibly configured according to specific tracking requirements. For example, B n Corresponding to a signal b1, B n Set signal b1 to equal 0. For example, B... n For two signals b1 and b2, B n Set the values ​​of b1 and b2 to be the same, or, B n The values ​​of b1 and b2 are set to be opposite, or the values ​​of b1 and b2 are equal to a preset value after being processed by a preset logic. The preset logic can be AND, OR, NOT, or a combination of AND, OR, and NOT. Determine if B is satisfied. n Specifically, this can be achieved using an if else statement.

[0025] As one embodiment, step S2 includes:

[0026] Step S21, based on {F1 n ,F2 n ,...,F i n ,...,F g(n) n} each F i n corresponding F1 in ,F2 in ,F3 in generate an A n corresponding interface C n ,C n based on hardware description language.

[0027] Wherein, the hardware description language can be Verilog, VHDL, SystemVerilog, etc.

[0028] Step S22, C n is bound to A n corresponding chip module based on F1 i , C n and F2 in between the connection, C n and F2 in between the connection line width is F3 in .

[0029] Wherein, in the hardware description language, bind is used to bind a new module or interface to the existing design module instance without modifying the original module code. Based on F1 i , C n and F2 in between the connection, and A n corresponding chip module on the A n corresponding interface C n bound in A n , so that subsequent can be based on C i each F n corresponding tracking information.

[0030] Step S23, set B n in C n .

[0031] It should be noted that each signal will have different values in different periods, and in the signal tracking process, it is not necessary to obtain the value of each to-be-tracked signal in each period, usually only in certain conditions. In order to avoid collecting a large amount of useless data, and realize directional collection, in C nSetting B in the middle n This makes it possible to satisfy B in the future. n In the case of C n To collect the corresponding signal values.

[0032] As one embodiment, step S3 includes:

[0033] Step S31: Perform simulation based on the chip, when B is satisfied... n At that time, through C n With each F2 in The connection between them obtains each F i n Tracking information, including F1 in F2 in F3 in Signal value, signal acquisition time.

[0034] It should be noted that the tracking information clearly records the corresponding signal name, layer information, signal width, signal value, and signal acquisition time, providing an accurate reference for subsequent signals.

[0035] Step S32, each F i n The tracking information is stored in F n The corresponding file E in the preset database n middle.

[0036] It should be noted that directly generating trace files based on trace information would consume a large amount of memory and require continuous file read and write operations, resulting in extremely low efficiency in generating trace files. Therefore, in this embodiment of the invention, each F... i n The tracking information is stored in F n In the pre-defined database, reading and writing can be done quickly without consuming a large amount of memory.

[0037] Step S33: Read E from the preset database n Generate the corresponding trace file H n H n For log files.

[0038] It should be noted that by generating corresponding trace files from the preset database, the efficiency of trace file generation is greatly improved. The trace files are log files, and by outputting them, users can obtain accurate references for the chip debugging process.

[0039] The embodiment of the present application can obtain the information corresponding to the chip internal signal, and realize the tracking of the chip internal signal. The chip design is improved based on the tracking file, and the chip design and chip verification efficiency are improved.

[0040] It is noted that some example embodiments are described as processes or methods depicted as flowcharts. Although the flowcharts describe the steps of the processes as sequential processes, many of the steps can be performed in parallel, concurrently or simultaneously. In addition, the order of the steps can be re-arranged. A process can be terminated when its operations are completed, but could also occur under some other condition, such as in response to a termination signal. The processes might correspond to methods, functions, procedures, subroutines, subprograms, etc.

[0041] The embodiment of the present application further provides an electronic device, comprising: at least one processor; and a memory connected with the at least one processor in communication; wherein the memory stores instructions executed by the at least one processor, and the instructions are arranged to execute the method provided by the embodiment of the present application.

[0042] The embodiment of the present application further provides a computer readable storage medium, which stores computer executable instructions, and the computer executable instructions are used for executing the method provided by the embodiment of the present application.

[0043] The above description is only the preferred embodiment of the present application, and does not limit the present application in any form. Although the present application has been disclosed as the above preferred embodiment, it is not intended to limit the present application. Any person skilled in the art can make some changes or modifications to the above disclosed technical contents to make equivalent embodiments with equivalent changes, but as long as the changes do not deviate from the technical solution of the present application, any simple modification, equivalent change and modification of the above embodiments according to the technical essence of the present application are still within the scope of the technical solution of the present application.

Claims

1. A configuration file based trace file generation method, characterized by, comprising: Step S1, obtaining configuration files {F1, F2,..., F n ,...,F N} corresponding to the chip, F n is the nth group of configuration information of the configuration file, n is in the range of 1 to N, N is the number of configuration information, F n ={A n ,B n ,F1 n ,F2 n ,...,F i n ,...,F g(n) n},A n is the chip composition module identifier corresponding to F n , B n is the trigger condition corresponding to F n , F i n is the ith to-be-tracked signal information corresponding to F n , i is in the range of 1 to g(n), g(n) is the number of to-be-tracked signals corresponding to F n , g(n)≥1, F n At least one F i n is an internal signal of the chip; Step S2, generating an A n based on {F1 n ,...,F i n ,...,F g(n) n} n corresponding interface C n , and establishing the connection of C n and each F n in the module composed of the corresponding chip of A i n , and setting B n in C n ; Step S3, simulation based on chip, when B n is satisfied, through C n acquire corresponding each F i n tracking information, generate corresponding tracking file.

2. The method of claim 1, wherein, F i n ={F1 in F2 in F3 in }, F1 in For F i n In A n The corresponding hierarchical information in the chip's constituent modules, F2 in For F i n The corresponding signal name is F3. in For F i n The corresponding signal width.

3. The method of claim 1, wherein, the step S2 comprises: Step S21, based on {F1 n ,F2 n ,...,F i n ,...,F g(n) n} each F i n corresponding F1 in ,F2 in ,F3 in generate an A n corresponding interface C n ,C n based on hardware description language generation; Step S22, C n Bind to A in the form of bind n The corresponding chip module is composed of F1 i Establish C n Between F2 in The width of the connection line between C n And F2 in Between F3 in ; Step S23, in C n B n is set.

4. The method of claim 1, wherein, B n The preset condition is satisfied when one or more signal values of the signals satisfy the preset condition, and the preset condition includes that the signal values are equal to preset values and that the signal values satisfy a preset logical relationship.

5. The method of claim 2, wherein, the step S3 comprises: Step S31: Perform simulation based on the chip, when B is satisfied... n At that time, through C n With each F2 in The connection between them obtains each F i n Tracking information, including F1 in F2 in F3 in Signal value, signal acquisition time; Step S32, storing the tracking information of each F i n to the F n in the corresponding file E n in the preset database; Step S33, reading E n corresponding tracking file H n , H n is a log file.

6. The method of claim 1, wherein, F1, F2,..., F n F1, F2,..., F N Set in one configuration file, or each F n Set a separate configuration file, or A n The same F n Set in one configuration file.

7. An electronic device, comprising: comprising: at least one processor; and a memory connected with the at least one processor in communication; wherein the memory stores instructions executed by the at least one processor, the instructions configured to perform the method of any one of the preceding claims 1-6.

8. A computer-readable storage medium, characterized in that, computer executable instructions stored thereon for performing the method of any one of the preceding claims 1-6.

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