Vertical cavity surface emitting laser and preparation method thereof

Abstract

The invention relates to the technical field of optoelectronic devices, and discloses a vertical cavity surface emitting laser and a preparation method thereof. The preparation method comprises: providing a substrate layer; an epitaxial structure is formed on the surface of one side of the substrate layer, and the epitaxial structure is a gallium arsenide-based structure and comprises a first reflector layer, a first limiting layer, an active layer, a second limiting layer and a second reflector layer which are stacked; selective arsenic ion implantation is carried out on one side of the second reflector layer to form an annular ion modulation layer penetrating into the second reflector layer by partial thickness, a first light hole for current injection and light emission is formed in the annular ion modulation layer, the resistivity of the first light hole is larger than that of the second reflector layer, and the refractive index of the first light hole is smaller than that of the second reflector layer; forming a contact layer covering the second reflector layer and the ion modulation layer on the epitaxial structure; a first electrode is formed on the contact layer in electrical communication with the contact layer and offset from the first aperture. In the invention, the ion modulation layer formed by arsenic ion implantation is high-resistance, stable and stress-free, and meets the requirement of high-speed optical communication.

Description

Technical Field

[0001] This invention relates to the field of optoelectronic device technology, specifically to a vertical cavity surface-emitting laser and its fabrication method. Background Technology

[0002] Vertical-cavity surface-emitting lasers (VCSELs) in semiconductor lasers possess numerous advantages, including low threshold current, narrow spectral width, excellent temperature characteristics, circular output beam, and ease of coupling and integration. They are widely used in emerging fields such as quantum sensing, high-power laser sources, and high-speed optical communication. With the rapid rise of various large-scale artificial intelligence models, the high-speed optical communication technology used in these models is also developing rapidly, placing higher demands on the performance and reliability of VCSEL products used in optical communication technology.

[0003] Currently, the vast majority of VCSEL products are fabricated using a wet oxidation process. Specifically, this process forms a ring-shaped oxide confinement layer (also known as an oxide ring) with oxide pores within the p-DBR layer to achieve functions such as current focusing, optical confinement, and mode control, thus creating an oxide-confined VCSEL product. However, this type of oxide-confined VCSEL product suffers from several drawbacks due to the limitations of the oxidation fabrication process: (1) Firstly, the wet oxidation process relies on wet oxidation of high Al content materials to form an insulating oxide confinement layer. This process is naturally accompanied by volume expansion and increased interface stress, which results in stress-induced defects in the formed oxide confinement layer, which will degrade the reliability of the laser and affect its long-term performance. (2) Secondly, wet oxidation process is a wet chemical process. On the one hand, the oxidation rate is sensitive and it is difficult to accurately control the width and depth of the oxide ring. The consistency of devices in the same batch is poor and the production yield is low. On the other hand, there is an edge effect where the oxidation rate of the edge region is faster than that of the center region, which causes the oxide ring to form an irregularly shaped oxide hole such as a "trumpet mouth", which exacerbates the performance difference. Such an oxide ring will affect the carrier confinement and cause large optical field defects, thereby affecting the performance and reliability of the laser and limiting the current diverse application requirements. Summary of the Invention

[0004] This invention provides a vertical cavity surface-emitting laser and its fabrication method to solve the problem that in existing oxide-confined vertical cavity surface-emitting lasers, the wet oxidation process produces oxide rings with poor reliability, which affects carrier confinement and causes large optical field defects, thereby affecting the performance and reliability of the laser and limiting the current diverse application requirements.

[0005] In a first aspect, the present invention provides a method for fabricating a vertical-cavity surface-emitting laser, comprising: Provide a substrate layer; An epitaxial structure is formed on one side surface of the substrate layer. The epitaxial structure is a gallium arsenide-based structure, including a first mirror layer, a first confinement layer, an active layer, a second confinement layer, and a second mirror layer stacked together. Selective arsenic ion implantation is performed on one side of the second reflector layer of the epitaxial structure to form an ion modulation layer that penetrates a portion of the thickness of the second reflector layer. The ion modulation layer is annular, and a first light aperture for current injection and light emission is formed inside it. The resistivity of the ion modulation layer is greater than that of the second reflector layer, and the refractive index of the ion modulation layer is less than that of the second reflector layer. A contact layer is formed on the side of the epitaxial structure away from the substrate layer, and the contact layer covers the second mirror layer and the ion modulation layer. A first electrode is formed on the side of the contact layer away from the substrate layer. The first electrode is electrically connected to the contact layer and is misaligned with the first optical aperture.

[0006] Beneficial Effects: The ion modulation layer formed by arsenic ion implantation in this invention possesses high resistance, stability, and stress-free characteristics. Specifically, firstly, the arsenic ions in the ion modulation layer belong to the same group as the gallium arsenide-based material in the second mirror layer. The arsenic ions implanted in the second mirror layer act as "donor impurities," providing electrons and undergoing permanent charge neutralization with the acceptor impurities in the second mirror material. This effectively reduces the hole concentration of p-type doped material in the original material of the outer region of the second mirror layer, thereby significantly increasing the resistivity of this region. Similar "electrical isolation" can be achieved without relying on additional defects, forming a high-resistivity region that is almost non-conductive. Moreover, after being implanted into the second mirror layer, the arsenic ions can also act as "donor impurities," filling defect traps such as As interstitial atoms and Ga vacancies in the original material, thereby forming stable deep-level defects and a stable and reliable high-resistivity region. Secondly, arsenic ions have a lattice constant that is almost perfectly matched with the material of the second mirror layer, such as gallium arsenide, and they are in the same group. Therefore, their diffusion coefficient in the second mirror layer material is extremely low. Thus, the high-resistivity region formed after arsenic ion implantation into the second mirror layer will not undergo ion diffusion under conditions such as high temperature and high current, further enhancing the high-resistivity stability of the ion modulation layer. Thirdly, the ion modulation layer formed by ion implantation is a dry process. On the one hand, there are no differences in the consistency and uniformity of the process, avoiding stress defects and irregularities in the first aperture during the forming process of the ion modulation layer, which helps to improve the device fabrication yield and thus ensure efficient carrier confinement and lateral optical field confinement. On the other hand, the ion modulation layer is formed in the part of the second mirror layer that is far from the active layer. This can form a stable high-resistivity region with deep energy level defects in the second mirror layer without damaging the active layer and affecting the optical field. The stable high-resistivity region also means the forming accuracy of the ion modulation layer, that is, ensuring the performance and reliability of the first aperture, the only channel for carrier injection and light output.

[0007] The ion modulation layer obtained above, on the one hand, effectively restricts carrier paths and reduces non-radiative recombination in the stable and reliable high-resistivity region, thereby improving effective light output. On the other hand, due to the presence of the stable and reliable ion modulation layer, the resulting upper layer of the first reflecting mirror, with a high refractive index in the middle and a low refractive index at the periphery, can effectively and stably suppress higher-order modes while ensuring a reliable reduction in junction capacitance, thus increasing modulation bandwidth and ultimately achieving optical field optimization. Therefore, by achieving a synergy between carrier confinement and optical field constraint through a stable and reliable ion modulation layer, mode competition is fundamentally suppressed, power stability is achieved, and the requirements of high-speed optical communication are met.

[0008] In one alternative embodiment, the second mirror layer comprises multiple sets of periodically stacked low-refractive-index layers and high-refractive-index layers; the implantation peak depth of the ion modulation layer is between 1 / 5 and 2 / 5 of the period of the second mirror layer.

[0009] Beneficial effects: The modification depth of the ion modulation layer is between 1 / 5 and 2 / 5 of the number of cycles of the second mirror layer material, which makes the ion modulation layer formed by arsenic ion implantation have the dual characteristics of deep energy level defects and doping compensation. It forms a long-term stable semi-insulating region in the second mirror layer, while avoiding damage to the active layer below, thus meeting the mass production requirements of long-life products such as automobiles and data centers.

[0010] In one optional embodiment, selective arsenic ion implantation is performed on one side of the second mirror layer of the epitaxial structure to form an ion modulation layer extending deep into the second mirror layer, including: A patterned mask is formed on the side surface of the second mirror layer away from the substrate layer. The patterned mask covers a first region of the second mirror layer and exposes a second region surrounding the first region. The first region is used to form a first light aperture, and the second region is used to form an ion modulation layer. Arsenic ion implantation is performed on the surface of the second mirror layer with a patterned mask to form an initial ion modulation layer in the second region of the second mirror layer exposed by the patterned mask. The initial ion modulation layer is annealed to form a ring-shaped ion modulation layer with a partial thickness extending into the second mirror layer; Remove the graphical mask.

[0011] Beneficial Effects: In this invention, the formation of the ion modulation layer by arsenic ion implantation is a purely physical process involving ion bombardment and thermal annealing. Ion implantation is a dry process that does not involve liquid chemical reagents, resulting in higher interface cleanliness. Furthermore, the electrical properties are altered solely through lattice defects and doping compensation, leading to a high-resistivity, stable, stress-free, and highly reliable ion modulation layer. The deep-level traps preserved by the annealing process are thermodynamically stable at device operating temperatures, such as -40°C to 85°C, and do not diffuse over time like oxide layer defects, resulting in strong process compatibility. Actual testing shows that VCSEL devices using this physical modification process of arsenic ion implantation and annealing to form the ion modulation layer exhibit significantly improved reliability and a lifespan more than twice that of traditional oxide-confined VCSEL devices, making them particularly suitable for long-lifespan applications such as lidar and data centers.

[0012] In one optional embodiment, the ion source for arsenic ion implantation is a monovalent arsenic ion source with an energy of 100 keV and a dose of 2 × 10⁻⁶. 15 ions / cm 2 The injection angle is 7° for inclined injection.

[0013] Beneficial effects: Monovalent arsenic ions are more easily and stably generated in the ion source, resulting in higher beam current intensity and improved mass production efficiency; under the same accelerating voltage, As + The kinetic energy and mass matching is better, allowing for precise control of the implantation depth and ensuring the peak value is located above the p-type DBR layer; the lower the charge state, the milder the Coulomb interaction with lattice atoms during implantation, reducing excessive surface damage and balancing the requirement of "room temperature implantation to enhance lattice damage". + After implantation of the p-type DBR layer, in addition to forming defects through lattice collisions, its positive charge characteristics will also generate a charge compensation effect with p-type dopants, such as beryllium cations. + As a donor impurity, it provides electrons to neutralize Be. + The provided holes further enhance the high-resistivity characteristics of the p-type DBR layer, thus forming a semi-insulating ion modulation layer, which is one of the key mechanisms for achieving carrier confinement. In addition, the 7° tilted injection angle can reduce ion channel effects and prevent ions from penetrating too deeply along the crystal orientation. Room temperature injection helps to enhance lattice damage and promote amorphization.

[0014] In one optional embodiment, after forming a contact layer on the side of the epitaxial structure opposite to the substrate layer, and before forming a first electrode on the side of the contact layer opposite to the substrate layer, the method further includes: A passivation layer is formed on the side of the contact layer away from the substrate layer. The passivation layer is disposed correspondingly to the ion modulation layer. The passivation layer has a first opening and a second opening. The first opening corresponds to the first optical aperture, and the second opening exposes a portion of the contact layer located on the ion modulation layer. A seed gold layer is formed in the second opening, and the first electrode is disposed on the passivation layer and electrically connected to the contact layer through the seed gold layer.

[0015] Beneficial effects: The passivation layer is disposed on the contact layer, having a first opening corresponding to the first optical aperture and a second opening corresponding to a portion of the ion modulation layer. The first opening prevents light output from being blocked, while the second opening is used to connect the electrode to the contact layer. The passivation layer changes its refractive index by controlling the film thickness, thus adjusting optical properties, and also protects the device from reacting with air and causing oxidation. A seed gold layer is formed within the second opening of the passivation layer; it can be made of gold, a metallic material, to achieve excellent conductivity between the first electrode and the contact layer, facilitating the introduction of external current and improving the reliability of the metal contact.

[0016] In one alternative embodiment, after the seed gold layer is formed in the first opening and before the first electrode is formed on the side of the contact layer away from the substrate layer, the method further includes: forming a dielectric layer on the surface of the passivation layer away from the substrate layer, wherein the dielectric layer is offset from the seed gold layer.

[0017] Beneficial effects: The dielectric layer fills part of the space between the first electrode and the passivation layer, reducing the parasitic parameters of the device itself. Its misalignment with the seed gold layer avoids affecting the current injection from the first electrode to the seed gold layer and then to the contact layer.

[0018] In one optional embodiment, after forming the first electrode on the side of the contact layer away from the substrate layer, the method further includes: forming a protective layer on the side of the first electrode away from the substrate layer, the protective layer covering the first electrode and extending peripherally to cover the sidewall of the epitaxial structure and the surface of the substrate layer, the protective layer forming a first window exposing a portion of the first electrode, the first window being disposed corresponding to the dielectric layer.

[0019] Beneficial effects: The protective layer can be made of alumina material with electrical insulation, chemical stability, high hardness, wear resistance, high temperature and high pressure resistance, self-healing properties and good optical properties. It is placed on the outermost side of the device to protect the inside of the device from moisture corrosion and improve the reliability of the device.

[0020] In one alternative embodiment, after the first electrode is formed on the side of the contact layer opposite to the substrate layer, and before the protective layer is formed on the side of the first electrode opposite to the substrate layer, the method further includes: A second electrode is formed on one side surface of the substrate layer where the epitaxial structure is formed, and / or a third electrode is formed on one side surface of the substrate layer away from the epitaxial structure; the protective layer also covers the second electrode and forms a second window exposing a portion of the second electrode.

[0021] Beneficial effects: Forming a second electrode in other areas on one side of the substrate with the first electrode, or forming a back metal on the other side of the substrate as a third electrode, with the second and third electrodes having the same polarity, helps the laser adapt to different packaging scenarios in applications and improves the compatibility of the laser in applications.

[0022] Secondly, the present invention also provides a vertical-cavity surface-emitting laser (VCSEL), fabricated using the above-described method for fabricating a VCSEL, comprising: a substrate layer, an epitaxial structure, an ion modulation layer, a contact layer, and a first electrode. The epitaxial structure is formed on one side surface of the substrate layer. The epitaxial structure is a gallium arsenide-based structure, comprising a first mirror layer, a first confinement layer, an active layer, a second confinement layer, and a second mirror layer stacked together. The ion modulation layer is formed on the side of the second mirror layer facing away from the substrate layer, comprising an annular arsenic ion layer, with a first optical aperture formed inside for current injection and light emission. The resistivity of the ion modulation layer is greater than that of the second mirror layer, and the refractive index of the ion modulation layer is less than that of the second mirror layer. The contact layer is disposed on the side of the epitaxial structure facing away from the substrate layer, covering the second mirror layer and the ion modulation layer. The first electrode is disposed on the side of the contact layer facing away from the substrate layer, electrically connected to the contact layer and offset from the first optical aperture.

[0023] Beneficial Effects: The vertical-cavity surface-emitting laser of this invention has a ring-shaped ion modulation layer, formed by selective arsenic ion implantation and extending deep into a portion of the thickness of the second mirror layer, located relatively close to the light-emitting side of the device. This ring-shaped ion modulation layer possesses characteristics such as high resistance, stability, and stress-free performance. On one hand, the stable and reliable high-resistivity region effectively restricts carrier paths, reduces non-radiative recombination, and thus improves effective light output. On the other hand, due to the presence of the stable and reliable ion modulation layer, the upper layer of the first mirror, with a high refractive index in the middle and a low refractive index at the periphery, can effectively and stably suppress higher-order modes while ensuring a reliable reduction in junction capacitance, thereby increasing the modulation bandwidth and ultimately achieving optical field optimization. Therefore, by achieving a synergistic effect of carrier confinement and optical field constraint through the stable and reliable ion modulation layer, mode competition is fundamentally suppressed, power stability is achieved, and the requirements of high-speed optical communication are met.

[0024] In one optional embodiment, the device further includes: a passivation layer, a seed gold layer, a dielectric layer, a protective layer, a second electrode, and / or a third electrode. The passivation layer is formed on the side surface of the contact layer facing away from the substrate layer. The passivation layer covers at least a portion of the ion modulation layer and has a first opening and a second opening. The first opening corresponds to a first optical aperture, and the second opening exposes a portion of the contact layer located on the ion modulation layer. The seed gold layer is formed in the first opening. The first electrode is disposed on the passivation layer and electrically connected to the contact layer through the seed gold layer. The dielectric layer is formed between the passivation layer and the first electrode, and the dielectric layer and the seed gold layer are offset. The protective layer is formed on the side of the first electrode facing away from the substrate layer. The protective layer covers the first electrode and extends peripherally to cover the sidewall of the epitaxial structure and the surface of the substrate layer. The protective layer forms a first window exposing a portion of the first electrode, and the first window corresponds to the dielectric layer. The second electrode is formed on the side surface of the substrate layer where the epitaxial structure is formed, and the third electrode is formed on the side surface of the substrate layer facing away from the substrate layer. The protective layer also covers the second electrode and forms a second window exposing a portion of the second electrode.

[0025] Beneficial effects: The passivation layer is disposed on the contact layer, having a first opening corresponding to the first optical aperture and a second opening corresponding to a portion of the ion modulation layer. The first opening prevents light output from being blocked, while the second opening is used to connect the electrode to the contact layer. The passivation layer changes the refractive index by controlling the film thickness, thus adjusting optical properties and protecting the device from oxidation caused by air reaction. The seed gold layer is formed within the second opening of the passivation layer. It can be made of gold, a metallic material, to achieve excellent conductivity between the first electrode and the contact layer, facilitating external current introduction and improving the reliability of metal contact. The dielectric layer fills a portion of the space between the first electrode and the passivation layer, reducing the parasitic parameters of the device itself. Its offset placement from the seed gold layer avoids affecting the current injection from the first electrode to the seed gold layer and then to the contact layer. The protective layer can be made of alumina, a material with electrical insulation, chemical stability, high hardness, wear resistance, high temperature and pressure resistance, self-healing properties, and good optical performance. It is disposed on the outermost side of the device to protect the internal components from moisture corrosion and improve device reliability. A second electrode is formed on another area of ​​the surface on one side of the substrate where the first electrode is located, or a back metal is formed on the other side of the substrate as a third electrode. The second and third electrodes have the same polarity, which helps the laser adapt to different packaging scenarios in application and improves the compatibility of the laser in application. Attached Figure Description

[0026] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0027] Figure 1 This is a schematic flowchart illustrating the fabrication method of a vertical-cavity surface-emitting laser according to an embodiment of the present invention; Figure 2 This is a schematic diagram of the structure after an epitaxial structure is formed on the substrate layer according to an embodiment of the present invention; Figure 3 This is a schematic diagram of the structure after an ion modulation layer is formed in the second mirror layer according to an embodiment of the present invention; Figure 4 This is a schematic diagram of the structure after the contact layer is formed on the second reflective mirror layer according to an embodiment of the present invention; Figure 5 This is a schematic diagram of the structure after forming a passivation layer and a seed gold layer on the contact layer according to an embodiment of the present invention; Figure 6 This is a schematic diagram of the structure after a dielectric layer is formed on the passivation layer according to an embodiment of the present invention; Figure 7 This is a schematic diagram of the structure of the device after the first electrode is formed on the side away from the substrate layer according to an embodiment of the present invention; Figure 8 This is a schematic diagram of the structure after the second and third electrodes are formed on the substrate layer according to an embodiment of the present invention; Figure 9 This is a schematic diagram of the structure of a vertical cavity surface-emitting laser after a protective layer is formed on the device surface according to an embodiment of the present invention.

[0028] Explanation of reference numerals in the attached figures: 1. Substrate layer; 2. First mirror layer; 3. First confinement layer; 4. Active layer; 5. Second confinement layer; 6. Second mirror layer; 7. Ion modulation layer; 701. First aperture; 8. Contact layer; 9. First electrode; 901. Second aperture; 10. Passivation layer; 1001. First opening; 1002. Second opening; 11. Seed gold layer; 12. Dielectric layer; 13. Protective layer; 1301. First window; 1302. Second window; 14. Second electrode; 15. Third electrode. Detailed Implementation

[0029] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0030] Vertical-cavity surface-emitting lasers (VCSELs) in related technologies are produced using a wet oxidation process to form a ring-shaped oxide confinement layer with oxide holes in the p-type die-casting layer (DBR), i.e., an oxide ring in the p-type DBR layer, to achieve current focusing, optical confinement, and mode control. However, this type of oxide-confined VCSEL, prepared by a wet oxidation process, has several drawbacks: (1) First, the wet oxidation process involves the wet oxidation of p-type AlGaAs with high Al content, such as Al 0.9 Ga 0.1 As to form AlO x A confinement layer is used to confine charge carriers, but this oxidation reaction process (2AlGaAs + 3H2O → Al2O3 + 2GaAs + 3H2) is usually accompanied by a large volume expansion (Al2O3 is 30% larger in volume than AlGaAs), which increases the stress at the interface between the oxide confinement layer and other materials, thereby causing interface cracks or pinholes in the oxide confinement layer, resulting in increased leakage current. At the same time, this stress condition will accelerate the diffusion of material layer defects under long-term high temperature and high current operation, causing device failure and reducing lifespan. Moreover, the formed oxide confinement layer has poor chemical stability and is extremely prone to moisture absorption, which will gradually degrade in a humid and hot environment, affecting the long-term performance of the device.

[0031] (2) Secondly, wet oxidation is a wet chemical process, which has problems with oxidation rate sensitivity and edge effect. The oxidation depth and width are strongly related to temperature, humidity and Al composition uniformity. The oxide ring width deviation of the same batch of devices can reach ±0.5μm, resulting in threshold current fluctuation of more than 20%. The oxide ring width and depth are difficult to control precisely, resulting in low production yield. The edge effect is that the oxidation rate of the edge region is faster than that of the center region, which makes the oxide holes of the oxide ring form irregular shapes such as "trumpet mouth", thereby aggravating the performance difference between different devices. Based on the oxide ring formed by this wet chemical process, on the one hand, since the "carrier confinement capability" of the oxide confinement layer depends on the precision of the oxide ring, if the oxidation depth is uneven or the ring width is too large, it will cause the carriers to diffuse to the edge (i.e., "current spread"). The carriers diffused to the edge do not reach the active region and undergo non-radiative recombination at the impurities or defects of the p-DBR. The proportion of ineffective current can reach 30%, the slope efficiency (optical power / current) is low and the energy consumption is high, thus affecting the carrier confinement. On the other hand, the transverse confinement of the optical field in oxide-confined VCSELs also depends on the refractive index difference of the oxide rings. However, these irregular oxide rings can lead to competition for higher-order modes and make mode switching more likely. At the same time, the beam divergence angle will be in a large range of 15 to 20°, resulting in low efficiency when coupled with optical fibers. This affects the performance and reliability of the laser and limits the current diverse application requirements.

[0032] Based on this, refer to Figures 1 to 9 This embodiment provides a method for fabricating a vertical-cavity surface-emitting laser. Figure 1 The diagram below illustrates the process of this preparation method, which includes the following steps: Step S101: Provide substrate layer 1.

[0033] For example, substrate 1 can be an n-type GaAs substrate with a crystal orientation of [missing information]. <100> 2° deflection angle, 1×10⁻⁶ Si doping concentration 18 cm -3 Furthermore, it undergoes pretreatment to ensure the cleanliness of substrate layer 1, reduce the dislocation density of the epitaxial structure formed on it, ensure lattice matching of subsequent semiconductor layers, and achieve a dislocation density of less than 10. 4 cm -2 The lattice mismatch between GaAs substrate layer 1 and AlGaAs material layer is less than 0.1%.

[0034] The specific pretreatment process steps include: first, ultrasonically cleaning with acetone and isopropanol for 10 minutes in sequence to remove organic contaminants; then rinsing with deionized water and immersing in 10% HF solution for 30 seconds to remove the natural oxide layer on the surface; then drying with nitrogen; and then placing the substrate layer 1 into the metal-organic chemical vapor deposition (MOCVD) reaction chamber and annealing at 800°C for 10 minutes in H2 atmosphere to further remove residual oxides and adsorbed impurities on the surface.

[0035] Step S102: An epitaxial structure is formed on one side surface of the substrate layer 1. The epitaxial structure is a gallium arsenide-based structure, including a first mirror layer 2, a first confinement layer 3, an active layer 4, a second confinement layer 5, and a second mirror layer 6 stacked together.

[0036] refer to Figure 2 The first reflective layer 2 and the first confinement layer 3 constitute a first semiconductor layer, and the second reflective layer 6 and the second confinement layer 5 constitute a second semiconductor layer. One of the first semiconductor layer and the second semiconductor layer is of n-type conductivity, and the other is of p-type conductivity. This embodiment uses an example where the first semiconductor layer is of n-type conductivity and the second semiconductor layer is of p-type conductivity.

[0037] Each structural layer of the epitaxial structure uses gallium arsenide-based materials. For example, the active layer 4 includes alternating quantum well layers and barrier layers. The quantum well layer can be an indium gallium arsenide (InGaAs) layer, and the barrier layer can be an aluminum gallium arsenide (AlGaAs) layer. Both the first mirror layer 2 and the second mirror layer 6 are distributed Bragg reflector layers (DBR layers). The distributed Bragg reflector layer includes multiple sets of periodically alternating high-refractive-index layers and low-refractive-index layers. The order of the low-refractive-index layers and high-refractive-index layers is specifically determined according to different situations. For example, the high-refractive-index layer can be a gallium arsenide (GaAs) layer or a low-aluminum-content aluminum gallium arsenide layer (such as AlGaAs). 0.3 Ga 0.7 As layer), the low refractive index layer can be an aluminum gallium arsenide layer with a high aluminum content (Al). 0.9 Ga 0.1The first reflector layer 2 and the second reflector layer 6 form a vertical resonant cavity, reflecting unexposed photons back to the active layer 4 for continued stimulated emission. Simultaneously, the second reflector layer 6, located at the top, also serves as a pathway for holes to travel from the top to the active layer 4. The first confinement layer 3 can be a high-aluminum-content gallium arsenide aluminum layer, isolating the first reflector layer 2 from the active layer 4, preventing the high doping of the first reflector layer 2 from affecting the carrier recombination efficiency of the active layer 4. It also acts as a buffer layer for the optical field distribution, ensuring that the active layer 4 is located at the point of maximum optical field intensity, thus improving luminous efficiency. The second confinement layer 5 can be a low-alkaline-content gallium arsenide aluminum layer, isolating the active layer 4 from the second reflector layer 6, and guiding hole injection into the active layer 4. Together with the first confinement layer 3, it forms part of the optical resonant cavity, with a total length that is an integer multiple of half the wavelength, satisfying the condition for enhanced optical interference.

[0038] In step S103, selective arsenic ion implantation is performed on one side of the second reflective mirror layer 6 of the epitaxial structure to form an ion modulation layer 7 that penetrates a portion of the thickness of the second reflective mirror layer 6. The ion modulation layer 7 is annular, and a first light aperture 701 for current injection and light emission is formed inside it. The resistivity of the ion modulation layer 7 is greater than that of the second reflective mirror layer 6, and the refractive index of the ion modulation layer 7 is less than that of the second reflective mirror layer 6.

[0039] refer to Figure 3Selective arsenic ion implantation is performed on the surface of the second mirror layer 6 away from the substrate layer 1, thereby forming an ion modulation layer 7 in the upper part of the second mirror away from the active layer 4. The ion modulation layer 7 is formed in a ring shape and has a higher resistivity than the central region where no ion implantation has been performed. That is, a ring-shaped high-resistivity ion modulation layer 7 is formed in the upper part of the second mirror layer 6, while the central region where the first aperture 701, which has not been implanted with arsenic ions, retains low-resistivity characteristics. Specifically, in this embodiment, the ion modulation layer 7 formed by arsenic ion implantation has advantages such as high resistance, stability, and stress-free performance. First, the arsenic ions in the ion modulation layer 7 belong to the same group as the gallium arsenide-based material in the epitaxial structure, or the second mirror layer 6. In the ion modulation layer 7, the arsenic ions implanted into the outer region of the second mirror layer 6 act as "donor impurities," providing electrons to permanently neutralize the acceptor impurities in the second mirror material. This effectively reduces the hole concentration of the p-type doped material in the original outer region of the second mirror layer 6, significantly increasing the resistivity of this region. Similar "electrical isolation" can be achieved without relying on additional defects, forming a high-resistivity region that is almost non-conductive. Furthermore, after implantation into the second mirror layer 6, arsenic ions can also act as "donor impurities," filling defect traps such as As interstitial atoms and Ga vacancies in the original material, thus forming stable deep-level defects and a stable and reliable high-resistivity region. Second, the lattice constant of the arsenic ions in the second mirror layer 6, such as the gallium arsenide layer, is almost perfectly matched, and they belong to the same group. Therefore, their diffusion coefficient in the second mirror layer 6 is extremely low, less than 1 e^(-1 / 2) at room temperature. -18 cm 2 Therefore, the high-resistivity region formed after arsenic ion implantation into the second mirror layer 6 will not undergo ion diffusion under conditions such as high temperature and high current, further enhancing the high-resistivity stability of the ion modulation layer 7. Furthermore, the ion modulation layer 7 formed by ion implantation is a dry process. On the one hand, there are no differences in process consistency and uniformity, avoiding stress defects and irregularities in the first optical aperture 701 during the forming process of the ion modulation layer 7, which helps improve the device fabrication yield, thereby ensuring efficient carrier confinement and lateral optical field confinement. On the other hand, the ion modulation layer 7 is formed in the portion of the second mirror layer 6 away from the active layer 4, which can form a stable high-resistivity region with deep-level defects in the second mirror layer 6 without damaging the active layer 4 and affecting the optical field. The stable high-resistivity region also means the forming accuracy of the ion modulation layer 7, that is, ensuring the performance and reliability of the first optical aperture 701, the only channel for carrier injection and light output.

[0040] Based on this, a stable and reliable ion modulation layer 7 is obtained. Firstly, its stable high-resistivity characteristics forcibly constrain the carrier path, and the high-resistivity region is less than 1e 14 cm -3The extremely low carrier concentration forms a potential barrier similar to an "insulating wall." Once holes diffuse to the edge, they are blocked by the barrier and cannot obtain enough energy to cross the high-resistivity region. They can only gather in the central first aperture 701 region, causing more than 90% of the injected current to be concentrated above the active layer 4 corresponding to the central first aperture 701. Carriers achieve efficient radiative recombination in the active layer 4, improving the photon generation rate. At the same time, the high-resistivity region effectively restricts the non-radiative recombination of carriers during transmission, which reduces the "leakage current" between the second mirror layer 6 and the active layer 4, further reducing the proportion of ineffective current, and ultimately improving the slope efficiency by at least 10-20%. The optical power output under the same injection current is higher, and the device energy consumption is reduced. In addition, the stable high-resistivity region can also ensure the stability of the effective conductive area of ​​the first aperture 701. The reduction of the effective conductive area directly leads to the reduction of the junction capacitance, thereby effectively improving the modulation bandwidth. For example, compared to the junction capacitance of the oxide confinement layer formed by wet oxidation, the junction capacitance of this embodiment is reduced by at least 30%, and the modulation bandwidth is increased from 15~20GHz to 25~30GHz, meeting the application requirements of high-speed optical communication.

[0041] Secondly, due to the low refractive index of the outer ion modulation layer 7 and the high refractive index of the central first aperture 701, a cylindrical waveguide similar to an optical fiber is formed on the upper layer of the second reflector layer 6. The central region of the first aperture 701 is the first reflector layer 2 without arsenic ion implantation, which has the characteristics of low resistance, high carrier concentration and no obvious defects. Due to the defects such as lattice distortion and local amorphization caused by ion implantation, the outer ion modulation layer 7 has a significantly increased light absorption loss due to the increase in defects. According to optical waveguide theory, the propagation of a light field in a waveguide requires total internal reflection. The distribution characteristics of different light field modes determine whether they can propagate stably in the waveguide. For example, the fundamental mode light field exhibits a Gaussian distribution, with energy concentrated in the central region and a small lateral extension, completely confined to the high-refractive-index region at the center, satisfying the total internal reflection condition and hardly penetrating the surrounding low-refractive-index region. In contrast, the higher-order mode light field distribution is "dumbbell-shaped," with a large lateral extension, inevitably penetrating the surrounding low-refractive-index region. On one hand, the low refractive index of the periphery cannot satisfy the total internal reflection condition, leading to light field leakage; on the other hand, the high defect density of the periphery will rapidly absorb the energy of the higher-order mode, preventing it from obtaining sufficient gain to compensate for losses, ultimately suppressing it. Therefore, the stable ion modulation layer 7 formed by ion implantation opens a dedicated channel for the fundamental mode and simultaneously sets a reliable "loss barrier" for the higher-order mode, thereby achieving single-mode output. Furthermore, under high injection current, a "mode jump" occurs, where the fundamental mode jumps to a higher-order mode. This is because carrier diffusion causes the higher-order mode to gain gain. In this embodiment, the high-resistivity region on the upper layer of the second reflector layer 6 forms an "electrical barrier". Even if the injected current is increased to 30mA, the charge carriers are still strictly confined to the central first optical aperture 701 region. The edge region cannot generate stimulated emission gain due to the lack of charge carrier injection. Higher-order modes decay rapidly due to the lack of gain support and cannot compete with the fundamental mode. That is, the stable and reliable ion modulation layer 7 achieves the synergy of charge carrier confinement and optical field constraint, fundamentally suppressing mode competition and achieving power stability.

[0042] It should be understood that the refractive index waveguide is determined by physical defects and is thermodynamically stable within the operating temperature range (-40~85°C) and current range (1~50mA). Therefore, the stable and reliable ion modulation layer 7 ensures that the transverse Gaussian distribution of the optical field will not be distorted due to changes in external conditions. The overlap between the optical field of the fundamental mode and the active layer 4 is always maintained at more than 90%, and the gain utilization efficiency is much higher than that of higher-order modes with an overlap of less than 50%. Even if the current increases, the gain of the fundamental mode is always higher than the loss, and the output power increases linearly with the current without saturation or jumps.

[0043] In step S104, a contact layer 8 is formed on the side of the epitaxial structure away from the substrate layer 1, and the contact layer 8 covers the second reflective mirror layer 6 and the ion modulation layer 7.

[0044] refer to Figure 4The contact layer 8 can have the same conductivity type as the second reflective mirror layer 6, such as a GaAs layer with a thickness between 95 nm and 100 nm. The process steps for forming the contact layer 8 include: using metal-organic chemical vapor deposition (MOCVD), controlling the growth temperature of the reaction chamber at 650°C and the pressure at 200 Torr, and introducing only trimethylgallium (TMGa) and hydrogen arsine (AsH3) to form the GaAs layer, which also includes diethylberyllium (DEBe) as a dopant source to obtain a beryllium doping concentration of approximately 5 × 10⁻⁶. 18 cm -3 The heavily doped p-type contact layer 8 adapts to the high resistance limitation of the ion modulation layer 7, which helps to eliminate the Schottky barrier at the metal-semiconductor contact, forming a low-resistance ohmic contact, ensuring good contact between the metal electrode and the semiconductor, so that current can bypass the high-resistance region and be injected into the active layer 4 from the region of the first aperture 701.

[0045] In step S105, a first electrode 9 is formed on the side of the contact layer 8 away from the substrate layer 1. The first electrode 9 is electrically connected to the contact layer 8 and is offset from the first optical aperture 701.

[0046] For example, a first electrode 9 is formed on the contact layer 8 using an electroplating process. The first electrode 9 can be made of one or more metals such as Ti / Pt / Au, and serves as an external P-type electrode of the laser. (Refer to...) Figures 7 to 9 The first electrode 9 forms a good ohmic contact with the contact layer 8, thereby enabling the input of electrical excitation to the active layer 4 through the contact layer 8. At the same time, the first electrode 9 should not block the first optical aperture 701 to avoid affecting the laser output.

[0047] In summary, the fabrication method of the vertical-cavity surface-emitting laser in this embodiment involves selectively implanting arsenic ions to form a ring-shaped ion modulation layer 7 within a portion of the thickness of the upper layer of the second reflector layer 6. This results in an ion modulation layer 7 with characteristics such as high resistance, stability, and stress-free operation. On one hand, the stable and reliable high-resistivity region effectively restricts carrier paths, reduces non-radiative recombination, and thus improves effective light output. On the other hand, due to the presence of the stable and reliable ion modulation layer 7, the upper layer of the first reflector, which has a high refractive index in the middle and a low refractive index at the periphery, can effectively and stably suppress higher-order modes while ensuring a reliable reduction in junction capacitance, thereby increasing the modulation bandwidth and ultimately optimizing the optical field. Therefore, by achieving a synergistic effect of carrier confinement and optical field constraint through the stable and reliable ion modulation layer 7, mode competition is fundamentally suppressed, power stability is achieved, and the requirements of high-speed optical communication are met.

[0048] refer to Figures 2 to 9In one embodiment, the first reflective mirror layer 2 is of n-type conductivity, i.e., an n-type DBR layer, comprising multiple sets of periodically alternating high-refractive-index layers and low-refractive-index layers. For example, the high-refractive-index layer is a gallium arsenide layer, and the low-refractive-index layer is an aluminum gallium arsenide layer with a high aluminum content. The refractive index difference between the two is approximately 0.6, which maximizes light reflection. The thickness of each gallium arsenide layer and aluminum gallium arsenide layer is set to λ / 4n, where λ is the laser wavelength and n is the material refractive index, to ensure that the reflected light from each interface is phase-superimposed, forming a high-reflectivity optical mirror. Specifically, the process steps for forming the n-type DBR layer include: using metal-organic chemical vapor deposition (MOCVD), controlling the growth temperature at 700℃ (high temperature helps reduce interface roughness), maintaining a pressure of 200 Torr, and using H2 as the carrier gas; then introducing a group III source (including trimethylgallium TMGa and trimethylaluminum TMAl) and a group V source (arsine AsH3) into the reaction chamber, with silane (SiH4) as the doping source; and controlling the Al composition by adjusting the flow ratio of TMAl and TMGa to obtain the corresponding structural layer. For example, first adjusting the flow ratio of TMAl / TMGa to 9:1 yields an Al composition of 0.9 and a refractive index of approximately 3.0. 0.9 Ga 0.1 As; then TMAl is turned off, and only TMGa is introduced to form a gallium arsenide layer with an Al composition of 0 and a refractive index of approximately 3.6. Low-refractive-index aluminum gallium arsenide layers and high-refractive-index gallium arsenide layers are grown alternately in 25 cycles, with the thickness of each layer strictly controlled to λ / 4n. When the laser wavelength λ is 850nm, Al 0.9 Ga 0.1 The As layer is approximately 70 nm thick, and the GaAs layer is approximately 58 nm thick, with an error of less than 1 nm, forming the n-type doped first reflective mirror layer 2, whose silicon doping concentration is approximately 1 × 10⁻⁶. 18 cm -3 To ensure good conductivity.

[0049] In one embodiment, the first confinement layer 3 is also of n-type conductivity and is located on the side of the n-type DBR layer away from the substrate layer 1. It is suitable for forming the active layer 4. The first confinement layer 3 is used to isolate the active layer 4 from the n-type DBR layer and also assists in optical field confinement. The wide bandgap characteristics of the high-Al composition material can reduce the absorption of photons to the active layer 4, and the low p-type doping can reduce nonradiative recombination of charge carriers. Specifically, the process steps for forming the first confinement layer 3 include: using metal-organic chemical vapor deposition (MOCVD), lowering the temperature of the reaction chamber to 680°C while maintaining the pressure at 200 Torr; then introducing TMAl, TMGa, and AsH3, setting the TMAl / TMGa flow rate ratio to 9:1, to obtain an Al layer with a p-type high-Al composition consistent with the high-Al aluminum gallium arsenide layer of the n-type DBR layer. 0.9 Ga 0.1The As layer serves as the first confinement layer 3, with the doping source being n-type silicon material. The flux is set to 8 sccm, resulting in a silicon doping concentration of approximately 1 × 10⁻⁶. 17 cm -3 The n-type first confinement layer 3 has a thickness ranging from 78 nm to 82 nm.

[0050] In one embodiment, the active layer 4 is disposed on the side of the first confinement layer 3 facing away from the substrate layer 1, and is the core region for laser generation. The active layer 4 in this embodiment has a multi-quantum-well structure, including alternating quantum well layers and barrier layers. The quantum well layers include indium gallium arsenide (InGaAs) layers, and the barrier layers include gallium arsenide (GaAs) layers. Optical gain is generated through carrier recombination. By controlling the well width and In composition to match the laser wavelength, the quantum confinement effect of the quantum well layers quantizes the carrier energy, and only photons with specific energies, such as photons with a wavelength of 850 nm, can be amplified. A thin well width, such as 8 nm, can enhance quantum confinement and improve the gain coefficient. Specifically, the process steps for forming active layer 4 include: using metal-organic chemical vapor deposition (MOCVD), lowering the growth temperature of the reaction chamber to 600°C to suppress In atom diffusion and ensure the interface flatness of the quantum well layer; and reducing the pressure to 100 Torr to reduce gas phase reactions and improve layer thickness uniformity; then introducing trimethylindium (TMIn, In source), TMGa, and AsH3, and adjusting the In composition to 0.15 by controlling the flow rate ratio of TMI / (TMIn+TMGa) to obtain In. 0.15 Ga 0.85 The As layer serves as a quantum well layer with a bandgap corresponding to a wavelength of 850 nm and a width of 8 nm. Subsequently, TMIn is turned off, and only TMGa and AsH3 are introduced to form a GaAs layer with an In composition of 0 as a barrier layer. The thickness of the barrier layer is 15 nm and it is located between the quantum well layers and the outermost layer. In this embodiment, the active layer 4 includes 4 barrier layers and 3 quantum well layers.

[0051] Based on the above scheme, the second confinement layer 5 is of p-type conductivity and is formed on the side of the active layer 4 away from the substrate layer 1. A p-type second reflective mirror layer 6 is formed on top of it. The second confinement layer 5 is located between the active layer 4 and the p-type DBR layer, serving to isolate the active layer 4 from the p-type DBR layer and reduce non-radiative recombination of holes in the p-type DBR. Furthermore, the second confinement layer 5 uses a low-Al content aluminum gallium arsenide layer with a refractive index of approximately 3.3, which is closer to the 3.6 refractive index of the InGaAs quantum well layer in the active layer 4. This effectively reduces interface reflection loss and improves the overlap between the optical field and the active layer 4. Specifically, the process steps for forming the second confinement layer 5 include: using metal-organic chemical vapor deposition (MOCVD), raising the growth temperature of the reaction chamber to 680°C and increasing the pressure to 200 Torr; subsequently introducing TMAl, TMGa, and AsH3, with the TMAl / TMGa flow ratio set to 3:7, to form a low-Al content Al... 0.3 Ga 0.7 As serves as the second confinement layer 5 to reduce photon absorption. In this step, DEBe with a flux of 8 sccm is also introduced, resulting in a doping concentration of approximately 1 × 10⁻⁶ p-type Be ions in the second confinement layer 5. 17 cm -3 The thickness of the second confinement layer 5 ranges from 78 nm to 82 nm and is symmetrical with the first confinement layer 3, ensuring that the light field is symmetrically distributed on both sides of the active layer 4.

[0052] In one embodiment, the p-type second reflector layer 6, i.e., the p-type DBR layer, is formed on the side of the second confinement layer 5 facing away from the substrate layer 1. The p-type DBR layer and the n-type DBR layer are symmetrically arranged about the active layer 4, together forming a closed vertical resonant cavity with a high reflectivity greater than 99%, allowing photons to be reflected back and forth in the active layer 4, continuously gaining gain until laser light is generated. In this embodiment, the p-type DBR layer includes alternating growth of Al with high Al composition. 0.9 Ga 0.1 As layer and low Al composition Al 0.3 Ga 0.7The As layer, consistent with the n-type DBR layer, can be configured with 25 pairs of periods, each layer having a thickness of λ / 4n and an error of less than 1nm. Specifically, the process steps for forming the p-type DBR layer include: using metal-organic chemical vapor deposition (MOCVD), consistent with the n-type DBR layer growth, controlling the growth temperature of the reaction chamber at 700°C, the pressure at 200 Torr, and using H2 as the carrier gas; then, introducing a group III source (including trimethylgallium TMGa and trimethylaluminum TMAl) and a group V source (arsenide AsH3) into the reaction chamber, with DEBe as the doping source at a flow rate of 10 sccm. By adjusting the flow rate ratio of TMAl and TMGa, the Al composition is controlled to alternately obtain aluminum gallium arsenide layers with different refractive indices. For example, adjusting the TMAl / TMGa flow rate ratio to 9:1 yields an Al composition of 0.9 and a refractive index of approximately 3.0. 0.9 Ga 0.1 As layer; by adjusting the flow ratio of TMAl / TMGa to 3:7, an Al composition of 0.3 and a refractive index of approximately 3.3 was obtained. 0.3 Ga 0.7 As layer, the final Be doping concentration is approximately 1×10⁻⁶. 18 cm -3 The p-type DBR layer, composed of alternating layers of materials with different refractive indices, is highly doped to ensure efficient hole transport.

[0053] It should be understood that the junction capacitance of a VCSEL device mainly originates from the heterojunction barrier capacitance between the p-type second reflector layer 6 and the active layer 4. Its magnitude is determined by the formula C = ε*S / d, where ε is the dielectric constant of the material, typically a constant value (approximately 12.9 for AlGaAs / GaAs systems); S is the effective conductive area of ​​the junction region, i.e., the area through which charge carriers can pass; and d is the fixed junction thickness obtained through epitaxial growth, approximately 100-200 nm in this embodiment. In the related oxide-confined VCSEL device, the p-type DBR layer is entirely low-resistivity p-type doped, with a Be doping concentration less than 1e18cm⁻¹. -3Due to significant differences in the ring width and poor reliability of the oxide confinement layer, the effective conductive area S of the junction region is difficult to guarantee, resulting in a high junction capacitance C, typically greater than 10 fF. High-speed modulation above 100 Gb / s usually requires signal switching time much shorter than the RC charging / discharging time constant τ. According to the formula τ = R * C, where R is the series resistance, an excessively large junction capacitance C will increase the charging / discharging time constant τ. Since bandwidth is positively correlated with 1 / τ, an excessively large junction capacitance will limit the modulation bandwidth, thus restricting the application of high-speed modulation. In this embodiment, the ion modulation layer 7 obtained by selective arsenic ion implantation on the surface of the second reflector layer 6, i.e. the p-type DBR layer, has reliable and stable high-resistivity performance due to deep energy level defects and permanent doping compensation. The low-resistivity first optical aperture 701 region in the middle, which has not undergone arsenic ion implantation and has a diameter between 3 and 8 μm, becomes the only channel for carrier injection and light output. At this time, the effective conductive area S has high reliability, equivalent to 1 / 10 to 1 / 20 of the conventional structure. According to the capacitance formula, the reduction of the effective conductive area S directly leads to a reduction of more than 30% in the junction capacitance C, for example, to 5-7 fF. The RC time constant τ is reduced synchronously, and the modulation bandwidth is increased from the conventional 15-20 GHz to 25-30 GHz, effectively meeting the application requirements of high-speed optical communication.

[0054] In other words, this embodiment forms a high-resistivity ion modulation layer 7 through arsenic ion implantation, which effectively reduces junction capacitance, thereby increasing modulation bandwidth and meeting the requirements of high-speed optical communication. Furthermore, the physical shaping method of arsenic ion implantation allows for precise acquisition of the ion modulation layer 7 with the target modulation depth and ring width, eliminating stress problems at their source. Secondly, the formed electrical barrier can forcibly constrain the carrier path, increasing carrier concentration; over 90% of the injected current is confined to the first aperture 701 region in the center, allowing direct injection into the active layer 4. The non-radiative recombination loss in the edge region can also be significantly reduced from 30% to below 5%, resulting in a 10-20% increase in slope efficiency and a reduction in energy consumption of over 15%. Moreover, the uniform refractive index waveguide induced by arsenic ion implantation greatly optimizes the optical field, resulting in a more uniform refractive index distribution. The implanted region, i.e., the ion... Due to lattice defects, the refractive index of the region where the modulation layer 7 is located decreases by 0.5%-1%, which causes the high-refractive-index first aperture 701 region in the middle to form a regular cylindrical waveguide. The optical field is strictly confined to the fundamental mode, the relative intensity noise is significantly improved, and the beam divergence angle is reduced to less than 10°. The coupling efficiency with the single-mode fiber is increased to more than 80%. The single-mode is stable at high power. Even when the injected current reaches 30mA, it can still maintain single-mode output. Compared with the conventional structure, which shows multimode at 15mA and above, this embodiment has a superior optical field mode. It has a performance advantage far superior to conventional oxide-confined VCSEL devices in applications such as data center optical interconnects and automotive lidar.

[0055] In one embodiment, the second reflective layer 6 comprises multiple sets of periodically stacked low-refractive-index layers and high-refractive-index layers; the implantation peak depth of the ion modulation layer 7 is between 1 / 5 and 2 / 5 of the period of the second reflective layer 6.

[0056] Specifically, the first reflector layer 2 and the second reflector layer 6 together constitute a vertical resonant cavity. The p-type DBR layer includes alternating low-refractive-index layers and high-refractive-index layers. The low-refractive-index layer can be an Al with a high Al content. 0.9 Ga 0.1 The As layer, the high refractive index layer can be an Al layer with a low Al composition. 0.3 Ga 0.7 In this embodiment, the As layer has 25 pairs of periods. The 5-10 pairs of periods on the side facing away from the substrate layer 1 (i.e., the top layer) serve as the modification region for subsequent ion implantation, forming the ion modulation layer 7 and the first aperture 701. In other embodiments, the second mirror layer 6 may also include low-refractive-index and high-refractive-index layers with other number of period pairs. However, the modification depth for forming the ion modulation layer 7 should be between 1 / 5 and 2 / 5 of the number of periods, so that the ion modulation layer 7 formed by arsenic ion implantation has the dual characteristics of deep-level defects and doping compensation, forming a long-term stable semi-insulating region in the second mirror layer 6, while avoiding damage to the underlying active layer 4, thus meeting the mass production requirements of long-life products such as automobiles and data centers.

[0057] In one embodiment, step S103, which involves selectively implanting arsenic ions onto one side of the second reflective mirror layer 6 of the epitaxial structure to form an ion modulation layer 7 extending into the second reflective mirror layer 6, includes: In step S1031, a patterned mask is formed on the side surface of the second mirror layer 6 facing away from the substrate layer 1. The patterned mask covers the first region of the second mirror layer 6 and exposes the second region surrounding the first region. The first region is used to form the first light aperture 701, and the second region is used to form the ion modulation layer 7.

[0058] A patterned mask is formed on the surface of the second reflective mirror layer 6 using photolithography. The specific steps include: spin-coating a 1μm thick positive photoresist and pre-baking at 110°C for 90 seconds; placing a high-precision mask with an annular cutout between 3 and 8μm in inner diameter and 20 and 40μm in outer diameter on top of the mask; exposing and developing the unmasked positive photoresist in the annular area at an energy of 80mJ / cm2; retaining the photoresist in the first central area after development, while exposing the second annular area as a window for subsequent arsenic ion implantation; and then baking the retained positive photoresist at 120°C for 30 minutes to enhance its resistance to ion bombardment.

[0059] Positive photoresist can form patterned masks that can withstand high-dose ion implantation, such as greater than 1e. 14ions / cm 2 This helps to improve its thermal stability and mechanical strength.

[0060] In step S1032, arsenic ions are implanted onto the surface of the second mirror layer 6 with a patterned mask to form an initial ion modulation layer 7 in the second region of the second mirror layer 6 exposed by the patterned mask.

[0061] The high-dose arsenic ion implantation on the surface of the second reflector layer 6 is a dry process that is purely physical. It solves the reliability problem related to surface oxidation from the root, without volume change. The arsenic ion implantation only causes lattice atomic collisions with the aluminum gallium arsenide material of the second reflector layer 6 to form lattice defects such as vacancies and interstitial atoms without introducing new phases or generating stress. On the other hand, the arsenic ions act as n-type donors to compensate for p-type doping and form stable deep-level defects. The two work together to change the electrical characteristics, which facilitates the formation of a stable and reliable toroidal high-resistivity region.

[0062] Step S1033: Anneal the initial ion modulation layer 7 to form an annular ion modulation layer 7 with a partial thickness extending into the second reflective mirror layer 6.

[0063] For example, a stable ion modulation layer 7 can be obtained by rapid thermal annealing of the initial ion modulation layer 7. Specifically, this involves using a rapid thermal annealing furnace with nitrogen as the protective gas, a heating rate of 100°C / second, thermal annealing at 450°C for 45 seconds, and then naturally cooling to room temperature to obtain the ion modulation layer 7. Rapid thermal annealing repairs some lattice damage, preventing excessive material degradation, while retaining sufficient deep-level traps (such as As-Ga antisite defects). These traps capture holes in the p-type material, further increasing the resistivity to greater than 1 eΩ. 6 Ω·cm; the annealing temperature of 450°C is the equilibrium point. Below 400°C, it is easy to cause insufficient defect repair, that is, excessive material damage. Above 500°C, the defects are annihilated and the resistivity decreases.

[0064] Step S1034: Remove the graphical mask. The graphical mask can be removed using physical or chemical methods, which will not be elaborated upon here.

[0065] In summary, the arsenic ion implantation process used in this embodiment to form the ion modulation layer 7 is a purely physical process involving ion bombardment and thermal annealing. Ion implantation is a dry process, avoiding liquid chemical reagents and thus preventing contamination from impurities such as metal ions during oxidation. This results in higher interface cleanliness. Furthermore, the electrical properties are altered solely through lattice defects and doping compensation, resulting in a high-resistance, stable, stress-free, and highly reliable ion modulation layer 7. The deep-level traps preserved by the annealing process are thermodynamically stable at device operating temperatures, such as -40% to 85°C, and do not diffuse over time like oxide layer defects, demonstrating strong process compatibility. Actual testing shows that VCSEL devices using this physical modification process of arsenic ion implantation and annealing to form the ion modulation layer 7 can achieve a lifetime exceeding 10 years. 6 The lifespan is more than twice that of traditional oxide-limited VCSEL devices, making it particularly suitable for long-life applications such as lidar and data centers.

[0066] In one embodiment, the ion source for the arsenic ion implantation is a monovalent arsenic ion source with an energy of 100 keV and a dose of 2 × 10⁻⁶. 15 ions / cm 2 The injection angle is 7° for inclined injection.

[0067] In an ion source, arsenic atoms (As) lose an outer electron through electron bombardment or plasma ionization, forming an ion with one unit of positive charge, namely a monovalent arsenic ion (As). + Select As + Instead of higher valence ions such as As 2+ This is because: monovalent arsenic ions are more easily and stably generated in the ion source, resulting in higher beam current intensity and improved mass production efficiency; under the same accelerating voltage, As... + The kinetic energy and mass are better matched, and the implantation depth can be precisely controlled to ensure that the peak is located on the upper layer of the p-type DBR layer; the lower the charge state, the milder the Coulomb interaction with lattice atoms during the implantation process, which can reduce excessive surface damage and balance the requirement of "room temperature implantation to enhance lattice damage".

[0068] As + After implantation of the p-type DBR layer, in addition to forming defects through lattice collisions, its positive charge characteristics will also generate a charge compensation effect with p-type dopants, such as beryllium cations. + As a donor impurity, it provides electrons to neutralize Be. + The provided holes further enhance the high-resistivity characteristics of the p-type DBR layer, thus forming a semi-insulating ion modulation layer 7, which is one of the key mechanisms for achieving carrier confinement.

[0069] In this embodiment, arsenic belongs to the same group as GaAs-based semiconductors, possessing both "donor doping compensation" and "low diffusion." The dopant in the p-type DBR layer is beryllium, an acceptor impurity used to provide holes for low resistivity. Arsenic, being a group V element of GaAs, readily exists as a "donor impurity" in GaAs / AlGaAs. After arsenic ion implantation, the free electrons it provides will charge-compensate with the holes provided by beryllium, resulting in electroneutrality. This directly reduces the hole carrier concentration in the p-type DBR layer, thereby lowering the resistivity from 1 eΩ. -3 The low resistance of Ω·cm is increased to 1e 6 The high resistance (above Ω·cm) allows for electrical isolation without relying on additional defects. Furthermore, the arsenic ion almost perfectly matches the lattice constant of GaAs (5.653 Å), and as a member of the same group, its diffusion coefficient in GaAs is extremely low, less than 1 eΩ at room temperature. -18 cm 2 / s, the high-resistivity region formed after implantation will not undergo ion diffusion due to long-term operation at high temperature and high current, effectively avoiding degradation of high-resistivity characteristics caused by moisture absorption and diffusion, which is why the device lifetime exceeds 10 6 The key is the atomic weight. Furthermore, the moderate atomic weight of arsenic ions allows for precise control of lattice defects in the p-type DBR layer without damaging the active layer 4. The degree of damage caused by ion implantation is positively correlated with the atomic weight of the ions; the larger the atomic weight, the higher the energy of collisions with lattice atoms, and the more significant the defects. Arsenic ions with an atomic weight of 75 are in the optimal range of "effectively forming defects and not causing excessive damage." Such arsenic ions can achieve their projected range in AlGaAs at an energy of 100 keV, precisely located in the 5th to 10th periods of the upper layer of the p-type DBR layer, with a thickness range of approximately 80 to 150 nm. For example, an implantation depth of approximately 100 nm will not penetrate the p-type DBR layer into the underlying active layer 4. If ions with smaller atomic weights are chosen, such as P31 ions... + At the same energy, the range would increase to 180 nm, potentially damaging the active layer 4; if a larger atomic weight ion is chosen, such as Sb with an atomic weight of 122... + Its range is only 60nm, which is insufficient to cover the thickness requirements of the high-resistivity region in the p-type DBR layer.

[0070] Regarding other doped ions, such as hydrogen ions (H+) + Phosphate ions (P) + Boron ions (B) + ), antimony ions (Sb) + The modification effect of hydrogen ion implantation depends entirely on "temporary defects". + Shallow-level traps formed by collisions can only temporarily capture charge carriers, and H + It is easily diffused and easily associated with Be. +The formation of unstable complexes leads to the failure of high-resistivity properties at high temperatures; however, arsenic ion implantation achieves long-term stability in the high-resistivity region through a dual mechanism of "doping compensation (permanent charge neutralization) and deep-level traps (stability defects)." Furthermore, its atomic weight is adapted to the thickness of the p-type DBR layer, without damaging the active layer 4. Therefore, H... + Injection is only suitable for short-term, low-temperature scenarios, such as temporary electrical isolation, while As + Injection can meet the mass production requirements of VCSELs, especially for long-life applications such as automotive and data centers.

[0071] Besides H + Commonly used ions in semiconductor processes also include (P... + ), (B + ), (Sb + However, none of these methods are applicable to the modification of the p-type DBR layer in VCSELs. For P with an atomic weight of 31... + Although it is a group V donor impurity, which can achieve doping compensation, its small atomic weight leads to an excessively long range, approximately 180 nm in AlGaAs at 100 keV. This range easily penetrates the p-type DBR layer into the active layer 4, resulting in increased non-radiative recombination in the quantum well layer and a threshold current increase of over 50%. For boron with an atomic weight of 11... + It is a group III acceptor impurity. After implantation, it increases the hole concentration of the p-type DBR layer, which in turn reduces the resistivity, for example, from 1e -3 Ω·cm decreased to 1e -4 Ω·cm, completely contradicting the goal of high resistivity. For Sb with an atomic weight of 122... + Although it has a large atomic weight and a short range, approximately 60 nm at 100 keV, Sb + Sb has a high lattice mismatch with GaAs. + The lattice constant of H is 5.87 Å, while that of GaAs is 5.65 Å. After implantation, dislocation defects are easily formed, leading to increased optical absorption loss in the p-type DBR layer. For example, the absorbance increases from 1% to 5%, resulting in a 20% decrease in device output power. Therefore, monovalent arsenic ions are the optimal solution for modifying the p-type DBR layer in VCSEL devices. The three major characteristics of arsenic ions—homogeneous donor doping, moderate atomic weight, and low diffusivity—perfectly match the core requirements of "forming a stable high-resistivity region, protecting the active region, and being compatible with mass production." Compared to H... + Its high-resistivity region stability is improved by more than 10 times, and there is no damage to the active layer 4; compared with P + / B + / Sb + Its range is precisely controllable and it does not introduce additional charge carriers or lattice mismatch defects.

[0072] In addition, 7° tilted implantation can reduce ion channel effects and prevent ions from penetrating too deeply along the crystal direction. Room temperature implantation helps to enhance lattice damage and promote amorphization.

[0073] refer to Figure 5 In one embodiment, after step S104 of forming the contact layer 8 on the side of the epitaxial structure opposite to the substrate layer 1, and before step S105 of forming the first electrode 9 on the side of the contact layer 8 opposite to the substrate layer 1, the method further includes: A passivation layer 10 is formed on the side of the contact layer 8 facing away from the substrate layer 1. The passivation layer 10 is disposed corresponding to the ion modulation layer 7. The passivation layer 10 has a first opening 1001 and a second opening 1002. The first opening 1001 corresponds to the first light hole 701, and the second opening 1002 exposes a portion of the contact layer 8 located on the ion modulation layer 7.

[0074] Specifically, exemplarily, the passivation layer 10 can be a low-stress silicon nitride layer, firstly formed on the contact layer 8 by plasma-enhanced chemical vapor deposition; then, the silicon nitride layer above the first aperture 701 and part of the silicon nitride layer on the ion modulation layer 7 are removed by a dry etching process, forming a first opening 1001 and a second opening 1002. The first opening 1001 corresponds vertically to the first aperture 701, and the second opening 1002 corresponds to part of the ion modulation layer 7. Metal material is deposited within the second opening 1002 to achieve electrical conductivity between the first electrode 9 and the contact layer 8. By controlling the thickness of the passivation layer 10, the refractive index can be changed to adjust the optical properties, while also protecting the device from oxidation caused by reaction with air.

[0075] A seed gold layer 11 is formed in the second opening 1002, and the first electrode 9 is disposed on the passivation layer 10 and is electrically connected to the contact layer 8 through the seed gold layer 11.

[0076] For example, such as Figure 5 As shown, a seed gold layer 11 can be formed in the second opening 1002 using a magnetron sputtering process. The seed gold layer 11 is made of gold, a metallic material, which achieves excellent conductivity between the first electrode 9 and the contact layer 8, which helps to introduce external current and improve the reliability of metal contact.

[0077] refer to Figure 6 In one embodiment, after the seed gold layer 11 is formed in the first opening 1001 and before the first electrode 9 is formed on the side of the contact layer 8 away from the substrate layer 1, the method further includes: forming a dielectric layer 12 on the surface of the passivation layer 10 away from the substrate layer 1, wherein the dielectric layer 12 is offset from the seed gold layer 11.

[0078] For example, the dielectric layer 12 may be a benzocyclobutene (BCB) material, filling a portion between the first electrode 9 and the passivation layer 10 to reduce the parasitic parameters of the device itself. The dielectric layer 12 is offset from the seed gold layer 11 to avoid affecting the current injection from the first electrode 9 to the seed gold layer 11 and then to the contact layer 8.

[0079] refer to Figure 9 In one embodiment, after the first electrode 9 is formed on the side of the contact layer 8 away from the substrate layer 1, the method further includes: forming a protective layer 13 on the side of the first electrode 9 away from the substrate layer 1, the protective layer 13 covering the first electrode 9 and extending peripherally to cover the sidewall of the epitaxial structure and the surface of the substrate layer 1, the protective layer 13 forming a first window 1301 exposing a portion of the first electrode 9, the first window 1301 being correspondingly disposed with respect to the dielectric layer 12.

[0080] For example, the protective layer 13 can be formed using atomic layer deposition (ALD) process. The protective layer 13 can be made of alumina material to protect the inside of the device from moisture corrosion and improve the reliability of the device.

[0081] refer to Figures 7 to 9 In one embodiment, after the first electrode 9 is formed on the side of the contact layer 8 away from the substrate layer 1, and before the protective layer 13 is formed on the side of the first electrode 9 away from the substrate layer 1, the method further includes: forming a second electrode 14 on the surface of the substrate layer 1 on which the epitaxial structure is formed, and / or forming a third electrode 15 on the surface of the substrate layer 1 on the surface of the substrate layer 1 away from the epitaxial structure; the protective layer 13 also covers the second electrode 14 and forms a second window 1302 exposing a portion of the second electrode 14.

[0082] Specifically, a p-type first electrode 9 can be formed on the light-emitting side using a vapor deposition process, and an n-type second electrode 14 can be formed on other areas of the surface of the substrate layer 1 having the first electrode 9. Alternatively, a back metal can be formed on the other side of the substrate layer 1 as an n-type third electrode 15. Figure 8 As shown, this helps lasers adapt to different packaging scenarios in applications and improves the compatibility of lasers in applications.

[0083] In one embodiment, the final step also includes rapid thermal annealing of the entire device to improve reliability.

[0084] refer to Figures 2 to 9This embodiment also provides a vertical-cavity surface-emitting laser (VCSEL), fabricated using the above-described method for manufacturing a VCSEL, comprising: a substrate layer 1, an epitaxial structure, an ion modulation layer 7, a contact layer 8, and a first electrode 9. The epitaxial structure is formed on one side surface of the substrate layer 1. The epitaxial structure is a gallium arsenide-based structure, including a first mirror layer 2, a first confinement layer 3, an active layer 4, a second confinement layer 5, and a second mirror layer 6 stacked together. The ion modulation layer 7 is formed on the side of the second mirror layer 6 facing away from the substrate layer 1, encompassing... The structure includes an annular arsenic ion layer, within which a first optical aperture 701 for current injection and light emission is formed. The resistivity of the ion modulation layer 7 is greater than that of the second reflector layer 6, and the refractive index of the ion modulation layer 7 is less than that of the second reflector layer 6. A contact layer 8 is disposed on the side of the epitaxial structure away from the substrate layer 1, and the contact layer 8 covers the second reflector layer 6 and the ion modulation layer 7. A first electrode 9 is disposed on the side of the contact layer 8 away from the substrate layer 1, and the first electrode 9 is electrically connected to the contact layer 8 and is offset from the first optical aperture 701.

[0085] The vertical-cavity surface-emitting laser of this embodiment has a ring-shaped ion modulation layer 7, formed by selective arsenic ion implantation, extending into a portion of the thickness of the second mirror layer 6, on the upper layer of the second mirror layer 6, which is relatively close to the light-emitting side of the device. This ring-shaped ion modulation layer 7 possesses characteristics such as high resistance, stability, and stress-free performance. On one hand, the stable and reliable high-resistivity region effectively restricts carrier paths, reduces non-radiative recombination, and thus improves effective light output. On the other hand, due to the presence of the stable and reliable ion modulation layer 7, the upper layer of the first mirror, with its high refractive index in the middle and low refractive index at the periphery, can effectively and stably suppress higher-order modes while ensuring a reliable reduction in junction capacitance, thereby increasing the modulation bandwidth and ultimately achieving optical field optimization. Therefore, by achieving synergy between carrier confinement and optical field constraint through the stable and reliable ion modulation layer 7, mode competition is fundamentally suppressed, power stability is achieved, and the requirements of high-speed optical communication are met.

[0086] refer to Figure 9In one embodiment, the aforementioned vertical-cavity surface-emitting laser further includes: a passivation layer 10, a seed gold layer 11, a dielectric layer 12, a protective layer 13, a second electrode 14, and / or a third electrode 15. The passivation layer 10 is formed on the side surface of the contact layer 8 facing away from the substrate layer 1. The passivation layer 10 covers at least a portion of the ion modulation layer 7 and has a first opening 1001 and a second opening 1002. The first opening 1001 corresponds to the first aperture 701, and the second opening 1002 exposes a portion of the contact layer 8 located on the ion modulation layer 7. The seed gold layer 11 is formed in the first opening 1001. The first electrode 9 is disposed on the passivation layer 10 and is electrically connected to the contact layer 8 through the seed gold layer 11. A dielectric layer 12 is formed between the passivation layer 10 and the first electrode 9, and the dielectric layer 12 and the seed gold layer 11 are misaligned. A protective layer 13 is formed on the side of the first electrode 9 away from the substrate layer 1. The protective layer 13 covers the first electrode 9 and extends to the periphery to cover the sidewall of the epitaxial structure and the surface of the substrate layer 1. The protective layer 13 forms a first window 1301 that exposes a portion of the first electrode 9. The first window 1301 is correspondingly disposed with the dielectric layer 12. A second electrode 14 is formed on the side surface of the substrate layer 1 where the epitaxial structure is formed. A third electrode 15 is formed on the side surface of the substrate layer 1 away from the substrate layer 1. The protective layer 13 also covers the second electrode 14 and forms a second window 1302 that exposes a portion of the second electrode 14.

[0087] Specifically, the passivation layer 10 is disposed on the contact layer 8, having a first opening 1001 corresponding to the first optical aperture 701 and a second opening 1002 corresponding to a portion of the ion modulation layer 7. The first opening 1001 prevents light output from being blocked, and the second opening 1002 is used to connect the electrode to the contact layer 8. The passivation layer 10 changes the refractive index by controlling the film thickness, thereby adjusting the optical properties and protecting the device from oxidation caused by air reaction. The seed gold layer 11 is formed within the second opening 1002 of the passivation layer 10. It can be made of gold, a metallic material, to achieve excellent conductivity between the first electrode 9 and the contact layer 8, facilitating external current introduction and improving the reliability of metal contact. The dielectric layer 12 fills a portion of the space between the first electrode 9 and the passivation layer 10, reducing the parasitic parameters of the device itself. It is offset from the seed gold layer 11 to avoid affecting the current injection from the first electrode 9 to the seed gold layer 11 and then to the contact layer 8. The protective layer 13 can be made of weather-resistant alumina and is disposed on the outermost side of the device to protect the internal components from moisture corrosion and improve device reliability. Forming an n-type second electrode 14 in other areas on one side surface of the substrate 1 where the first electrode 9 is located, or forming a back metal on the other side of the substrate 1 as an n-type third electrode 15, helps the laser adapt to different packaging scenarios in applications and improves the compatibility of the laser in applications.

[0088] Further functional descriptions of the above structures are the same as those of the corresponding embodiments described above, and will not be repeated here.

[0089] Although embodiments of the invention have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the invention, and such modifications and variations all fall within the scope defined by the appended claims.

Claims

1. A method for fabricating a vertical-cavity surface-emitting laser, characterized in that, include: Provide a substrate layer; An epitaxial structure is formed on one side surface of the substrate layer. The epitaxial structure is a gallium arsenide-based structure, including a first mirror layer, a first confinement layer, an active layer, a second confinement layer, and a second mirror layer stacked together. The second mirror layer includes multiple sets of periodically stacked low-refractive-index layers and high-refractive-index layers. Selective arsenic ion implantation is performed on one side of the second reflective layer of the epitaxial structure to form an ion modulation layer that penetrates a portion of the thickness of the second reflective layer. The peak implantation depth of the ion modulation layer is between 1 / 5 and 2 / 5 of the period of the second reflective layer. The ion modulation layer is annular, and a first light aperture for current injection and light emission is formed inside it. The resistivity of the ion modulation layer is greater than that of the second reflective layer, and the refractive index of the ion modulation layer is less than that of the second reflective layer. A contact layer is formed on the side of the epitaxial structure opposite to the substrate layer, and the contact layer covers the second mirror layer and the ion modulation layer; A first electrode is formed on the side of the contact layer opposite to the substrate layer. The first electrode is electrically connected to the contact layer and is misaligned with the first optical aperture.

2. The method for fabricating a vertical-cavity surface-emitting laser according to claim 1, characterized in that, The selective arsenic ion implantation on one side of the second reflective mirror layer of the epitaxial structure to form an ion modulation layer penetrating deep into the second reflective mirror layer includes: A patterned mask is formed on the side surface of the second mirror layer facing away from the substrate layer. The patterned mask covers a first region of the second mirror layer and exposes a second region surrounding the first region. The first region is used to form a first aperture, and the second region is used to form an ion modulation layer. Arsenic ion implantation is performed on the surface of the second mirror layer having the patterned mask to form an initial ion modulation layer in the second region of the second mirror layer exposed by the patterned mask. The initial ion modulation layer is annealed to form an annular ion modulation layer with a partial thickness extending into the second mirror layer; Remove the graphical mask.

3. The method for fabricating a vertical-cavity surface-emitting laser according to claim 2, characterized in that, The arsenic ion implantation uses a monovalent arsenic ion source with an energy of 100 keV and a dose of 2 × 10⁻⁶. 15 ions / cm 2 The injection angle is 7° for inclined injection.

4. The method for fabricating a vertical-cavity surface-emitting laser according to any one of claims 1-3, characterized in that, After forming a contact layer on the side of the epitaxial structure opposite to the substrate layer, and before forming a first electrode on the side of the contact layer opposite to the substrate layer, the method further includes: A passivation layer is formed on the side of the contact layer facing away from the substrate layer. The passivation layer is disposed correspondingly to the ion modulation layer. The passivation layer has a first opening and a second opening. The first opening corresponds to the first optical aperture, and the second opening exposes a portion of the contact layer located on the ion modulation layer. A seed gold layer is formed in the second opening, and the first electrode is disposed on the passivation layer and electrically connected to the contact layer through the seed gold layer.

5. The method for fabricating a vertical-cavity surface-emitting laser according to claim 4, characterized in that, After forming a seed gold layer in the first opening and before forming a first electrode on the side of the contact layer opposite to the substrate layer, the method further includes: A dielectric layer is formed on the side of the passivation layer opposite to the substrate layer, and the dielectric layer is offset from the seed gold layer.

6. The method for fabricating a vertical-cavity surface-emitting laser according to claim 5, characterized in that, After forming the first electrode on the side of the contact layer opposite to the substrate layer, the method further includes: A protective layer is formed on the side of the first electrode away from the substrate layer. The protective layer covers the first electrode and extends peripherally to cover the sidewall of the epitaxial structure and the surface of the substrate layer. The protective layer forms a first window that exposes a portion of the first electrode. The first window is disposed corresponding to the dielectric layer.

7. The method for fabricating a vertical-cavity surface-emitting laser according to claim 6, characterized in that, After the first electrode is formed on the side of the contact layer opposite to the substrate layer, and before the protective layer is formed on the side of the first electrode opposite to the substrate layer, the method further includes: A second electrode is formed on one side surface of the substrate layer where the epitaxial structure is formed, and / or a third electrode is formed on one side surface of the substrate layer away from the epitaxial structure; the protective layer also covers the second electrode and forms a second window exposing a portion of the second electrode.

8. A vertical-cavity surface-emitting laser, fabricated using the method for fabricating a vertical-cavity surface-emitting laser according to any one of claims 1-7, characterized in that, include: Substrate layer; An epitaxial structure is formed on one side surface of the substrate layer. The gallium arsenide-based epitaxial structure includes a first mirror layer, a first confinement layer, an active layer, a second confinement layer, and a second mirror layer stacked together. The second mirror layer includes multiple sets of periodically stacked low-refractive-index layers and high-refractive-index layers. An ion modulation layer is formed on the side of the second mirror layer facing away from the substrate layer. The injection peak depth of the ion modulation layer is between 1 / 5 and 2 / 5 of the period of the second mirror layer. The ion modulation layer includes a ring-shaped arsenic ion layer with a first light aperture formed inside for current injection and light emission. The resistivity of the ion modulation layer is greater than that of the second mirror layer, and the refractive index of the ion modulation layer is less than that of the second mirror layer. A contact layer is disposed on the side of the epitaxial structure opposite to the substrate layer, and the contact layer covers the second reflective mirror layer and the ion modulation layer; A first electrode is disposed on the side of the contact layer away from the substrate layer. The first electrode is electrically connected to the contact layer and is misaligned with the first optical aperture.

9. The vertical-cavity surface-emitting laser according to claim 8, characterized in that, Also includes: A passivation layer is formed on the side surface of the contact layer facing away from the substrate layer. The passivation layer covers at least a portion of the ion modulation layer and has a first opening and a second opening. The first opening corresponds to the first optical aperture, and the second opening exposes a portion of the contact layer located on the ion modulation layer. A seed gold layer is formed in the first opening, and the first electrode is disposed on the passivation layer and is electrically connected to the contact layer through the seed gold layer; A dielectric layer is formed between the passivation layer and the first electrode, and the dielectric layer is offset from the seed gold layer; A protective layer is formed on the side of the first electrode away from the substrate layer. The protective layer covers the first electrode and extends peripherally to cover the sidewall of the epitaxial structure and the surface of the substrate layer. The protective layer forms a first window that exposes a portion of the first electrode. The first window is disposed corresponding to the dielectric layer. A second electrode and / or a third electrode, wherein the second electrode is formed on the side surface of the substrate on which the epitaxial structure is formed, and the third electrode is formed on the side surface of the substrate opposite to the epitaxial structure, and the protective layer further covers the second electrode and forms a second window exposing a portion of the second electrode.

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