Method for effectively simulating general quantum computing based on classical circuit network

Abstract

The invention discloses a method for effectively simulating general quantum computing based on a classical circuit network, and relates to the technical field of quantum computing simulation, and the method comprises the following specific steps: converting data into a voltage signal through input voltage coding, constructing a single-bit gate and a two-bit gate by using an operational amplifier and an analog multiplier, and constructing a single-bit gate and a two-bit gate; according to the invention, the general quantum computation is simulated by a classical circuit network, an n-bit unitary matrix is decomposed and reconstructed by means of input voltage coding quantum state and voucher / two-bit gate modular design, and the high-efficiency simulation of general quantum computation is realized. Quantum gate linear transformation is reproduced, quantum calculation universality is achieved, voltage signals and data are converted through a reflection formula, signal distortion is avoided, multi-level gate circuit cascading is supported, and a flexible and stable platform is provided for quantum algorithm verification and the like.

Description

Technical Field

[0001] This invention relates to the field of quantum computing simulation technology, specifically to a method for effectively simulating universal quantum computing based on classical circuit networks. Background Technology

[0002] With the rapid development of quantum computing technology, the research and development of general-purpose quantum computers has become the focus of global technological competition. Quantum computing, through the superposition and entanglement properties of qubits, can efficiently solve complex problems that are difficult to handle by classical computing, such as cryptanalysis, drug design, and algorithm optimization. However, quantum hardware is still in the early stages of development, and the control stability of physical qubits, the fidelity of quantum gates, and the ability to integrate them on a large scale face technical bottlenecks. Against this backdrop, simulating the quantum computing process through classical circuit networks has become an important means of verifying the feasibility of quantum algorithms and optimizing quantum circuit design. This technical approach can not only reduce the dependence on quantum hardware, but also provide a low-cost experimental platform for the research and development of quantum-classical hybrid computing architectures, and promote the transformation of quantum computing from theory to practical applications.

[0003] The patent application No. 202510277502.7, entitled "A Time Series Prediction Method, Storage Medium, and Electronic Device Based on Periodic Quantum Machine Learning Networks," demonstrates advantages in capturing and generalizing periodic features in time series prediction by leveraging techniques such as periodic quantum block modules, quantum state encoding, and measurement. However, this method is fundamentally dependent on quantum computing architecture, requiring the construction of dedicated quantum modules including rotation gates (RX) and controlled gates (CONT). Furthermore, data processing necessitates specific quantum operations such as quantum state preparation and quantum measurement, making it highly dependent on quantum hardware. This makes it difficult to implement in scenarios lacking dedicated quantum computing platforms. Additionally, its data preprocessing requires adapting the quantum network through reversible instance normalization (RevIN) and linear transformation, followed by converting the quantum states back to classical data. The overall process is complex, with each step designed around the characteristics of quantum computing, resulting in high operational barriers. It fails to meet the need for simulating quantum computing without quantum hardware and is also difficult to adapt to general quantum computing simulation scenarios, limiting its applicability to the field of time series prediction. Summary of the Invention

[0004] The purpose of this invention is to overcome the shortcomings of existing technologies and provide a method for effectively simulating universal quantum computing based on classical circuit networks. By encoding the input voltage, the quantum state is converted into a voltage signal. Using modular circuit design with single-bit and two-bit gates, the linear transformation and entanglement operation of quantum gates are reproduced. This method breaks through the dependence of traditional simulation technology on discretization processing, supports multi-level gate circuit cascade and n-bit universal computing, and ensures the unitarity of the transformation through rigorous mathematical verification.

[0005] To solve the above-mentioned technical problems, the present invention provides the following technical solution: a method for effectively simulating universal quantum computing based on classical circuit networks, the specific steps of which are as follows:

[0006] Input voltage encoding: The input data is preprocessed and converted into the energy amplitude and initial phase of the voltage signal through a mapping algorithm. Then, the complex amplitude encoding formula is used to generate four voltage signals corresponding to each circuit bit: the real part of the ground state, the imaginary part, and the real part of the excited state, and the fundamental period is recorded.

[0007] Single-bit gate construction: Four analog adder modules are built using operational amplifiers and resistors. The resistor values ​​are determined according to the preset voltage transformation rules. After the voltage signal is connected, the transformed signal is obtained. The transformation matrix corresponding to the voltage transformation is constructed. The unitarity of the voltage transformation is verified through matrix operations.

[0008] Two-bit gate construction: A basic CZ module containing two analog addition modules and four analog multiplication modules is built using an analog multiplier. The output gain of the multiplication module is set, the control and target bits are selected, and the voltage after the target bit transformation is calculated by the two-bit cross-modulation voltage transformation formula. The complex voltage signal is obtained by substituting it into the synthesis formula and separating the real and imaginary parts.

[0009] Constructing a general computing circuit: Determine the n-bit unitary matrix corresponding to the target computation, and decompose the target matrix into a combination of single-bit gates and two-bit gates. The existence and feasibility of this decomposition method have been proven in detail in quantum computing. Since its proof is purely mathematical, this decomposition method is also applicable to the single-bit gates and two-bit gates in this circuit design. According to the unitary matrix decomposition formula, connect the single-bit gates and two-bit gates in series and parallel to form an n-bit general computing circuit.

[0010] Calculation and Result Output: The input voltage signal is connected to an n-bit general-purpose computing circuit. After the output stabilizes, the signal is acquired and then converted into output data through an inverse mapping formula, which serves as the final calculation result.

[0011] Furthermore, in the input voltage encoding, the expression for the mapping algorithm is: Let the n-bit system... The input data are respectively arrive ,but In A and B, the first subscript k is the circuit bit number, which is a positive integer, and w is the data number. and Take respectively The real and imaginary parts of .

[0012] Furthermore, in the input voltage encoding, the expression for the amplitude encoding formula is: ,in, For the k-th circuit bit in the s-th state Voltage signals of dimension Let t be the fundamental angular frequency of the voltage signal, and t be the time variable. It is the circuit bit number, a positive integer, where s can take the value 0 or 1, and is the status indicator of the circuit bit. Re or Im can be used, which are the dimension identifiers of the voltage signal.

[0013] Furthermore, in the construction of the single-bit gate, the specific steps for constructing the transformation matrix corresponding to the voltage transformation are as follows: Determine the dimension and row / column meaning of the transformation matrix. The transformation matrix is ​​a 4×4 matrix, where each row corresponds to one of the four input voltage signals of the single-circuit bit gate, and each column corresponds to one of the four output voltage signals of the single-circuit bit gate; Analyze the correlation between each input voltage signal and the output voltage signal in the preset voltage transformation rules, and determine the influence weight and action mode of each input voltage signal on different output voltage signals; Based on the correlation and influence weight, determine the basis for the value of each element in the 4×4 matrix, and clarify the input and output voltage signals corresponding to the matrix elements at different row and column intersection positions. The mapping logic is as follows: Following row and column order, the values ​​of each element are converted into specific numerical values ​​and filled into the corresponding positions of a 4×4 matrix to form an initial voltage transformation matrix. The values ​​of the elements in the initial matrix are verified against the preset voltage transformation rules to ensure that the transformation logic represented by the matrix is ​​completely consistent with the preset voltage transformation rules. If there are inconsistencies, the values ​​of the corresponding matrix elements are adjusted until they are consistent, ultimately obtaining the complete voltage transformation matrix. This ultimately enables arbitrary linear transformation of four input voltage signals. This corresponds to the ability of a quantum single-bit gate to realize arbitrary linear transformation of four physical quantities: the real part of quantum state 0, the imaginary part of quantum state 0, the real part of quantum state 1, and the imaginary part of quantum state 1.

[0014] Furthermore, in the construction of the two-bit gate, the expression for the two-bit cross-modulation voltage transformation formula is: ,in, For bits The s-th state Voltage signal after dimensional transformation , The coupling coefficient is... The target bit No. State of The original voltage signal of dimension, It is a bit No. State of The original voltage signal of dimension, It is a dimensional identifier for the voltage signal. It is the dimension identifier opposite to Γ. If Γ is the real dimension Re, then... If Γ is the imaginary dimension Im, then... Let Re be the real part dimension. and is the fixed input voltage of the two-bit gate, and l is the gate number. It is a state identifier for the circuit bit, taking the value 0 or 1. Although it is called a two-bit gate, and its output also realizes the correspondence of a quantum two-bit gate, the two-bit gate in this circuit will act on all the circuit bits. Its characteristic is that there are two special bits, which are denoted as control bits. Bit and target bit Two qubits have different coupling coefficients, while the coupling coefficients of all other qubits are the same. Based on this design, the two-qubit gate of this circuit can correspond to the quantum gate in a quantum system. To control bits, A two-bit gate with a target bit.

[0015] The output voltage signals of the single-bit and two-bit gates in the circuit have the exact same mathematical structure as their input voltage signals. Therefore, the output voltage signal of the previous gate can be used as the input voltage signal of the next gate. Thus, the series-parallel combination of gates is feasible. The series-parallel structure of the gates used to achieve n-bit universal computing by combining single-bit and two-bit gates completely corresponds to the series-parallel structure of single-bit and two-bit quantum gates required for n-bit universal quantum computing. The mathematical proof has been given in detail in quantum computing. Therefore, as long as the gates and quantum gates have the same mathematical description, a universal computing system can be constructed in the same way.

[0016] Furthermore, in the calculation and result output, the expression for the inverse mapping formula between the voltage signal and the output data is as follows: Where T is the fundamental period and W is the number of frequencies contained in the output voltage. It is the fundamental angular frequency of the voltage signal. and These are different output voltage signals, where i is the imaginary unit. These are the bit numbers in the circuit, which are positive integers from 1 to n. This is the state identifier of the k-th circuit bit. Re and Im are dimension identifiers, representing the transformation that the inverse mapping process will perform on the voltage signal. It is a time variable, symbol This represents continuous convolution operations, which is the calculation of... , arrive The convolution of these n functions, Let m be the m-th output data, and Depends on The value of .

[0017] Compared with existing technologies, this method for effectively simulating universal quantum computing based on classical circuit networks has the following advantages:

[0018] I. This invention effectively simulates the universal quantum computing process through classical circuit networks, breaking through the dependence of traditional quantum computers on physical qubits. By encoding the input voltage, the quantum state is converted into the real and imaginary parts of the voltage signal. Combining the modular design of single-qubit and two-qubit gates, the decomposition and circuit reconstruction of any n-qubit unitary matrix are realized, enabling classical circuits to completely reproduce the linear transformation characteristics of quantum gates. For example, a single-qubit gate realizes any linear combination of four voltage signals through a 4×4 transformation matrix, and a two-qubit gate realizes the coupling between the control bit and the target bit through a cross-modulation formula, while maintaining the uniform coupling coefficient of other bits. The series and parallel structure of the circuit gates directly corresponds to the combination method of quantum gates without additional conversion. Thus, the universality of quantum computing is realized within the classical framework, providing a flexible platform for quantum algorithm verification and classical-quantum hybrid computing.

[0019] Second, this invention achieves efficient conversion from voltage signals to data through an inverse mapping formula, significantly improving the reliability of calculation results. During the calculation process, the input voltage signal is processed by a general-purpose computing circuit, and the output stable voltage is restored to the output data through the inverse mapping formula, avoiding the signal distortion problem in traditional analog calculations. It is particularly noteworthy that the inverse mapping formula integrates multiple frequency components through continuous convolution operations, ensuring the precise correspondence between the output data and the input quantum state. In addition, the voltage signal output by the circuit gate has the same mathematical structure as the input signal, supporting the cascading of multi-level gate circuits, further expanding the computational scale. This design not only simplifies the calculation process but also ensures the unitarity of the circuit transformation through mathematical verification, providing a stable and efficient solution for the classical simulation of complex quantum algorithms.

[0020] Other advantages, objectives and features of the invention will be set forth in part in the description which follows, and in part will be apparent to those skilled in the art from the following examination or study, or may be learned from the practice of the invention. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are merely some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without any creative effort.

[0022] Figure 1This is a flowchart of a method for simulating universal quantum computing based on classical circuit networks;

[0023] Figure 2 This is a schematic diagram showing the input and output voltage relationship of a general-purpose computing circuit.

[0024] Figure 3 This is a schematic diagram showing the voltage signal node distribution of a single / two-bit gate circuit module;

[0025] Figure 4 This is a schematic diagram of the connection of the core components of quantum computing simulated by a classical circuit network.

[0026] Figure 5 This is a circuit diagram showing the connection between the resistor and voltage signal in a single-bit gate analog adder module.

[0027] Figure 6 The left side shows a single-bit gate PCB board, corresponding to... Figure 3 (b); The right side shows the PCB board of the two-bit gate CZ module, corresponding to Figure 3 (d);

[0028] Figure 7 The circuit simulation experiment is shown as an example of n=2 bit universal quantum computing; (a) is the circuit PCB board used in the experiment; (b) is the χ matrix obtained from the circuit experiment results; existing literature has proven that each χ matrix uniquely corresponds to a universal computing process; (c) is the theoretical result of the χ matrix corresponding to quantum computing. Detailed Implementation

[0029] To further illustrate the technical means and effects of the present invention in achieving its intended purpose, the following detailed description of the specific implementation methods, structures, features, and effects of the present invention, in conjunction with the accompanying drawings and preferred embodiments, is provided below.

[0030] Example 1:

[0031] Calculation of 2-qubit quantum state superposition based on classical circuit networks.

[0032] First, four input data points are obtained for the 2-bit quantum state superposition calculation. These data directly determine the distribution characteristics of the initial quantum state and form the basis for subsequent circuit simulation calculations. These four input data points are preprocessed by removing data noise and correcting outliers to ensure their accuracy and reliability, thus preventing issues with the original data from affecting the subsequent voltage signal conversion.

[0033] Next, using the mapping algorithm specified in the document, the preprocessed input data is converted into the energy amplitude and initial phase of the voltage signal. The expression for the mapping algorithm is: Let the 2-bit system... The input data are respectively arrive ,but In A and B, the first subscript k is the circuit bit number, which is a positive integer, and w is the data number. and Take respectively The real and imaginary parts of the input data are used to establish the correspondence between the input data and the physical parameters of the voltage signal. This ensures that the quantum state information carried by the input data can be accurately transmitted to the voltage signal, providing a physical carrier for subsequent circuit simulation of quantum state changes.

[0034] Subsequently, the complex amplitude encoding formula is used to generate four voltage signals corresponding to each circuit bit: the real part of the ground state, the imaginary part of the ground state, the real part of the excited state, and the imaginary part of the excited state. The expression of the amplitude encoding formula is as follows: ,in, For the k-th circuit bit in the s-th state Voltage signals of dimension Let t be the fundamental angular frequency of the voltage signal, and t be the time variable. It is the circuit bit number, a positive integer, where s can take the value 0 or 1, and is the status indicator of the circuit bit. Re or Im can be used, which is the dimension identifier of the voltage signal. The function of this formula is to further convert the energy amplitude and initial phase into a voltage signal with specific waveform characteristics, so that each voltage signal can accurately correspond to different dimension information of the quantum state, while ensuring that the mathematical structure of the voltage signal matches the mathematical description of the quantum state, laying the foundation for subsequent circuit gate operations.

[0035] Finally, the fundamental period of the generated voltage signal is recorded. Its purpose is to provide key time parameters for the inverse mapping process in the subsequent calculation and result output steps, ensuring that the actual calculation results can be accurately derived in reverse.

[0036] Four analog adder modules were constructed using stable, high-precision operational amplifiers and resistors with small error ranges. The core function of the analog adder modules is to perform linear superposition of voltage signals, providing the basic operational unit for subsequent voltage conversion. Their performance directly affects the accuracy of single-bit gate conversion.

[0037] The specific resistance values ​​in each adder module are determined based on the voltage transformation rules followed by the single-bit gate. These rules regulate the direction and amplitude of the voltage signal transformation, ensuring that the resistance values ​​meet the single-bit gate's requirement for linear quantum state transformation, thus ensuring that the resulting transformed voltage signal conforms to the expected quantum state change pattern. The structure of the single-bit gate circuit is as follows: Figure 3 As shown in (a) and (b).

[0038] Finally, the unitarity of the voltage transformation is verified through matrix operations. Unitarity is a core characteristic of quantum state transformation. Verifying unitarity ensures that the voltage transformation implemented by a single-qubit gate meets the basic requirements of quantum state transformation in quantum computing, guarantees the rationality of the physical process of subsequent circuit simulation of quantum computing at the quantum mechanical level, and avoids deviations in calculation results due to the transformation not satisfying unitarity.

[0039] A basic CZ module containing two analog addition modules and four analog multiplication modules is built using a high-precision, low-distortion analog multiplier, such as... Figure 3 As shown in (c) and (d), the function of this module is to realize the quantum entanglement interaction between two bits, providing hardware support for the coupling transformation of quantum states of two-bit gate pairs in simulated quantum computing. Its module structure design directly determines the accuracy and efficiency of the two-bit coupling transformation.

[0040] The output gain of the multiplication module is set. The purpose of the gain setting is to adjust the signal amplitude of the multiplication operation to ensure that the coupling strength between the two bits meets the requirements of the two-bit gate in quantum computing, so that the change of voltage signal during subsequent cross-modulation can accurately reflect the change of entanglement relationship of quantum state.

[0041] Referring to the design of the control bit and target bit in a two-bit gate in quantum computing, one circuit bit is selected as the control bit and the other as the target bit, in order to simulate the control logic of the control bit on the quantum state of the target bit in quantum computing, and ensure that the subsequent voltage transformation can accurately correspond to the controlled transformation process of the quantum state.

[0042] The relevant voltage signals of the control bit and the target bit are input into the basic CZ module. The voltage after target bit transformation is calculated using the two-bit cross-modulation voltage transformation formula. The expression of the two-bit cross-modulation voltage transformation formula is as follows: ,in, For bits The s-th state Voltage signal after dimensional transformation , The coupling coefficient is... The target bit No. State of The original voltage signal of dimension, It is a bit No. State of The original voltage signal of dimension, It is a dimensional identifier for the voltage signal. It is the dimension identifier opposite to Γ. If Γ is the real dimension Re, then... If Γ is the imaginary dimension Im, then... Let Re be the real part dimension. and is the fixed input voltage of the two-bit gate, and l is the gate number. It is the state identifier of the circuit bit, with a value of 0 or 1. The function of this formula is to realize the modulation of the target bit voltage signal by the control bit voltage signal, simulate the entanglement between two bits in quantum computing, so that the voltage signal of the target bit can change accordingly according to the state of the control bit, and complete the two-bit coupling transformation of the quantum state.

[0043] The purpose of determining the 2-bit unitary matrix corresponding to the target of the 2-bit quantum state superposition calculation is to mathematically describe the overall transformation law of the quantum state in the process of 2-bit quantum state superposition calculation. This matrix is ​​the core reference for subsequent circuit construction, and its accuracy directly determines the functional correctness of the general computing circuit.

[0044] Based on the proven unitary matrix decomposition method in quantum computing, this 2-bit unitary matrix is ​​decomposed into a combination of single-bit gates and two-bit gates. The purpose of this decomposition process is to break down the complex overall quantum state transformation into multiple simple basic transformation units, enabling large-scale quantum state transformations that are originally difficult to implement directly to be accomplished through the combination of multiple basic circuit gates, thereby reducing the complexity of circuit construction.

[0045] Since the existence and feasibility of the decomposition method have been mathematically proven in quantum computing, and this proof applies equally to the single-bit and two-bit gates in this circuit design, the previously constructed single-bit and two-bit gates are connected in series and parallel according to the decomposition results, as follows: Figure 4 As shown, the role of serial and parallel connections is to combine multiple basic circuit gates into a complete computing system, enabling the orderly transmission and interaction of signals between circuit gates. The resulting 2-bit general-purpose computing circuit can realize the preset 2-bit quantum state superposition computing function, ensuring that the physical structure of the circuit is completely matched with the logical structure of quantum computing.

[0046] The input voltage signal generated in the input voltage encoding step is connected to the constructed 2-bit general-purpose computing circuit. The purpose of the input signal is to provide the general-purpose computing circuit with initial quantum state information input, start the circuit's simulation calculation process, and enable the circuit to process the input signal according to the preset quantum state transformation law.

[0047] After the circuit output signal stabilizes, the output voltage signal is acquired using a high-precision data acquisition device. Waiting for the signal to stabilize ensures the circuit completes all preset transformation operations, while acquiring the output signal provides the result carrier of the circuit's analog calculations, offering raw signal data for subsequent conversion.

[0048] Finally, the output voltage signal is converted into output data using the inverse mapping formula, which is expressed as follows: Where T is the fundamental period and W is the number of frequencies contained in the output voltage. It is the fundamental angular frequency of the voltage signal. and These are different output voltage signals, where i is the imaginary unit. These are the bit numbers in the circuit, which are positive integers from 1 to n. This is the state identifier of the k-th circuit bit. Re and Im are dimension identifiers, representing the transformation that the inverse mapping process will perform on the voltage signal. It is a time variable, symbol This represents a continuous convolution operation. In a 2-bit circuit, it means calculating... and convolution, Let m be the m-th output data, and Depends on The core function of the inverse mapping formula is to reverse the mapping, transforming the energy signal generated during circuit simulation calculations back into computational result data with actual physical meaning. This data is the final result of the superposition calculation of 2-bit quantum states, such as... Figure 7 As shown, the transformation from classical circuit operations to quantum computing results is realized, completing the entire analog computing process.

[0049] In summary, in the 2-bit quantum state superposition calculation embodiment, the input voltage is encoded, and the input data is converted into a specific voltage signal and the fundamental period is recorded using a mapping algorithm and a complex amplitude encoding formula, providing an accurate signal carrier for the calculation. Single-bit gates are constructed using operational amplifiers and other modules, with parameters determined by preset rules, matrices constructed, and unitarity verified to ensure compliance of the single-bit transformation. Two-bit gates are used to construct CZ modules, achieving bit coupling through cross-modulation and synthesis formulas. A general-purpose circuit connects gate circuits in series and parallel based on the unitary matrix decomposition results. Finally, the result is output using an inverse mapping formula, thus fully realizing an effective simulation of 2-bit quantum state superposition calculation based on classical circuits.

[0050] Example 2:

[0051] Simulation calculation of 3-bit quantum Fourier transform based on classical circuit networks.

[0052] First, eight input data points are acquired for the 3-qubit quantum Fourier transform. These data points encompass all information about the initial state of the 3-qubit quantum system and serve as the primary source of information for the entire simulation calculation. Their accuracy directly impacts the precision of all subsequent circuit operations. These eight input data points are preprocessed using filtering, noise reduction, and other data processing techniques to eliminate interference and correct data deviations. This ensures that the input data accurately reflects the characteristics of the initial quantum state, providing a high-quality data foundation for subsequent voltage signal conversion.

[0053] Using the mapping algorithm specified in the document, the eight preprocessed input data are converted into the energy amplitude and initial phase of the voltage signal. The core function of this algorithm is to establish a precise correspondence between the input data and the physical parameters of the voltage signal, transforming abstract quantum state data into physical quantities that can be recognized and processed by the circuit. This allows the voltage signal to carry the key information of the initial quantum state, providing an effective physical carrier for subsequent circuit simulations of quantum transformations.

[0054] Next, the complex amplitude encoding formula is used to generate four voltage signals corresponding to each of the three circuit bits: the real part of the ground state, the imaginary part of the ground state, the real part of the excited state, and the imaginary part of the excited state. This formula further transforms the energy amplitude and initial phase into voltage signals with specific time evolution characteristics, ensuring that each voltage signal accurately corresponds to different dimensions (real and imaginary parts) and states (ground and excited states) of the quantum state. Simultaneously, it guarantees that the mathematical structure of the voltage signals perfectly matches the mathematical description of the quantum state, providing the required signal input for subsequent circuit gate operations.

[0055] Finally, the fundamental period of the generated voltage signal is recorded. This serves as a crucial time parameter for the inverse mapping process in subsequent calculations and result output steps, ensuring accurate derivation of the calculation results corresponding to the quantum Fourier transform and preventing deviations in the inverse mapping process due to missing period information. Figure 1 As shown.

[0056] Four analog adder modules were constructed by selecting low-noise, high-linearity operational amplifiers and high-precision resistors. The core function of the analog adder modules is to realize the linear superposition of voltage signals. As the basic operational unit for single-bit gates to complete the linear transformation of quantum states, their performance (such as operational accuracy and signal distortion) directly determines the accuracy of the single-bit gate's simulation of quantum state transformation, and thus affects the final accuracy of the entire 3-bit quantum Fourier transform.

[0057] The specific resistance value of the resistor in each analog addition module is determined according to the preset voltage transformation rules. The purpose of these rules is to regulate the transformation direction and amplitude of the voltage signal, and to ensure that the selection of the resistance value can meet the specific requirements for the linear transformation of a single-bit quantum state in the 3-bit quantum Fourier transform. This ensures that the transformed voltage signal obtained subsequently conforms to the expected quantum state change law, and avoids the inability of the voltage transformation to accurately simulate the linear evolution of the quantum state due to improper resistance value.

[0058] The four voltage signals of each circuit bit obtained from the input voltage encoding step are respectively connected to the corresponding analog adder module to obtain the transformed voltage signal. The purpose of this step is to perform preliminary processing of the input voltage signal through the adder module, complete the preliminary linear transformation at the single-qubit level in the 3-bit quantum Fourier transform, provide actual input and output data support for the subsequent construction of the voltage transformation matrix, and enable the matrix to reflect the transformation law based on the real circuit signal.

[0059] A 4×4 voltage transformation matrix is ​​constructed based on the input and output voltage signals. During construction, the matrix rows correspond to the input voltage signals, and the columns correspond to the output voltage signals. The relationships and influence weights between input and output are analyzed according to pre-defined rules, and the values ​​of each element in the matrix are determined to form an initial matrix. The purpose of this matrix is ​​to accurately describe the transformation law of voltage signals by a single-bit gate from a mathematical perspective, transforming the physical operation process of the circuit into a quantifiable mathematical model. This facilitates subsequent verification of the unitaryness of the transformation through matrix operations and also provides a mathematical basis for circuit design optimization and fault diagnosis.

[0060] The initial matrix is ​​verified to ensure that its transformation logic is completely consistent with the preset voltage transformation rules. If there is any deviation, the element values ​​are adjusted. The purpose of the verification step is to eliminate errors caused by signal measurement errors, parameter setting deviations, etc. during the matrix construction process, to ensure that the matrix can accurately reflect the preset voltage transformation rules, to provide a reliable matrix foundation for subsequent unitarity verification, and to avoid distortion of unitarity verification results due to matrix errors.

[0061] Finally, the unitarity of the voltage transformation is verified through matrix operations. Unitarity is a core characteristic of quantum state transformation. Verifying unitarity ensures that the voltage transformation implemented by a single-qubit gate meets the basic requirements of quantum state transformation in quantum computing, guarantees the rationality of the single-qubit quantum state transformation simulated by the circuit at the quantum mechanical level, and avoids physical and logical errors in the simulation process of the 3-qubit quantum Fourier transform due to the transformation not satisfying unitarity, which would affect the correctness of the final calculation results.

[0062] A basic CZ module is built using a high-performance analog multiplier. This module contains two analog addition modules and four analog multiplication modules. The role of the CZ module is to realize the quantum entanglement interaction between two bits. As the core hardware unit for simulating the quantum state coupling transformation of two-bit gate pairs in a 3-bit quantum Fourier transform, its module structure design and performance parameters (such as multiplication accuracy and coupling strength adjustment range) directly determine the accuracy and efficiency of the two-bit coupling transformation, and thus affect the accuracy of the entire quantum Fourier transform simulation.

[0063] Based on the coupling strength requirements of the two-qubit quantum gate in a 3-qubit quantum Fourier transform, the output gain of the analog multiplier is precisely set. The purpose of the gain setting is to adjust the signal amplitude of the multiplication operation, ensuring that the coupling strength between the two qubits meets the requirements of the two-qubit gate in quantum computing. This allows the changes in the voltage signal during subsequent cross-modulation to accurately reflect the changes in the entanglement relationship of the quantum state, avoiding situations where the coupling effect fails to match the entanglement evolution law of the quantum state due to improper gain.

[0064] In the three circuit bits, different bit combinations are selected sequentially as control bits and target bits according to the quantum Fourier algorithm (e.g., bit 1 is the control bit and bit 2 is the target bit; bit 2 is the control bit and bit 3 is the target bit, etc.). This simulates the control logic of the control bit on the quantum state of the target bit in quantum computing, ensuring that the subsequent voltage transformation can accurately correspond to the controlled transformation process of different two-bit combinations in the three-bit quantum Fourier transform, and meet the requirements of multiple sets of two-bit quantum state interactive transformation.

[0065] The voltage signals of the corresponding control bit and target bit are input into the basic CZ module. Using a two-bit cross-modulation voltage transformation formula and a predetermined coupling coefficient, the voltage of the target bit after transformation under the influence of the control bit is calculated. This formula modulates the target bit voltage signal with the control bit voltage signal, simulating the entanglement between two bits in quantum computing. This allows the target bit voltage signal to change accordingly based on the state of the control bit, completing the two-bit coupling transformation of the quantum state. This provides crucial two-bit interaction support for the complex quantum state evolution in 3-bit quantum Fourier transforms.

[0066] Substituting the calculated transformed voltage into the synthesis formula, the four types of voltage signals—the real part of the ground state, the imaginary part of the ground state, the real part of the excited state, and the imaginary part of the excited state—are accurately separated. The purpose of separating the voltage signals is to facilitate subsequent circuit processing, ensuring that each signal component accurately corresponds to the real and imaginary parts of the quantum state. This provides standardized signal input for the subsequent series-parallel connections of general-purpose computing circuits, avoiding the inability of circuit gates to interact properly due to inconsistent signal formats.

[0067] The determination of the 3-bit unitary matrix corresponding to the 3-bit quantum Fourier transform is crucial. This matrix fully describes the quantum state transformation law of the 3-bit quantum system during the Fourier transform process and serves as the core reference for subsequent circuit construction. Its accuracy directly determines the functional correctness of the general-purpose computing circuit and is the mathematical foundation for ensuring that the circuit can accurately simulate the 3-bit quantum Fourier transform.

[0068] Referring to the mathematical methods and existing proofs of unitary matrix decomposition in quantum computing, a 3-bit unitary matrix is ​​decomposed into combinations of multiple single-bit gates and two-bit gates. The purpose of this decomposition process is to break down the complex overall quantum state transformation into multiple simple basic transformation units. This allows large-scale quantum state transformations, which are originally difficult to implement directly, to be accomplished through combinations of multiple basic circuit gates, reducing the complexity of circuit construction. At the same time, it also provides a clear logical framework for the orderly arrangement and connection of circuit gates.

[0069] During the decomposition process, the special characteristics of the 3-bit quantum Fourier transform are fully considered to ensure that each single-bit gate and two-bit gate after decomposition accurately corresponds to the specific transformation steps in the quantum Fourier transform. Based on the decomposition results, the previously constructed multiple single-bit gates and two-bit gates are connected according to the serial-parallel structure requirements of quantum gates in quantum computing. During the connection process, the input and output signal matching of each gate is carefully checked to ensure that the signal flow and transformation order in the circuit are completely consistent with the logical order of the 3-bit quantum Fourier transform.

[0070] The resulting 3-bit general-purpose computing circuit integrates the functions of all basic circuit gates to achieve a complete simulation of the 3-bit quantum Fourier transform. It can receive input voltage signals and process them according to preset quantum state transformation rules, providing a complete hardware computing platform for subsequent calculations and result output. Figure 2 As shown, this ensures that the entire simulation calculation process can be carried out in an orderly and accurate manner.

[0071] The input voltage signal, generated by encoding the input voltage into three circuit bits, is then connected to the constructed 3-bit general-purpose computing circuit. The purpose of the input signal is to provide the general-purpose computing circuit with the initial quantum state information input, start the circuit's simulation calculation process, and enable the circuit to process the input signal according to the preset 3-bit quantum Fourier transform law. This is the starting point of the entire simulation calculation process.

[0072] After the circuit has stabilized and the output voltage signal no longer changes significantly over time, a professional data acquisition device is used to acquire the output voltage signal. Waiting for the signal to stabilize ensures that the circuit completes all preset transformation operations, preventing the acquired data from failing to reflect the final quantum state transformation result due to signal instability. Acquiring the output signal serves as the carrier of the circuit's simulation calculations, providing the raw signal data for subsequent calculations and outputs; it is a crucial link connecting the circuit's hardware operations with the final result output.

[0073] Finally, the inverse mapping formula is used to convert the acquired output voltage signal into output data. The core function of the inverse mapping formula is to reverse the mapping, transforming the voltage signal in the circuit simulation process back into 3-bit quantum Fourier transform calculation results with actual physical meaning. This completes the transformation from classical circuit operations to quantum computing results, marking the completion of the entire 3-bit quantum Fourier transform simulation calculation process and providing direct data support for the use of the simulation results in subsequent practical applications.

[0074] In summary, in the 3-bit quantum Fourier transform simulation calculation embodiment, the input voltage encoding stage processes eight input data points, generates voltage signals using corresponding algorithms and formulas, and records the period; single-bit gates are used to construct a module with carefully selected components, determine parameters according to rules, construct matrices, and verify unitarity to meet the single-bit transform requirements; two-bit gates are used to construct a CZ module, set the gain, select control bits, and complete coupling and signal separation through relevant formulas; a general-purpose circuit decomposes the 3-bit unitary matrix into parallel-serial-parallel gate circuits; finally, the signal is acquired, and the result is output through the inverse mapping formula, successfully completing the 3-bit quantum Fourier transform simulation calculation based on classical circuits.

[0075] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the present invention. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present invention without departing from the scope of the present invention shall still fall within the scope of the present invention.

Claims

1. A method for efficiently simulating universal quantum computing based on classical circuit networks, characterized in that, The specific steps of this method are as follows: Input voltage encoding: The input data is preprocessed and converted into the energy amplitude and initial phase of the voltage signal through a mapping algorithm. Then, the complex amplitude encoding formula is used to generate four voltage signals corresponding to each circuit bit: the real part of the ground state, the imaginary part, and the real part of the excited state, and the fundamental period is recorded. Single-bit gate construction: Four analog adder modules are built using operational amplifiers and resistors. The resistor values ​​are determined according to the preset voltage transformation rules. After the voltage signal is connected, the transformed signal is obtained. The transformation matrix corresponding to the voltage transformation is constructed. The unitarity of the voltage transformation is verified through matrix operations. Two-bit gate construction: A basic CZ module containing two analog addition modules and four analog multiplication modules is built using an analog multiplier. The output gain of the multiplication module is set, the control and target bits are selected, and the voltage after the target bit transformation is calculated by the two-bit cross-modulation voltage transformation formula. The voltage signal is obtained by substituting it into the synthesis formula. Construct a general computing circuit: Determine the n-bit unitary matrix corresponding to the target computation, decompose the target matrix into a combination of single-bit gates and two-bit gates, and connect the single-bit gates and two-bit gates in series and parallel according to the unitary matrix decomposition formula to form an n-bit general computing circuit. Calculation and Result Output: The input voltage signal is connected to an n-bit general-purpose computing circuit. After the output stabilizes, the signal is acquired and converted into output data through an inverse mapping formula, which serves as the final calculation result.

2. The method for efficiently simulating universal quantum computing based on classical circuit networks according to claim 1, characterized in that, In the input voltage encoding, the expression for the mapping algorithm is: Let the n-bit system... The input data are respectively arrive ,but In A and B, the first subscript k is the circuit bit number, which is a positive integer, and w is the data number. and Take respectively The real and imaginary parts of .

3. The method for efficiently simulating universal quantum computing based on classical circuit networks according to claim 1, characterized in that, In the input voltage encoding, the expression for the amplitude encoding formula is: ,in, For the k-th circuit bit in the s-th state Voltage signals of dimension Let t be the fundamental angular frequency of the voltage signal, and t be the time variable. It is the circuit bit number, a positive integer, where s can take the value 0 or 1, and is the status indicator of the circuit bit. Re or Im can be used, which are the dimension identifiers of the voltage signal.

4. The method for efficiently simulating universal quantum computing based on classical circuit networks according to claim 1, characterized in that, In the construction of the single-bit gate, the specific steps for constructing the transformation matrix corresponding to the voltage transformation are as follows: clarify the dimension and row and column meaning of the transformation matrix. The transformation matrix is ​​a 4×4 matrix, where the rows of the matrix correspond to the four input voltage signals of the single-circuit bit gate, and the columns of the matrix correspond to the four output voltage signals of the single-circuit bit gate; sort out the correlation between each input voltage signal and the output voltage signal in the preset voltage transformation rules, and determine the influence weight and action mode of each input voltage signal on different output voltage signals; Based on the correlation and influence weights, the basis for the value of each element in the 4×4 matrix is ​​determined, and the input and output voltage signal mapping logic corresponding to the matrix elements at different row and column intersections is clarified. According to the row and column order, the basis for the value of each element is converted into specific values ​​and filled into the corresponding positions of the 4×4 matrix one by one to form the initial voltage transformation matrix. The element values ​​of the initial matrix are verified against the preset voltage transformation rules to ensure that the transformation logic represented by the matrix is ​​completely consistent with the preset voltage transformation rules. If there are any inconsistencies, the values ​​of the corresponding matrix elements are adjusted until they are consistent, and finally the transformation matrix corresponding to the complete voltage transformation is obtained.

5. The method for efficiently simulating universal quantum computing based on classical circuit networks according to claim 1, characterized in that, In the construction of the two-bit gate, the expression for the two-bit cross-modulation voltage transformation formula is: ,in, For bits The s-th state Voltage signal after dimensional transformation , The coupling coefficient is... The target bit No. State of The original voltage signal of dimension, It is a bit No. State of The original voltage signal of dimension, It is a dimensional identifier for the voltage signal. It is the dimension identifier opposite to Γ. If Γ is the real dimension Re, then... If Γ is the imaginary dimension Im, then... Let Re be the real part dimension. and is the fixed input voltage of the two-bit gate, and l is the gate number. It is a status indicator for the circuit bit, with a value of 0 or 1.

6. The method for efficiently simulating universal quantum computing based on classical circuit networks according to claim 1, characterized in that, In the calculation and result output, the expression for the inverse mapping formula between the voltage signal and the output data is: Where T is the fundamental period and W is the number of frequencies contained in the output voltage. It is the fundamental angular frequency of the voltage signal. and These are different output voltage signals, where i is the imaginary unit. These are the bit numbers in the circuit, which are positive integers from 1 to n. This is the state identifier of the k-th circuit bit. Re and Im are dimension identifiers, representing the transformation that the inverse mapping process will perform on the voltage signal. It is a time variable, symbol This represents continuous convolution operations, which is the calculation of... , arrive The convolution of these n functions, Let m be the m-th output data, and Depends on The value of .

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