Spin lock design method and device, electronic equipment and storage medium
By introducing preset parameter checks and state variable judgments into the spinlock design method to optimize the write operation process, the problems of CPU resource waste and reduced response speed caused by spinlocks are solved, and more stable and faster write operations are achieved.
Patent Information
- Application Number
- CN202511489975.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-17
- Publication Date
- 2026-01-30
AI Technical Summary
The use of spinlocks in the existing CP AUTOSAR OS system leads to wasted CPU resources and reduced system response speed, mainly due to the lack of a timeout mechanism and the instability of write operations.
By introducing preset parameter checks, determining whether the spinlock is configured with interrupt-related locking methods, and checking lock acquisition timeouts in the spinlock design method, and by reading and determining whether the state variable is even, the write operation lock acquisition process is optimized, and timeout checks are added to prevent long-term occupation.
It improves the stability and response speed of system write operations, reduces CPU resource waste, lowers system waiting time, and enhances system concurrency performance and throughput.
Smart Images
Figure CN121435249A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of Internet technology, and in particular to a spinlock design method, device, electronic device, and storage medium. Background Technology
[0002] As vehicle controllers become increasingly complex and security requirements rise, multi-core MCUs are being used more and more frequently. Protecting shared data between different cores is imperative. The current mainstream approach is to use spinlocks for data protection, which is a common lightweight, multi-core data synchronization mechanism.
[0003] Currently, most automotive controllers use the CP AUTOSAR architecture, which provides an AUTOSAR spinlock mechanism for protecting data across cores. However, with the continuous improvement of complex MCU performance and the introduction of more integrated functions, cross-core data interaction is also increasing. Many ECUs use more than 100 spinlocks, and the use of spinlocks significantly impacts CPU resource usage. If spinlock usage is unrestricted, when a spinlock is locked, if the requester fails to acquire the lock, it will not enter a sleep state but will continuously attempt to acquire it, wasting CPU resources. Therefore, optimizing spinlock execution has become a key factor in improving system performance.
[0004] The current CP AUTOSAR OS system suffers from poor stability in write operations and the lack of a timeout mechanism, which may cause excessively long wait times and thus affect system response speed. Summary of the Invention
[0005] The purpose of this invention is to provide a spinlock design method, device, electronic device, and storage medium, which at least alleviates the problems of poor stability of write operations in existing CP AUTOSAR OS systems, the lack of a timeout mechanism, the potential for excessively long waiting times, and the resulting impact on system response speed. This invention aims to improve the stability of system write operations and enhance system response speed.
[0006] To address the aforementioned technical problems, in a first aspect, the present invention provides a spinlock design method, which includes at least a write operation to acquire the lock process;
[0007] The write operation lock acquisition process includes at least the following steps:
[0008] Before performing a write operation on a shared resource at the upper layer, the first function is called to perform at least a first preset parameter check;
[0009] If the first preset parameter check passes, then determine whether the spinlock is configured with a lock method related to interruption;
[0010] if the spinlock is configured with an interrupt-related locking method, performing an interrupt-off to at least shield interruption and ensure atomicity of subsequent operations;
[0011] if the spinlock is not configured with an interrupt-off locking method or the interrupt-off has been performed, checking whether the lock acquisition has timed out;
[0012] if the lock acquisition has not timed out, reading a state variable of the spinlock and determining whether the state variable is even;
[0013] if the state variable is even, incrementing the state variable and pre-empting the lock by using a compare-and-swap instruction, and after successful pre-emption of the lock, feeding back that the write lock acquisition is successful and ending the write operation lock acquisition process;
[0014] if the state variable is odd or pre-emption of the lock fails, re-checking the timeout and continuing to spin and retry until the state variable is even, incrementing the state variable and pre-empting the lock by using the compare-and-swap instruction, and after successful pre-emption of the lock, feeding back that the write lock acquisition is successful and ending the write operation lock acquisition process.
[0015] Optionally, before the write operation of the shared resource is performed at the upper level, a first function is called to perform at least a first preset parameter check, and the write operation lock acquisition process further comprises at least:
[0016] if the first preset parameter check fails, feeding back that the write lock acquisition fails and ending the write operation lock acquisition process;
[0017] after the if the spinlock is not configured with an interrupt-off locking method or the interrupt-off has been performed, checking whether the lock acquisition has timed out, the write operation lock acquisition process further comprises at least:
[0018] if the lock acquisition has timed out, feeding back that the write lock acquisition fails and ending the write operation lock acquisition process.
[0019] Optionally, the spinlock design method further comprises a write operation lock release process;
[0020] the write operation lock release process comprises at least the following steps:
[0021] after the write operation of the shared resource is performed at the upper level, a second function is called to perform at least a second preset parameter check;
[0022] if the second preset parameter check fails, feeding back that the write lock release fails and ending the write operation lock release process;
[0023] if the second preset parameter check passes, determining whether the spinlock is configured with an interrupt-related locking method;
[0024] If the spin lock is configured with the lock method related to the interrupt, the interrupt is enabled, and the interrupt triggering is allowed to be executed;
[0025] If the spin lock is not configured with the lock method related to the interrupt, or the interrupt is enabled to be executed, a state variable of the spin lock is read, and it is determined whether the state variable is odd;
[0026] If the state variable is odd, the state variable is incremented, and it is fed back that the write lock release is successful, and the write operation lock release process is ended;
[0027] If the state variable is even, it is indicated that the lock state is abnormal, it is fed back that the write lock release fails, and the write operation lock release process is ended.
[0028] Optionally, the spin lock design method further comprises a read operation lock acquisition process.
[0029] The read operation lock acquisition process comprises at least the following steps:
[0030] A third function is called to perform at least a third preset parameter check;
[0031] If the third preset parameter check fails, it is fed back that the read lock acquisition fails, and the read operation lock acquisition process is ended;
[0032] If the third preset parameter check passes, it is checked whether the read lock is timed out;
[0033] If the read lock is timed out, it is fed back that the read lock acquisition fails, and the read operation lock acquisition process is ended;
[0034] If the read lock is not timed out, a state variable of the spin lock is read, and it is determined whether the state variable is even;
[0035] If the state variable is even, it is fed back that the read lock acquisition is successful, and the read operation lock acquisition process is ended;
[0036] If the state variable is odd, it is rechecked whether the timeout is continued to be spun and retried until the state variable is even, it is fed back that the read lock acquisition is successful, and the read operation lock acquisition process is ended.
[0037] Optionally, the spin lock design method further comprises a read operation lock release process.
[0038] The read operation lock release process comprises at least the following steps:
[0039] A fourth function is called to perform at least a fourth preset parameter check;
[0040] If the fourth preset parameter check fails, it is fed back that the read lock release fails, and the read operation lock release process is ended.
[0041] if the fourth preset parameter check passes, verifying whether the current state variable of the spin lock matches the state variable of the spin lock when the read lock acquisition succeeds;
[0042] if the match is found, feeding back a read lock release success, and ending the read operation release lock process;
[0043] if the match is not found, feeding back a read lock release failure, and ending the read operation release lock process.
[0044] Optionally, the second preset parameter check at least includes whether the lock object pointer is legal, and whether the authority is correct.
[0045] Optionally, the third preset parameter check at least includes whether the lock object pointer and the calling context are legal.
[0046] The fourth preset parameter check at least includes whether the lock object pointer is legal, and whether the current core holds the read lock.
[0047] Based on the same concept, in a second aspect, the present application further provides a spin lock design device for executing the spin lock design method according to any one of the first aspect.
[0048] The spin lock design device at least includes a write operation lock acquisition module.
[0049] The write operation lock acquisition module is at least specifically used for:
[0050] Before performing the write operation of the shared resource in the upper layer, a first function is called to perform at least a first preset parameter check; if the first preset parameter check passes, it is judged whether the spin lock is configured with a lock method related to interruption; if the spin lock is configured with the lock method related to interruption, interruption is executed to at least shield interruption interference and ensure atomicity of subsequent operations; if the spin lock is not configured with the lock method related to interruption, or the interruption has been executed, it is checked whether the lock acquisition is timed out; if the lock acquisition is not timed out, the state variable of the spin lock is read, and it is judged whether the state variable is even; if the state variable is even, the state variable is self-incremented, and the lock is preempted by using a compare-and-swap instruction; after the lock is successfully preempted, a write lock acquisition success is fed back, and the write operation lock acquisition process is ended; if the state variable is odd or the lock preemption fails, the timeout is rechecked, and the spin retry is continued until the state variable is even, the state variable is self-incremented, and the lock is preempted by using the compare-and-swap instruction; after the lock is successfully preempted, a write lock acquisition success is fed back, and the write operation lock acquisition process is ended.
[0051] Based on the same concept, in a third aspect, the present application also provides an electronic device comprising a memory and a processor, wherein the memory stores a computer program capable of running on the processor, and the processor implements the steps in the spin lock design method of any one of the first aspect when executing the program.
[0052] Based on the same concept, in a fourth aspect, the present application also provides a computer readable storage medium, which stores a computer program, and the computer program implements the steps in the spin lock design method of any one of the first aspect when executed by a processor.
[0053] The technical scheme provided by the embodiment of the present application firstly, before executing the write operation of the shared resource in the upper layer, a first function is called to perform at least a first preset parameter check; further, if the first preset parameter check is passed, it is judged whether the spin lock is configured with a lock method related to interruption; further, if the spin lock is configured with the lock method related to interruption, interruption is executed to at least shield interruption interference and ensure the atomicity of subsequent operation, otherwise, if the spin lock is not configured with the lock method related to interruption or the interruption has been executed, it is checked whether the lock acquisition is timed out; further, if the lock acquisition is not timed out, the state variable of the spin lock is read, and it is judged whether the state variable is even; further, if the state variable is even, the state variable is incremented, and the lock is preempted by using the compare-and-swap instruction, and after the lock is successfully preempted, it is fed back that the write lock is acquired successfully, and the write operation lock acquisition process is ended, on the contrary, if the state variable is odd or the lock is failed to be preempted, the timeout is rechecked, and the spin retry is continued until the state variable is even, the state variable is incremented, and the lock is preempted by using the compare-and-swap instruction, and after the lock is successfully preempted, it is fed back that the write lock is acquired successfully, and the write operation lock acquisition process is ended.
[0054] Therefore, the embodiment of the present application can at least alleviate the problem that the existing CP AUTOSAR OS system has poor stability of write operation, no timeout mechanism is set, long waiting time is caused, and the system response speed is affected, the write operation lock acquisition process is optimized by adding the first preset parameter check, judging whether the spin lock is configured with the lock method related to interruption, checking whether the lock acquisition is timed out, reading and judging whether the state variable of the spin lock is even, and the like, and the stability of the system write operation is improved, and the system response speed is improved. BRIEF DESCRIPTION OF DRAWINGS
[0055] Figure 1 is a flowchart of a spin lock design method provided by the embodiment of the present application;
[0056] Figure 2 is a flowchart of another spin lock design method provided by the embodiment of the present application;
[0057] Figure 3is a flow chart of another spin lock design method provided by an embodiment of the present application;
[0058] Figure 4 is a flow chart of another spin lock design method provided by an embodiment of the present application;
[0059] Figure 5 is a flow chart of another spin lock design method provided by an embodiment of the present application;
[0060] Figure 6 is a structural schematic diagram of a spin lock design device provided by an embodiment of the present application;
[0061] Figure 7 is a structural schematic diagram of an electronic device provided by an embodiment of the present application;
[0062] Figure 8 is a schematic diagram of a write operation lock acquisition flow provided by an embodiment of the present application;
[0063] Figure 9 is a schematic diagram of a write operation lock release flow provided by an embodiment of the present application;
[0064] Figure 10 is a schematic diagram of a read operation lock acquisition flow provided by an embodiment of the present application;
[0065] Figure 11 is a schematic diagram of a read operation lock release flow provided by an embodiment of the present application. DETAILED DESCRIPTION
[0066] In order to make the objects, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the drawings. Obviously, the described embodiments are only a part of the embodiments of the present application, but not all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the scope of protection of the present application.
[0067] The terms used in the embodiments of the present application are merely for the purpose of describing the specific embodiments, and are not intended to limit the present application. The singular forms "a", "an" and "the" used in the embodiments of the present application and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise. "Plural" generally includes at least two.
[0068] It should be understood that the term "and / or" used herein is only to describe the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B, which can represent the three cases of A alone, A and B together, and B alone. In addition, the character " / " herein generally represents an "or" relationship between the front and rear associated objects.
[0069] It should be understood that, although the terms first, second, third, etc. can be employed in this application embodiment, these descriptions are not intended to be limiting. These terms are only used to distinguish one description from another. For example, a first can be termed a second, and, similarly, a second can be termed a first, without departing from the scope of the present application embodiment.
[0070] Depending on the context, the word "if" as used herein can be interpreted to mean "when" or "while" or "in response to determining" or "in response to detecting." Similarly, the phrase "if it is determined" or "if [a stated condition or event] is detected" can be interpreted to mean "upon determining" or "in response to determining" or "upon detecting [the stated condition or event]" or "in response to detecting [the stated condition or event]."
[0071] It is also to be noted that the terms "comprising", "including", and any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element preceded by "comprises... a" does not, without more constraints, foreclose the existence of additional identical elements in the process, method, article, or apparatus that includes the recited element.
[0072] It is particularly noted that symbols and / or numbers present in the specification, if not marked in the description of the drawings, are not drawing reference numbers.
[0073] Figure 1 is a flowchart of a spin lock design method provided by an embodiment of the present application. The embodiment is applicable at least to domain controller applications in an unmanned (or autonomous) driving system and network security scenarios. The spin lock design method can be executed by a spin lock design device in the embodiment of the present application as an execution subject, which can be implemented in software and / or hardware. As shown in Figure 1 The spin lock design method at least includes a write operation lock acquisition flow. The write operation lock acquisition flow at least includes the following steps:
[0074] S1, before performing a write operation on a shared resource in an upper layer, a first function is called to perform at least a first preset parameter check.
[0075] The first function can be a GetWriteSpinlock function, and the first preset parameter check can include determining whether an ID of a Spinlock exists, whether the Spinlock belongs to a current task and an application, and the like.
[0076] S2, if the first preset parameter check passes, determine whether the spin lock is configured with a lock method related to an interrupt.
[0077] S3, if the spin lock is configured with the lock method related to the interrupt, perform the interrupt-off to at least shield the interrupt interference and ensure the atomicity of subsequent operations.
[0078] The execution of the interrupt-off can prevent the same core interrupt from calling the lock.
[0079] S4, if the spin lock is not configured with the lock method related to the interrupt, or the interrupt-off has been performed, check whether the lock acquisition times out.
[0080] The manner of determining whether the lock acquisition times out can be to compare the time used for the lock acquisition with a preset timeout time, and if the time used for the lock acquisition is greater than the preset timeout time, it is determined that the lock acquisition times out; otherwise, if the time used for the lock acquisition is not greater than the preset timeout time, it is determined that the lock acquisition does not time out.
[0081] S5, if the lock acquisition does not time out, read a state variable of the spin lock and determine whether the state variable is even.
[0082] The state variable of the spin lock can be initially 0.
[0083] S6, if the state variable is even, increment the state variable by 1 and use a compare-and-swap instruction to preempt the lock, and after the lock is preempted successfully, feedback that the write lock acquisition is successful, and end the write operation lock acquisition process.
[0084] The increment size of the state variable can be 1.
[0085] S7, if the state variable is odd or the lock preemption fails, recheck the timeout and continue the spin retry until the state variable is even, increment the state variable by 1, use the compare-and-swap instruction to preempt the lock, and after the lock is preempted successfully, feedback that the write lock acquisition is successful, and end the write operation lock acquisition process.
[0086] The technical solution provided by the embodiment first, before performing the write operation of the shared resource in the upper layer, a first function is called to perform at least a first preset parameter check; further, if the first preset parameter check passes, it is judged whether the spin lock is configured with a lock method related to interruption; further, if the spin lock is configured with the lock method related to interruption, interruption is executed to at least shield interruption interference and guarantee atomicity of subsequent operation, otherwise, if the spin lock is not configured with the lock method related to interruption or the interruption has been executed, it is checked whether the lock acquisition is timed out; further, if the lock acquisition is not timed out, a state variable of the spin lock is read, and it is judged whether the state variable is even; further, if the state variable is even, the state variable is incremented, and the lock is preempted by using a compare-and-swap instruction, after the lock is successfully preempted, it is fed back that the write lock acquisition is successful, and the write operation lock acquisition process is ended, on the contrary, if the state variable is odd or the lock preemption fails, the timeout is rechecked, and the spin retry is continued until the state variable is even, the state variable is incremented, and the lock is preempted by using the compare-and-swap instruction, after the lock is successfully preempted, it is fed back that the write lock acquisition is successful, and the write operation lock acquisition process is ended.
[0087] Therefore, the embodiment can at least alleviate the problem that the existing CP AUTOSAR OS system has poor stability of write operation, no timeout mechanism is set, long waiting time is caused, and system response speed is affected. The write operation lock acquisition process is optimized by adding the first preset parameter check, judging whether the spin lock is configured with the lock method related to interruption, checking whether the lock acquisition is timed out, reading and judging whether the state variable of the spin lock is even, and the like, so as to improve the stability of system write operation and improve system response speed.
[0088] It should be noted that, based on the above embodiment, in a specific implementation, after the first function is called to perform at least the first preset parameter check before the write operation of the shared resource in the upper layer is performed, the write operation lock acquisition process at least further includes: if the first preset parameter check fails, it is fed back that the write lock acquisition fails, and the write operation lock acquisition process is ended.
[0089] After it is checked whether the lock acquisition is timed out if the spin lock is not configured with the lock method related to interruption or the interruption has been executed, the write operation lock acquisition process at least further includes: if the lock acquisition is timed out, it is fed back that the write lock acquisition fails, and the write operation lock acquisition process is ended.
[0090] Therefore, Figure 2 is a flowchart of another spin lock design method provided by the embodiment, as shown in Figure 2 The write operation lock acquisition process at least includes the following steps:
[0091] S1, before performing the write operation of the shared resource in the upper layer, a first function is called to perform at least a first preset parameter check.
[0092] S8, if the first preset parameter check fails, feedback write lock acquisition failure, end the write operation lock acquisition process.
[0093] S2, if the first preset parameter check passes, determine whether the spin lock is configured with a lock method related to interruption.
[0094] S3, if the spin lock is configured with a lock method related to interruption, perform interruption to at least shield interruption interference and ensure atomicity of subsequent operations.
[0095] S4, if the spin lock is not configured with a lock method related to interruption or the interruption has been performed, check whether the lock acquisition is timed out.
[0096] S9, if the lock acquisition is timed out, feedback write lock acquisition failure, end the write operation lock acquisition process.
[0097] S5, if the lock acquisition is not timed out, read the state variable of the spin lock and determine whether the state variable is even.
[0098] S6, if the state variable is even, increment the state variable and use the compare-and-swap instruction to preempt the lock, after the lock is preempted successfully, feedback write lock acquisition success, end the write operation lock acquisition process.
[0099] S7, if the state variable is odd or the lock preemption fails, recheck the timeout and continue the spin retry until the state variable is even, increment the state variable and use the compare-and-swap instruction to preempt the lock, after the lock is preempted successfully, feedback write lock acquisition success, end the write operation lock acquisition process.
[0100] Exemplarily, in another specific implementation, the write operation lock acquisition process described above can be specifically as follows:
[0101] ①Before the upper layer performs the shared resource write operation, the GetWriteSpinlock function needs to be called. First, parameter check is performed, mainly to determine whether the ID of the Spinlock exists, whether it belongs to the current task and the application, etc., if the check fails, return WriteSpinlock acquisition failure (i.e. the aforementioned feedback write lock acquisition failure), the shared resource write operation cannot be performed, if the check is successful, continue to perform step ②;
[0102] ②Determine whether the Spinlock is configured with a lock method related to interruption, if configured, interruption needs to be performed to prevent the same core interruption from calling the lock;
[0103] ③During the lock acquisition process, the timeout time is checked regularly, if the set timeout time has been exceeded and the lock usage right has not been acquired, i.e. other applications are also performing operations and not releasing the lock, return WriteSpinlock acquisition failure;
[0104] (4) After successfully obtaining the WriteSpinlock, it is determined whether the variable LockCounter (i.e. the state variable of the aforementioned spinlock) of the current lock is even. If it is not even, it returns to step (3);
[0105] (5) When the LockCounter is even, the lock variable LockCounter is first subjected to an atomic exchange of 1. If the exchange is successful, the lock variable LockCounter becomes odd, and the lock is successfully obtained. If the exchange fails, the lock variable LockCounter is not modified, and it returns to step (3).
[0106] Exemplarily, in yet another specific implementation, Figure 8 is a schematic diagram of a write operation lock obtaining process provided by an embodiment of the present application, referring to Figure 8 The aforementioned write operation lock obtaining process can also be specifically as follows:
[0107] (1) The process starts, enters the entry point of the write lock logic, and is ready to perform the spinlock write operation;
[0108] (2) Parameter check: it is determined whether the "parameter check is successful". If it fails, it directly goes to the end of the process, and the write lock obtaining fails. If it succeeds, it goes to (3);
[0109] (3) It is determined whether the "lock method" is configured: it is checked whether a specific "lock method" (such as a mode configured as "interrupt off + spin") is enabled. If it is not configured, it skips "interrupt off" and directly goes to (5). If it is configured, it goes to (4);
[0110] (4) Interrupt off: it is executed to shield the interruption interference and ensure the atomicity of the subsequent operation;
[0111] (5) It is checked whether the "lock obtaining timeout" is triggered: it is determined whether the "lock obtaining timeout" condition (such as the spin waiting count exceeding the threshold) is triggered. If it is timed out, it goes to the end of the process, and the write lock obtaining fails. If it is not timed out, it goes to (6);
[0112] (6) It is checked whether the "lock variable is even": it is read that the state variable of the spinlock is even. If it is odd, it returns to (5) (recheck the timeout and continue the spin retry). If it is even, it goes to (7);
[0113] (7) "Lock variable self-increment + comparison exchange": the lock variable (i.e. the state variable of the aforementioned spinlock) is self-incremented, and it is attempted to occupy the lock by using the comparison exchange instruction. If it is successful, the write lock is successfully obtained, and the process ends. If it fails, it returns to (5) (recheck the timeout and continue the spin retry).
[0114] On the basis of the above-mentioned embodiments or implementation modes, the flow of releasing the lock by the write operation is described below, but the present application is not limited thereto.
[0115] Figure 3 is a flowchart of another spin lock design method provided by the embodiments of the present application, as shown in Figure 3 The spin lock design method at least further includes the flow of releasing the lock by the write operation, which at least includes the following steps:
[0116] S10, after the write operation of the shared resource is executed in the upper layer, a second function is called to at least perform a second preset parameter check.
[0117] Optionally, the second preset parameter check at least includes whether the lock object pointer is legal and whether the authority is correct.
[0118] S11, if the second preset parameter check fails, a feedback of write lock release failure is given, and the flow of releasing the lock by the write operation is ended.
[0119] S12, if the second preset parameter check passes, it is judged whether the spin lock is configured with the lock method related to the interruption.
[0120] S13, if the spin lock is configured with the lock method related to the interruption, the interruption is opened, and the interruption triggering is allowed.
[0121] S14, if the spin lock is not configured with the lock method related to the interruption, or the interruption is opened, the state variable of the spin lock is read, and it is judged whether the state variable is odd.
[0122] S15, if the state variable is odd, the state variable is self-incremented, and a feedback of write lock release success is given, and the flow of releasing the lock by the write operation is ended.
[0123] S16, if the state variable is even, it indicates that the lock state is abnormal, a feedback of write lock release failure is given, and the flow of releasing the lock by the write operation is ended.
[0124] Exemplarily, in another specific implementation mode, the above-mentioned flow of releasing the lock by the write operation can be specifically as follows:
[0125] ①After the write operation of the shared resource is executed in the upper layer, the ReleaseWriteSpinlock function (i.e. the aforementioned second function) is called, and first, the parameter check is performed, mainly judging whether the ID of the Spinlock exists, whether it belongs to the current task and the application, etc., and the check failure returns the write lock release failure;
[0126] ②It is judged whether the Spinlock is configured with the lock method related to the interruption, and if configured, the interruption opening operation needs to be performed;
[0127] ③Judge whether the occupied lock variable LockCounter is odd number, if not, return the failure of WriteSpinlock release, if success, continue to execute step ④;
[0128] ④Add 1 to the lock variable LockCounter, and the variable LockCounter becomes even number, and the WriteSpinlock release is successful.
[0129] Exemplarily, in yet another specific implementation, Figure 9 is a schematic diagram of a write operation release lock process provided by an embodiment of the present application, referring to Figure 9 The above write operation release lock process can be specifically as follows:
[0130] (1) The process starts, enters the release logic of the spin lock write lock, and is ready to execute the release operation;
[0131] (2) Parameter check: judge whether the "parameter check is successful" (such as whether the lock object pointer is legal, whether the permission is correct), if failed, directly go to the end of the process, and the write lock release fails; if successful, enter (3);
[0132] (3) Check whether a specific lock method is enabled (corresponding to the locking process of the write operation to obtain the lock, to determine whether the interrupt needs to be turned on or not), if not configured, skip "turn on the interrupt", and directly enter (5); if configured, enter (4);
[0133] (4) Execute the interrupt, and allow the interrupt to trigger;
[0134] (5) Read the state variable of the spin lock, and judge whether the value is odd number, if even number, it means that the lock state is abnormal (not currently held by the core), go to the end of the process, and the write lock release fails; if odd number, enter (6);
[0135] (6) Increment the lock variable (odd number becomes even number), after the operation is executed, the write lock release is successful, and the process ends.
[0136] In summary, the present embodiment can at least alleviate the problems of poor stability of the write operation, no timeout mechanism, possible long waiting, and further affecting the system response speed of the existing CP AUTOSAR OS system. By adding the second preset parameter check, judging whether the spin lock is configured with the lock method related to the interrupt, reading and judging whether the state variable of the spin lock is odd number, and other design logic, the write operation release lock process is optimized, which is beneficial to improve the stability of the system write operation and improve the system response speed.
[0137] On the basis of the above-mentioned writing operation lock acquisition process and writing operation lock release process, the inventors find that the current CP AUTOSAR OS system still has the following problems: ① whether reading or writing data, Spinlock is used, which may cause waste of CPU resources; ② multiple reading tasks simultaneously acquire the same lock, and everyone is waiting, causing the waiting time to become longer. Therefore, the inventors improve the reading operation lock acquisition process and the reading operation lock release process, which are described below, but do not constitute a limitation of the present application.
[0138] Figure 4 is a flowchart of another spinlock design method provided by an embodiment of the present application, as shown in Figure 4 , the spinlock design method at least includes a reading operation lock acquisition process, and the reading operation lock acquisition process at least includes the following steps:
[0139] S17, a third function is called to perform at least a third preset parameter check.
[0140] Optionally, the third preset parameter check at least includes whether the lock object pointer and the calling context are legal.
[0141] S18, if the third preset parameter check fails, feedback reading lock acquisition failure, and end the reading operation lock acquisition process.
[0142] S19, if the third preset parameter check passes, check whether the reading lock is timed out.
[0143] S20, if the reading lock is timed out, feedback reading lock acquisition failure, and end the reading operation lock acquisition process.
[0144] S21, if the reading lock is not timed out, read the state variable of the spinlock, and determine whether the state variable is even.
[0145] S22, if the state variable is even, feedback reading lock acquisition success, and end the reading operation lock acquisition process.
[0146] S23, if the state variable is odd, recheck the timeout and continue the spin retry until the state variable is even, feedback reading lock acquisition success, and end the reading operation lock acquisition process.
[0147] Exemplarily, in another specific embodiment, the above-mentioned reading operation lock acquisition process can be specifically as follows:
[0148] ① the upper layer calls the GetReadSpinlock function (i.e. the aforementioned third function), first performs parameter checking, mainly judges whether the ID of the Spinlock exists, whether it belongs to the current task and the application, etc., and returns reading lock acquisition failure if the checking fails;
[0149] ② During the lock acquisition process, the timeout periodically checks. If the lock access has not been acquired after the set timeout period, meaning other applications are also performing operations and have not released the lock, then the ReadSpinlock acquisition failure is returned.
[0150] ③ Determine if the lock variable LockCounter is even. If it is odd, it means that another application is performing a write operation and you need to re-enter step ②. If the lock is even, ReadSpinlock is successfully acquired and LockCounter1 = LockCounter is recorded.
[0151] For example, in yet another specific implementation, Figure 10 This is a schematic diagram of a read operation lock acquisition process provided in an embodiment of the present invention. See also: Figure 10 The above-mentioned read operation lock acquisition process can also be further specified as follows:
[0152] (1) Obtain the entry point of the Spinlock read function: The process starts, enters the logic of acquiring the spinlock read lock, and prepares to execute the read lock operation;
[0153] (2) Determine whether the parameter check is successful (e.g., whether the lock object pointer and the call context are valid). If it fails, proceed directly to the end of the process and the lock acquisition fails. If it succeeds, proceed to (3).
[0154] (3) Determine whether the "read lock timeout" condition is triggered (such as the number of spin waits or the time exceeds the threshold). If the timeout occurs, proceed to the end of the process and the read lock acquisition fails; if the timeout does not occur, proceed to (4).
[0155] (4) Read the state variable of the spinlock and determine whether its value is even (usually bound to the "idle / held" state of the lock, even number means it can be acquired). If it is odd, return to (3), recheck the timeout, and continue to spin and retry. If it is even, the lock acquisition is successful and the process ends.
[0156] Furthermore, Figure 5 This is a flowchart of another spinlock design method provided by an embodiment of the present invention, such as... Figure 5 As shown, this spinlock design method also includes at least a read operation to release the lock process, which includes at least the following steps:
[0157] S24. Call the fourth function to perform at least the fourth preset parameter check.
[0158] Optionally, the fourth preset parameter check includes at least whether the lock object pointer is valid and whether the current core holds a read lock.
[0159] S25, if the fourth preset parameter check fails, feedback read lock release failure, end read operation release lock process.
[0160] S26, if the fourth preset parameter check passes, verify whether the current state variable of the spin lock matches the state variable of the spin lock when the read lock acquisition succeeds.
[0161] S27, if matched, feedback read lock release success, end read operation release lock process.
[0162] S28, if not matched, feedback read lock release failure, end read operation release lock process.
[0163] Exemplarily, in yet another specific embodiment, the read operation release lock process described above can be specifically as follows:
[0164] ①The upper layer calls the ReleaseReadSpinlock function (i.e. the fourth function described above), first performs parameter check, mainly judges whether the ID of the Spinlock exists, whether it belongs to the current task and the application, etc., and returns read lock release failure if the check fails;
[0165] ②Judge whether the value of LockCounter1 (i.e. the state variable of the spin lock when the read lock acquisition succeeds) is consistent with the LockCounter (i.e. the current state variable of the spin lock) of the release lock, if not consistent, return read lock acquisition failure, and the shared resource obtained is also not reliable;
[0166] ③If LockCounter1 is consistent with LockCounter, return ReadSpinlock release success, and the shared resource obtained is reliable.
[0167] Exemplarily, in yet another specific embodiment, Figure 11 is a schematic diagram of a read operation release lock process provided by an embodiment of the application, referring to Figure 11 , the read operation release lock process described above can also be specifically as follows:
[0168] (1) Release Spinlock read function entry: process start, enter the release logic of the spin lock read lock, and prepare to execute the read lock release operation;
[0169] (2) Judge whether the parameter check is successful (such as whether the lock object pointer is legal, whether the current core holds the read lock, etc.), if failed, directly go to the end of the process, read lock release failure; if successful, go to (3);
[0170] (3) verifying whether the current state of the lock variable (i.e., the current state variable of the spin lock) matches the "state recorded when the read lock is successfully acquired" (i.e., the state variable of the spin lock when the read lock is successfully acquired) (to ensure that the released lock is the one held by itself, avoiding misoperation), if not consistent, it means that the lock state is abnormal (possibly modified by other cores), go to the end of the flow, the read lock release fails; if consistent, the read lock release is successful, and the flow ends.
[0171] In summary, the embodiment can at least solve the following problems:
[0172] ① Solve the concurrency problem between read and read. When there is no write operation, multiple threads can hold read locks at the same time, and there will be no competition situation, reducing the waste of CPU resources.
[0173] ② Support holding read locks at the same time in the same core, without using interrupts, which causes system delay problems.
[0174] ③ Solve the problem of long-time occupation timeout after the spin lock is locked.
[0175] In other words, compared with the prior art, the beneficial effects of the embodiment are at least:
[0176] First, the existing classic AUTOSAR OS handles the spin lock by locking any cross-core read-write data, while the embodiment only adds a circular wait between write locks, and the system waiting time is much lower than that of the existing classic AUTOSAR OS. Second, when the number of locks used by the system is large, especially when the number of read locks is much higher than the number of write locks, the embodiment can improve the concurrency performance of the system. Then, when there is no write operation, the application of the embodiment can make multiple threads hold read locks at the same time, without competition, greatly improving the throughput of the system. Finally, the embodiment adds a timeout check for acquiring a lock to prevent long-time occupation of the spin lock, which facilitates the search for system problems and prevents the system from entering a dead loop.
[0177] Figure 6 is a structural schematic diagram of a spin lock design device provided by the embodiment of the application. The embodiment is at least applicable to domain controller applications in an unmanned (or autonomous) driving system and network security scenarios. The spin lock design device can be implemented in software and / or hardware. As shown in Figure 6 The spin lock design device is used to execute the spin lock design method of any one of the preceding embodiments or implementation manners. The spin lock design device at least includes a write operation lock acquisition module 110.
[0178] The write operation lock acquisition module 110 is at least specifically used for:
[0179] Before performing a write operation on a shared resource at the upper layer, a first function is called to perform at least a first preset parameter check. After the first preset parameter check passes, it is determined whether the spinlock is configured with an interrupt-related locking method. If the spinlock is configured with an interrupt-related locking method, interrupts are disabled to at least shield interrupt interference and ensure the atomicity of subsequent operations. If the spinlock is not configured with an interrupt-disabled locking method, or if interrupt disabling has already been executed, it is checked whether the lock acquisition timeout has occurred. If the lock acquisition has not timed out, the spinlock's state variable is read, and it is determined whether the state variable is even. If the state variable is even, the state variable is incremented, and a comparison-swap instruction is used to preempt the lock. After successful lock acquisition, a message is sent indicating that the write lock acquisition was successful, and the write operation lock acquisition process ends. If the state variable is odd or the lock acquisition fails, the timeout is checked again, and the spinlock is retried until the state variable is even. The state variable is then incremented, and a comparison-swap instruction is used to preempt the lock. After successful lock acquisition, a message is sent indicating that the write lock acquisition was successful, and the write operation lock acquisition process ends.
[0180] Optionally, the write operation lock acquisition module 110 is also specifically used for at least:
[0181] If the first preset parameter check fails, a write lock acquisition failure is reported, and the write operation lock acquisition process ends; if the lock acquisition times out, a write lock acquisition failure is reported, and the write operation lock acquisition process ends.
[0182] Optionally, the spinlock design device may further include at least a write operation release lock module 120;
[0183] The write operation release lock module 120 is specifically used for at least:
[0184] After performing a write operation on the shared resource at the upper layer, a second function is called to perform at least a second preset parameter check. If the second preset parameter check fails, a write lock release failure is reported, and the write operation lock release process ends. If the second preset parameter check passes, it is determined whether the spinlock is configured with an interrupt-related locking method. If the spinlock is configured with an interrupt-related locking method, interrupts are enabled and interrupt triggering is allowed. If the spinlock is not configured with an interrupt-disable locking method, or if interrupts have already been enabled, the spinlock's state variable is read, and it is determined whether the state variable is odd. If the state variable is odd, the state variable is incremented, and a write lock release success is reported, ending the write operation lock release process. If the state variable is even, it indicates that the lock state is abnormal, a write lock release failure is reported, and the write operation lock release process ends.
[0185] Optionally, the spinlock design device may further include at least a read operation lock acquisition module 130;
[0186] The read operation lock acquisition module 130 is specifically used for at least:
[0187] The third function is called to perform at least a third preset parameter check; when the third preset parameter check fails, a read lock acquisition failure is fed back, and the read operation lock acquisition process is ended; when the third preset parameter check passes, it is checked whether the read lock is timed out; when the read lock is timed out, a read lock acquisition failure is fed back, and the read operation lock acquisition process is ended; when the read lock is not timed out, a state variable of the spin lock is read, and it is judged whether the state variable is even; when the state variable is even, a read lock acquisition success is fed back, and the read operation lock acquisition process is ended; when the state variable is odd, the timeout is rechecked, and the spin retry is continued until the state variable is even, a read lock acquisition success is fed back, and the read operation lock acquisition process is ended.
[0188] Optionally, the spin lock design device further comprises a read operation lock release module 140.
[0189] The read operation lock release module 140 is specifically used for:
[0190] The fourth function is called to perform at least a fourth preset parameter check; when the fourth preset parameter check fails, a read lock release failure is fed back, and the read operation lock release process is ended; when the fourth preset parameter check passes, it is verified whether the current state variable of the spin lock matches the state variable of the spin lock when the read lock acquisition succeeds; when the current state variable of the spin lock matches the state variable of the spin lock when the read lock acquisition succeeds, a read lock release success is fed back, and the read operation lock release process is ended; when the current state variable of the spin lock does not match the state variable of the spin lock when the read lock acquisition succeeds, a read lock release failure is fed back, and the read operation lock release process is ended.
[0191] Optionally, the second preset parameter check at least includes whether the lock object pointer is legal and whether the permission is correct.
[0192] Optionally, the third preset parameter check at least includes whether the lock object pointer and the calling context are legal; and the fourth preset parameter check at least includes whether the lock object pointer is legal and whether the current core holds the read lock.
[0193] The technical scheme provided by the embodiment first, before performing the write operation of the shared resource in the upper layer, the write operation lock obtaining module calls a first function to perform at least a first preset parameter check; further, when the first preset parameter check passes, the write operation lock obtaining module judges whether the spin lock is configured with a lock method related to an interrupt; further, when the spin lock is configured with the lock method related to the interrupt, the write operation lock obtaining module performs the interrupt-off to at least shield the interrupt interference and ensure the atomicity of subsequent operations; otherwise, when the spin lock is not configured with the lock method related to the interrupt or the interrupt-off has been performed, the write operation lock obtaining module checks whether the lock obtaining is timed out; further, when the lock obtaining is not timed out, the write operation lock obtaining module reads a state variable of the spin lock and judges whether the state variable is even; further, when the state variable is even, the write operation lock obtaining module increments the state variable and uses a compare-and-swap instruction to preempt the lock; after the lock is preempted successfully, the write operation lock obtaining module feeds back that the write lock obtaining is successful, ends the write operation lock obtaining process, and, on the contrary, when the state variable is odd or the lock is not preempted successfully, the write operation lock obtaining module rechecks the timeout and continues the spin retry until the state variable is even, increments the state variable, and uses the compare-and-swap instruction to preempt the lock; after the lock is preempted successfully, the write operation lock obtaining module feeds back that the write lock obtaining is successful, and ends the write operation lock obtaining process.
[0194] Therefore, the embodiment can at least alleviate the problem that the existing CP AUTOSAR OS system has poor stability of the write operation, has no timeout mechanism, and may cause long waiting and affect the system response speed. The design logic of adding the first preset parameter check, judging whether the spin lock is configured with the lock method related to the interrupt, checking whether the lock obtaining is timed out, reading and judging whether the state variable of the spin lock is even, and the like optimizes the write operation lock obtaining process, which is beneficial to improving the stability of the system write operation and improving the system response speed.
[0195] The embodiment provides an electronic device, Figure 7 is a structural schematic diagram of an electronic device provided by the embodiment of the present application, referring to Figure 7The electronic device 1000 comprises a processor 1001 and a memory 1002, and the memory 1002 stores computer readable instructions, which are executed by the processor 1001 to perform the steps of any one of the spin lock design methods described above. According to the technical solution described above, the processor 1001 and the memory 1002 are interconnected and communicate with each other through a communication bus and / or other forms of connection mechanism (not shown). The memory 1002 stores a computer program executable by the processor, and when the electronic device 1000 is running, the processor 1001 executes the computer program to perform the spin lock design method in any one of the optional implementation manners of the above-described embodiments, to at least implement the following functions: before performing a write operation on a shared resource in an upper layer, a first function is called to perform at least a first preset parameter check; if the first preset parameter check is passed, it is determined whether the spin lock is configured with an interrupt locking method; if the spin lock is configured with the interrupt locking method, an interrupt is executed to at least shield the interruption of the interrupt and ensure the atomicity of subsequent operations; if the spin lock is not configured with the interrupt locking method or the interrupt has been executed, it is checked whether the lock acquisition is timed out; if the lock acquisition is not timed out, a state variable of the spin lock is read, and it is determined whether the state variable is even; if the state variable is even, the state variable is incremented, and the lock is preempted by using a compare-and-swap instruction, and after the lock is successfully preempted, it is fed back that the write lock is acquired successfully, and the write operation lock acquisition process is ended; if the state variable is odd or the lock is failed to be preempted, the timeout is rechecked, and the spin retry is continued until the state variable is even, the state variable is incremented, and the lock is preempted by using the compare-and-swap instruction, and after the lock is successfully preempted, it is fed back that the write lock is acquired successfully, and the write operation lock acquisition process is ended.
[0196] The embodiment provides a computer readable storage medium, which stores a computer program, and the program is executed by a processor to implement the spin lock design method provided by all the embodiments of the application: before performing a write operation on a shared resource in an upper layer, a first function is called to perform at least a first preset parameter check; if the first preset parameter check is passed, it is determined whether the spin lock is configured with an interrupt locking method; if the spin lock is configured with the interrupt locking method, an interrupt is executed to at least shield the interruption of the interrupt and ensure the atomicity of subsequent operations; if the spin lock is not configured with the interrupt locking method or the interrupt has been executed, it is checked whether the lock acquisition is timed out; if the lock acquisition is not timed out, a state variable of the spin lock is read, and it is determined whether the state variable is even; if the state variable is even, the state variable is incremented, and the lock is preempted by using a compare-and-swap instruction, and after the lock is successfully preempted, it is fed back that the write lock is acquired successfully, and the write operation lock acquisition process is ended; if the state variable is odd or the lock is failed to be preempted, the timeout is rechecked, and the spin retry is continued until the state variable is even, the state variable is incremented, and the lock is preempted by using the compare-and-swap instruction, and after the lock is successfully preempted, it is fed back that the write lock is acquired successfully, and the write operation lock acquisition process is ended.
[0197] Any combination of one or more computer readable medium can be utilized. The computer readable medium can be a computer readable signal medium or a computer readable storage medium. A computer readable storage medium can be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of the computer readable storage medium include an electrical connection having one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the context of this document, a computer readable storage medium can be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.
[0198] A computer readable signal medium can include a propagated data signal with computer readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated signal can take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A computer readable signal medium can be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.
[0199] Program code embodied on a computer readable medium can be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.
[0200] Computer program code for carrying out operations of the present application can be written in any combination of one or more programming languages, including an object oriented programming language such as Java, Smalltalk, C++ or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code can execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer can be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection can be made to an external computer (for example, through the Internet using an Internet Service Provider). In an embodiment, the present application is directed to computer program products comprising machine-readable media for carrying or having machine-executable instructions or programs
[0201] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, and are not intended to limit the present application; although the present application has been described in detail with reference to the above embodiments, those skilled in the art should understand that the technical solutions recorded in the above embodiments can be modified, or some or all of the technical features can be replaced by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.
Claims
1. A spinlock design method, characterized by, The spin lock design method comprises at least a write operation lock acquisition process. The write operation lock acquisition process comprises at least the following steps: Before executing a write operation of a shared resource in an upper layer, a first function is called to perform at least a first preset parameter check; If the first preset parameter check is passed, it is determined whether the spin lock is configured with a lock method related to an interrupt; If the spin lock is configured with the lock method related to the interrupt, an interrupt is executed to at least shield interrupt interference and ensure atomicity of subsequent operations; If the spin lock is not configured with the lock method related to the interrupt or the interrupt has been executed, it is checked whether the lock acquisition is timed out; If the lock acquisition is not timed out, a state variable of the spin lock is read, and it is determined whether the state variable is an even number; If the state variable is the even number, the state variable is incremented, and a lock is preempted by using a compare-and-swap instruction, and after the lock is successfully preempted, it is fed back that the write lock acquisition is successful, and the write operation lock acquisition process is ended; If the state variable is an odd number or the lock is not preempted successfully, it is rechecked whether the lock acquisition is timed out, and the spin retry is continued until the state variable is the even number, the state variable is incremented, and the lock is preempted by using the compare-and-swap instruction, and after the lock is successfully preempted, it is fed back that the write lock acquisition is successful, and the write operation lock acquisition process is ended.
2. The spinlock design method of claim 1, wherein, After the first function is called to perform at least the first preset parameter check before the write operation of the shared resource in the upper layer is executed, the write operation lock acquisition process further comprises at least the following: If the first preset parameter check is not passed, it is fed back that the write lock acquisition is failed, and the write operation lock acquisition process is ended; After it is checked whether the lock acquisition is timed out if the spin lock is not configured with the lock method related to the interrupt or the interrupt has been executed, the write operation lock acquisition process further comprises at least the following: If the lock acquisition is timed out, it is fed back that the write lock acquisition is failed, and the write operation lock acquisition process is ended.
3. The spinlock design method of claim 1 or 2, wherein, The spin lock design method further comprises at least a write operation lock release process. The write operation lock release process comprises at least the following steps: After the write operation of the shared resource in the upper layer is executed, a second function is called to perform at least a second preset parameter check; If the second preset parameter check is not passed, it is fed back that the write lock release is failed, and the write operation lock release process is ended; If the second preset parameter check is passed, it is determined whether the spin lock is configured with a lock method related to an interrupt; If the spin lock is configured with the lock method related to the interrupt, an interrupt is executed to at least shield interrupt interference and ensure atomicity of subsequent operations; If the spin lock is not configured with the lock method related to the interrupt or the interrupt has been executed, it is checked whether the lock acquisition is timed out; If the lock acquisition is not timed out, a state variable of the spin lock is read, and it is determined whether the state variable is an even number; If the state variable is the even number, the state variable is incremented, and a lock is preempted by using a compare-and-swap instruction, and after the lock is successfully preempted, it is fed back that the write lock acquisition is successful, and the write operation lock acquisition process is ended; 4. The spinlock design method of claim 1 or 2, wherein, If the state variable is an odd number or the lock is not preempted successfully, it is rechecked whether the lock acquisition is timed out, and the spin retry is continued until the state variable is the even number, the state variable is incremented, and the lock is preempted by using the compare-and-swap instruction, and after the lock is successfully preempted, it is fed back that the write lock acquisition is successful, and the write operation lock acquisition process is ended. The spin lock design method further comprises at least a read operation lock acquisition process. The read operation lock acquisition process comprises at least the following steps: A third function is called to perform at least a third preset parameter check; If the third preset parameter check is not passed, it is fed back that the read lock acquisition is failed, and the read operation lock acquisition process is ended; If the third preset parameter check passes, it is checked whether the read lock times out; If the read lock times out, it is fed back that the read lock acquisition fails, and the read operation lock acquisition process ends; If the read lock does not time out, the state variable of the spin lock is read, and it is judged whether the state variable is even; If the state variable is even, it is fed back that the read lock acquisition succeeds, and the read operation lock acquisition process ends; If the state variable is odd, the timeout is rechecked, and the spin retry continues until the state variable is even, it is fed back that the read lock acquisition succeeds, and the read operation lock acquisition process ends.
5. The spinlock design method of claim 4, wherein, The spin lock design method further at least includes a read operation lock release process; The read operation lock release process at least includes the following steps: A fourth function is called to perform at least a fourth preset parameter check; If the fourth preset parameter check fails, it is fed back that the read lock release fails, and the read operation lock release process ends; If the fourth preset parameter check passes, it is verified whether the current state variable of the spin lock matches the state variable of the spin lock when the read lock acquisition succeeds; If it matches, it is fed back that the read lock release succeeds, and the read operation lock release process ends; If it does not match, it is fed back that the read lock release fails, and the read operation lock release process ends.
6. The spinlock design method of claim 3, wherein, The second preset parameter check at least includes whether the lock object pointer is legal and whether the permission is correct.
7. The spinlock design method of claim 5, wherein, The third preset parameter check at least includes whether the lock object pointer and the calling context are legal; The fourth preset parameter check at least includes whether the lock object pointer is legal and whether the current core holds the read lock.
8. A spinlock design apparatus, comprising: A device for performing the spin lock design method of any one of claims 1-7; The spin lock design device at least includes a write operation lock acquisition module; The write operation lock acquisition module is at least specifically used for: Before performing the write operation of the shared resource at the upper layer, a first function is called to perform at least a first preset parameter check; if the first preset parameter check passes, it is judged whether the spin lock is configured with a lock method related to interrupts; if the spin lock is configured with the lock method related to interrupts, interrupts are executed to at least shield interrupt interference and ensure the atomicity of subsequent operations; if the spin lock is not configured with the lock method related to interrupts or the interrupts have been executed, it is checked whether the lock acquisition times out; if the lock acquisition does not time out, the state variable of the spin lock is read, and it is judged whether the state variable is even; if the state variable is even, the state variable is incremented, and the lock is preempted by using a compare-and-swap instruction; after the lock is successfully preempted, it is fed back that the write lock acquisition succeeds, and the write operation lock acquisition process ends; if the state variable is odd or the lock is not preempted successfully, the timeout is rechecked, and the spin retry continues until the state variable is even, the state variable is incremented, and the lock is preempted by using the compare-and-swap instruction; after the lock is successfully preempted, it is fed back that the write lock acquisition succeeds, and the write operation lock acquisition process ends.
9. An electronic device comprising a memory and a processor, said memory storing a computer program operable on said processor, characterized in that, The processor implements the steps in the spin lock design method of any one of claims 1 to 7 when executing the program.
10. A computer-readable storage medium having stored thereon a computer program, characterized in that, The computer program implements the steps in the spin lock design method of any one of claims 1 to 7 when executed by the processor.