A PCB board matching method for circuit design based on different speeds

Abstract

This invention relates to the field of image recognition technology, specifically to a method for matching PCB boards for circuit design based on different speeds. It solves the technical problem in existing technologies where the use of a fixed deviation threshold for PCB board matching leads to an inability to adaptively match accuracy requirements during the detection of circuits at different speeds, thus affecting detection accuracy and efficiency. The method includes: acquiring image data and design information of the PCB board; the design information includes geometric design parameters and circuit design speed; establishing a mapping relationship between the design coordinate system and the image coordinate system based on the image data and geometric design parameters, and determining the comprehensive deviation of each drill hole on the PCB board based on the mapping relationship; determining a dynamic deviation threshold based on the circuit design speed of the PCB board; and comparing the comprehensive deviation of multiple drill holes on the PCB board with the dynamic deviation threshold to determine the matching result between the PCB board and the speed requirement.

Description

Technical Field

[0001] This invention relates to the field of image recognition technology, and more specifically to a PCB board matching method for circuit design based on different speeds. Background Technology

[0002] Printed circuit boards (PCBs), serving as the support and electrical connection provider for electronic components, form conductive patterns on an insulating substrate using electronic printing technology. They are a core foundational component of modern electronic devices. In high-speed circuit design, as signal transmission rates continuously increase, the requirements for the physical characteristics of PCBs become increasingly stringent. Even minute manufacturing deviations, such as variations in conductor width, dielectric thickness, or drill hole location, can lead to characteristic impedance mismatch, causing signal reflection, attenuation, and timing errors. Therefore, precise matching of PCBs based on different speeds is essential to ensure signal integrity and circuit reliability.

[0003] Existing PCB inspection technologies mainly rely on manual vision or traditional image processing algorithms. They compare the geometric features of the actual board with those in the design documents and judge the deviation based on a fixed threshold. This cannot adapt to the differences in the operating speed of the circuit and is difficult to dynamically adjust the inspection standards. As a result, small deviations are easily missed in high-speed boards, while in low-speed boards, over-inspection may increase costs. The inspection accuracy and efficiency cannot meet the manufacturing requirements of high-density interconnect PCBs. Summary of the Invention

[0004] To address the technical problem in existing technologies where fixed deviation thresholds are used to match PCB board testing standards, leading to an inability to adaptively match accuracy requirements during the testing of circuits at different speeds and affecting testing accuracy and efficiency, the present invention aims to provide a PCB board matching method for circuit design based on different speeds. The specific technical solution adopted is as follows:

[0005] Firstly, a method for matching PCB boards for circuit design based on different speeds is provided, comprising: acquiring image data and design information of the PCB board; the design information includes the geometric design parameters of the PCB board and the circuit design speed; establishing a mapping relationship between the design coordinate system and the image coordinate system based on the image data and the geometric design parameters, and determining the comprehensive deviation of each drill hole on the PCB board based on the mapping relationship; the comprehensive deviation is used to characterize the degree of deviation between the actual state and the design state of the drill hole; determining a dynamic deviation threshold based on the circuit design speed of the PCB board; and comparing the comprehensive deviation of multiple drill holes on the PCB board with the dynamic deviation threshold to determine the matching result between the PCB board and the speed requirement.

[0006] Based on the above technical solution, in the PCB board matching method for circuit design based on different speeds provided by this invention, image data of the PCB board and design information including geometric design parameters and circuit design speed are acquired simultaneously. The comprehensive deviation between the actual drilling state and the design state is accurately quantified by combining coordinate mapping relationship. Then, a dynamic deviation threshold is set based on the adaptability of circuit design speed and the deviation is compared with the threshold. This solves the problem of insufficient accuracy of high-speed PCB boards due to the loose threshold in traditional fixed threshold detection, and avoids over-detection of low-speed PCB boards due to the strict threshold. Finally, it realizes accurate determination of PCB board matching results under different speed requirements, while taking into account the high accuracy requirements of high-speed circuits and the detection efficiency of low-speed PCBs, effectively balancing the accuracy of PCB detection and production economy.

[0007] In conjunction with the first aspect mentioned above, in one possible implementation, the method for establishing a mapping relationship between the design coordinate system and the image coordinate system based on image data and geometric design parameters specifically includes: identifying multiple vertices of the PCB board from the image data, and determining the reliability weight of each vertex based on the edge geometric features at each vertex; mapping the design vertices of the PCB board in the geometric design parameters to the image coordinate system, and determining the mapping deviation of each vertex; performing a weighted calculation of the mapping deviation based on the reliability weight of each vertex to obtain the overall mapping deviation; iteratively optimizing the mapping parameters of the design vertices to the image coordinate system until the optimized overall mapping deviation meets the preset optimization conditions, and using the optimized mapping parameters as the mapping relationship between the design coordinate system and the image coordinate system.

[0008] In conjunction with the first aspect above, in one possible implementation, the method for determining the reliability weight of each vertex based on the edge geometric features at each vertex specifically includes: for each vertex, identifying the image angle between two adjacent edges from the image data; comparing the similarity between the image angle corresponding to each vertex and the design angle in the geometric design parameters to determine the reliability weight of each vertex.

[0009] In conjunction with the first aspect above, in one possible implementation, the target drill hole is any drill hole on the PCB board; the method for determining the comprehensive deviation of the target drill hole on the PCB board based on the mapping relationship specifically includes: identifying the center point position and edge contour of the target drill hole in the image coordinate system; determining the center point position deviation of the target drill hole by comparing the offset between the center point position of the target drill hole in the image coordinate system and the center point position in the design coordinate system according to the mapping relationship; determining the edge contour deviation of the target drill hole by comparing the offset between the edge contour of the target drill hole in the image coordinate system and the edge contour in the design coordinate system according to the mapping relationship; and determining the comprehensive deviation of the target drill hole based on the center point position deviation and the edge contour deviation.

[0010] In conjunction with the first aspect above, in one possible implementation, the method for identifying the center point position and edge contour of the target borehole in the image coordinate system specifically includes: extracting candidate edge contours from the region of the target borehole in the image data, determining the roundness index of the candidate edge contours, and retaining the candidate edge contours whose roundness index meets the preset roundness requirements as the edge contours of the target borehole; clustering the normal intersections of multiple sampling points on the edge contour of the target borehole, and taking the center point of the cluster as the center point position of the target borehole in the image coordinate system.

[0011] In conjunction with the first aspect above, in one possible implementation, the method for determining the edge contour deviation of the target borehole by comparing the offset between the edge contour of the target borehole in the image coordinate system and the edge contour of the design coordinate system based on the mapping relationship specifically includes: taking the mapping point of the design center point of the target borehole in the geometric design parameters in the image coordinate system as a reference point according to the mapping relationship; emitting rays from the reference point along multiple directions, and determining the distance between the intersection point of each ray and the edge contour of the target borehole and the reference point; determining the radial deviation in each direction based on the distance in each direction and the design radius of the target borehole in the geometric design parameters; and taking the maximum value of the radial deviations in multiple directions as the edge contour deviation of the target borehole.

[0012] In conjunction with the first aspect above, in one possible implementation, after determining the center point position deviation of each drill hole, the method further includes: selecting the smallest deviation from the center point position deviations of multiple drill holes on the PCB board as the systematic deviation; performing translation correction on the mapping relationship based on the systematic deviation; and redetermining the center point position deviation of each drill hole based on the corrected mapping relationship.

[0013] In conjunction with the first aspect above, in one possible implementation, the method for determining the dynamic deviation threshold based on the circuit design rate of the PCB board specifically includes: determining the dynamic deviation threshold based on the maximum rate supported by the PCB board, the circuit design rate, and a preset reference deviation threshold; the dynamic deviation threshold is negatively correlated with the circuit design rate.

[0014] In conjunction with the first aspect above, in one possible implementation, the method for determining the matching result between the PCB board and the speed requirement by comparing the comprehensive deviation of multiple drill holes on the PCB board with the dynamic deviation threshold specifically includes: if the comprehensive deviation of at least one drill hole is greater than the dynamic deviation threshold, then the PCB board is determined not to match the speed requirement; if the comprehensive deviation of multiple drill holes is less than or equal to the dynamic deviation threshold, then the PCB board is determined to match the speed requirement.

[0015] In conjunction with the first aspect above, in one possible implementation, the method for acquiring image data of the PCB board specifically includes: acquiring the original image of the PCB board under uniform lighting conditions; performing grayscale processing on the original image to generate image data and associating it with the serial number of the PCB board.

[0016] Secondly, a PCB board matching device for circuit design based on different speeds is provided, comprising: a processor and a storage medium; the storage medium includes instructions, and the processor is used to execute the instructions to implement the actions described in the first aspect and any possible implementation thereof. This PCB board matching device for circuit design based on different speeds can be an electronic device or a chip within an electronic device.

[0017] Thirdly, a computer-readable storage medium is provided, in which instructions are stored, which, when executed on a PCB board matching device for circuit design based on different speeds, cause the PCB board matching device for circuit design based on different speeds to perform the actions described in the first aspect and any possible implementation thereof.

[0018] Fourthly, a computer program product containing instructions is provided, which, when run on a PCB board matching device for circuit design based on different speeds, causes the PCB board matching device for circuit design based on different speeds to perform the actions described in the first aspect and any possible implementation thereof.

[0019] The present invention has the following beneficial effects:

[0020] By simultaneously acquiring image data of the PCB board and design information including geometric design parameters and circuit design speed, and combining coordinate mapping relationships, the comprehensive deviation between the actual drilling state and the design state is accurately quantified. Then, based on the adaptability of the circuit design speed, a dynamic deviation threshold is set and the deviation is compared with the threshold. This solves the problem of insufficient accuracy of high-speed PCB boards due to the loose threshold in traditional fixed threshold detection, and avoids over-detection of low-speed PCB boards due to the strict threshold. Ultimately, it achieves accurate determination of PCB board matching results under different speed requirements, while taking into account the high accuracy requirements of high-speed circuits and the detection efficiency of low-speed PCBs, effectively balancing the accuracy of PCB detection and production economy. Attached Figure Description

[0021] To more clearly illustrate the technical solutions and advantages in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0022] Figure 1 One of the flowcharts of a PCB board matching method for circuit design based on different speeds is provided as an embodiment of the present invention;

[0023] Figure 2 The second flowchart of a PCB board matching method for circuit design based on different speeds is provided as an embodiment of the present invention;

[0024] Figure 3 This is a schematic diagram illustrating the mapping of a design vertex to an image coordinate system, as provided in one embodiment of the present invention.

[0025] Figure 4 The third flowchart of a PCB board matching method for circuit design based on different speeds is provided as an embodiment of the present invention;

[0026] Figure 5 This is a schematic diagram illustrating the identification of the center point position within an image coordinate system, as provided in one embodiment of the present invention.

[0027] Figure 6 This is a schematic diagram illustrating the radial deviation between the edge contours of an image coordinate system and a design coordinate system, as provided in an embodiment of the present invention.

[0028] Figure 7 This is a schematic diagram of the hardware structure of a PCB board matching device for circuit design based on different speeds, provided as an embodiment of the present invention. Detailed Implementation

[0029] To further illustrate the technical means and effects adopted by the present invention to achieve its intended purpose, the following, in conjunction with the accompanying drawings and preferred embodiments, details the specific implementation, structure, features, and effects of a PCB board matching method for circuit design based on different speeds proposed according to the present invention. In the following description, different "one embodiment" or "another embodiment" do not necessarily refer to the same embodiment. Furthermore, specific features, structures, or characteristics in one or more embodiments can be combined in any suitable form.

[0030] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains.

[0031] The following description, in conjunction with the accompanying drawings, details a specific scheme for a PCB board matching method for circuit design based on different speeds provided by the present invention.

[0032] Please see Figure 1 The diagram illustrates a flowchart of a PCB board matching method for circuit design based on different speeds, according to an embodiment of the present invention. This PCB board matching method for circuit design based on different speeds includes:

[0033] S1. Obtain image data and design information of the PCB board.

[0034] In some implementations, under uniform lighting conditions, the original image of the PCB board is acquired, then the original image is converted to grayscale to generate image data and associated with the PCB board's serial number. Specifically, this includes:

[0035] An industrial charge-coupled device (CCD) camera, fixed above the inspection platform, is used in conjunction with a telecentric lens to perform image acquisition. This lens is used to eliminate perspective distortion and ensure that the imaging proportions of different areas of the PCB board are consistent with reality. Simultaneously, a uniform lighting environment is set to ensure that the PCB board surface is evenly illuminated without significant reflections, avoiding the loss of image details in reflective areas.

[0036] The PCB board to be inspected is then fixed in place. The platform motion control system drives the camera to move sequentially to the predefined acquisition station (for example, the number of acquisition stations is 5, covering all areas to be analyzed, such as the edge of the PCB board and the drill holes) to acquire high-definition three primary colors (red, green, blue, RGB) original images to ensure the clarity and integrity of the imaging of key areas, or backlighting is used to enhance the transmission characteristics of the drill holes, making it easier to extract clear hole wall contours.

[0037] The acquired raw images are processed using a preset grayscale algorithm (e.g., a weighted calculation method with RGB channel weights of 0.299, 0.587, and 0.114). This process preserves key information such as image edges and textures while reducing image data volume to improve subsequent processing efficiency. The grayscale images are then saved in a lossless compression format (e.g., portable network graphics, PNG) to avoid detail loss caused by image compression. Simultaneously, associated metadata is recorded for each image, including acquisition time, workstation number, and corresponding PCB board serial number. Image data is then bound to this serial number, enabling end-to-end traceability of image data and facilitating the association of subsequent deviation data with specific PCB boards.

[0038] Extract design information from the corresponding design files of the PCB board (such as computer-aided design (CAD) documents). The design information includes the geometric design parameters of the PCB board (including the design vertex coordinates of the outer edge of the PCB board, the design center point coordinates of the drill holes, and the design radius) and the circuit design speed.

[0039] S2. Based on the image data and geometric design parameters, establish the mapping relationship between the design coordinate system and the image coordinate system, and determine the comprehensive deviation of each drill hole on the PCB board according to the mapping relationship.

[0040] In some implementation methods, combined Figure 1 ,like Figure 2 As shown in Figure S2, the method for establishing the mapping relationship between the design coordinate system and the image coordinate system based on image data and geometric design parameters can be implemented through the following steps S21 to S24. This method is suitable for specific PCB inspection scenarios where the board edge has undergone precision milling or cannot be located using traditional Fiducial Marks. The details are explained below:

[0041] S21. Identify multiple vertices of the PCB board from the image data, and determine the reliability weight of each vertex based on the edge geometry features at each vertex.

[0042] In some implementations, a Gaussian filtering algorithm is first applied to the already converted grayscale image to suppress random noise and prevent false edges from appearing during subsequent edge detection, thus ensuring the accuracy of the edge contours. Then, a pre-defined edge detection algorithm (such as the Canny operator) is used to extract the edge contours from the image.

[0043] Next, from the extracted edge contours, the four vertices representing the outer edge of the PCB board are identified, for example... Figure 3 Vertices 1, 2, 3, and 4 are identified in the image data. Then, the image angle between two adjacent edges is identified from the image data. Then compare the image angles corresponding to each vertex. Design angles in geometric design parameters The similarity (usually 90°) determines the reliability weight of each vertex, expressed as:

[0044]

[0045] In the formula, the image angle is affected by factors in the production and inspection processes, such as fluctuations in cutting accuracy during PCB manufacturing, stress deformation of the board material, fixed offset of the board on the platform during inspection, and lens distortion during image acquisition. Design angles in geometric design parameters There is a deviation. The closer the image angle is to the design angle, the closer the reliability weight R is to 1, which can quantify the degree of conformity between the geometric features of each vertex and the design features.

[0046] S22. Map the design vertices of the PCB board in the geometric design parameters to the image coordinate system and determine the mapping deviation of each vertex.

[0047] Extract the four design vertices of the PCB board from the geometric design parameters, for example Figure 3 The design vertices 1-1, 2-1, 3-1, and 4-1 are projected onto the image coordinate system according to mapping parameters (e.g., initial translation is set to (0, 0) pixels, initial rotation angle is set to 0°, and initial scaling factor is set to 1). Figure 3 (The dashed line portion) yields the corresponding design projection vertices 1-2, 2-2, 3-2, and 4-2. Each design vertex is paired with its corresponding image recognition vertex, forming four pairs of vertices (each pair containing one design projection vertex and one image recognition vertex). The Euclidean distance between each pair of design projection vertices and the image recognition vertex is then calculated. This distance is used as the mapping deviation for each vertex, quantifying the degree of positional offset of a single design vertex in the image coordinate system.

[0048] S23. The mapping deviation is calculated by weighting the reliability weight of each vertex to obtain the overall mapping deviation.

[0049] Multiply the mapping deviation of each vertex by its corresponding reliability weight, and then sum the products of the four pairs of vertices to obtain the overall mapping deviation D, which is expressed as:

[0050]

[0051] In the formula, This represents the reliability weight of the i-th vertex; This represents the mapping deviation of the i-th vertex.

[0052] By combining the reliability differences of all vertices, the offset data is weighted and integrated to obtain the overall mapping deviation D. This avoids the vertices with lower reliability from excessively interfering with the representativeness of the overall deviation, and makes the overall mapping deviation more accurately reflect the overall matching error between the designed vertex projection and the actual vertices in the image.

[0053] S24. Iteratively optimize the mapping parameters from the design vertex to the image coordinate system until the overall mapping deviation after optimization meets the preset optimization conditions. Use the optimized mapping parameters as the mapping relationship between the design coordinate system and the image coordinate system.

[0054] In some implementations, a preset iterative optimization method (e.g., gradient descent with a preset iteration step size of 0.01 and a termination threshold of 0.02 pixels for the overall mapping deviation) is used to adjust the mapping parameters (including translation, rotation angle, and scaling factor) projected from the design vertex to the image coordinate system. After each adjustment, operations S22 to S23 are repeated to recalculate the overall mapping deviation until the optimized overall mapping deviation meets the preset optimization conditions (i.e., the deviation is less than the termination threshold, or the number of iterations reaches the preset maximum value), at which point the iteration stops. The currently adjusted mapping parameters are used as the mapping relationship between the design coordinate system and the image coordinate system to eliminate the error of the initial mapping and establish a precise spatial coordinate correspondence.

[0055] Furthermore, after determining the mapping relationship, analysis needs to be performed on the drilled holes on the PCB board. Since PCB drilled holes are miniature through-holes processed on the printed circuit board, they are mainly used to achieve vertical interconnection of electrical signals between different layers and the mounting of component pins. These drilled holes form conductive channels through metallization processes, constituting the basis for complex circuit connections. Their positional accuracy, hole wall quality, and shape regularity directly affect circuit signal integrity, impedance control, and assembly reliability, making them a key process in high-density interconnect PCB manufacturing.

[0056] The core purpose of deviation analysis on PCB boards is to assess the degree to which their manufacturing precision conforms to design specifications. The analysis mainly focuses on two key characteristics: first, positional accuracy, which is the deviation between the actual position of the drilled holes and the design coordinates, directly affecting the assembly accuracy of components and the reliability of electrical connections; second, shape and dimensional accuracy, including the roundness of hole diameters and other geometric features, which relates to the integrity of signal transmission and the accuracy of impedance control.

[0057] In some implementation methods, combined Figure 1 ,like Figure 4 As shown, the target drill hole is any hole on the PCB board. Taking the target drill hole as an example, the method for determining the comprehensive deviation of the target drill hole on the PCB board based on the mapping relationship in S2 can be specifically implemented through the following S25 to S28, which are explained in detail below:

[0058] S25. Identify the center point and edge contour of the target borehole in the image coordinate system.

[0059] In some implementations, PCB drill holes should ideally be circular, but actual images may contain pseudo-edges formed by noise such as scratches and stains. By calculating the circularity index and setting a threshold, it is possible to effectively distinguish between real drill holes and noise interference: the circularity of real drill hole edges is close to 1, while the circularity of irregular noise edges is lower.

[0060] First, candidate edge contours (i.e., each continuous edge segment) are extracted from the target borehole region in the image data. The area A and perimeter P enclosed by each candidate edge contour are calculated, and the roundness index C of the candidate edge contour is determined. The formula for calculating the roundness index is as follows:

[0061]

[0062] In the formula, for an ideal circle, substituting into the equation yields a roundness index C=1. Since the ratio of the area of ​​a circle to the square of its circumference is the largest among closed figures, the roundness index for other figures is 0 < C < 1. The roundness index C accurately quantifies the degree to which the edge contour fits the ideal circle, thus effectively distinguishing the circular edge of a real borehole from the irregular edge formed by noise interference.

[0063] Candidate edge profiles that meet the preset roundness requirements (e.g., roundness index ≥ 0.8) are retained as the edge profiles of the target borehole.

[0064] Secondly, such as Figure 5 As shown, multiple sampling points are uniformly selected on the edge contour of the target borehole (e.g., one point is sampled every 10°, for a total of 36 points) to cover different positions on the edge. Then, a normal line is drawn along the normal direction of each sampling point to obtain the intersection of multiple sets of normal lines. The geometric center (i.e., the centroid) is obtained by calculating the arithmetic mean of the coordinates of multiple sets of intersection points and is used as the location of the borehole center point.

[0065] S26. Based on the mapping relationship, compare the offset between the center point position of the target borehole in the image coordinate system and the center point position in the design coordinate system to determine the deviation of the center point position of the target borehole.

[0066] First, the mapping relationship between the design coordinate system and the image coordinate system is invoked to extract the coordinates of the center point of the target borehole in the design coordinate system from the geometric design parameters. Then, the coordinates are transformed to the image coordinate system through the mapping relationship to obtain the coordinates of the design center point of the target borehole in the image coordinate system. ).

[0067] Next, the center point of the target borehole in the image coordinate system (i.e., the actual center point coordinates) is determined. The coordinates of the design center point in the image coordinate system are ( ) Pairing is performed. The deviation vector of the target borehole is obtained by calculating the difference between the actual center point coordinates and the design center point coordinates in both the horizontal and vertical directions. , represented as:

[0068]

[0069] In the formula, the deviation vector The direction is characterized by the orientation angle, used to determine the orientation of the center point's position offset; deviation vector The modulus represents the magnitude of the deviation in the center point position.

[0070] Furthermore, after S26, the present invention can also utilize the characteristic that the minimum deviation more closely matches the true value of the systematic spatial offset caused by the detection platform, camera installation, etc., to determine and eliminate a unified systematic offset benchmark, thereby improving the matching accuracy of the mapping relationship between the design coordinate system and the image coordinate system. Specifically, this includes: selecting the minimum deviation from the center point position deviations of multiple drill holes on the PCB board as the systematic deviation; then, based on the systematic deviation, directly superimposing the horizontal and vertical components of the corresponding deviation vector into the translation parameters of the mapping relationship to achieve translation correction of the mapping relationship; and redetermining the center point position deviation of each drill hole based on the corrected mapping relationship, and continuing to execute subsequent steps.

[0071] S27. Based on the mapping relationship, compare the offset between the edge contour of the target borehole in the image coordinate system and the edge contour in the design coordinate system to determine the edge contour deviation of the target borehole.

[0072] Center point deviation only reflects the overall positional offset of the borehole, while edge profile deviation reveals shape defects such as roundness error, burrs, or dents. In high-speed, high-frequency circuits, irregular borehole walls can disrupt impedance continuity, causing signal reflection and loss.

[0073] In some implementations, the mapping point of the target borehole's design center point in the image coordinate system is first used as the reference point, based on the mapping relationship. Then, rays are emitted from the reference point along multiple directions (e.g., one ray every 10°, for a total of 36 rays). The Euclidean distance between the intersection point of each ray and the edge contour of the target borehole and the reference point is determined and recorded as the actual edge distance. If multiple intersection points exist between a ray and the edge contour, the intersection point closest to the reference point is selected as the edge contour intersection point to eliminate interference from edge noise or contour burrs and ensure the accuracy of the actual edge distance.

[0074] Next, based on the distance in each direction and the design radius of the target borehole in the geometric design parameters, the radial deviation in each direction is determined. Specifically, such as... Figure 6 As shown, the ideal edge of the target borehole is an ideal circle with the reference point as the center and the design radius as the radius. Therefore, the deviation between the actual edge distance and the design radius is the radial deviation in that direction. Finally, the maximum value of the radial deviations in multiple directions is taken as the edge profile deviation of the target borehole. Focusing on the point where the actual borehole profile deviates most from the design profile, this accurately reflects the degree of profile deviation of the target borehole relative to the design shape during the manufacturing process.

[0075] S28. Determine the overall deviation of the target borehole based on the center point position deviation and the edge profile deviation.

[0076] The comprehensive deviation of the target borehole is obtained by summing the values ​​of the center point position deviation and the edge contour deviation. This includes both the deviation of the borehole in spatial positioning and the manufacturing deviation of the borehole contour shape, which can provide accurate and complete quantitative indicators for a comprehensive evaluation of borehole quality.

[0077] Furthermore, if the impact of center point position deviation and edge contour deviation on PCB board performance differs under different circuit scenarios, different parameter tuning coefficients can be set for both to be summed after parameter tuning. For example, in high-speed / high-frequency circuits, the center point position deviation of the drill hole directly affects the impedance matching of the signal transmission path, and its impact on circuit performance is greater than that of the contour deviation. In this case, a higher parameter tuning coefficient can be assigned to the center point position deviation (e.g., the parameter tuning coefficient for the center point position deviation is set to 1.2, and the parameter tuning coefficient for the edge contour deviation is set to 0.8). In low-speed / low-frequency circuits, the impact of the contour deviation (affecting hole diameter consistency) is relatively increased, and its parameter tuning coefficient can be appropriately increased (e.g., the parameter tuning coefficient for the edge contour deviation is set to 1.2, and the parameter tuning coefficient for the center point position deviation is set to 0.8).

[0078] S3. Determine the dynamic deviation threshold based on the circuit design speed of the PCB board.

[0079] In some implementations, the dynamic deviation threshold is determined based on the maximum speed supported by the PCB board, the circuit design speed, and a preset reference deviation threshold (the reference deviation threshold is determined according to the PCB board manufacturing standards or the allowable total deviation under low-speed circuits; the allowable total deviation is the sum of the maximum allowable values ​​of the drill center point position deviation and the edge contour deviation, such as 5 pixels, corresponding to a physical length of 25μm). , represented as:

[0080]

[0081] In the formula, This represents the preset baseline deviation threshold for the PCB board, corresponding to low-speed scenarios. Indicates the circuit design speed of the PCB board; Indicates the maximum speed supported by the PCB board; The stringency coefficient represents the threshold and is used to control the degree of influence of the rate on the threshold. It is usually set to 0.1-0.5 and can be adjusted according to the accuracy requirements. For example, it is set to 0.3 in general high-speed circuit scenarios.

[0082] Convert the circuit design rate to a ratio relative to the maximum rate (dimensionless) to eliminate the influence of the absolute value of the rate.

[0083] It is a rate adjustment item, corresponding to the threshold tightening ratio for the current rate.

[0084] The final calculated dynamic deviation threshold With circuit design speed Negative correlation, as the maximum allowable deviation for adapting to the current circuit speed, meets the requirement that the higher the speed, the stricter the threshold.

[0085] S4. Compare the overall deviation of multiple drill holes on the PCB with the dynamic deviation threshold to determine the matching result between the PCB and the speed requirements.

[0086] In some implementations, if the overall deviation of at least one drill hole is greater than the dynamic deviation threshold, the PCB board is determined to be mismatched with the speed requirement; if the overall deviation of multiple drill holes is less than or equal to the dynamic deviation threshold, the PCB board is determined to be matched with the speed requirement.

[0087] Based on the above technical solution, by simultaneously acquiring image data of the PCB board and design information including geometric design parameters and circuit design speed, and combining coordinate mapping relationships, the comprehensive deviation between the actual drilling state and the design state is accurately quantified. Then, based on the adaptability of the circuit design speed, a dynamic deviation threshold is set and the deviation is compared with the threshold. This solves the problem of insufficient accuracy of high-speed PCB boards due to the loose threshold in traditional fixed threshold detection, and avoids over-detection of low-speed PCB boards due to the strict threshold. Finally, it achieves accurate determination of PCB board matching results under different speed requirements, while taking into account the high accuracy requirements of high-speed circuits and the detection efficiency of low-speed PCBs, effectively balancing the accuracy of PCB detection and production economy.

[0088] It should be noted that the order of the above embodiments of the present invention is merely for descriptive purposes and does not represent the superiority or inferiority of the embodiments. The processes depicted in the accompanying drawings do not necessarily require a specific or sequential order to achieve the desired result. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0089] The various embodiments in this specification are described in a progressive manner. The same or similar parts between the various embodiments can be referred to each other. Each embodiment focuses on describing the differences from other embodiments.

[0090] In this embodiment of the invention, the functional units of the PCB matching device for circuit design based on different speeds can be divided according to the above method examples. For example, each function can be divided into its own functional units, or two or more functions can be integrated into one processing unit. The integrated unit can be implemented in hardware or as a software functional unit. It should be noted that the unit division in this embodiment is illustrative and only represents one logical functional division; other division methods may be used in actual implementation.

[0091] This invention also provides a hardware structure diagram of a PCB board matching device for circuit design based on different speeds, see [link / reference]. Figure 7 The PCB board matching device 700 for circuit design based on different speeds includes a processor 701, and optionally, a memory 702 connected to the processor 701.

[0092] In the first possible implementation, see Figure 7 The PCB board matching device 700 for circuit design based on different rates also includes a transceiver 703. The processor 701, memory 702, and transceiver 703 are connected via a bus. The transceiver 703 is used to communicate with other devices or communication networks. Optionally, the transceiver 703 may include a transmitter and a receiver. The device in the transceiver 703 that implements the receiving function can be considered as a receiver, which is used to perform the receiving steps in the embodiments of the present invention. The device in the transceiver 703 that implements the transmitting function can be considered as a transmitter, which is used to perform the transmitting steps in the embodiments of the present invention.

[0093] Based on the first possible implementation method Figure 7 The schematic diagram shown can be used to illustrate the structure of the PCB board matching device for circuit design based on different speeds involved in the above embodiments.

[0094] in, Figure 7 The diagram also illustrates a system chip in a PCB board matching device for circuit design based on different speeds. In this case, the actions performed by the aforementioned PCB board matching device for circuit design based on different speeds can be implemented by this system chip. The specific actions performed can be found above and will not be repeated here.

[0095] In implementation, each step of the method provided in this embodiment can be completed by integrated logic circuits in the processor or by instructions in software form. The steps of the method disclosed in this embodiment can be directly manifested as being executed by a hardware processor, or being executed by a combination of hardware and software modules in the processor.

[0096] The processor in this invention may include, but is not limited to, at least one of the following: a central processing unit (CPU), a microprocessor, a digital signal processor (DSP), a microcontroller unit (MCU), or an artificial intelligence processor, etc., which are various computing devices that run software. Each computing device may include one or more cores for executing software instructions to perform calculations or processing. The processor may be a standalone semiconductor chip or integrated with other circuits into a single semiconductor chip. For example, it may be integrated with other circuits (such as encoding / decoding circuits, hardware acceleration circuits, or various bus and interface circuits) to form a System-on-a-Chip (SoC), or it may be integrated as a built-in processor within an ASIC. The ASIC with the integrated processor may be packaged separately or together with other circuits. In addition to the cores for executing software instructions to perform calculations or processing, the processor may further include necessary hardware accelerators, such as field-programmable gate arrays (FPGAs), programmable logic devices (PLDs), or logic circuits that implement dedicated logic operations.

[0097] The memory in the embodiments of the present invention may include at least one of the following types: read-only memory (ROM) or other types of static storage devices capable of storing static information and instructions; random access memory (RAM) or other types of dynamic storage devices capable of storing information and instructions; or electrically erasable programmable read-only memory (EEPROM). In some scenarios, the memory may also be a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical discs, laser discs, optical discs, digital universal optical discs, Blu-ray discs, etc.), magnetic disk storage media or other magnetic storage devices, or any other medium capable of carrying or storing desired program code in the form of instructions or data structures and accessible by a computer, but is not limited thereto.

[0098] This invention also provides a computer-readable storage medium including instructions that, when run on a computer, cause the computer to perform any of the methods described above.

[0099] This invention also provides a computer program product containing instructions that, when run on a computer, cause the computer to perform any of the methods described above.

[0100] This invention also provides a chip, which includes a processor and an interface circuit. The interface circuit is coupled to the processor. The processor is used to run computer programs or instructions to implement the above-described method. The interface circuit is used to communicate with other modules outside the chip.

[0101] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented using software programs, implementation can be, in whole or in part, in the form of a computer program product. This computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of the present invention are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium accessible to a computer or a data storage device containing one or more servers, data centers, etc., that can be integrated with the medium. The available media can be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., DVDs), or semiconductor media (e.g., solid-state disks (SSDs)).

[0102] Although the invention has been described herein in conjunction with various embodiments, those skilled in the art, by reviewing the accompanying drawings and the disclosure, will understand and implement other variations of the disclosed embodiments in carrying out the claimed invention. In this invention, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude a plurality. A single processor or other unit can implement several of the functions listed in this invention.

[0103] Although the invention has been described in conjunction with specific features and embodiments, it is obvious that various modifications and combinations can be made therein without departing from the spirit and scope of the invention. Accordingly, this specification and drawings are merely illustrative of the invention and are to be considered as covering any and all modifications, variations, combinations, or equivalents within the scope of the invention. Clearly, those skilled in the art can make various alterations and modifications to the invention without departing from its spirit and scope. Thus, if such modifications and modifications of the invention fall within the scope of the invention and its equivalents, the invention is also intended to include such modifications and modifications.

Claims

1. A PCB board matching method for different rate based circuit design, characterized in that, include: Acquire image data and design information of the PCB board; The design information includes the geometric design parameters of the PCB board and the circuit design speed; Based on the image data and geometric design parameters, a mapping relationship between the design coordinate system and the image coordinate system is established, and the comprehensive deviation of each drill hole on the PCB board is determined based on the mapping relationship; the comprehensive deviation is used to characterize the degree of deviation between the actual state of the drill hole and the design state. The circuit design rate is converted into a ratio relative to the maximum rate supported by the PCB board, and a threshold tightening ratio is determined by combining the threshold strictness coefficient; the strictness coefficient is used to control the degree of influence of the rate on the threshold; a preset reference deviation threshold is reduced based on the threshold tightening ratio to obtain a dynamic deviation threshold; the dynamic deviation threshold is negatively correlated with the circuit design rate. By comparing the combined deviation of multiple drill holes on the PCB with the dynamic deviation threshold, the matching result between the PCB and the speed requirement is determined.

2. The PCB board matching method for circuit design according to claim 1, wherein, Based on the image data and geometric design parameters, establish a mapping relationship between the design coordinate system and the image coordinate system, including: Multiple vertices of the PCB board are identified from the image data, and the reliability weight of each vertex is determined based on the edge geometry features at each vertex. Map the design vertices of the PCB board in the geometric design parameters to the image coordinate system and determine the mapping deviation of each vertex; The mapping deviation is calculated by weighting the reliability weight of each vertex to obtain the overall mapping deviation; The mapping parameters from the design vertex to the image coordinate system are iteratively optimized until the overall mapping deviation after optimization meets the preset optimization conditions. The optimized mapping parameters are then used as the mapping relationship between the design coordinate system and the image coordinate system.

3. The PCB board matching method for circuit design according to claim 2, characterized in that, Based on the edge geometry features at each vertex, determine the reliability weight of each vertex, including: For each vertex, identify the image angle between two adjacent edges from the image data; By comparing the similarity between the image angle corresponding to each vertex and the design angle in the geometric design parameters, the reliability weight of each vertex is determined.

4. The PCB board matching method for circuit design according to claim 1, characterized in that, The target drill hole is any hole on the PCB board; the overall deviation of the target drill hole on the PCB board is determined according to the mapping relationship, including: Identify the center point and edge contour of the target borehole within the image coordinate system; Based on the mapping relationship, the offset between the center point position of the target borehole in the image coordinate system and the center point position in the design coordinate system is compared to determine the center point position deviation of the target borehole. Based on the mapping relationship, the offset between the edge contour of the target borehole in the image coordinate system and the edge contour in the design coordinate system is compared to determine the edge contour deviation of the target borehole. The overall deviation of the target borehole is determined based on the center point position deviation and the edge contour deviation.

5. The PCB board matching method for circuit design according to claim 4, characterized in that, Identify the center point location and edge contour of the target borehole within the image coordinate system, including: Candidate edge contours are extracted from the region of the target borehole in the image data, the roundness index of the candidate edge contours is determined, and the candidate edge contours that meet the preset roundness requirements are retained as the edge contours of the target borehole. Cluster the intersection points of the normals of multiple sampling points on the edge contour of the target borehole, and use the center point of the cluster as the center point of the target borehole in the image coordinate system.

6. The PCB board matching method for circuit design according to claim 5, characterized in that, Based on the mapping relationship, the offset between the edge contour of the target borehole in the image coordinate system and the edge contour in the design coordinate system is compared to determine the edge contour deviation of the target borehole, including: Based on the mapping relationship, the mapping point of the design center point of the target borehole in the geometric design parameters in the image coordinate system is used as the reference point; Rays are emitted from the reference point in multiple directions, and the distance between the intersection of each ray and the edge profile of the target borehole and the reference point is determined. Based on the distance in each direction and the design radius of the target borehole in the geometric design parameters, determine the radial deviation in each direction; The maximum value among the radial deviations in multiple directions is taken as the edge profile deviation of the target borehole.

7. The PCB board matching method for circuit design according to claim 4, characterized in that, After determining the center point position deviation of each borehole, the following steps are also included: The smallest deviation among the center point position deviations of multiple drill holes on the PCB board is selected as the systematic deviation; Based on the systematic deviation, the mapping relationship is translated and corrected, and the center point position deviation of each borehole is re-determined based on the corrected mapping relationship.

8. The PCB board matching method for circuit design according to claim 1, characterized in that, By comparing the overall deviation of multiple drill holes on the PCB board with the dynamic deviation threshold, the matching result between the PCB board and the speed requirement is determined, including: If the overall deviation of at least one drill hole is greater than the dynamic deviation threshold, the PCB board is determined to be mismatched with the speed requirement. If the combined deviation of the multiple drill holes is less than or equal to the dynamic deviation threshold, then the PCB board matching rate requirement is determined.

9. The PCB board matching method for circuit design according to claim 1, characterized in that, Acquire image data of the PCB board, including: Under uniform lighting conditions, the original image of the PCB board is acquired; The original image is converted to grayscale to generate image data, which is then associated with the serial number of the PCB board.

Images