Automatic vectorization method and device for mathematical function call
By generating a built-in mathematical function for vectors and converting multiple calls into a single call, the problem of insufficient processor parallel computing capability caused by mathematical function calls in existing technologies is solved, achieving more efficient resource utilization.
Patent Information
- Application Number
- CN202511844753.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-09
- Publication Date
- 2026-03-20
AI Technical Summary
Existing technologies typically stop vectorization conservatively when encountering mathematical function calls during automatic vectorization analysis, which prevents the processor's parallel computing capabilities from being fully utilized and results in a waste of computing resources.
By determining whether the loop of the objective function includes vectorizable mathematical function calls, a vector built-in mathematical function is generated, and multiple calls are converted into a single call, thereby improving the processor's parallel computing capabilities.
It achieves automatic vectorization of multiple calls to mathematical functions, making full use of the processor's parallel computing capabilities and improving the utilization rate of computing resources.
Smart Images
Figure CN121704931A_ABST
Abstract
Description
Technical Field
[0001] The embodiments disclosed herein generally relate to the field of compiler technology, and specifically to an automatic vectorization method and apparatus for mathematical function calls. Background Technology
[0002] Automatic vectorization technology, with the help of Single Instruction Multiple Data (SIMD) extension components, can process multiple data elements simultaneously within one instruction cycle, bringing significant performance improvements to data-intensive applications.
[0003] In existing technologies, automatic vectorization typically stops conservatively when encountering mathematical function calls during automatic vectorization analysis. When a program contains a large number of mathematical function calls, the processor's parallel computing capabilities cannot be fully utilized, resulting in a waste of computing resources. Summary of the Invention
[0004] Embodiments of this disclosure provide an automatic vectorization method and apparatus for mathematical function calls, aimed at solving one or more of the above-mentioned problems and other potential problems.
[0005] According to a first aspect of this disclosure, an automatic vectorization method for mathematical function calls is provided. The method includes determining whether a loop in a target function includes vectorizable calls to a vectorizable mathematical function. In response to determining that the loop includes vectorizable calls to a vectorizable mathematical function, the method further includes generating a vector-based built-in mathematical function corresponding to the vectorizable mathematical function, wherein the vector-based built-in mathematical function includes a function name and a vector type. Furthermore, the method includes converting multiple calls to a vectorizable mathematical function in the target function into a single call to the vector-based built-in mathematical function based on the vector-based built-in mathematical function.
[0006] According to a second aspect of this disclosure, an automatic vectorization apparatus for mathematical function calls is provided. The apparatus includes a determination module configured to determine whether a loop in a target function includes a vectorizable call to a vectorizable mathematical function. The apparatus also includes a function construction module configured to, in response to determining that the loop includes a vectorizable call to a vectorizable mathematical function, generate a vector-built-in mathematical function corresponding to the vectorizable mathematical function, wherein the vector-built-in mathematical function includes a function name and a vector type. Furthermore, the apparatus includes a vectorization module configured to, based on the vector-built-in mathematical function, convert multiple calls to the vectorizable mathematical function in the target function into a single call to the vector-built-in mathematical function.
[0007] According to a third aspect of this disclosure, a computer program product is provided, comprising a computer program. When executed by a processor, the computer program implements the method of the first aspect described above.
[0008] According to a fourth aspect of this disclosure, an electronic device is provided, including one or more processors and a memory associated with said one or more processors. The memory is used to store program instructions that, when read and executed by the one or more processors, perform the steps of the method described in the first aspect. Attached Figure Description
[0009] The above and other objects, features, and advantages of embodiments of the present disclosure will become readily apparent from the following detailed description taken in conjunction with the accompanying drawings. Several embodiments of the present disclosure are illustrated in the drawings by way of example and not limitation.
[0010] Figure 1 Example environments in which various embodiments of this disclosure can be implemented are shown.
[0011] Figure 2 A flowchart illustrating an automatic vectorization method for mathematical function calls according to an embodiment of the present disclosure is shown.
[0012] Figure 3 A block diagram of an automatic vectorization apparatus for mathematical function calls according to an embodiment of the present disclosure is shown.
[0013] Figure 4 A block diagram illustrating an electronic device according to an embodiment of the present disclosure.
[0014] In the various figures, the same or corresponding reference numerals indicate the same or corresponding parts. Detailed Implementation
[0015] Embodiments of this disclosure will now be described in more detail with reference to the accompanying drawings. While some embodiments of this disclosure are shown in the drawings, it should be understood that this disclosure can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of this disclosure. It should be understood that the accompanying drawings and embodiments of this disclosure are for illustrative purposes only and are not intended to limit the scope of protection of this disclosure.
[0016] In the description of embodiments of this disclosure, the term "comprising" and similar terms should be understood as open-ended inclusion, i.e., "including but not limited to". The term "based on" should be understood as "at least partially based on". The term "one embodiment" or "the embodiment" should be understood as "at least one embodiment". The terms "first", "second", etc., may refer to different or the same objects. Other explicit and implicit definitions may also be included below.
[0017] As mentioned earlier, automatic vectorization typically stops conservatively when encountering mathematical function calls during automatic vectorization analysis. This is because the side effects of mathematical function calls are difficult to analyze clearly, and when there are a large number of mathematical function calls in a program, the processor's parallel computing capabilities cannot be fully utilized, resulting in a waste of computing resources.
[0018] To address this, embodiments of this disclosure propose an automatic vectorization method for mathematical function calls. The method includes determining whether a loop in a target function includes vectorizable calls to vectorizable mathematical functions. In response to determining that the loop includes vectorizable calls to vectorizable mathematical functions, the method further includes generating a vector-based built-in mathematical function corresponding to the vectorizable mathematical function, wherein the vector-based built-in mathematical function includes a function name and a vector type. Furthermore, the method includes converting multiple calls to vectorizable mathematical functions in the target function into a single call to the vector-based built-in mathematical function based on the vector-based built-in mathematical function. In this way, automatic vectorization of multiple calls to mathematical functions in a program can be achieved, improving the parallel computing capabilities of the processor.
[0019] Figure 1 An example environment 100 in which various embodiments of this disclosure may be implemented is shown. For example... Figure 1 As shown, environment 100 may include computing unit 101, which can be any device with computing or processing capabilities. In one or more embodiments of this disclosure, computing unit 101 may include, but is not limited to, desktop computers, servers, etc. For example, computing unit may be a server based on Shenwei architecture, a supercomputing system, etc. A compiler runs in computing unit 101, which can translate source program 102 written in a high-level language into machine code. When translating source program code, the compiler can execute the automatic vectorization method of mathematical function calls of various embodiments of this disclosure, automatically converting multiple calls to mathematical functions that meet preset conditions in the source program into a single call in vector form.
[0020] The following is combined Figure 2 This invention describes an automatic vectorization method for mathematical function calls according to embodiments of the present disclosure. Figure 2 A flowchart of an automatic vectorization method 200 for mathematical function calls according to some embodiments of the present disclosure is shown. Method 200 can be executed at any suitable computational unit; for example, method 200 can be executed by computational unit 101. It should be understood that the numbers in the flowchart of method 200 do not indicate the order in which these steps are executed, and some or all of these steps can be executed in parallel; this disclosure does not limit this. Furthermore, Figure 2The method may also include additional steps not shown and steps shown may be omitted, and the scope of this disclosure is not limited in this respect.
[0021] like Figure 2 As shown, in box 202, method 200 can determine whether the loop of the target function includes a vectorizable call to a vectorizable mathematical function. In one or more embodiments of this disclosure, the source code can first be parsed to decompose it into basic lexical units (tokens), and an abstract syntax tree (AST) of the source code can be constructed based on the sequence of lexical units. During the construction of the AST, mathematical function calls (e.g., sin(x), sqrt(y), etc.) are represented as specific function call nodes, and loop structures (e.g., for, while, do-while, etc.) are represented as specific loop structure nodes. In one or more embodiments of this disclosure, each function call node in the AST can be traversed, the current function call node can be used as the target function, and each loop structure node in the target function can be further traversed. For each loop structure, it can be determined whether it includes a vectorizable call to a vectorizable mathematical function. When it is determined that the loop structure includes a vectorizable call to a vectorizable mathematical function, the process proceeds to box 204.
[0022] In one or more embodiments of this disclosure, determining whether a loop includes a vectorizable call to a vectorizable mathematical function involves two conditions: first, the loop includes a call to a vectorizable mathematical function; second, the loop is vectorizable. If both conditions are met, the loop is deemed to include a vectorizable call to a vectorizable mathematical function.
[0023] In one or more embodiments of this disclosure, when determining whether a loop includes a call to a vectorizable mathematical function, it can first be determined whether the loop of the target function includes a call to a mathematical function. If it is determined that the loop of the target function includes a call to a mathematical function, it can be further determined whether the called mathematical function is vectorizable (i.e., the mathematical function can be treated as a regular operator). In one or more embodiments of this disclosure, the name of the function call can be checked during the semantic analysis stage. A preset table of vectorizable mathematical functions can be searched based on the function name. If a corresponding mathematical function is found in the table of vectorizable mathematical functions, it indicates that the current mathematical function is a vectorizable mathematical function, further determining that the loop of the target function includes a call to a vectorizable mathematical function. For example, a partial table of vectorizable mathematical functions of the Shenwei platform is shown in Table 1-1: Mathematical function name Parameter type Corresponding vector form Corresponding vector type sin double simd_sin doublev4 cos double simd_cos doublev4 copysign double simd_copysign doublev4 exp double simd_exp doublev4 log double simd_log doublev4 ... ... ... ... .
[0024] Table 1-1 Vectorizable Mathematical Functions Table of Shenwei Platform
[0025] The name of the function to be called is matched against the "Mathematical Function Name" column in Table 1-1. If a matching function name is found (e.g., sin), the function is considered to be a vectorizable mathematical function; otherwise, the function is not vectorizable.
[0026] In one or more embodiments of this disclosure, determining whether a loop is vectorizable includes determining whether the loop satisfies both a loop detection condition and a data dependency condition. A loop that satisfies both the loop detection condition and the data dependency condition is considered a vectorizable loop. In one or more embodiments of this disclosure, the loop detection condition may include: the number of times the loop is executed is predictable, the loop is the innermost loop, and the loop consists of only one basic block. The number of times the loop is executed is predictable means that the total number of times the loop will be executed can be determined at compile time or before the loop execution begins. For example, a loop whose initial value, termination condition, and step size are all known, or whose termination condition does not depend on the calculation result within the loop body. The innermost loop refers to a loop in a nested loop structure that does not contain any other loops and is at the deepest level. For example, a loop without nested sub-loops can be considered the innermost loop. A loop consisting of only one basic block means that the loop body does not contain any branch jumps, and the entire loop body constitutes a single basic block. A basic block is a linear sequence of code in a program that has only one entry point and one exit point; during execution, either all of it is executed or none of it is executed. In one or more embodiments of this disclosure, a data dependency condition refers to the absence of dependencies between multiple iterations of a loop, meaning that the execution of one iteration does not depend on the computation results of other iterations. For example, there is no loop where one iteration writes to a memory location and subsequent iterations read from that location.
[0027] In block 204, method 200 can generate a vector built-in mathematical function corresponding to the vectorizable mathematical function based on the vectorizable mathematical function included in the loop. In one or more embodiments of this disclosure, the vector built-in mathematical function may include a function name for identifying the function, for example, function name _builtin_simd_sin. In one or more embodiments of this disclosure, the vector built-in mathematical function also includes a vector type, which includes a data type portion for defining the input vector of the function and a portion for defining the width of the input vector of the function. For example, in the vector type doublev4, "double" defines the data type of the input vector as double-precision floating-point numbers, and "4" defines the width of the input vector as 4 (i.e., including 4 double-precision floating-point numbers), and these two portions are separated by the symbol "v". In one or more embodiments of this disclosure, a built-in function corresponding to the vectorizable mathematical function can be determined from a compiler built-in function library that includes multiple built-in functions, based on the vectorizable mathematical function, wherein the built-in function includes a function name and parameter types. Built-in functions are functions directly provided and implemented internally by the compiler. In one or more embodiments of this disclosure, the compiler's built-in function table can be queried based on the name of the vectorizable mathematical function to determine if there is a corresponding built-in function, and the function name and parameter type of the corresponding built-in function can be obtained. For example, a portion of the built-in function table of the Shenwei platform is shown in Table 1-2: Mathematical function name Parameter type Built-in functions sin double __builtin_sin cos double __builtin_cos copysign double __builtin_copysign exp double __builtin_exp log double __builtin_log ... ... ... .
[0028] Table 1-2 Built-in Functions of Shenwei Platform
[0029] The function name of the vectorizable mathematical function is matched with the "Mathematical Function Name" column in Table 1-2. If a matching function name is found (e.g., sin), the content of the "Built-in Function" column corresponding to that function name (e.g., __builtin_sin) is used as the function name of the vectorizable mathematical function, and the content of the "Parameter Type" column (double) corresponding to that function name is used as the parameter type of the vector built-in function.
[0030] After retrieving the built-in function name and parameter type corresponding to the vectorizable mathematical function from the built-in function query, the function name and vector type of the vectorizable mathematical function to be constructed can be determined based on the determined built-in function name and parameter type. In one or more embodiments of this disclosure, some identifiers representing vector built-in functions can be appended to the determined built-in function name to obtain the vector built-in function name. These identifiers can be appended to the vector built-in function name in the form of prefixes, suffixes, or middle suffixes, including but not limited to prefixes, suffixes, or middle suffixes. For example, adding the middle suffix "__simd" representing vector built-in functions to the built-in function name "__builtin__simd_sin" yields the vector built-in function name "__builtin__simd_sin". In one or more embodiments of this disclosure, an identifier representing the vector width can be appended to the string corresponding to the determined built-in function parameter type to obtain the vector built-in function parameter type. In one or more embodiments of this disclosure, the vector width identifier can be represented by numeric characters and separated from the characters corresponding to the built-in function parameter type by a specific character. For example, based on the parameter type "double" of the built-in function and the vector width of 4, the corresponding vector type "doublev4" can be obtained, where the specific character "v" separates the two parts.
[0031] In one or more embodiments of this disclosure, the built-in mathematical function can be constructed by calling a compiler-built-in function for constructing built-in functions, based on the determined function name and vector type of the vector's built-in mathematical function. When calling the compiler's built-in function, the determined function name and vector type can be passed as input parameters to the compiler's built-in function, and the compiler will generate the vector's built-in mathematical function based on the function name and vector type. In one or more embodiments of this disclosure, all generated vector built-in functions are also written into a built-in function-vector built-in function mapping table as shown in Tables 1-3.
[0032] Built-in functions type Vector built-in functions Vector type __builtin_sin double __builtin_simd_sin doublev4 __builtin_cos double __builtin_simd_cos doublev4 __builtin_copysign double __builtin_simd_copysign doublev4 __builtin_exp double __builtin_simd_exp doublev4 __builtin_log double __builtin_simd_log doublev4 ... ... ... ...
[0033] Table 1-3 Built-in Function-Vector Built-in Function Mapping Table
[0034] In block 206, method 200 can convert multiple calls to a vectorizable mathematical function in the target function into a single call to the vector-built-in mathematical function based on the vector's built-in mathematical function. In one or more embodiments of this disclosure, a loop in the target function that calls the vectorizable mathematical function multiple times can be expanded into an iteration of the vector width, and then the vectorizable mathematical function in the loop can be replaced with the vector's built-in mathematical function. For example, based on the mapping relationship in the vectorizable mathematical function table, four calls to the vectorizable mathematical function sin(double) can be converted into one call to the vector's built-in mathematical function __builtin_simd_log(doublev4).
[0035] In this way, the compiler can automatically convert multiple calls to some mathematical functions into code using SIMD instructions during the process of translating source code into machine code, thus making fuller use of the processor's parallel computing capabilities.
[0036] Figure 3 A block diagram of an automatic vectorization apparatus 300 for mathematical function calls according to some embodiments of the present disclosure is shown. The various embodiments in this specification are described in a progressive manner, with reference to each other for similar or identical parts. Each embodiment focuses on describing the differences from other embodiments. In particular, the apparatus embodiments are basically similar to the method embodiments, so the description is relatively simple, and relevant parts can be referred to in the description of the method embodiments. Figure 3 As shown, the device 300 includes a determination module 301 configured to determine whether the loop of the target function includes a vectorizable call to a vectorizable mathematical function. The device 300 also includes a function construction module 302 configured to, in response to determining that the loop includes a vectorizable call to a vectorizable mathematical function, generate a vector-built-in mathematical function corresponding to the vectorizable mathematical function, wherein the vector-built-in mathematical function includes a function name and a vector type. Furthermore, the device 300 includes a vectorization module 303 configured to, based on the vector-built-in mathematical function, convert multiple calls to the vectorizable mathematical function in the target function into a single call to the vector-built-in mathematical function.
[0037] In the above embodiments, implementation can be carried out entirely or partially by software. When implemented using software, it can be implemented entirely or partially in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this specification are generated. The computer instructions can be stored in a computer-readable storage medium or transmitted through the computer-readable storage medium. The computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, Digital Subscriber Line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., Digital Versatile Disc (DVD)), or a semiconductor medium (e.g., Solid State Disk (SSD)).
[0038] Figure 4 A block diagram of an electronic device 400 that can implement various embodiments of the present disclosure is shown. For example... Figure 4 As shown, the electronic device 400 includes a processor 410, a disk drive 420, an input / output interface 430, a network interface 440, and a memory 450. The processor 410, disk drive 420, input / output interface 430, network interface 440, and memory 450 can communicate with each other via a communication bus 460.
[0039] The processor 410 can be implemented using a CPU, microprocessor, application-specific integrated circuit (ASIC), or one or more integrated circuits based on the Shenwei architecture, and is used to execute relevant programs to achieve the technical solution provided in this application.
[0040] The memory 450 can be implemented in the form of ROM (Read Only Memory), RAM (Read Access Memory), static memory, dynamic storage devices, etc. The memory 450 can store the operating system 451 used to control the operation of the electronic device 400, and the basic input / output system (BIOS) 452 used to control the low-level operations of the electronic device 400. Additionally, it can store a web browser 453, a data storage management system 454, etc. In summary, when the technical solution provided in this application is implemented through software or firmware, the relevant program code is stored in the memory 450 and is called and executed by the processor 410.
[0041] Input / output interface 430 is used to connect input / output modules to realize information input and output. Input / output modules can be configured as components in the device (not shown in the figure) or externally connected to the device to provide corresponding functions. Input devices may include keyboards, mice, touch screens, microphones, various sensors, etc., and output devices may include displays, speakers, vibrators, indicator lights, etc.
[0042] Network interface 440 is used to connect a communication module (not shown in the figure) to enable communication and interaction between the device and other devices. The communication module can communicate via wired means (such as USB, Ethernet cable, etc.) or wireless means (such as mobile network, WIFI, Bluetooth, etc.).
[0043] Bus 460 includes a pathway for transmitting information between various components of the device, such as processor 410, disk drive 420, input / input interface 430, network interface 440, and memory 450.
[0044] It should be noted that although the above-described device only shows the processor 410, disk drive 420, input / output interface 430, network interface 440, memory 450, bus 460, etc., in specific implementations, the device may also include other components necessary for normal operation. Furthermore, those skilled in the art will understand that the above-described device may only include the components necessary for implementing the method of this application, and does not necessarily include all the components shown in the figures.
[0045] The program code used to implement the methods of this disclosure may be written in any combination of one or more programming languages. This program code may be provided to a processor or controller of a Shenwei architecture-based computer or other programmable data processing device, such that when executed by the processor or controller, the program code causes the functions / operations specified in the flowcharts and / or block diagrams to be implemented. The program code may be executed entirely on the machine, partially on the machine, as a standalone software package partially on the machine and partially on a remote machine, or entirely on a remote machine or server.
[0046] In the context of this disclosure, a machine-readable medium can be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, apparatus, or device. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. Machine-readable media can be, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing. Furthermore, although operations are depicted in a specific order, this should be understood as requiring that such operations be performed in the specific order shown or in sequential order, or requiring that all illustrated operations be performed to achieve the desired result. In certain environments, multitasking and parallel processing may be advantageous. Similarly, while several specific implementation details are included in the foregoing discussion, these should not be construed as limiting the scope of this disclosure. Certain features described in the context of individual embodiments may also be implemented in combination in a single implementation. Conversely, various features described in the context of a single implementation may also be implemented individually or in any suitable sub-combination in multiple implementations.
[0047] Although the subject matter has been described using language specific to structural features and / or methodological logic, it should be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or actions described above. Rather, the specific features and actions described above are merely illustrative examples of implementing the claims.
Claims
1. An automatic vectorization method for mathematical function calls, characterized in that, include: Determine whether the loop of the objective function includes vectorizable calls to vectorizable mathematical functions; In response to determining that the loop includes a vectorizable call to a vectorizable mathematical function, a vector-based built-in mathematical function corresponding to the vectorizable mathematical function is generated based on the vectorizable mathematical function, wherein the vector-based built-in mathematical function includes a function name and a vector type; and Based on the vector's built-in mathematical function, multiple calls to the vectorizable mathematical function in the objective function are converted into a single call to the vector's built-in mathematical function.
2. The method according to claim 1, characterized in that, Whether the loop for determining the objective function includes a vectorizable call to a vectorizable mathematical function includes: Determine whether the loop of the objective function includes calls to a vectorizable mathematical function and determine whether the loop is vectorizable; and The loop that determines the objective function includes a call to a vectorizable mathematical function and a determination that the loop is vectorizable, wherein the loop that determines the objective function includes a vectorizable call to the vectorizable mathematical function.
3. The method according to claim 2, characterized in that, The step of determining whether the loop for the objective function includes a call to a vectorizable mathematical function includes: Determine whether the loop of the objective function includes calls to mathematical functions; In response to the loop that determines the target function, the call to the mathematical function is performed by obtaining the name of the mathematical function being called. Based on the name of the called mathematical function and a preset list of vectorizable mathematical functions, determine whether the called mathematical function is vectorizable; and In response to determining that the invoked mathematical function is vectorizable, the loop for determining the target function includes calling the vectorizable mathematical function and marking the mathematical function as a vectorizable mathematical function.
4. The method according to claim 2, characterized in that, Determining whether the loop is vectorizable includes: Determine whether the loop satisfies the loop detection condition and the data dependency condition; and In response to the loop of the objective function satisfying the loop detection condition and the data dependency condition, it is determined that the loop of the objective function includes calls to a vectorizable mathematical function.
5. The method according to claim 4, characterized in that, The cyclic detection conditions include: The number of times the loop is executed is predictable, the loop is the innermost loop, and the loop consists of only one basic block.
6. The method according to claim 4, characterized in that, The data dependency condition mentioned therein includes no dependency between multiple iterations of the loop.
7. The method according to claim 1, characterized in that, The response to determining that the loop includes a vectorizable call to a vectorizable mathematical function, and generating a vector-based built-in mathematical function corresponding to the vectorizable mathematical function based on the vectorizable mathematical function, includes: Based on the vectorizable mathematical function, a built-in function corresponding to the vectorizable mathematical function is determined from the compiler's built-in function library, which includes multiple built-in functions. The built-in function includes a function name and parameter type. Based on the determined function names and parameter types of the built-in functions, the function names and vector types of the vector's built-in mathematical functions are determined respectively; and Based on the determined function name of the vector's built-in mathematical function and the vector type, the compiler's built-in function is invoked to construct the vector's built-in mathematical function.
8. An automatic vectorization device for mathematical function calls, characterized in that, include The judgment module is configured to determine whether the loop of the objective function includes vectorizable calls to vectorizable mathematical functions; A function construction module is configured to, in response to determining that the loop includes a vectorizable call to a vectorizable mathematical function, generate a vector-built-in mathematical function corresponding to the vectorizable mathematical function, wherein the vector-built-in mathematical function includes a function name and a vector type; as well as The vectorization module is configured to convert multiple calls to the vectorizable mathematical function in the target function into a single call to the vector's built-in mathematical function, based on the vector's built-in mathematical function.
9. A computer program product comprising a computer program that, when executed by a processor, implements the method according to any one of claims 1-7.
10. Electronic devices, including: One or more processors, and A memory associated with the one or more processors, the memory being used to store program instructions that, when read and executed by the one or more processors, perform the steps of the method according to any one of claims 1-7.