A GPU warp scheduling method and device based on a chessboard scheduling strategy

Abstract

The application provides a GPU Warp scheduling method and device based on a chessboard scheduling strategy, and the method comprises the following steps: a stream multiprocessor assigns a Warp number to each task of different task types received through a facing Warp numbering mechanism, the priority of each Warp is determined according to the task type and the Warp number, the Warp with high priority is preferentially executed, if the current Warp execution is overdue, the priority of the Warp is dynamically adjusted, and the Warp with low priority is executed in turn. The facing Warp numbering mechanism is used to realize the priority ordering of the Warps of different task types, and the dynamic priority adjustment mechanism based on the execution time threshold can guarantee that the high-priority task is preferentially executed, also take into account that the low-priority task can be executed in a hidden manner, ensure fairness, and improve resource utilization.

Description

Technical Field

[0001] This invention relates to the field of GPU graphics rendering technology, and more specifically, to a GPUWarp scheduling method and apparatus based on a chessboard scheduling strategy. Background Technology

[0002] To efficiently handle massive tasks in fields such as 3D graphics rendering, scientific computing, and deep learning, GPUs have abandoned the control flow architecture of CPUs with their serial logic design and evolved into the SIMT (Single Instruction Multiple Thread) architecture. The core design principle of this architecture is throughput over latency. It organizes hundreds or even thousands of computing units into multiple streaming multiprocessors, achieving high-throughput parallel computing under the management of components such as the task scheduler and warp scheduler. The warp scheduler distributes numerous threads across multiple cores for execution, and its efficiency directly impacts the overall performance of the GPU. Through low-overhead context and warp switching, it effectively hides the long latency caused by memory access, ensuring that computing units continuously operate at full capacity, thus achieving efficient processing of massive data parallel tasks.

[0003] The fundamental problem that GPUs need to solve is how to efficiently drive tens of thousands of parallel threads using limited hardware resources (such as register files, shared memory, and load / store units), so that the computing units can work at full capacity and ultimately achieve near-maximum computing throughput.

[0004] If GPUs directly manage scheduling at the thread level, it can easily lead to scheduling congestion, complex control logic, and many other problems. Generally, multiple threads are bundled into a group and scheduled using warps. When a warp is blocked due to memory access, the scheduler immediately suspends it and switches execution to another ready warp. As long as there are enough active warps in the streaming multiprocessor, there will always be a warp ready for computation, thus keeping the computing units constantly busy. From a macroscopic perspective, memory latency is "hidden" within the effective computation of other warps.

[0005] Warp schedulers have evolved from initial sequential issue scheduling to multi-instruction issue scheduling and priority scheduling. When multiple ready warps exist, the scheduler may prioritize warps about to perform long-latency memory accesses to issue memory requests earlier, overlapping computation and data movement. Alternatively, it may identify warps with shorter instruction dependency chains to complete faster and release resources. However, most static scheduling strategies (such as LRR (Loose Round Robin) and GTO (Greedy Then Oldest)) have applicable scenarios and limitations. Optimizing warp scheduling strategies or designing more advanced warp scheduling strategies suitable for GPUs has become a critical technology that urgently needs to be addressed. Summary of the Invention

[0006] This invention addresses the technical problems existing in the prior art by providing a GPU Warp scheduling method and apparatus based on a chessboard scheduling strategy, overcoming the shortcomings of existing static scheduling strategies.

[0007] According to a first aspect of the present invention, a GPU Warp scheduling method is provided, comprising:

[0008] The tasks to be processed are organized into multiple independent task packages, and the multiple independent task packages are sent to the stream multiprocessor, which includes multiple warps.

[0009] After receiving multiple task packets, the streaming multiprocessor assigns a Warp number to each task according to the task type of each task. The Warp number is generated according to the task type through a relative Warp numbering mechanism.

[0010] A Warp with a Warp ID retrieves the corresponding instructions and data. A Warp is only active once it has retrieved the corresponding instructions and data.

[0011] The current target warp is determined based on the ready and active status of each warp in the thread pool and the priority of warps in the priority array. Based on the execution time of the current target warp's task, the priority of the current target warp is dynamically adjusted according to the chessboard scheduling strategy, simulating the movement rules of chess pieces on the chessboard.

[0012] Based on the above technical solution, the present invention can also be improved as follows.

[0013] Optionally, assigning a Warp ID to each task based on its task type includes:

[0014] For high-priority A-class tasks, each Warp in the A-class task is numbered sequentially starting from 0, with priority decreasing sequentially.

[0015] For low-priority Class B tasks, each Warp in Class B tasks is numbered in reverse order from the maximum number, with priority decreasing sequentially. The maximum number of Warp is determined based on the maximum number of Warp that the streaming multiprocessor can support.

[0016] Optionally, the step of dynamically adjusting the priority of the current target warp based on the execution time of the current target warp's task, and simulating the movement rules of pieces on the chessboard using a chessboard scheduling strategy, includes:

[0017] All tasks in category A have a higher priority than tasks in category B.

[0018] If the current warp of a task of type A times out, the priority of the current warp will be adjusted to the lowest among all tasks of type A, and the tasks of type A with the next lowest priority will be executed in turn.

[0019] When there is no ready and active warp for task A, task B is executed. If the current warp of task B times out during the execution of task B, the priority of the current warp is adjusted to the lowest among all tasks of task B.

[0020] Optionally, determine if the current warp execution has timed out, including:

[0021] The execution time of the current target Warp task is obtained by timing the current target Warp task based on the time arbitrator;

[0022] If the execution time exceeds a preset time threshold, the current Warp execution times out.

[0023] Otherwise, the current Warp execution has not timed out.

[0024] Optional, also includes:

[0025] If a Warp for a Class A task is ready and active, the priority of the current Warp that is ready and active will be adjusted to the highest, and the task will be executed based on the current Warp.

[0026] Optional, also includes:

[0027] When multiple warps for a type A task are ready and activated, the warp with the highest priority among the multiple warps is selected as the current warp, and the task is executed based on the current warp.

[0028] Optional, also includes:

[0029] If there is no ready and active warp for task A, and a warp for task B is ready and active, then the priority of the current ready and active warp is adjusted to the highest, and the task is executed based on the current warp.

[0030] Optional, also includes:

[0031] If no Warp is ready and active for a task of type A, and multiple Warp are ready and active for a task of type B, the Warp with the highest priority among the multiple Warp will be used as the current Warp, and the task will be executed based on the current Warp.

[0032] Optionally, when Warp obtains task instructions and task data in parallel through the instruction channel and data channel, Warp is activated and is in a ready and active state.

[0033] According to a second aspect of the present invention, a GPU Warp scheduling device based on a chessboard scheduling strategy is provided, comprising a task scheduler and a central controller, a Wrap scheduler and a computing unit array located in a streaming multiprocessor;

[0034] The task scheduler is used to organize the tasks to be processed into multiple independent task packages and distribute the multiple independent task packages to the streaming multiprocessor, wherein the streaming multiprocessor includes multiple warps.

[0035] The central controller is used to receive multiple task packets and assign a Warp number to each task according to the task type of each task. The Warp number is generated according to the task type through a relative Warp numbering mechanism.

[0036] The Warp scheduler is used to determine the current target Warp based on the ready and active status of each Warp in the thread pool and the priority of each Warp in the priority array; it is also used to dynamically adjust the priority of the current target Warp based on the execution time of the task executed by the current target Warp, and based on the chessboard scheduling strategy, simulates the movement rules of chess pieces on the chessboard.

[0037] The computing unit array is used to execute the tasks of the current target Warp and to feed back the execution time of the tasks of the current target Warp to the Warp scheduler.

[0038] This invention provides a GPU Warp scheduling method and apparatus based on a chessboard scheduling strategy. It achieves Warp priority ranking for different task types through a counter-clockwise Warp numbering mechanism. A dynamic priority adjustment mechanism based on execution time thresholds ensures that high-priority tasks are executed first, while also allowing low-priority tasks to be executed intermittently, guaranteeing fairness and improving resource utilization. Furthermore, the proposed Warp scheduling apparatus has a clear and easy-to-implement circuit structure and good scalability. Finally, this design demonstrates superior adaptability and stability in various application scenarios such as graphics rendering and general computing, providing a flexible and efficient Warp scheduling strategy for large-scale parallel computing architectures such as GPUs. Attached Figure Description

[0039] Figure 1 A flowchart of a GPU Warp scheduling method based on a chessboard scheduling strategy is provided as an embodiment of the present invention;

[0040] Figure 2 This is a schematic diagram of the dynamic adjustment of the Warp priority array according to an embodiment of the present invention;

[0041] Figure 3 A schematic diagram of a GPU Warp scheduling device based on a chessboard scheduling strategy provided in one embodiment of the present invention;

[0042] Figure 4 This is a schematic diagram of the Warp scheduler according to an embodiment of the present invention. Detailed Implementation

[0043] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention. In addition, the technical features of the various embodiments or individual embodiments provided by the present invention can be arbitrarily combined with each other to form feasible technical solutions. Such combinations are not constrained by the order of steps and / or structural composition patterns, but must be based on the ability of those skilled in the art to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed by the present invention.

[0044] GPU performance relies directly on the efficient collaboration of three core components: the Warp scheduler, streaming multiprocessors, and the memory hierarchy. The Warp scheduler, acting as the command center, hides latency by rapidly switching between Warps. Traditional static scheduling strategies, such as round-robin scheduling, while ensuring balanced execution progress across Warps, are prone to concentrated memory access requests caused by multiple Warps simultaneously encountering long-latency instructions (such as memory access operations), exacerbating resource contention and creating performance bottlenecks. Greedy scheduling, while maximizing throughput in the short term, can lead to long-term bias towards high-priority Warps, causing low-priority Warps to be "starved." Furthermore, as high-priority Warps complete, the number of active Warps decreases, reducing the ability to hide latency.

[0045] To balance fairness and efficiency in warp scheduling and maximize GPU performance, energy efficiency, and computational potential, scheduling is typically performed at different granularities at both the software and hardware levels. Applications issue commands via high-level APIs (such as DirectX / OpenGL / OpenCL / Vulkan APIs), which the GPU driver verifies, transforms, and optimizes, organizing and packaging them into command buffers. These command buffers are then placed in the GPU's command queue. The task scheduler retrieves these tasks from the queue, breaks them down into multiple independent groups, and distributes them. Since each streaming multiprocessor contains many warps and receives many groups of tasks, warp scheduling is necessary. This invention aims to propose a novel dynamic warp scheduling strategy applicable to various scenarios, including GPU graphics rendering and general-purpose computing.

[0046] Before describing the GPU Warp scheduling method provided by this invention, the concepts involved in this invention will be explained:

[0047] GPU: Graphics Processing Unit

[0048] SIMT: Single Instruction Multiple Thread

[0049] Streaming multiprocessors are the core computing units in the GPU architecture, responsible for executing instructions in Warp. Each streaming multiprocessor contains multiple computing cores, register files, data caches, and schedulers.

[0050] Warp: A warp is the basic unit of execution in hardware scheduling. It consists of a fixed number (usually 32) of threads that execute the same instructions synchronously on the GPU in a lockstep manner.

[0051] Warp scheduling: Warp scheduling is a hardware scheduler located within a streaming multiprocessor. It is a core mechanism that hides computational and memory latency by rapidly switching between executing different ready warps.

[0052] Core utilization: quantifies how busy one or more computing cores are performing effective computing tasks within a specific time period.

[0053] Load balancing: The process of maximizing the utilization of all computing units by rationally dividing computing tasks into numerous warps and dynamically allocating them to various streaming multiprocessors for execution.

[0054] Vertex shading: Performing coordinate transformations and processing on each vertex of a 3D model.

[0055] Geometric shading: Processes geometric primitives on a per-unit basis, allowing the creation or removal of geometric primitives.

[0056] Surface tessellation shading: a key programmable geometry densification technique in the graphics rendering pipeline. It dynamically and automatically subdivides a coarse original mesh (such as a low-poly model) into richer and smoother surfaces through the collaboration of three stages: surface computation shader, surface tessellation shader, and surface evaluation shader. This process can not only adaptively improve the detail of the model's near or contour areas based on distance without increasing the amount of original data, but also efficiently generate smooth surface animations and terrain, greatly optimizing the balance between graphics quality and memory bandwidth.

[0057] Fragment shading: Calculates each pixel fragment after rasterization to precisely determine its color, texture, lighting, and material effects, generating a final realistic visual image.

[0058] Data dependency: In a warp or thread, subsequent instructions must wait for the result data of the preceding instructions to be ready before they can be executed.

[0059] Figure 1 The following is a flowchart of a GPU Warp scheduling method based on a chessboard scheduling strategy provided by the present invention, as shown in the figure. Figure 1 As shown, the method includes the following steps:

[0060] Step 1: Organize the task into multiple independent task packages, and distribute the multiple independent task packages to the streaming multiprocessor, which includes multiple warps.

[0061] Understandably, the tasks to be processed are organized and packaged into multiple independent task packages. The computation and processing of a task package is called a task. Multiple task packages are sent to the stream processor. The stream processor includes multiple warps, and a warp is a thread group bound together by multiple threads.

[0062] Step 2: After receiving multiple task packets, the streaming multiprocessor assigns a Warp number to each task according to the task type. The Warp number is generated based on the task type through a relative Warp numbering mechanism.

[0063] Understandably, if there are multiple tasks to be executed and multiple warps in a streaming multiprocessor, then it is necessary to assign a corresponding warp number to each task and execute these tasks in a certain order.

[0064] This invention employs a reciprocal warp numbering mechanism to assign a corresponding warp number to each task. Specifically, for high-priority A-class tasks, each warp within the A-class task is sequentially numbered starting from 0, with priority decreasing accordingly. Therefore, for A-class tasks, a larger warp number corresponds to a lower warp priority.

[0065] For low-priority Class B tasks, each Warp within a Class B task is numbered sequentially in reverse order from its maximum number, with priority decreasing sequentially. The maximum Warp number is determined by the maximum number of Warp that the streaming multiprocessor can support. Specifically, for low-priority tasks (Class B), Warp numbers are assigned in reverse order starting from the maximum number of supported thread groups minus 1 (e.g., if the streaming multiprocessor supports a maximum of 64 thread groups, then Warp numbers start from 63). These Warp numbers are then distributed across multiple Class B tasks in reverse order. For Class B Warp, a larger Warp number indicates a higher priority. Warp numbering for Class A tasks progresses in the same direction as for Class B tasks.

[0066] In this way, high-priority Class A tasks are prioritized for scheduling in the lower Warp numbering area, while low-priority Class B tasks are scheduled in the higher Warp numbering area, reducing interference with Class A tasks. Since each Warp carries the task type and creation order number throughout its execution cycle, ensuring the uniqueness of task numbers, there is no longer a strict distinction between (0 ~ n / 2-1, where n is the maximum number of thread groups supported by the streaming multiprocessor) for Class A task numbers and (n / 2 ~ n-1) for Class B task numbers. Numbering can be done in real-time based on the number of tasks of each type. This design also aims to maximize the utilization of hardware resources.

[0067] Step 3: The Warp with the Warp number obtains the corresponding instructions and data. The Warp is only active after it has obtained the corresponding instructions and data.

[0068] Understandably, a Warp assigned a Warp number retrieves the instructions and data corresponding to the task it is executing, and the Warp is only activated once it has retrieved the corresponding instructions and data.

[0069] After assigning a Warp number to each Warp, the priorities of all Warp are stored in a priority array. The task corresponding to each Warp carries the task type (class A or class B) and the task priority.

[0070] Step 4: Determine the current target Warp based on the ready and active status of each Warp in the thread pool and the priority of Warp in the priority array. Execute the task corresponding to the current target Warp. Based on the execution time of the task of the current target Warp, and simulating the movement rules of chess pieces on the chessboard according to the chessboard scheduling strategy, dynamically adjust the priority of the current target Warp.

[0071] Understandably, Warp resources are placed in a thread pool. When a task is executed, the current target Warp (i.e., the Warp currently being executed, which is the highest priority Warp) is determined based on the ready and active status of each Warp in the thread pool and the priority of each Warp in the priority array, and the task corresponding to the current target Warp is executed.

[0072] The priority of Warp is not fixed but dynamically adjusted based on the task's execution status. In this embodiment of the invention, a dynamic priority adjustment mechanism based on an execution time threshold is used to adjust the priority of Warp tasks according to a configured execution time threshold.

[0073] In one embodiment of the present invention, a chessboard scheduling strategy is used to dynamically adjust the priority of warp tasks. The core idea is to analogize warp tasks to chess pieces on a chessboard, allocating computational tasks according to the order of the chessboard squares. By simulating the movement rules of chess pieces on the chessboard, computational resources are dynamically allocated and data transmission paths are optimized, thereby reducing data conflicts and latency.

[0074] In this process, all tasks in category A have a higher priority than tasks in category B. If the current warp execution of a task in category A times out, the priority of the current warp will be adjusted to the lowest among all tasks in category A, and the next highest priority tasks in category A will be executed in sequence.

[0075] When there is no ready and active warp for task A, task B is executed. If the current warp of task B times out during the execution of task B, the priority of the current warp is adjusted to the lowest among all tasks of task B.

[0076] For details, see Figure 2 This illustrates the dynamic adjustment of Warp priority. Figure 2In Figure (a), during initialization, a reciprocal warp numbering mechanism is used to assign a corresponding warp number to each task. In Figure (b), when task G0 (class A) times out, the priority of the warp corresponding to task G0 is adjusted to the lowest level. It should be noted that the warp priorities for class A tasks and class B tasks are separate; the warp priority for class A tasks is higher than that for class B tasks. Therefore, adjusting the warp priority to the lowest level means adjusting it to the lowest priority of class A tasks.

[0077] In Figure (c), when no Warp is ready and active for task A, tasks are executed according to the priority order of Warp B. When task Gn-1 of type B times out, the priority of the Warp corresponding to task Gn-1 is adjusted to the lowest among task B. In Figure (d), when no Warp is ready and active for task A, tasks are executed according to the priority order of Warp B. When task Gn-2 of type B times out, the priority of the Warp corresponding to task Gn-2 is adjusted to the lowest among task B.

[0078] In Figure (e), when task G0 of type A is ready and active, regardless of whether task B is ready and active, since task A has a higher priority than task B, the priority of the warp corresponding to task G0 is adjusted to the highest, and task G0 is executed based on this warp. It should be noted that if multiple warps of type A tasks are ready and active simultaneously, the warp with the highest priority among the multiple warps is selected as the current warp, and the task is executed based on the current warp.

[0079] In Figure (f), when no Warp is ready and active for task A, if task Gn-1 of type B is ready and active, the priority of the Warp corresponding to task Gn-1 is adjusted to the highest, and that Warp is executed. Similarly, when no Warp is ready and active for task A, if multiple Warp of task B are ready and active, the Warp with the highest priority among the multiple Warp is selected as the current Warp, and the task is executed based on the current Warp.

[0080] The Warp being ready refers to a situation where a task has been assigned. Once the Warp receives the task instructions and data in parallel through the instruction channel and data channel, it is activated and is in a ready and active state.

[0081] Warp scheduling is not isolated; rather, it is the brain of the GPU execution engine, requiring close collaboration with other functional modules such as the memory system, computing units, and cache hierarchy. The GPU task scheduler organizes tasks into multiple independent task packages and distributes them to the streaming multiprocessors. The central controller in the streaming multiprocessor assigns Warp numbers and temporary registers based on task priority using a "reverse Warp numbering mechanism." After a Warp receives instructions and data in parallel through the instruction and data channels, it is activated. The Warp scheduler, based on the Warp's readiness and activation status combined with Warp priority array information, schedules the highest-priority Warp to begin execution and notifies the time arbiter to start timing. If a preset time threshold is exceeded, it is considered a long-delay operation. The time arbiter resets the timer and feeds this information back to the priority array, which adjusts the Warp priority accordingly. If Warp execution does not exceed the time threshold, the specified program completes execution, feeds back the result, and notifies the time arbiter to stop and reset the timer. At this point, the central controller also reclaims the temporary register and unlocks the Warp number, achieving efficient resource utilization and orderly task scheduling.

[0082] In general, during initialization, this invention assigns a corresponding Warp number to each task based on its type using a reciprocal Warp numbering mechanism. When a target Warp times out, its priority is dynamically adjusted based on a chessboard scheduling strategy, simulating the movement rules of chess pieces on the board.

[0083] Corresponding to the GPU Warp scheduling method provided by this invention, this invention also provides a GPU Warp scheduling apparatus, see [link to relevant documentation]. Figure 3 The GPU Warp scheduling unit includes a task scheduler and a central controller, a wrap scheduler, and an array of compute units located in the streaming multiprocessor.

[0084] The task scheduler is used to organize the tasks to be processed into multiple independent task packages and distribute the multiple independent task packages to the streaming multiprocessor, wherein the streaming multiprocessor includes multiple warps.

[0085] The central controller is used to receive multiple task packets and assign a Warp number to each task according to the task type of each task. The Warp number is generated according to the task type through a relative Warp numbering mechanism.

[0086] The Warp scheduler is used to determine the current target Warp based on the ready and active status of each Warp in the thread pool and the priority of each Warp in the priority array; it is also used to dynamically adjust the priority of the current target Warp based on the execution time of the task executed by the current target Warp and the chessboard scheduling strategy.

[0087] The computing unit array is used to execute the tasks of the current target Warp and to feed back the execution time of the tasks of the current target Warp to the Warp scheduler.

[0088] Specifically, Figure 3 The diagram illustrates the structure of the GPU Warp scheduling mechanism, which mainly consists of four functional components: a task scheduler, a central controller, a Warp scheduler, and a compute unit array. The task scheduler is responsible for organizing and packaging tasks and allocating them to specific streaming multiprocessors for execution. The task scheduler generally categorizes streaming multiprocessor scheduling into two types: single-task and multi-task. Scheduling for multiple groups of a single task type (such as multiple groups of vertex shading tasks) is based on register configuration and uses four modes: load balancing, round-robin, random, and least active. Each scheduling mode ultimately generates a streaming multiprocessor ID and a task ID, thus distinguishing multiple streaming multiprocessors from the task type. For multi-task types, graphics rendering is scheduled according to the following priority: fragment shading > geometry shading > tessellation shading (tessellation shading is divided into tasks such as surface computation shading, surface generation module (fixed acceleration unit), and surface evaluation shading, where surface evaluation shading > surface computation shading) > vertex shading. However, it is generally categorized into two task types: vertex shading and non-vertex shading. Vertex shading includes geometry shading, tessellation shading, and vertex shading, while non-vertex shading refers to fragment shading. General-purpose computing no longer distinguishes task types, but the above four modes are still used for scheduling among multiple groups of the same task type. The streaming multiprocessor is the most critical functional component of the entire GPU, encompassing both control and scheduling, as well as computation units. The streaming multiprocessor is responsible for receiving task information, scheduling warp work, allocating and reclaiming temporary register resources, checking data dependencies within the warp, reading and parsing instructions and data, coordinating and controlling the completion of all tasks, and maximizing the continuous saturation of computation units.

[0089] The structure of the Warp scheduler is as follows: Figure 4As shown, the circuit structure of the Warp scheduler consists of four key functional modules: a thread pool, a priority array, a scheduling arbiter, and a time arbiter. The thread pool is responsible for receiving all ready Warp instances; a Warp is activated only after receiving the corresponding instructions and data. The priority array is initialized in ascending order before tasks are issued. After a task is issued, the Warp priority is determined based on the task type and Warp number. The scheduling arbiter combines the Warp priority information from the thread pool and the priority array to decide which Warp to schedule for execution first (the highest priority Warp is scheduled for execution first). The scheduled Warp will occupy a computing unit. The time arbiter monitors the execution time of the scheduled Warp. Once the execution time exceeds a preset time threshold, it is determined to be a long-delay operation, and the priority of that Warp is immediately adjusted.

[0090] This invention provides a GPU Warp scheduling method and apparatus based on a chessboard scheduling strategy. It achieves Warp priority ranking for different task types through a counter-clockwise Warp numbering mechanism. A dynamic priority adjustment mechanism based on execution time thresholds ensures that high-priority tasks are executed first, while also allowing low-priority tasks to be executed intermittently, guaranteeing fairness and improving resource utilization. Furthermore, the proposed Warp scheduling design and implementation have a clear and easy-to-implement circuit structure with good scalability. Finally, this design demonstrates superior adaptability and stability in various application scenarios such as graphics rendering and general computing, providing a flexible and efficient Warp scheduling strategy for large-scale parallel computing architectures such as GPUs.

[0091] It should be noted that the descriptions of each embodiment in the above embodiments have different focuses. For parts that are not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0092] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0093] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0094] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0095] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0096] Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including both the preferred embodiments and all changes and modifications falling within the scope of the invention.

[0097] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.

Claims

1. A GPU Warp scheduling method based on a chessboard scheduling strategy, characterized in that, include: The tasks to be processed are organized into multiple independent task packages, and the multiple independent task packages are sent to the stream multiprocessor, which includes multiple warps. After receiving multiple task packets, the streaming multiprocessor assigns a Warp number to each task according to the task type of each task. The Warp number is generated according to the task type through a relative Warp numbering mechanism. A Warp with a Warp ID retrieves the corresponding instructions and data. A Warp is only active once it has retrieved the corresponding instructions and data. The current target warp is determined based on the ready and active status of each warp in the thread pool and the priority of warps in the priority array. The task corresponding to the current target warp is executed. Based on the execution time of the task of the current target warp, the priority of the current target warp is dynamically adjusted according to the chessboard scheduling strategy, simulating the movement rules of chess pieces on the chessboard. The process of assigning a Warp ID to each task based on its task type includes: For high-priority A-class tasks, each Warp in the A-class task is numbered sequentially starting from 0, with priority decreasing sequentially. For low-priority B-class tasks, each Warp in the B-class task is numbered in reverse order from the maximum number, with the priority decreasing in that order. The maximum number of Warp is determined based on the maximum number of Warp that the streaming multiprocessor can support. The step of dynamically adjusting the priority of the current target warp based on the execution time of the current target warp's task, using a chessboard scheduling strategy and simulating the movement rules of chess pieces on the chessboard, includes: All tasks in category A have a higher priority than tasks in category B. If the current warp of a task of type A times out, the priority of the current warp will be adjusted to the lowest among all tasks of type A, and the tasks of type A with the next lowest priority will be executed in turn. If a Warp for a Class A task is ready and active, the priority of the currently active Warp will be adjusted to the highest, and the task will be executed based on the current Warp. When there is no ready and active Warp for task A, task B is executed. If the current Warp of task B times out during the execution of task B, the priority of the current Warp is adjusted to the lowest among all tasks of task B. If there is no ready and active warp for task A, and a warp for task B is ready and active, then the priority of the current ready and active warp is adjusted to the highest, and the task is executed based on the current warp.

2. The GPU Warp scheduling method according to claim 1, characterized in that, Determining whether the current warp execution has timed out includes: The execution time of the current target Warp task is obtained by timing the current target Warp task based on the time arbitrator; If the execution time exceeds a preset time threshold, the current Warp execution times out. Otherwise, the current Warp execution has not timed out.

3. The GPU Warp scheduling method according to claim 1, characterized in that, Also includes: When multiple warps for a type A task are ready and activated, the warp with the highest priority among the multiple warps is selected as the current warp, and the task is executed based on the current warp.

4. The GPU Warp scheduling method according to claim 1, characterized in that, Also includes: If no Warp is ready and active for a task of type A, and multiple Warp are ready and active for a task of type B, the Warp with the highest priority among the multiple Warp will be used as the current Warp, and the task will be executed based on the current Warp.

5. The GPU Warp scheduling method according to any one of claims 1, 3, or 4, characterized in that, Once Warp receives task instructions and task data in parallel through the instruction channel and data channel, Warp is activated and enters a ready and active state.

6. A GPU Warp scheduling device, characterized in that, This includes a task scheduler and a central controller, Warp scheduler, and compute unit array located in the streaming multiprocessor; The task scheduler is used to organize the tasks to be processed into multiple independent task packages and distribute the multiple independent task packages to the streaming multiprocessor, wherein the streaming multiprocessor includes multiple warps. The central controller is used to receive multiple task packets and assign a Warp number to each task according to the task type of each task. The Warp number is generated according to the task type through a relative Warp numbering mechanism. The Warp scheduler is used to determine the current target Warp based on the ready and active status of each Warp in the thread pool and the priority of each Warp in the priority array; it is also used to dynamically adjust the priority of the current target Warp based on the execution time of the task executed by the current target Warp, and based on the chessboard scheduling strategy, simulates the movement rules of chess pieces on the chessboard. The computing unit array is used to execute the tasks of the current target Warp and to feed back the execution time of the tasks of the current target Warp to the Warp scheduler. The process of assigning a Warp ID to each task based on its task type includes: For high-priority A-class tasks, each Warp in the A-class task is numbered sequentially starting from 0, with priority decreasing sequentially. For low-priority B-class tasks, each Warp in the B-class task is numbered in reverse order from the maximum number, with the priority decreasing in that order. The maximum number of Warp is determined based on the maximum number of Warp that the streaming multiprocessor can support. The step of dynamically adjusting the priority of the current target warp based on the execution time of the current target warp's task, using a chessboard scheduling strategy and simulating the movement rules of chess pieces on the chessboard, includes: All tasks in category A have a higher priority than tasks in category B. If the current warp of a task of type A times out, the priority of the current warp will be adjusted to the lowest among all tasks of type A, and the tasks of type A with the next lowest priority will be executed in turn. If a Warp for a Class A task is ready and active, the priority of the currently active Warp will be adjusted to the highest, and the task will be executed based on the current Warp. When there is no ready and active Warp for task A, task B is executed. If the current Warp of task B times out during the execution of task B, the priority of the current Warp is adjusted to the lowest among all tasks of task B. If there is no ready and active warp for task A, and a warp for task B is ready and active, then the priority of the current ready and active warp is adjusted to the highest, and the task is executed based on the current warp.

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