A semiconductor device and its manufacturing method
By pre-cleaning the oxide layer to saturate its silanol groups, the problem of the amorphous silicon film thickness increasing with substrate placement time was solved, thus achieving stability of the amorphous silicon film thickness and improving production efficiency.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHENZHEN PENGXIN MICRO INTEGRATED CIRCUIT MFG CO LTD
- Filing Date
- 2024-11-22
- Publication Date
- 2026-05-26
AI Technical Summary
In existing technologies, the thickness of amorphous silicon thin films becomes unstable as the substrate placement time increases, leading to difficulties in subsequent process management and high time costs, making them unsuitable for mass production.
After the oxide layer is formed, the oxide layer is pre-cleaned to saturate the silanol groups, forming a silanol-saturated oxide layer. Then, an amorphous silicon layer is deposited on it using low-pressure chemical vapor deposition.
This achieves stable thickness of amorphous silicon thin films, simplifies subsequent process management, reduces time costs, and improves production efficiency.
Smart Images
Figure CN122094429A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor technology, and more specifically to a semiconductor device and a method for manufacturing the same. Background Technology
[0002] In semiconductor processes, after an oxide layer forms on a substrate surface, its activity increases over time, primarily due to an increase in silanol groups. When depositing amorphous silicon (a-Si) thin films, such as using low-pressure chemical vapor deposition (LPCVD), especially when depositing ultrathin films, the increase in silanol groups over time leads to an increase in the thickness of the amorphous silicon film. This instability in the amorphous silicon film thickness affects the judgment of subsequent process steps.
[0003] In related technologies, by controlling the placement time of the substrate after the oxide layer is formed on the substrate, and ensuring that the placement time of the substrate is the same each time, the amount of water vapor absorbed by the substrate is the same. That is, the number of silanol groups on the substrate surface is kept at a basically the same. When depositing to form an amorphous silicon thin film, since the number of silanol groups is basically the same, the thickness of the amorphous silicon thin film is also almost the same, thereby achieving the purpose of stabilizing the thickness of the amorphous silicon thin film.
[0004] However, the methods used in related technologies to stabilize the thickness of amorphous silicon thin films are time-consuming and difficult to manage on wafers, making them unsuitable for mass production. Summary of the Invention
[0005] The summary section introduces a series of simplified concepts, which will be further explained in detail in the detailed description section. This summary section is not intended to limit the key and essential technical features of the claimed technical solution, nor is it intended to determine the scope of protection of the claimed technical solution.
[0006] To address the existing problems, this application provides a method for manufacturing a semiconductor device, the method comprising:
[0007] Provide a substrate, and form an oxide layer on the substrate;
[0008] The oxide layer is pre-cleaned to saturate the silanol groups on the surface of the oxide layer, forming an oxide layer saturated with silanol groups.
[0009] An amorphous silicon layer is formed by depositing on an oxide layer saturated with silanol groups.
[0010] In one embodiment of this application, pre-cleaning includes:
[0011] The oxide layer is cleaned using SC1 cleaning solution, SC2 cleaning solution, or plasma-activated water. SC1 cleaning solution includes NH3·H2O, H2O2, and H2O, while SC2 cleaning solution includes HCl, H2O2, and H2O.
[0012] In one embodiment of this application, the pre-cleaning time ranges from 1s to 5000s.
[0013] In one embodiment of this application, the pre-cleaning time ranges from 30s to 2000s.
[0014] In one embodiment of this application, when the silanol groups on the surface of the cleaned oxide layer are not less than 60%, the silanol groups on the surface of the cleaned oxide layer are saturated.
[0015] In one embodiment of this application, an amorphous silicon layer is deposited on an oxide layer saturated with silanol groups using low-pressure chemical vapor deposition.
[0016] In one embodiment of this application, the oxide layer is formed using a wet oxidation method.
[0017] In one embodiment of this application, the oxide layer thickness is 900 angstroms to 1100 angstroms.
[0018] In one embodiment of this application, the method further includes: measuring the thickness of the amorphous silicon layer to monitor the change in the thickness of the amorphous silicon layer over time.
[0019] According to a second aspect of this application, a semiconductor device is also provided, which is manufactured using the above-described manufacturing method.
[0020] The semiconductor device and manufacturing method of the present application embodiment pre-clean the oxide layer on the substrate after forming the oxide layer to saturate the silanol groups on the surface of the oxide layer. Under the condition of saturated silanol groups, the thickness of the deposited amorphous silicon thin film is more stable, thereby solving the problem that the thickness of the amorphous silicon thin film increases with the increase of the substrate placement time, so as to facilitate the management of subsequent process technology. Attached Figure Description
[0021] The following drawings, which are incorporated herein by reference and are used to understand this application, illustrate embodiments of the invention and their descriptions to explain the principles of the invention.
[0022] In the attached image:
[0023] Figure 1 A flowchart illustrating a method for manufacturing a semiconductor device according to a specific embodiment of this application is shown;
[0024] Figures 2A-2DThis illustration shows a cross-sectional schematic diagram of a semiconductor device obtained by sequentially implementing a method for manufacturing a semiconductor device according to a specific embodiment of this application.
[0025] Figure 3 This diagram illustrates how the thickness of the deposited amorphous silicon layer changes over time in a specific embodiment of the prior art.
[0026] Figure 4 This diagram illustrates how the thickness of the deposited amorphous silicon layer changes over time in a specific embodiment of this application. Detailed Implementation
[0027] The present application will now be described more fully with reference to the accompanying drawings, in which embodiments of the present application are illustrated. However, the present application can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, providing these embodiments will make the disclosure thorough and complete, and will fully convey the scope of the present application to those skilled in the art. In the drawings, for clarity, the dimensions and relative dimensions of layers and regions may be exaggerated. The same reference numerals denote the same elements throughout.
[0028] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, areas, layers, and / or portions, these elements, components, areas, layers, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer, or portion from another element, component, area, layer, or portion. Therefore, without departing from the teachings of this application, the first element, component, area, layer, or portion discussed below may be referred to as the second element, component, area, layer, or portion.
[0029] Spatial relation terms such as “below,” “under,” “below,” “under,” “above,” “above,” etc., are used herein for convenience of description to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms are intended to also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, then the element or feature described as “below” or “under” the other element or feature will be oriented “above” the other element or feature. Therefore, the exemplary terms “below” and “under” can include both upper and lower orientations. The device may be otherwise oriented (rotated 90 degrees or otherwise) and the spatial descriptive terms used herein will be interpreted accordingly.
[0030] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. When used herein, the singular forms “a,” “an,” and “ / the” are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising” and / or “including,” when used in this specification, identify the presence of features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. When used herein, the term “and / or” includes any and all combinations of the associated listed items.
[0031] Embodiments of the application are described herein with reference to cross-sectional views illustrating ideal embodiments (and intermediate structures). Thus, variations from the shapes shown can be anticipated due to, for example, manufacturing techniques and / or tolerances. Therefore, embodiments of the application should not be limited to the specific shapes of the regions shown herein, but include shape deviations due to, for example, manufacturing processes. For example, implantation regions shown as rectangular typically have rounded or curved features at their edges and / or implantation concentration gradients, rather than a binary change from implantation regions to non-implantation regions. Similarly, buried regions formed by implantation can result in some implantation in the region between the buried region and the surface traversed during implantation. Therefore, the regions shown in the figures are substantially schematic, and their shapes are not intended to show the actual shapes of the regions of the device and are not intended to limit the scope of the application.
[0032] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art. It will also be understood that terms as defined in commonly used dictionaries shall be interpreted as having a meaning consistent with their meaning in the relevant field and / or the context of this specification, and not as in an ideal or overly formal sense, unless expressly defined herein.
[0033] To fully understand this application, detailed steps and structures will be presented in the following description to illustrate the technical solutions proposed in this application. Preferred embodiments of this application are described in detail below; however, in addition to these detailed descriptions, this application may have other implementation methods.
[0034] The deposition of amorphous silicon using low-pressure chemical vapor deposition (LPCVD) is susceptible to various factors, such as the preceding process, its surface activity, adsorption properties, and heat absorption or dissipation. In particular, when depositing ultrathin amorphous silicon films, the surface activity of the preceding process can cause significant fluctuations in the thickness of the amorphous silicon layer (amorphous silicon thin film). The reason for this significant impact is that surface activity increases over time before the amorphous silicon layer is formed, especially after oxide formation. This increase is primarily manifested in the increase of silanol groups, thus leading to a corresponding increase in the thickness of the deposited amorphous silicon layer.
[0035] Specifically, when the substrate process conditions are fixed, the main factor causing substrate changes during production is the air environment. The production environment has a certain humidity level, such as 40%–60% relative humidity. Moisture in the air is adsorbed onto the substrate surface through chemisorption, generating active groups such as silanol (Si-OH) groups. Over time, the more moisture is adsorbed, the more silanol groups accumulate in the substrate, making the a-Si gas source reaction easier to accumulate, resulting in a thicker deposited amorphous silicon layer. Experiments show that after the substrate forms an oxide layer, when the substrate is left to stand without any operation for a certain period, the thickness of the deposited amorphous silicon layer tends to saturate and will not increase further. In other words, after a certain period of substrate placement, the moisture adsorbed on the substrate surface tends to saturate, and the thickness of the amorphous silicon layer formed on this basis fluctuates very little. Therefore, to achieve a stable thickness of the deposited amorphous silicon layer, strict control of the substrate placement time and limitations on wafer storage are necessary. This is clearly detrimental to wafer management by production engineers. Therefore, those skilled in the art face the problem of how to solve the problem of the thickness of deposited ultrathin amorphous silicon increasing with the increase of the previous process placement time.
[0036] Therefore, in view of the aforementioned technical problems, this application proposes a semiconductor device manufacturing method, such as... Figure 1 As shown, it mainly includes the following steps:
[0037] Step S110: Provide a substrate and form an oxide layer on the substrate;
[0038] Step S120: The oxide layer is pre-cleaned to saturate the silanol groups on the surface of the oxide layer, forming an oxide layer saturated with silanol groups.
[0039] Step S130: An amorphous silicon layer is deposited on an oxide layer saturated with silanol groups.
[0040] In the above scheme, after the oxide layer is formed, the oxide layer on the substrate is pre-cleaned to saturate the silanol groups on the surface of the oxide layer. Under the condition of saturated silanol groups, the thickness of the deposited amorphous silicon film is more stable, thereby solving the problem that the thickness of the amorphous silicon film increases with the increase of the substrate placement time, so as to facilitate the management of subsequent process technology.
[0041] Example 1
[0042] Below, for reference Figures 1 to 2D The method for manufacturing the semiconductor device of this application is described in detail, wherein, Figure 1 A flowchart illustrating a method for manufacturing a semiconductor device according to a specific embodiment of this application is shown. Figures 2A-2D The diagram shows a cross-sectional view of a semiconductor device obtained by sequentially implementing a method for manufacturing a semiconductor device according to a specific embodiment of this application.
[0043] For example, the method for manufacturing the semiconductor device of this application includes the following steps:
[0044] First, step S110 is performed to provide a substrate and form an oxide layer on the substrate.
[0045] In some embodiments, the substrate may include a semiconductor substrate and an epitaxial layer formed on the semiconductor substrate. Optionally, the semiconductor substrate and the epitaxial layer may have the same conductivity type. In other embodiments, the substrate may include only a semiconductor substrate without forming an epitaxial layer.
[0046] Specifically, such as Figure 2A As shown, substrate 200 includes a semiconductor substrate, which may include at least one of the following materials: Si, Ge, SiGe, SiC, SiGeC, InAs, GaAs, InP, InGaAs, or other III / V compound semiconductors. Alternatively, the semiconductor substrate may also include silicon-on-insulator (SOI), silicon-on-insulator stacked (SSOI), silicon-on-insulator stacked (S-SiGeOI), silicon-on-insulator (SiGeOI), or germanium-on-insulator (GeOI), etc. Although several examples of materials that can form a semiconductor substrate have been described herein, any material that can serve as a semiconductor substrate falls within the scope of this application. Furthermore, substrate 200 may be divided into active regions, and / or doped wells (not shown) may be formed in substrate 200, etc.
[0047] like Figure 2BAs shown, an oxide layer 201 is formed on a substrate 200. This oxide layer 201 includes, but is not limited to, silicon dioxide, and the substrate 200 provides silicon atoms to form the silicon dioxide. In some embodiments, the thickness of the oxide layer 201 is in the range of 900 angstroms to 1100 angstroms, for example, 900 angstroms, 1000 angstroms, or 1100 angstroms. Forming an oxide layer with a thickness in the range of 900 angstroms to 1100 angstroms on the substrate ensures a clearer boundary between the amorphous silicon layer and the substrate when measuring the thickness of the amorphous silicon layer formed in subsequent steps, thereby facilitating the measurement of the amorphous silicon layer thickness.
[0048] In some embodiments, an oxide layer is formed using a wet oxidation method. The wet oxidation method primarily generates silicon dioxide on the substrate, thus forming the oxide layer. The wet oxidation method involves placing the substrate in an oxygen environment containing a certain level of humidity (typically water vapor generated by heating high-purity water). The substrate provides silicon atoms, and at high temperatures, the silicon reacts with oxygen and water vapor to form a silicon dioxide thin film on the silicon surface. Compared to methods such as PECVD (plasma-enhanced chemical vapor deposition), the wet oxidation method offers advantages such as faster formation rates and better film uniformity. The reaction formula for wet oxidation is:
[0049] Si + 2H₂O → SiO₂ + 2H₂;
[0050] Si + O2 → SiO2.
[0051] Next, step 120 is performed to pre-clean the oxide layer so that the silanol groups on the surface of the oxide layer are saturated, forming an oxide layer saturated with silanol groups.
[0052] In some embodiments, pre-cleaning includes cleaning the oxide layer using SC1 cleaning solution, SC2 cleaning solution, or plasma-activated water, wherein SC1 cleaning solution includes NH3·H2O, H2O2, and H2O, and SC2 cleaning solution includes HCl, H2O2, and H2O.
[0053] Specifically, the oxide layer was cleaned using SC1 cleaning solution. SC1 cleaning solution is mainly composed of NH3·H2O (ammonia), H2O2 (hydrogen peroxide), and H2O (water) mixed in a certain proportion. Hydrogen peroxide, as a strong oxidant, can oxidize the particles on the substrate surface, and the reaction formula is: SiO2 + 2H2O2 → Si(OH)4 + O2.
[0054] Ammonia water has a corrosive effect. The reaction formula for ammonia water to corrode the oxide layer is: SiO2 + 2NH3·H2O → (NH4)2SiO3.
[0055] Alternatively, the oxide layer can be cleaned using SC2 cleaning solution. SC2 cleaning solution is mainly composed of HCl (hydrochloric acid), H2O2 (hydrogen peroxide), and H2O (water) mixed in a certain proportion. Similarly, the reaction formula when cleaning with SC2 cleaning solution is: SiO2 + 2H2O2 → Si(OH)4 + O2.
[0056] In other embodiments, SC1 and SC2 cleaning solutions are used to clean the oxide layer. Specifically, firstly, the oxide layer is cleaned with SC1 cleaning solution, based on the principles described above. During the cleaning process with SC1 cleaning solution, a small amount of silica and some metal ions may still remain. To achieve a better cleaning effect, the oxide layer is then cleaned again with SC2 cleaning solution. Cleaning the oxide layer with SC2 cleaning solution can further oxidize the silica, and simultaneously dissolve it by reacting with hydrochloric acid to generate soluble substances, thereby achieving a better cleaning effect.
[0057] like Figure 2C As shown, after pre-cleaning, oxide layer 201 becomes oxide layer 202 saturated with silanol groups.
[0058] In some embodiments, the pre-cleaning time ranges from 1 s to 5000 s. More specifically, the pre-cleaning time ranges from 30 s to 2000 s. Specifically, the cleaning time can be 1 s, 30 s, 60 s, 300 s, 1000 s, 2000 s, or 5000 s. In some examples, after cleaning the oxide layer for a period of time, the thickness change of the subsequently formed amorphous silicon layer on the cleaned oxide layer is monitored to determine whether the cleaned oxide layer forms a silicon hydroxyl group-saturated oxide layer. Specifically, the oxide layer is cleaned with SC1 cleaning solution for 60 s, and then an amorphous silicon layer is formed on the cleaned oxide layer. The thickness of the deposited amorphous silicon layer is monitored as the substrate is placed for a period of time. If the thickness of the amorphous silicon layer changes very little with the substrate placement time after a period of deposition, the oxide layer formed after 60 s cleaning is considered to be a silicon hydroxyl group-saturated oxide layer.
[0059] In other examples, the silanol groups on the surface of the cleaned oxide layer are considered saturated when the silanol groups are no less than 60%. Furthermore, the silanol groups on the surface of the cleaned oxide layer are considered saturated when the silanol group percentage reaches 60%-95%. Specifically, the silanol group percentage on the surface of the cleaned oxide layer can be 60%, 75%, 80%, 85%, or 95%, forming a silanol-saturated oxide layer. For example, after cleaning oxide layer 201 with SC1 cleaning solution for 60 seconds, the silanol groups in the cleaned oxide layer are measured. Specifically, Fourier transform infrared spectroscopy (FT-IR) can be used to measure the silanol groups. When the measured silanol groups are no less than 60%, it is considered that the silanol groups are saturated, forming a silanol-saturated oxide layer.
[0060] By setting a pre-cleaning time, the active groups in the oxide layer can undergo sufficient chemical reactions, thereby saturating the silanol groups.
[0061] Next, step 130 is performed to deposit an amorphous silicon layer on the oxide layer saturated with silanol groups.
[0062] In some embodiments, an amorphous silicon layer is deposited on an oxide layer saturated with silanol groups using low-pressure chemical vapor deposition.
[0063] Specifically, such as Figure 2D As shown, an amorphous silicon layer 203 is deposited on an oxide layer 202 saturated with silanol groups using furnace tube LPCVD. After pre-cleaning, the abundant silanol groups on the surface of the substrate 200 are beneficial for gas adsorption. At the same time, the saturated hydroxyl groups on the surface of the substrate 200 provide more active sites for the amorphous silicon, which helps the adsorption and reaction of the amorphous silicon gas source. This significantly shortens the gas source incubation time of the amorphous silicon, resulting in a thicker amorphous silicon layer 203 (amorphous silicon thin film). Furthermore, because the silanol groups on the surface of the substrate 200 are saturated, the thickness of the deposited amorphous silicon layer 203 is less affected by the placement time, thus forming a more stable amorphous silicon layer 203.
[0064] In some embodiments, the method of manufacturing a semiconductor device further includes measuring the thickness of an amorphous silicon layer to monitor how the thickness of the amorphous silicon layer changes over time.
[0065] Specifically, the thickness of the amorphous silicon layer is measured using instruments over a period of time. For example... Figure 3 and Figure 4 As shown, Figure 3This illustrates a specific embodiment of the prior art, showing how the thickness of the deposited amorphous silicon layer changes over time. Figure 3 It can be seen that after 500 hours, the thickness region of the amorphous silicon layer is saturated, that is, it tends to be stable. The difference between the maximum and minimum thickness of the amorphous silicon layer is 4.83 angstroms. Figure 4 This illustration shows the variation of the thickness of an amorphous silicon layer deposited in a specific embodiment of this application over time. Figure 4 As shown in the list, the thickness of the amorphous silicon layer remained around 36 angstroms from 42 hours to 1440 hours after placement, with a difference of 0.87 angstroms between the maximum and minimum thickness. Monitoring results indicate that the embodiments of this application can maintain a relatively stable amorphous silicon layer thickness, which is beneficial for subsequent process control and management.
[0066] Thus, the process steps of the semiconductor device manufacturing method according to the embodiments of this application are completed. It is understood that the semiconductor device manufacturing method of the embodiments of this application includes not only the above steps, but may also include other necessary steps before, during or after the above steps, all of which are included within the scope of the manufacturing method of the embodiments of this application.
[0067] In some of the above embodiments, after the oxide layer is formed, the oxide layer on the substrate is pre-cleaned to saturate the silanol groups on the surface of the oxide layer. Under the condition of saturated silanol groups, the oxide conditions of the substrate on which the amorphous silicon thin film is deposited are consistent, and the thickness of the deposited amorphous silicon thin film is more stable. This solves the problem that the thickness of the amorphous silicon thin film increases with the increase of the substrate placement time, which facilitates the management of subsequent process technology. While ensuring that the product process conditions remain unchanged, the incubation time for depositing the amorphous silicon layer is also shortened, and the production efficiency is improved.
[0068] Example 2
[0069] This application also provides a semiconductor device prepared by the method described in Embodiment 1 above. This semiconductor device may include, but is not limited to, solar cells, thin-film transistors, and memory. Since the device of this application is prepared using the aforementioned method, it has the same advantages as the aforementioned method.
[0070] Although several embodiments have been described herein, it should be understood that many other modifications and embodiments will arise in the mind of those skilled in the art, all of which will fall within the spirit and scope of the concept disclosed herein. More specifically, various modifications and changes may be made in terms of the arrangement and / or components of the subject matter within the scope of this disclosure, the drawings, and the appended claims. In addition to modifications and changes in the components and / or arrangement, the use of alternative methods will also be obvious to those skilled in the art.
Claims
1. A method for manufacturing a semiconductor device, characterized in that, The method includes: A substrate is provided, on which an oxide layer is formed; The oxide layer is pre-cleaned to saturate the silanol groups on the surface of the oxide layer, forming an oxide layer saturated with silanol groups. An amorphous silicon layer is deposited on the oxide layer saturated with silanol groups.
2. The manufacturing method as described in claim 1, characterized in that, The pre-cleaning includes: The oxide layer is cleaned using SC1 cleaning solution, SC2 cleaning solution, or plasma-activated water, wherein the SC1 cleaning solution includes NH3·H2O, H2O2, and H2O, and the SC2 cleaning solution includes HCl, H2O2, and H2O.
3. The manufacturing method as described in claim 1, characterized in that, The pre-cleaning time ranges from 1s to 5000s.
4. The manufacturing method as described in claim 1, characterized in that, The pre-cleaning time ranges from 30s to 2000s.
5. The manufacturing method as described in claim 1, characterized in that, When the silanol groups on the surface of the oxide layer after cleaning are not less than 60%, the silanol groups on the surface of the oxide layer after cleaning are saturated.
6. The manufacturing method as described in claim 1, characterized in that, An amorphous silicon layer is deposited on the oxide layer saturated with silanol groups using low-pressure chemical vapor deposition.
7. The manufacturing method as described in claim 1, characterized in that, The oxide layer is formed using a wet oxidation method.
8. The manufacturing method as described in claim 1, characterized in that, The thickness of the oxide layer ranges from 900 angstroms to 1100 angstroms.
9. The manufacturing method as described in claim 1, characterized in that, The method further includes measuring the thickness of the amorphous silicon layer to monitor the change in the thickness of the amorphous silicon layer over time.
10. A semiconductor device, characterized in that, The semiconductor device is manufactured using the manufacturing method described in any one of claims 1-9.