A two-dimensional ferroelectric transistor device based on controllable nucleation to realize linear modulation and a preparation and micro-characterization method thereof

By controlling the domain nucleation and flipping behavior in two-dimensional ferroelectric transistor devices and combining advanced microscopic characterization techniques, the problem of nonlinear conductivity modulation was solved, enabling high-precision neuromorphic computation and device performance optimization.

CN122121195APending Publication Date: 2026-05-29SOUTHERN UNIVERSITY OF SCIENCE AND TECHNOLOGY
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
SOUTHERN UNIVERSITY OF SCIENCE AND TECHNOLOGY
Filing Date
2026-01-08
Publication Date
2026-05-29

AI Technical Summary

Technical Problem

The conductivity modulation of existing two-dimensional ferroelectric field-effect transistor devices exhibits severe nonlinearity, making it difficult to meet the requirements of high-precision neuromorphic computing. Furthermore, traditional characterization methods cannot provide real-time feedback and optimization of nucleation and flipping patterns, making it difficult to establish the correlation between fabrication process, domain structure, and electrical performance at the microscale.

Method used

By sequentially fabricating a planar structure consisting of a bottom electrode, a ferroelectric layer, a conductive layer, and a two-dimensional semiconductor layer, as well as an insulating layer and a metal electrode on a substrate, domain nucleation is controlled to occur at the interface between the conductive layer and the two-dimensional semiconductor layer. Microscopic characterization is performed using techniques such as scanning probe microscopy and atomic force microscopy to verify the domain nucleation and flipping rules, and the fabrication process is optimized to achieve linear modulation.

Benefits of technology

The linear conductivity modulation characteristics of two-dimensional ferroelectric transistor devices were realized, providing a reliable microscopic characterization method to guide process optimization and fabricate devices with excellent linear, multi-state, reversible conductivity modulation characteristics and good durability.

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Abstract

The application discloses a two-dimensional ferroelectric transistor device based on controllable nucleation to realize linear modulation and a preparation and micro-characterization method thereof, and the method comprises the following steps: sequentially preparing a bottom electrode and a ferroelectric layer on a substrate; preparing a planar structure covering the surface of the ferroelectric layer, wherein the planar structure comprises a conductive layer and a two-dimensional semiconductor layer, and is used for adjusting the internal electric field distribution of the ferroelectric layer to control the nucleation of domains to occur at the interface between the conductive layer and the two-dimensional semiconductor layer; preparing an insulating layer and a metal electrode to complete the preparation of the two-dimensional ferroelectric transistor device; and micro-characterizing the two-dimensional ferroelectric transistor device to verify the domain nucleation and flipping rule and obtain the device resistance state change under different domain distributions. The application realizes linear flipping of ferroelectric domains by introducing a controllable nucleation process, prepares a transistor device with linear conductance modulation characteristics, and micro-verify by using advanced micro-characterization technology, and provides a closed-loop process which can guide process optimization.
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Description

Technical Field

[0001] This invention relates to the field of micro-nano device fabrication and characterization technology, and in particular to a two-dimensional ferroelectric transistor device based on controllable nucleation to achieve linear modulation, and its fabrication and microscopic characterization method. Background Technology

[0002] Two-dimensional ferroelectric field-effect transistors (FETs) can be used for in-memory neuromorphic computation, and their voltage pulse-modulated multistate polarization and conductance can well simulate synaptic weights. Linear control of the conductance state of the FET is crucial to device performance, such as synaptic weights. Currently, because the flipping of ferroelectric domains is inherently nonlinear, voltage pulse-based multistate conductance modulation exhibits severe nonlinearity, making it difficult to meet the requirements of high-precision neuromorphic computation.

[0003] Furthermore, traditional characterization methods are mostly macroscopic device characterizations, which cannot reveal the evolution of microscopic domains and the changes in the resistance state of two-dimensional semiconductors under pulsed voltages. This makes it difficult to provide real-time feedback and optimize the crucial "nucleation" step, and also hinders the direct establishment of the correlation between "fabrication process-domain structure-electrical performance" at the microscopic scale. Therefore, it is still necessary to optimize the device structure design and develop microscopic characterization methods to verify the nucleation and flipping laws in real time, thereby realizing linear modulation transistor devices. Summary of the Invention

[0004] To address the aforementioned deficiencies in existing technologies, this invention provides a two-dimensional ferroelectric transistor device based on controllable nucleation for linear modulation, along with its fabrication and microscopic characterization methods. The technical solution adopted in this invention is as follows: In a first aspect, the present invention provides a method for fabricating and microscopically characterizing a two-dimensional ferroelectric transistor device based on controllable nucleation to achieve linear modulation, characterized in that the method comprises: A bottom electrode and a ferroelectric layer are sequentially fabricated on a substrate; A planar structure is fabricated and covered on the surface of a ferroelectric layer. The planar structure includes a conductive layer and a two-dimensional semiconductor layer. The conductive layer and the two-dimensional semiconductor layer are used to adjust the internal electric field distribution of the ferroelectric layer in order to control domain nucleation to occur at the interface between the conductive layer and the two-dimensional semiconductor layer. An insulating layer and metal electrodes were prepared to complete the fabrication of a two-dimensional ferroelectric transistor device. The fabricated two-dimensional ferroelectric transistor device was microscopically characterized to verify the domain nucleation and flipping behavior and to obtain the device resistance state changes under different domain distributions.

[0005] In one implementation, the bottom electrode is strontium ruthenium ruthenium oxide, and the ferroelectric layer is a ferroelectric thin film of lead zirconate titanate.

[0006] In one implementation, the planar structure is composed of stacked graphene, molybdenum disulfide, and graphene.

[0007] In one implementation, the step of performing microscopic characterization on the fabricated two-dimensional ferroelectric transistor device to verify the domain nucleation and flipping behavior and obtain the device resistance state changes under different domain distributions includes: Using Kelvin probe microscopy with a scanning probe microscope, it was verified that when voltage is applied to the conductive layer, there is a potential gradient change between the conductive layer and the two-dimensional semiconductor layer. A pulsed voltage is applied to the two-dimensional ferroelectric transistor device by means of the bottom electrode or the source and drain electrodes. The nucleation and evolution process of the domains of the two-dimensional ferroelectric transistor device is characterized by atomic force microscopy to verify the domain nucleation and flipping rules and to obtain the device resistance state changes under different domain distributions. The source and drain electrodes are the source and drain electrodes of the two-dimensional ferroelectric transistor device.

[0008] In one implementation, the step of performing microscopic characterization on the fabricated two-dimensional ferroelectric transistor device to verify the domain nucleation and flipping behavior and to obtain the device resistance state changes under different domain distributions further includes: By optimizing the fabrication process through the controllable nucleation and unidirectional expansion of domains, a long strip-shaped two-dimensional semiconductor layer was selected as the channel layer to fabricate a two-dimensional ferroelectric transistor device.

[0009] In one implementation, the method further includes: characterizing the nucleation of domains in a two-dimensional ferroelectric transistor device and the linear evolution of the domain length on a strip-shaped two-dimensional semiconductor layer with pulse time based on atomic force microscopy.

[0010] In one implementation, the step of performing microscopic characterization on the fabricated two-dimensional ferroelectric transistor device to verify the domain nucleation and flipping behavior and to obtain the device resistance state changes under different domain distributions further includes: By integrating piezoelectric microscopy and scanning microwave impedance microscopy, the carrier concentration distribution of domains and corresponding two-dimensional semiconductor layers in two-dimensional ferroelectric transistor devices was characterized, directly linking domain dynamics and electrical performance at the nanoscale.

[0011] In one implementation, the fabricated two-dimensional ferroelectric transistor device is microscopically characterized to verify the domain nucleation and flipping behavior and to obtain the device resistance state changes under different domain distributions. The method also includes: By estimating the resistance distribution of two-dimensional semiconductor regions corresponding to different polarization directions through carrier concentration, and considering two-dimensional semiconductor layers with different resistance states as series or parallel resistances between the source and drain, the channel layer resistance is calculated to achieve microscopic electrical characterization of the device. The macroscopic transfer curve is then correlated to verify the reliability of the microscopic electrical characterization.

[0012] In one implementation, the formula for calculating the channel layer resistance is:

[0013] in, It is the channel length between the source and drain. It is the length of the domains that flip on the channel. Indicates the amount of charge. Indicates mobility. This indicates the carrier concentration in the polarization inversion region. This indicates the carrier concentration in the unpolarized region. The width of the channel between the source and drain.

[0014] Secondly, the present invention also provides a two-dimensional ferroelectric transistor device based on controllable nucleation to achieve linear modulation, wherein the two-dimensional ferroelectric transistor device is obtained based on the preparation and microscopic characterization method of the two-dimensional ferroelectric transistor device based on controllable nucleation to achieve linear modulation described in the above scheme.

[0015] Beneficial Effects: Compared with existing technologies, this invention provides a method for fabricating and microscopically characterizing a two-dimensional ferroelectric transistor device based on controllable nucleation to achieve linear modulation. Specifically, this invention sequentially fabricates a bottom electrode and a ferroelectric layer on a substrate. Then, a planar structure is fabricated and covered on the surface of the ferroelectric layer. The planar structure includes a conductive layer and a two-dimensional semiconductor layer. The conductive layer and the two-dimensional semiconductor layer are used to adjust the internal electric field distribution of the ferroelectric layer to control domain nucleation at the interface between the conductive layer and the two-dimensional semiconductor layer. Next, an insulating layer and a metal electrode are fabricated to complete the fabrication of the two-dimensional ferroelectric transistor device. The fabricated two-dimensional ferroelectric transistor device is microscopically characterized to verify the domain nucleation and flipping laws and to obtain the device resistance state changes under different domain distributions.

[0016] This invention introduces a controllable nucleation process to achieve linear flipping of ferroelectric domains, thereby fabricating a transistor device with linear conductivity modulation characteristics. It also utilizes advanced microscopic characterization techniques for in-situ, real-time microscopic verification, providing a closed-loop process that can guide process optimization. Attached Figure Description

[0017] Figure 1 This is a schematic diagram illustrating the fabrication and microscopic characterization process of a two-dimensional ferroelectric transistor device according to an embodiment of the present invention.

[0018] Figure 2 The diagram and optical mirror image are of the two-dimensional ferroelectric transistor device prepared according to an embodiment of the present invention.

[0019] Figure 3 This is a schematic diagram of the local electric field concentration effect of a two-dimensional ferroelectric transistor device according to an embodiment of the present invention.

[0020] Figure 4 This is a schematic diagram of the controllable nucleation of a two-dimensional ferroelectric transistor device according to an embodiment of the present invention.

[0021] Figure 5Optical micrographs and morphological images of the elongated two-dimensional channel layer prepared after process optimization.

[0022] Figure 6 A schematic diagram of controllable nucleation and linear modulation of domains in a two-dimensional ferroelectric transistor device after process optimization.

[0023] Figure 7 This is an integrated characterization diagram of a two-dimensional ferroelectric transistor device according to an embodiment of the present invention.

[0024] Figure 8 This is a macroscopic transfer characteristic curve of a two-dimensional ferroelectric transistor device according to an embodiment of the present invention. Detailed Implementation

[0025] To make the objectives, technical solutions, and effects of this invention clearer and more explicit, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

[0026] The flowchart shown in the attached diagram is for illustrative purposes only and does not necessarily include all content, operations, or steps, nor does it require execution in the described order. For example, some operations or steps can be broken down, combined, or partially merged, so the actual execution order may change depending on the actual situation.

[0027] It should be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.

[0028] It should be understood that, in order to clearly describe the technical solutions of the embodiments of the present invention, the terms "first" and "second" are used in the embodiments of the present invention to distinguish identical or similar items with essentially the same function and effect. For example, "first control information" and "second control information" are only used to distinguish different control information and do not limit their order.

[0029] Those skilled in the art will understand that the words "first" and "second" do not limit the quantity or the order of execution, and that the words "first" and "second" do not necessarily imply that they are different.

[0030] It should also be understood that the term "and / or" as used in this specification and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0031] To address the problems of existing technologies, this invention provides a method for fabricating and microscopically characterizing a two-dimensional ferroelectric transistor device based on controllable nucleation to achieve linear modulation. The method of this embodiment physically solves the problem of nonlinear modulation in ferroelectric devices, and the fabricated device exhibits excellent linear, multi-state, and reversible conductivity modulation characteristics, as well as good durability and retention properties. In specific applications, such as... Figure 1 As shown in the figure, the process for fabricating the two-dimensional ferroelectric transistor device in this embodiment includes the following steps: Step S100: Sequentially fabricate a bottom electrode and a ferroelectric layer on the substrate; Step S200: Prepare a planar structure to cover the surface of the ferroelectric layer. The planar structure includes a conductive layer and a two-dimensional semiconductor layer. The conductive layer and the two-dimensional semiconductor layer are used to adjust the internal electric field distribution of the ferroelectric layer in order to control domain nucleation to occur at the interface between the conductive layer and the two-dimensional semiconductor layer. Step S300: Prepare the insulating layer and metal electrode to complete the fabrication of the two-dimensional ferroelectric transistor device; Step S400: Perform microscopic characterization on the prepared two-dimensional ferroelectric transistor device to verify the domain nucleation and flipping rules, and obtain the device resistance state changes under different domain distributions.

[0032] Combination Figure 2 As shown, Figure 2 Figure (a) is a schematic diagram of the structure of the two-dimensional ferroelectric transistor device prepared in this embodiment. Figure 2 Figure (b) shows an optical microscope image of the two-dimensional ferroelectric transistor device. In this embodiment, the bottom electrode is strontium ruthenium ruthenium oxide (SRO), and the ferroelectric layer is a lead zirconate titanate (PZT) ferroelectric thin film. Next, graphene, molybdenum disulfide (MoS2), and graphene are stacked on the planar structure and covered on the surface of the PZT ferroelectric thin film. Finally, the fabrication of the insulating layer and the metal electrode Au completes the structural fabrication of the controllable nucleation two-dimensional ferroelectric transistor device. It should be noted that the materials of the bottom electrode, ferroelectric layer, and planar structure are merely illustrative and are not limited to these materials. This embodiment does not limit the specific materials used.

[0033] Furthermore, this embodiment also performs microscopic characterization of the fabricated two-dimensional ferroelectric transistor device to verify the domain nucleation and flipping rules, and obtain the device resistance state changes under different domain distributions. During the microscopic characterization of the two-dimensional ferroelectric transistor device, this embodiment utilizes Kelvin probe microscopy with a scanning probe microscope to verify that when voltage is applied to the conductive layer, there is a potential gradient change between the conductive layer and the two-dimensional semiconductor layer, corresponding to electric field concentration at the interface. Combined with... Figure 3 As shown, Figure 3Figure (a) shows the uniform electric field of the ferroelectric layer under a uniformly conductive top electrode, simulated by finite element analysis. Figure 3 Figure (b) shows the electric field concentration at the conductor / semiconductor interface of the ferroelectric layer simulated by finite element analysis. Figure 3 Figure (c) shows an image obtained using a Kelvin probe force microscope. Figure 3 Figure (d) shows the finite element analysis simulation of the surface potential distribution at the interface between the corresponding conductor and the two-dimensional semiconductor layer.

[0034] Furthermore, this embodiment applies pulsed voltages to the two-dimensional ferroelectric transistor device via the bottom electrode (SRO) or source / drain electrode (graphene top electrode). Atomic force microscopy (AFM) characterizes the domain nucleation and evolution process of the two-dimensional ferroelectric transistor device to verify the domain nucleation and flipping rules and obtain the device resistance state changes under different domain distributions. Moreover, the fabrication process can be optimized based on the controllable nucleation and unidirectional expansion results of the domains, selecting a long strip-shaped two-dimensional semiconductor layer as the channel layer to fabricate the two-dimensional ferroelectric transistor device. Then, AFM characterizes the domain nucleation of the two-dimensional ferroelectric transistor device and the linear evolution of the domain length on the strip-shaped two-dimensional semiconductor layer with pulse time. Figure 4 As shown, Figure 4 Figure (a) shows a two-dimensional / ferroelectric heterojunction structure covered by a purely conductive layer; Figure 4 Figure (b) shows the two-dimensional / ferroelectric heterojunction structure after the controllable nucleation process of the present invention. Figure 4 Figure (c) shows the random evolution of domains on a ferroelectric thin film covered by a purely conductive layer. The nucleation of these domains is disordered and random, corresponding to nonlinear domain dynamics. Figure 4 Figure (d) in the figure reflects how the conductive layer and semiconductor interface proposed in this invention control the orderly movement of domains in a two-dimensional ferroelectric transistor device through electric field concentration. Figure 5 The middle section shows the elongated two-dimensional channel layer prepared after process optimization. Figure 5 Figure (a) is an optical micrograph of a long strip-shaped two-dimensional channel layer. Figure 5 Figure (b) shows the morphology of the elongated two-dimensional channel layer. Figure 6 To optimize the process, controllable nucleation and linear modulation of domains in two-dimensional ferroelectric transistor devices are achieved. Figure 6 Figure (a) shows the evolution of the PFM phase diagram in the same region under a series of gate voltage pulses, illustrating the linear growth of domains. Figure 6 Figure (b) shows the linear relationship between domain length and pulse time. Figure 6 Figure (c) shows the domain growth rate corresponding to different channel widths in a two-dimensional ferroelectric transistor device.

[0035] Furthermore, this embodiment also characterizes the carrier concentration distribution of the domains and corresponding two-dimensional semiconductor layers of the two-dimensional ferroelectric transistor device by integrating piezoelectric microscopy and scanning microwave impedance microscopy, directly correlating domain dynamics and electrical performance at the nanoscale. Figure 7 As shown, Figure 7 The integrated characterization results show that the ferroelectric domains and the corresponding two-dimensional semiconductor capacitance signals in the region are characterized by integrated piezoelectric microscopy and scanning microwave impedance microscopy, and the carrier concentration is quantified by single-point CV curves and finite element simulation. Figure 7 Figure (a) shows the PFM phase diagram of the same region under a series of gate voltage pulses. Figure 7 Figures (b) and (c) in the figure correspond to the sMIM signal amplitude diagrams, showing the evolution of the resistive state and carrier type in the two-dimensional semiconductor layer; Figure 7 Figure (d) in the figure is a schematic diagram of ferroelectric polarization modulation of a two-dimensional semiconductor layer; Figure 7 Figure (e) in the figure is a schematic diagram of the quantitative analysis of carrier concentration at points 1-5; Figure 7 Figure (f) shows the linear relationship between the resistance state of the channel layer and the length of the switched domain.

[0036] Furthermore, this embodiment also calculates the resistance distribution of the two-dimensional semiconductor region corresponding to different polarization directions by estimating the carrier concentration. It treats the two-dimensional semiconductor layers with different resistance states as series or parallel resistances between the source and drain (the source and drain are the source and drain of the two-dimensional ferroelectric transistor device), calculates the channel layer resistance, realizes the microscopic electrical characterization of the device, correlates it with the macroscopic transfer curve, and verifies the reliability of the microscopic electrical characterization. Specifically, the formula for calculating the channel layer resistance is:

[0037] in, It is the channel length between the source and drain. It is the length of the domains that flip on the channel. Indicates the amount of charge. Indicates mobility. This indicates the carrier concentration in the polarization inversion region. This indicates the carrier concentration in the unpolarized region. This is the width of the channel between the source and drain. For example... Figure 8As shown in the figure, this embodiment obtains the on-state and off-state resistance ratio of the device through macroscopic transfer curves, and compares it with the on-state and off-state resistance ratio calculated by microscopic electrical characterization to verify the reliability of microscopic electrical characterization. Based on the above embodiments, the present invention also provides a two-dimensional ferroelectric transistor device based on controllable nucleation to achieve linear modulation. This two-dimensional ferroelectric transistor device is obtained according to the preparation and microscopic characterization methods of the two-dimensional ferroelectric transistor device based on controllable nucleation to achieve linear modulation in the above embodiments.

[0038] In summary, this invention achieves linear modulation of the electrical conductivity of a device by precisely controlling the ferroelectric domain nucleation process, and integrates piezoelectric microscopy and scanning microwave impedance microscopy for microscopic characterization of the transistor's electrical properties. It represents a novel method for the fabrication and microscopic characterization of two-dimensional ferroelectric transistor devices. This invention solves the problem of nonlinear modulation in ferroelectric devices from a physical mechanism perspective and provides a closed-loop process to guide process optimization. Furthermore, the two-dimensional ferroelectric transistor devices fabricated using this method exhibit excellent linear, multi-state, and reversible conductivity modulation characteristics, as well as good durability and retention properties.

[0039] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for fabrication and microscopic characterization of a two-dimensional ferroelectric transistor device based on controllable nucleation to achieve linear modulation, characterized in that, The method includes: A bottom electrode and a ferroelectric layer are sequentially fabricated on a substrate; A planar structure is fabricated and covered on the surface of a ferroelectric layer. The planar structure includes a conductive layer and a two-dimensional semiconductor layer. The conductive layer and the two-dimensional semiconductor layer are used to adjust the internal electric field distribution of the ferroelectric layer in order to control domain nucleation to occur at the interface between the conductive layer and the two-dimensional semiconductor layer. An insulating layer and metal electrodes were prepared to complete the fabrication of a two-dimensional ferroelectric transistor device. The fabricated two-dimensional ferroelectric transistor device was microscopically characterized to verify the domain nucleation and flipping behavior and to obtain the device resistance state changes under different domain distributions.

2. The method for fabrication and microscopic characterization of a two-dimensional ferroelectric transistor device based on controllable nucleation and linear modulation according to claim 1, characterized in that, The bottom electrode is strontium ruthenium ruthenium ore, and the ferroelectric layer is a ferroelectric thin film of lead zirconate titanate.

3. The method for fabrication and microscopic characterization of a two-dimensional ferroelectric transistor device based on controllable nucleation and linear modulation according to claim 1, characterized in that, The planar structure is composed of stacked graphene, molybdenum disulfide, and graphene.

4. The method for fabrication and microscopic characterization of a two-dimensional ferroelectric transistor device based on controllable nucleation and linear modulation according to claim 1, characterized in that, The microscopic characterization of the fabricated two-dimensional ferroelectric transistor device is performed to verify the domain nucleation and flipping behavior and to obtain the device resistance state changes under different domain distributions, including: Using Kelvin probe microscopy with a scanning probe microscope, it was verified that when voltage is applied to the conductive layer, there is a potential gradient change between the conductive layer and the two-dimensional semiconductor layer. A pulsed voltage is applied to the two-dimensional ferroelectric transistor device by means of the bottom electrode or the source and drain electrodes. The nucleation and evolution process of the domains of the two-dimensional ferroelectric transistor device is characterized by atomic force microscopy to verify the domain nucleation and flipping rules and to obtain the device resistance state changes under different domain distributions. The source and drain electrodes are the source and drain electrodes of the two-dimensional ferroelectric transistor device.

5. The method for fabrication and microscopic characterization of a two-dimensional ferroelectric transistor device based on controllable nucleation and linear modulation according to claim 1, characterized in that, The process of performing microscopic characterization on the fabricated two-dimensional ferroelectric transistor device to verify the domain nucleation and flipping behavior and to obtain the device resistance state changes under different domain distributions also includes: By optimizing the fabrication process through the controllable nucleation and unidirectional expansion of domains, a long strip-shaped two-dimensional semiconductor layer was selected as the channel layer to fabricate a two-dimensional ferroelectric transistor device.

6. The method for fabrication and microscopic characterization of a two-dimensional ferroelectric transistor device based on controllable nucleation and linear modulation according to claim 5, characterized in that, The process of performing microscopic characterization on the fabricated two-dimensional ferroelectric transistor device to verify the domain nucleation and flipping behavior and to obtain the device resistance state changes under different domain distributions also includes: Based on atomic force microscopy, the nucleation of domains in two-dimensional ferroelectric transistor devices and the linear evolution of domain length on strip-shaped two-dimensional semiconductor layers with pulse time were characterized.

7. The method for fabrication and microscopic characterization of a two-dimensional ferroelectric transistor device based on controllable nucleation and linear modulation according to claim 4, characterized in that, The process of performing microscopic characterization on the fabricated two-dimensional ferroelectric transistor device to verify the domain nucleation and flipping behavior and to obtain the device resistance state changes under different domain distributions also includes: By integrating piezoelectric microscopy and scanning microwave impedance microscopy, the carrier concentration distribution of domains and corresponding two-dimensional semiconductor layers in two-dimensional ferroelectric transistor devices was characterized, directly linking domain dynamics and electrical performance at the nanoscale.

8. The method for fabrication and microscopic characterization of a two-dimensional ferroelectric transistor device based on controllable nucleation and linear modulation according to claim 7, characterized in that, The method of performing microscopic characterization on the fabricated two-dimensional ferroelectric transistor device to verify the domain nucleation and flipping behavior and to obtain the device resistance state changes under different domain distributions also includes: By estimating the resistance distribution of two-dimensional semiconductor regions corresponding to different polarization directions through carrier concentration, and considering two-dimensional semiconductor layers with different resistance states as series or parallel resistances between the source and drain, the channel layer resistance is calculated to achieve microscopic electrical characterization of the device. The macroscopic transfer curve is then correlated to verify the reliability of the microscopic electrical characterization.

9. The method for fabrication and microscopic characterization of a two-dimensional ferroelectric transistor device based on controllable nucleation and linear modulation according to claim 8, characterized in that, The formula for calculating the resistance of the channel layer is as follows: in, It is the channel length between the source and drain. It is the length of the domains that flip on the channel. Indicates the amount of charge. Indicates mobility. This indicates the carrier concentration in the polarization-flipping region. This indicates the carrier concentration in the unpolarized unflipped region. The width of the channel between the source and drain.

10. A two-dimensional ferroelectric transistor device based on controllable nucleation to achieve linear modulation, characterized in that, The two-dimensional ferroelectric transistor device is obtained by the fabrication and microscopic characterization method of the two-dimensional ferroelectric transistor device based on controllable nucleation to achieve linear modulation according to any one of claims 1-9.