A signal transmission circuit and a helium mass spectrometer leak detector

Abstract

The application relates to the technical field of vacuum leak detection, and discloses a signal transmission circuit and a helium mass spectrum leak detector. The signal transmission circuit comprises an amplifier board, a mantissa amplification circuit, an index amplification circuit, a signal conditioning circuit and an analog-digital acquisition board; the mantissa amplification circuit is connected with a DAC output port of the amplifier board, which is used for outputting a mantissa signal corresponding to mantissa data of to-be-transmitted data; the index amplification circuit is connected with a general input-output port of the amplifier board, which is used for outputting an index signal corresponding to index data of the to-be-transmitted data; the mantissa amplification circuit and the index amplification circuit are connected with the signal conditioning circuit; and the signal conditioning circuit is connected with an input end of the analog-digital acquisition board. In this way, the influence of interference on signal transmission in the helium mass spectrum leak detector is reduced.

Description

Technical Field

[0001] This invention relates to the field of vacuum leak detection technology, specifically to a signal transmission circuit and a helium mass spectrometer leak detector. Background Technology

[0002] In the field of vacuum leak detection technology, the helium mass spectrometer leak detector, as a dedicated leak detection instrument using helium as the leak indicator gas, has become the most sensitive and widely used leak detection device in this technology due to its stable performance and high sensitivity. Its working principle relies on the reverse diffusion principle of a molecular pump, specifically calculating the leak rate by measuring the magnitude of the helium ion current in the mass spectrometer chamber.

[0003] In practical applications, the signal acquired by the helium mass spectrometer leak detector needs to be amplified and then transmitted to an analog-to-digital converter for analog-to-digital conversion. However, because the signal acquired by the helium mass spectrometer leak detector is very weak, even after amplification, it remains small, and its signal range is still limited. Within the signal range, the resolution is The signal is on 12 orders of magnitude. This weak signal makes it highly susceptible to interference from internal instrument noise and power line noise during transmission, which in turn leads to a decrease in leak detection accuracy and sensitivity.

[0004] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of this application, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0005] The technical problem to be solved by the present invention is how to reduce the impact of interference on signal transmission in a helium mass spectrometer leak detector. The purpose is to provide a signal transmission circuit and a helium mass spectrometer leak detector to reduce the impact of interference on signal transmission in the helium mass spectrometer leak detector.

[0006] This invention is achieved through the following technical solution:

[0007] In a first aspect, a signal transmission circuit is applied to a helium mass spectrometer leak detector. The signal transmission circuit includes: an amplifier board, a mantissa amplifier circuit, an exponential amplifier circuit, a signal conditioning circuit, and an analog-to-digital acquisition board. The mantissa amplifier circuit is connected to the DAC output port of the amplifier board; the exponential amplifier circuit is connected to the general-purpose input / output port of the amplifier board; both the mantissa amplifier circuit and the exponential amplifier circuit are connected to the signal conditioning circuit; the signal conditioning circuit is connected to the input terminal of the analog-to-digital acquisition board; the DAC output port is used to output the mantissa signal corresponding to the mantissa data of the data to be transmitted; the mantissa amplifier circuit is used to amplify the mantissa signal; the general-purpose input / output port is used to output the exponential signal corresponding to the exponential data of the data to be transmitted; the exponential amplifier circuit is used to amplify the exponential signal; and the signal conditioning circuit is used to condition the amplified mantissa signal and the amplified exponential signal respectively, and input the conditioned mantissa signal and the conditioned exponential signal into the analog-to-digital acquisition board.

[0008] In some embodiments, the mantissa amplification circuit includes: a first resistor, a second resistor, a first operational amplifier, a third resistor, a first capacitor, and a second capacitor; wherein, one end of the first resistor is connected to the DAC output port; the other end of the first resistor is connected to the non-inverting input terminal of the first operational amplifier; one end of the second resistor is connected to the inverting input terminal of the first operational amplifier, one end of the third resistor, and one end of the second capacitor; the power supply terminal of the first operational amplifier is connected to a preset first voltage and one end of the first capacitor; the other end of the second resistor, the ground terminal of the first operational amplifier, and the other end of the first capacitor are all grounded; the output terminal of the first operational amplifier is connected to the other end of the third resistor, the other end of the second capacitor, and the signal conditioning circuit.

[0009] In some embodiments, the general-purpose input / output port includes a first output port, a second output port, a third output port, and a fourth output port; the exponential amplifier circuit includes a multi-channel analog switch output module and a non-inverting adder amplifier circuit; the first output port is connected to the first channel selection pin of the multi-channel analog switch output module; the second output port is connected to the second channel selection pin of the multi-channel analog switch output module; the third output port is connected to the third channel selection pin of the multi-channel analog switch output module; the fourth output port is connected to the first input terminal of the non-inverting adder amplifier circuit; the output pin of the multi-channel analog switch output module is connected to the second input terminal of the non-inverting adder amplifier circuit; and the output terminal of the non-inverting adder amplifier circuit is connected to the signal conditioning circuit.

[0010] In some embodiments, the non-inverting adder operational amplifier circuit includes: a fourth resistor, a fifth resistor, a sixth resistor, a second operational amplifier, a third capacitor, a seventh resistor, and a fourth capacitor; one end of the fourth resistor is the first input terminal; one end of the fifth resistor is the second input terminal; the other end of the fourth resistor is connected to the other end of the fifth resistor and the non-inverting input terminal of the second operational amplifier; the inverting input terminal of the second operational amplifier is connected to one end of the sixth resistor, one end of the seventh resistor, and one end of the fourth capacitor; the power supply terminal of the second operational amplifier is connected to a preset first voltage and one end of the third capacitor; the other end of the sixth resistor, the ground terminal of the second operational amplifier, and the other end of the third capacitor are all grounded; the output terminal of the second operational amplifier is connected to the other end of the seventh resistor, the other end of the fourth capacitor, and the signal conditioning circuit.

[0011] In some embodiments, the output of the in-phase adder circuit is the sum of the output of the multi-channel analog switch output module and the output of the fourth output port.

[0012] In some embodiments, the signal conditioning circuit includes a mantissa signal conditioning circuit and an exponent signal conditioning circuit; the mantissa signal conditioning circuit is used to condition the amplified mantissa signal and input the conditioned mantissa signal into the analog-digital acquisition board; the exponent signal conditioning circuit is used to condition the amplified exponent signal and input the conditioned exponent signal into the analog-digital acquisition board.

[0013] In some embodiments, the mantissa signal conditioning circuit includes: an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a fifth capacitor, a sixth capacitor, a seventh capacitor, an eighth capacitor, a ninth capacitor, a tenth capacitor, a first switching diode, a first Zener diode, a third operational amplifier, and a fourth operational amplifier; wherein, one end of the eighth resistor is connected to the mantissa amplification circuit; the other end of the eighth resistor is connected to one end of the fifth capacitor and one end of the ninth resistor; the other end of the ninth resistor is connected to one end of the seventh capacitor and the non-inverting input terminal of the third operational amplifier; the other end of the fifth capacitor is connected to the inverting input terminal of the third operational amplifier, the output terminal of the third operational amplifier, and one end of the tenth resistor; the power supply terminal of the third operational amplifier is connected to a preset first voltage, a first Zener diode, a third operational amplifier, and a fourth operational amplifier. One end of the eighth capacitor; the ground terminal of the third operational amplifier is connected to a preset second voltage and one end of the sixth capacitor; the other end of the tenth resistor is connected to the inverting input terminal of the fourth operational amplifier, one end of the ninth capacitor, and one end of the eleventh resistor; the output terminal of the fourth operational amplifier is connected to the anode of the first switching diode; the cathode of the first switching diode is connected to one end of the twelfth resistor; the other end of the twelfth resistor is connected to the other end of the ninth capacitor, the other end of the eleventh resistor, the cathode of the first Zener diode, one end of the tenth capacitor, and the analog-digital acquisition board; the other ends of the seventh capacitor, the eighth capacitor, the sixth capacitor, the non-inverting input terminal of the fourth operational amplifier, the anode of the first Zener diode, and the tenth capacitor are all grounded.

[0014] In some embodiments, the mantissa signal conditioning circuit includes: a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eleventh capacitor, a twelfth capacitor, a thirteenth capacitor, a fourteenth capacitor, a fifteenth capacitor, a sixteenth capacitor, a second switching diode, a second Zener diode, a fifth operational amplifier, and a sixth operational amplifier; wherein, one end of the thirteenth resistor is connected to the mantissa amplification circuit; the other end of the thirteenth resistor is connected to one end of the eleventh capacitor and one end of the fourteenth resistor; the other end of the fourteenth resistor is connected to one end of the thirteenth capacitor and the non-inverting input terminal of the fifth operational amplifier; the other end of the eleventh capacitor is connected to the inverting input terminal of the fifth operational amplifier, the output terminal of the fifth operational amplifier, and one end of the fifteenth resistor; the power supply terminal of the fifth operational amplifier is connected to a preset first voltage... The voltage is connected to one end of the fourteenth capacitor; the ground terminal of the fifth operational amplifier is connected to a preset second voltage and one end of the twelfth capacitor; the other end of the fifteenth resistor is connected to the inverting input terminal of the sixth operational amplifier, one end of the fifteenth capacitor, and one end of the sixteenth resistor; the output terminal of the sixth operational amplifier is connected to the anode of the second switching diode; the cathode of the second switching diode is connected to one end of the seventeenth resistor; the other end of the seventeenth resistor is connected to the other end of the fifteenth capacitor, the other end of the sixteenth resistor, the cathode of the second Zener diode, one end of the sixteenth capacitor, and the analog-digital acquisition board; the other ends of the thirteenth capacitor, the fourteenth capacitor, the twelfth capacitor, the non-inverting input terminal of the sixth operational amplifier, the anode of the second Zener diode, and the other end of the sixteenth capacitor are all grounded.

[0015] In some embodiments, the signal transmission circuit further includes a pin header connector; the mantissa amplifier circuit and the exponent amplifier circuit are connected to the signal conditioning circuit through the pin header connector.

[0016] Secondly, a helium mass spectrometer leak detector includes the aforementioned signal transmission circuit.

[0017] Compared with existing technologies, this invention amplifies the mantissa signal corresponding to the mantissa data of the data to be transmitted using a mantissa amplification circuit, and amplifies the exponential signal corresponding to the exponential data of the data to be transmitted using an exponential amplification circuit. Then, a signal conditioning circuit conditions both the amplified mantissa and exponential signals, and inputs them to an analog-to-digital acquisition board. This achieves dual-channel amplification and transmission of the data, improving data resolution and reducing the impact of interference on signal transmission in the helium mass spectrometer leak detector. Attached Figure Description

[0018] To more clearly illustrate the technical solutions of the exemplary embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly described below. It should be understood that the following drawings only show some embodiments of the present invention and should not be considered as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort. In the drawings:

[0019] Figure 1 This is a schematic diagram of a signal transmission circuit provided in an embodiment of this disclosure;

[0020] Figure 2 This is a schematic diagram showing the connection between a mantissa amplifier circuit and an exponent amplifier circuit provided in an embodiment of this disclosure;

[0021] Figure 3 This is a schematic diagram showing the connection between a mantissa signal conditioning circuit and an exponent signal conditioning circuit provided in an embodiment of this disclosure;

[0022] Figure 4 This is a schematic diagram of another signal transmission circuit provided in an embodiment of this disclosure.

[0023] Figure label:

[0024] 100: Signal transmission circuit; 101: Amplifier board; 102: Mantissa amplifier circuit; 103: Exponent amplifier circuit; 104: Signal conditioning circuit; 105: Analog-digital acquisition board; 1: First resistor; 2: Second resistor; 3: First operational amplifier; 4: Third resistor; 5: First capacitor; 6: Second capacitor; 7: Fourth resistor; 8: Fifth resistor; 9: Sixth resistor; 10: Second operational amplifier; 11: Third capacitor; 12: Seventh resistor; 13: Fourth capacitor; 14: Eighth resistor; 15: Ninth resistor; 16: Tenth resistor; 17: Eleventh resistor; 18: Twelfth resistor; 19: Fifth capacitor; 20: Sixth capacitor; 21: Seventh capacitor ; 22: Eighth capacitor; 23: Ninth capacitor; 24: Tenth capacitor; 25: First switching diode; 26: First Zener diode; 27: Third operational amplifier; 28: Fourth operational amplifier; 29: Thirteenth resistor; 30: Fourteenth resistor; 31: Fifteenth resistor; 32: Sixteenth resistor; 33: Seventeenth resistor; 34: Eleventh capacitor; 35: Twelfth capacitor; 36: Thirteenth capacitor; 37: Fourteenth capacitor; 38: Fifteenth capacitor; 39: Sixteenth capacitor; 40: Second switching diode; 41: Second Zener diode; 42: Fifth operational amplifier; 43: Sixth operational amplifier; 44: Pin header connector; 400: Helium mass spectrometer leak detector. Detailed Implementation

[0025] To make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the embodiments and accompanying drawings. The illustrative embodiments and descriptions of the present invention are only used to explain the present invention and are not intended to limit the present invention.

[0026] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0027] The block diagrams shown in the accompanying drawings are merely functional entities and do not necessarily correspond to physically independent entities. That is, these functional entities can be implemented in software, in one or more hardware modules or integrated circuits, or in different network and / or processor devices and / or microcontroller devices.

[0028] The flowcharts shown in the accompanying drawings are merely illustrative and do not necessarily include all content and operations / steps, nor do they necessarily have to be performed in the described order. For example, some operations / steps can be broken down, while others can be combined or partially combined; therefore, the actual execution order may change depending on the specific circumstances.

[0029] In this application, "multiple" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone. The character " / " generally indicates that the preceding and following related objects have an "or" relationship.

[0030] Please see Figure 1 , Figure 1 This is a schematic diagram of a signal transmission circuit illustrated in an exemplary embodiment of this application. This signal transmission circuit is applied to a helium mass spectrometer leak detector.

[0031] like Figure 1 As shown, the signal transmission circuit 100 includes an amplifier board 101, a mantissa amplifier circuit 102, an exponent amplifier circuit 103, a signal conditioning circuit 104, and an analog-to-digital acquisition board 105; the analog-to-digital acquisition board is an AD (Analog-to-Digital) acquisition board.

[0032] The mantissa amplifier circuit 102 is connected to the DAC (Digital-to-Analog Converter) output port of the amplifier board 101; the exponent amplifier circuit 103 is connected to the general-purpose input / output port of the amplifier board 101; both the mantissa amplifier circuit 102 and the exponent amplifier circuit 103 are connected to the signal conditioning circuit 104; the signal conditioning circuit 104 is connected to the input terminal of the analog-to-digital acquisition board 105.

[0033] The DAC output port is used to output the mantissa signal corresponding to the mantissa data of the data to be transmitted.

[0034] The mantissa amplifier circuit 102 is used to amplify the mantissa signal;

[0035] A general-purpose input / output port is used to output the exponential signal corresponding to the exponential data of the data to be transmitted.

[0036] Exponential amplifier circuit 103 is used to amplify the exponential signal;

[0037] The signal conditioning circuit 104 is used to condition the amplified mantissa signal and the amplified exponent signal respectively, and input the conditioned mantissa signal and the conditioned exponent signal into the analog-digital acquisition board 105.

[0038] The signal transmission circuit provided in this embodiment amplifies the mantissa signal corresponding to the mantissa data of the data to be transmitted through a mantissa amplification circuit, and amplifies the exponential signal corresponding to the exponential data of the data to be transmitted through an exponential amplification circuit. Then, a signal conditioning circuit conditions both the amplified mantissa and exponential signals, and inputs them to an analog-to-digital acquisition board. This achieves dual-channel amplification and transmission of the data, improving data resolution and reducing the impact of interference on signal transmission in the helium mass spectrometer leak detector.

[0039] In some embodiments, the range of data to be transmitted is .

[0040] In this case, the data before the multiplication sign is the mantissa, and its range is [missing information]. The superscript data for 10 is exponential data, and its range is... The analog-to-digital acquisition board can determine the mantissa data by amplifying the mantissa signal and the exponent data by amplifying the exponent signal, and then determine the data to be transmitted output by the amplification board.

[0041] It's important to note that the function of an analog-to-digital (ADC) acquisition board is to convert analog signals into digital signals, specifically ADC signals. An 8-bit ADC is sufficient for easy signal acquisition. An 8-bit ADC means it can convert an analog signal into 2^8 = 256 different digital values.

[0042] The range of data output from the DAC output port of amplifier board 101 can be The resolution is The output range of the mantissa signal is 0V~3V. After amplification by the mantissa amplifier circuit, its output can reach 0V~9V. Thus, for the signal to be transmitted between the amplifier board and the analog-to-digital acquisition board, interference signals greater than 100mV are required to affect the signal transmission. Since interference signals are typically in the mV range, this output method is not affected by interference signals.

[0043] Please see Figure 2 , Figure 2 This is a schematic diagram showing the connection between the mantissa amplifier circuit and the exponent amplifier circuit.

[0044] like Figure 2 As shown, the mantissa amplifier circuit includes: a first resistor 1, a second resistor 2, a first operational amplifier 3, a third resistor 4, a first capacitor 5, and a second capacitor 6. One end of the first resistor 1 is connected to the DAC output port 45; the other end of the first resistor 1 is connected to the non-inverting input of the first operational amplifier 3; one end of the second resistor 2 is connected to the inverting input of the first operational amplifier 3, one end of the third resistor 4, and one end of the second capacitor 6; the power supply terminal of the first operational amplifier 3 is connected to a preset first voltage and one end of the first capacitor 5; the other end of the second resistor 2, the ground terminal of the first operational amplifier 3, and the other end of the first capacitor 5 are all grounded; the output terminal of the first operational amplifier 3 is connected to the other end of the third resistor 4, the other end of the second capacitor 6, and a signal conditioning circuit. Thus, by using the first operational amplifier, the first resistor, the second resistor, the third resistor, the first capacitor, and the second capacitor to form the basic structure of the amplifier circuit, the mantissa signal input from the DAC output port can be accurately amplified.

[0045] In the mantissa amplifier circuit, the resistance of the first resistor, I, is 5.1 ohms. The resistance of the second resistor 2 is 10. The resistance of the third resistor 4 is 20Ω. The capacitance of the first capacitor, 5, is 0.1. The capacitance of the second capacitor, 6, is 0.1. The preset first voltage is +15V.

[0046] The analog signal from the DAC output, i.e., the mantissa signal, is input to the non-inverting input of the first operational amplifier through a first resistor. Simultaneously, a second resistor connected to the inverting input of the first operational amplifier is grounded, providing a DC bias path for the first operational amplifier and helping to stabilize the input signal level. A third resistor and a second capacitor are connected between the output and inverting input of the first operational amplifier, forming a voltage negative feedback loop. This feedback method stabilizes the amplifier gain and reduces nonlinear distortion, thus amplifying the mantissa signal. The first operational amplifier is powered by a +15V power supply, and the first capacitor acts as a decoupling capacitor to filter out high-frequency noise, ensuring a stable power supply to the operational amplifier. The mantissa signal is amplified by the first operational amplifier, and the amplified mantissa signal is output from the first operational amplifier's output terminal.

[0047] Furthermore, the general-purpose input / output ports include a first output port, a second output port, a third output port, and a fourth output port; the exponential amplifier circuit includes a multi-channel analog switch output module 46 and a non-inverting adder amplifier circuit; the first output port is connected to the first channel selection pin of the multi-channel analog switch output module 46; the second output port is connected to the second channel selection pin of the multi-channel analog switch output module 46; the third output port is connected to the third channel selection pin of the multi-channel analog switch output module 46; the fourth output port is connected to the first input terminal of the non-inverting adder amplifier circuit; the output pin of the multi-channel analog switch output module 46 is connected to the second input terminal of the non-inverting adder amplifier circuit; and the output terminal of the non-inverting adder amplifier circuit is connected to the signal conditioning circuit. Thus, by connecting the fourth output port to the first input terminal of the non-inverting adder amplifier circuit, and the output pin of the multi-channel analog switch output module to the second input terminal of the non-inverting adder amplifier circuit, the non-inverting adder amplifier circuit can superimpose the signal input from the fourth output port with the signal selected by the multi-channel analog switch, thereby amplifying the exponential signal.

[0048] It should be noted that the first output port is the PD1 pin interface of the amplifier board; the second output port is the PD2 pin interface of the amplifier board; the third output port is the PD3 pin interface of the amplifier board; and the fourth output port is the PD0 pin interface of the amplifier board.

[0049] The multi-channel analog switch output module 46 is a high-speed CMOS eight-channel multiplexer / demultiplexer of model CD74HC4051. Pin A is the output pin. Pins A0-A7 are input pins, connected to different voltages respectively. For example: pin A0 is connected to ground (0V); pin A1 is connected to 0.5V; pin A2 is connected to 1V; pin A3 is connected to 1.5V; pin A4 is connected to 2V; pin A5 is connected to 2.5V; pin A6 is connected to 3V; and pin A7 is connected to 3.3V.

[0050] The first channel selection pin is pin S0; the second channel selection pin is pin S1; and the third channel selection pin is pin S2. These three pins are used to select the input channel, which receives binary data. A total of three binary data values ​​are input. There are eight possible combinations of these three binary data values. Each combination corresponds to one input pin.

[0051] The multi-channel analog switch output module 46 determines the input pin corresponding to the data combination of the three binary data inputs through the first channel selection pin, the second channel selection pin, and the third channel selection pin, and outputs the voltage corresponding to the input pin through the output pin.

[0052] like Figure 2 As shown, the non-inverting adder operational amplifier circuit includes: a fourth resistor 7, a fifth resistor 8, a sixth resistor 9, a second operational amplifier 10, a third capacitor 11, a seventh resistor 12, and a fourth capacitor 13. One end of the fourth resistor 7 is the first input terminal; one end of the fifth resistor 8 is the second input terminal; the other end of the fourth resistor 7 is connected to the other end of the fifth resistor 8 and the non-inverting input terminal of the second operational amplifier 10; the inverting input terminal of the second operational amplifier 10 is connected to one end of the sixth resistor 9, one end of the seventh resistor 12, and one end of the fourth capacitor 13; the power supply terminal of the second operational amplifier 10 is connected to a preset first voltage and one end of the third capacitor 11; the other end of the sixth resistor 9, the ground terminal of the second operational amplifier 10, and the other end of the third capacitor 11 are all grounded; the output terminal of the second operational amplifier 10 is connected to the other end of the seventh resistor 12, the other end of the fourth capacitor 13, and a signal conditioning circuit. This allows the signal input from the fourth output port to be superimposed with the signal selected by the multi-channel analog switch, thus amplifying the exponential signal.

[0053] In a non-inverting adder operational amplifier circuit, the fourth output port of the amplifier board outputs a voltage of 0V or 3.3V.

[0054] The voltage at the fourth output port of the amplifier board passes through the fourth resistor, and the voltage output from the output pin of the multi-channel analog switch output module passes through the fifth resistor. The two are superimposed at the non-inverting input of the second operational amplifier.

[0055] It should be noted that when the output pins of the multi-channel analog switch output module output voltage is 0V, 0.5V, 1V, or 1.5V, the fourth output port of the amplifier board outputs 0V or 3.3V. When the output pins of the multi-channel analog switch output module output voltage is 2V, 2.5V, 3V, or 3.3V, the fourth output port of the amplifier board only outputs 0V. Therefore, the signal at the non-inverting input of the second operational amplifier can be 0V, 0.5V, 1V, 1.5V, 2V, 2.5V, 3V, 3.3V, 3.8V, 4.3V, or 4.8V. There are 12 voltage states, each corresponding to an exponential data (-2 to -13) of the leak detector signal, with a resolution of [resolution missing]. For example: the index data corresponding to 0V is -2; the index data corresponding to 0.5V is -3; the index data corresponding to 1V is -4; the index data corresponding to 1.5V is -5; the index data corresponding to 2V is -6; the index data corresponding to 2.5V is -7; the index data corresponding to 3V is -8; the index data corresponding to 3.3V is -9; the index data corresponding to 3.8V is -10; the index data corresponding to 4.3V is -11; and the index data corresponding to 4.8V is -12.

[0056] In the non-inverting adder operational amplifier circuit, the resistance of the fourth resistor 7 is 5.1kΩ; the resistance of the fifth resistor 8 is 5.1kΩ; the resistance of the sixth resistor 9 is 10kΩ; and the capacitance of the third capacitor 11 is 0.1kΩ. The resistance of the seventh resistor, 12, is 10kΩ; the capacitance of the fourth capacitor, 13, is 0.1 kΩ. .

[0057] The superimposed signal of the voltage from the fourth output port of the amplifier board and the voltage output from the output pin of the multi-channel analog switch output module is input to the non-inverting input of the second operational amplifier. Simultaneously, the sixth resistor, connected to the inverting input of the second operational amplifier, is grounded, providing a DC bias path for the second operational amplifier and helping to stabilize the input signal level. The seventh resistor and the fourth capacitor are connected between the output and inverting input of the second operational amplifier, forming a voltage negative feedback loop. This feedback method stabilizes the amplifier gain and reduces nonlinear distortion, achieving amplification of the mantissa signal. The second operational amplifier is powered by a +15V power supply, and the third capacitor acts as a decoupling capacitor to filter out high-frequency noise, ensuring a stable power supply for the operational amplifier.

[0058] The superimposed signal of the voltage at the fourth output port of the amplifier board and the voltage output from the output pin of the multi-channel analog switch output module is amplified by the second operational amplifier, and the amplified signal is output from the output terminal of the second operational amplifier. The amplified signal is transmitted between the amplifier board and the analog-to-digital acquisition board. Interference signals greater than 300mV are required to affect the signal transmission, while interference signals are usually in the mV range. Therefore, this output method is not affected by interference signals.

[0059] Furthermore, the output of the in-phase adder circuit is the sum of the output of the multi-channel analog switch output module and the output of the fourth output port.

[0060] It should be noted that the output of the in-phase adder circuit... This yields the output of the in-phase adder circuit. This is the output of the in-phase adder circuit; This is the resistance value of the seventh resistor; This is the resistance value of the sixth resistor; This refers to the output signal of the multi-channel analog switch output module, specifically the output signal of the output pin of the multi-channel analog switch output module. This is the output of the fourth output port.

[0061] Since the resistance value of the seventh resistor is equal to the resistance value of the sixth resistor, then That is, the output of the in-phase adder circuit is the sum of the output of the multi-channel analog switch output module and the output of the fourth output port.

[0062] Therefore, the output of the non-inverting adder circuit also has 12 voltage states: 0V, 0.5V, 1V, 1.5V, 2V, 2.5V, 3V, 3.3V, 3.8V, 4.3V, or 4.8V. Each voltage state corresponds to the exponential data of the leak detector signal from -2 to -13, and the correspondence is the same as the correspondence between the voltage at the non-inverting input of the second operational amplifier and the exponential data.

[0063] Furthermore, the signal conditioning circuit includes a mantissa signal conditioning circuit and an exponent signal conditioning circuit. The mantissa signal conditioning circuit conditions the amplified mantissa signal and inputs the conditioned mantissa signal into the analog-to-digital acquisition board. The exponent signal conditioning circuit conditions the amplified exponent signal and inputs the conditioned exponent signal into the analog-to-digital acquisition board. This separate conditioning of the mantissa and exponent signals avoids mutual interference between the two signals within the same conditioning circuit, resulting in a purer and more stable signal input to the analog-to-digital acquisition board.

[0064] It should be noted that the mantissa signal conditioning circuit is used to adjust the amplified mantissa signal to... Within the range; the exponential signal conditioning circuit is used to adjust the amplified exponential signal to... Within the range; then input into the ADC (Analog-to-Digital Converter) module of the analog-to-digital acquisition board, and calculate the corresponding leakage rate value through the MCU (Microcontroller Unit).

[0065] Please see Figure 3 , Figure 3 This is a schematic diagram showing the connection between the mantissa signal conditioning circuit and the exponent signal conditioning circuit.

[0066] like Figure 3 As shown, the mantissa signal conditioning circuit includes: an eighth resistor 14, a ninth resistor 15, a tenth resistor 16, an eleventh resistor 17, a twelfth resistor 18, a fifth capacitor 19, a sixth capacitor 20, a seventh capacitor 21, an eighth capacitor 22, a ninth capacitor 23, a tenth capacitor 24, a first switching diode 25, a first Zener diode 26, a third operational amplifier 27, and a fourth operational amplifier 28. One end of the eighth resistor 14 is connected to the mantissa amplifier circuit; the other end of the eighth resistor 14 is connected to one end of the fifth capacitor 19 and one end of the ninth resistor 15; the other end of the ninth resistor 15 is connected to one end of the seventh capacitor 21 and the non-inverting input of the third operational amplifier 27; the other end of the fifth capacitor 19 is connected to the inverting input of the third operational amplifier 27, the output of the third operational amplifier 27, and one end of the tenth resistor 16; the power supply terminal of the third operational amplifier 27 is connected to... The first voltage and one end of the eighth capacitor 22 are connected to the preset first voltage; the ground terminal of the third operational amplifier 27 is connected to the preset second voltage and one end of the sixth capacitor 20; the other end of the tenth resistor 16 is connected to the inverting input terminal of the fourth operational amplifier 28, one end of the ninth capacitor 23, and one end of the eleventh resistor 17; the output terminal of the fourth operational amplifier 28 is connected to the anode of the first switching diode 25; the cathode of the first switching diode 25 is connected to one end of the twelfth resistor 18; the other end of the twelfth resistor 18 is connected to the other end of the ninth capacitor 23, the other end of the eleventh resistor 17, the cathode of the first Zener diode 26, one end of the tenth capacitor 24, and the analog-digital acquisition board; the other ends of the seventh capacitor 21, the eighth capacitor 22, the sixth capacitor 20, the non-inverting input terminal of the fourth operational amplifier 28, the anode of the first Zener diode 26, and the other end of the tenth capacitor 24 are all grounded.

[0067] It should be noted that the preset second voltage is -15V. The resistance of the eighth resistor 14 is 33Ω. The resistance of the ninth resistor, 15, is 33. The resistance of the tenth resistor, 16, is 30 ohms. The resistance of the eleventh resistor, 17, is 10. The resistance of the twelfth resistor, 18, is 510Ω. The capacitance of the fifth capacitor, 19, is 1. The capacitance of the sixth capacitor, 20, is 0.1. The capacitance of the seventh capacitor 21 is 1. The capacitance of the eighth capacitor, 22, is 0.1. The capacitance of the ninth capacitor, 23, is 0.1. The capacitance of the tenth capacitor, 24, is 1. The first switching diode 25 is an IN4148 type switching diode. It features fast switching speed and low forward voltage drop. The first Zener diode 26 has a Zener voltage of 5.1V. It operates in reverse breakdown mode and can maintain a stable voltage.

[0068] The active filter, consisting of resistor 14 (eighth resistor), resistor 15 (ninth resistor), capacitor 19 (fifth capacitor), capacitor 20 (sixth capacitor), capacitor 21 (seventh capacitor), capacitor 22 (eighth capacitor), and operational amplifier 27, is a voltage-controlled source second-order low-pass filter. The amplified tail signal undergoes initial frequency selection via an RC (resistor-capacitor) network composed of resistor 14 and capacitor 19 before entering the non-inverting input of the third operational amplifier. The inverting input of the third operational amplifier 27 forms a feedback loop through resistor 15 (ninth resistor) and capacitor 21 (seventh capacitor). For low-frequency signals, the capacitors have higher impedance, allowing the signal to pass smoothly and be amplified; however, for high-frequency signals, the capacitors have lower impedance, effectively acting as a short circuit, causing attenuation of the high-frequency signal. This active filter effectively filters the amplified tail signal, removing interference signals.

[0069] The fourth operational amplifier 28, the eleventh resistor 17, the twelfth resistor 18, the ninth capacitor 23, the tenth capacitor 24, the first switching diode 25, and the first Zener diode 26 form an inverting amplifier.

[0070] The signal is inverted at the inverting input of the fourth operational amplifier 28. The output of the fourth operational amplifier 28 is regulated by a voltage regulator circuit consisting of the first switching diode 25, the twelfth resistor 18, and the first Zener diode 26. Simultaneously, the regulated signal is fed back to the inverting input through a feedback network consisting of the eleventh resistor 17 and the ninth capacitor 23, forming negative feedback. This stabilizes the circuit's operating state to a certain extent. Thus, while inverting the signal, it also performs amplitude limiting and voltage regulation.

[0071] like Figure 3As shown, the exponential signal conditioning circuit includes: a thirteenth resistor 29, a fourteenth resistor 30, a fifteenth resistor 31, a sixteenth resistor 32, a seventeenth resistor 33, an eleventh capacitor 34, a twelfth capacitor 35, a thirteenth capacitor 36, a fourteenth capacitor 37, a fifteenth capacitor 38, a sixteenth capacitor 39, a second switching diode 40, a second Zener diode 41, a fifth operational amplifier 42, and a sixth operational amplifier 43; wherein, one end of the thirteenth resistor 29 is connected to the mantissa amplifier circuit; the other end of the thirteenth resistor 29 is connected to one end of the eleventh capacitor 34 and one end of the fourteenth resistor 30; the other end of the fourteenth resistor 30 is connected to one end of the thirteenth capacitor 36 and the non-inverting input terminal of the fifth operational amplifier 42; the other end of the eleventh capacitor 34 is connected to the inverting input terminal of the fifth operational amplifier 42, the output terminal of the fifth operational amplifier 42, and one end of the fifteenth resistor 31; the power supply of the fifth operational amplifier 42... The first terminal of the fifth operational amplifier 42 is connected to a preset first voltage and one end of the fourteenth capacitor 37, respectively; the ground terminal of the fifth operational amplifier 42 is connected to a preset second voltage and one end of the twelfth capacitor 35, respectively; the other end of the fifteenth resistor 31 is connected to the inverting input terminal of the sixth operational amplifier 43, one end of the fifteenth capacitor 38, and one end of the sixteenth resistor 32, respectively; the output terminal of the sixth operational amplifier 43 is connected to the anode of the second switching diode 40; the cathode of the second switching diode 40 is connected to one end of the seventeenth resistor 33; the other end of the seventeenth resistor 33 is connected to the other end of the fifteenth capacitor 38, the other end of the sixteenth resistor 32, the cathode of the second Zener diode 41, one end of the sixteenth capacitor 39, and the analog-digital acquisition board, respectively; the other ends of the thirteenth capacitor 36, the fourteenth capacitor 37, the twelfth capacitor 35, the non-inverting input terminal of the sixth operational amplifier 43, the anode of the second Zener diode 41, and the other end of the sixteenth capacitor 39 are all grounded.

[0072] It should be noted that the resistance of the thirteenth resistor, 29, is 33. The resistance of the fourteenth resistor, 30, is 33. The resistance of the fifteenth resistor, 31, is 30 ohms. The resistance of the sixteenth resistor, 32, is 10. The resistance of the seventeenth resistor, 33, is 510 ohms. The capacitance of the eleventh capacitor 34 is 1. The capacitance of the twelfth capacitor (35) is 0.1. The capacitance of the thirteenth capacitor, 36, is 1. The capacitance of the fourteenth capacitor, 37, is 0.1. The capacitance of the fifteenth capacitor (38) is 0.1. The capacitance of the sixteenth capacitor, 39, is 1. The second switching diode 40 is an IN4148 model switching diode. It features fast switching speed and low forward voltage drop. The second Zener diode 41 has a Zener voltage of 5.1V. It operates in reverse breakdown mode and can maintain a stable voltage.

[0073] The active filter, consisting of resistor 29 (13th resistor), resistor 30 (14th resistor), capacitor 19 (5th capacitor), capacitor 34 (11th capacitor), capacitor 35 (12th capacitor), capacitor 36 (13th capacitor), capacitor 37 (14th capacitor), and operational amplifier 42, is a voltage-controlled source second-order low-pass filter. The amplified exponential signal undergoes initial frequency selection via an RC (Resistor-Capacitor) network composed of resistor 29 and capacitor 34 before entering the non-inverting input of the operational amplifier 42. The inverting input of the operational amplifier 42 forms a feedback loop through resistor 30 (14th resistor) and capacitor 36 (13th capacitor). For low-frequency signals, the capacitors have higher impedance, allowing the signal to pass smoothly and be amplified; however, for high-frequency signals, the capacitors have lower impedance, effectively acting as a short circuit, causing attenuation of the high-frequency signal. This active filter effectively filters the amplified mantissa signal, removing interference signals.

[0074] The sixth operational amplifier 43, the sixteenth resistor 32, the seventeenth resistor 33, the fifteenth capacitor 38, the sixteenth capacitor 39, the second switching diode 40, and the second Zener diode 41 form an inverting amplifier. The signal is inverted at the inverting input of the sixth operational amplifier 43. The output of the sixth operational amplifier 43 is regulated by a voltage regulator circuit consisting of the second switching diode 40, the seventeenth resistor 33, and the second Zener diode 41. Simultaneously, the regulated signal is fed back to the inverting input through a feedback network composed of the sixteenth resistor 32 and the fifteenth capacitor 38, forming negative feedback, which stabilizes the circuit's operating state to a certain extent. Thus, while inverting the signal, it also performs amplitude limiting and voltage regulation.

[0075] like Figure 2 As shown, the mantissa signal conditioning circuit inputs the conditioned mantissa signal to the analog-to-digital acquisition board via the ADC1 interface. The exponent signal conditioning circuit inputs the conditioned exponent signal to the analog-to-digital acquisition board via the ADC2 interface.

[0076] Combination Figure 2 and Figure 3The signal transmission circuit also includes a pin header connector 44; the mantissa amplifier circuit and the exponent amplifier circuit are connected to the signal conditioning circuit via the pin header connector 44. This provides a standardized interface for the mantissa amplifier circuit, the exponent amplifier circuit, and the signal conditioning circuit. This modular connection method allows for greater independence in the design and layout of each circuit module, facilitating individual design, testing, and maintenance.

[0077] The pin header connector 44 serves as a bridge connecting the mantissa amplifier circuit and the exponential amplifier circuit with the signal conditioning circuit.

[0078] Pin 1 of pin header connector 44 is connected to +15V voltage.

[0079] Pin 2 of pin header connector 44 is connected to the mantissa amplifier circuit and the mantissa signal conditioning circuit.

[0080] Pin 3 of pin header connector 44 is grounded.

[0081] Pin 4 of the pin header connector 44 is connected to the exponential amplifier circuit and the exponential signal conditioning circuit.

[0082] Please see Figure 4 , Figure 4 This is a schematic diagram of a signal transmission circuit shown in an exemplary embodiment of this application. The helium mass spectrometer leak detector.

[0083] like Figure 4 As shown, the helium mass spectrometer leak detector 400 includes a signal transmission circuit 100.

[0084] In this embodiment, a mantissa amplifier circuit amplifies the mantissa signal corresponding to the mantissa data of the data to be transmitted, and an exponential amplifier circuit amplifies the exponential signal corresponding to the exponential data of the data to be transmitted. Then, a signal conditioning circuit conditions both the amplified mantissa and exponential signals, and the conditioned mantissa and exponential signals are input to an analog-to-digital acquisition board. This achieves dual-channel amplification and transmission of the data, improving data resolution and reducing the impact of interference on signal transmission in the helium mass spectrometer leak detector.

[0085] The foregoing description and accompanying drawings fully illustrate embodiments of this disclosure to enable those skilled in the art to practice them. Other embodiments may include structural, logical, electrical, procedural, and other changes. The embodiments represent only possible variations. Individual components and functions are optional unless explicitly required, and the order of operation may vary. Parts and features of some embodiments may be included in or replace parts and features of other embodiments. Moreover, the terminology used in this application is for describing embodiments only and is not intended to limit the claims. As used in the description of embodiments and claims, the singular forms “a,” “an,” and “the” are intended to equally include the plural forms unless the context clearly indicates otherwise. Similarly, the term “and / or” as used in this application means including one or more of the associated listed items and all possible combinations thereof. Additionally, when used in this application, the term "comprise" and its variations "comprises" and / or "comprising" refer to the presence of stated features, integrals, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof. Without further limitations, an element defined by the phrase "comprises a..." does not exclude the presence of other identical elements in the process, method, or apparatus that includes said element. In this document, each embodiment may focus on the differences from other embodiments, and similar or identical parts between embodiments can be referred to mutually. For methods, products, etc., disclosed in the embodiments, if they correspond to the method section disclosed in the embodiments, the relevant parts can be referred to the description of the method section.

[0086] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the embodiments of this disclosure. Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0087] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to embodiments of this disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. In some alternative implementations, the functions marked in the blocks may occur in a different order than that shown in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. In the descriptions corresponding to the flowcharts and block diagrams in the accompanying drawings, the operations or steps corresponding to different blocks may also occur in a different order than disclosed in the description, and sometimes there is no specific order between different operations or steps. For example, two consecutive operations or steps may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. Each block in a block diagram and / or flowchart, and combinations of blocks in a block diagram and / or flowchart, can be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

Claims

1. A signal transmission circuit, characterized in that, It is used in a helium mass spectrometer leak detector; the signal transmission circuit includes: an amplifier board, a mantissa amplifier circuit, an exponential amplifier circuit, a signal conditioning circuit, and an analog-to-digital acquisition board; The mantissa amplifier circuit is connected to the DAC output port of the amplifier board; the exponent amplifier circuit is connected to the general-purpose input / output port of the amplifier board; both the mantissa amplifier circuit and the exponent amplifier circuit are connected to the signal conditioning circuit; and the signal conditioning circuit is connected to the input terminal of the analog-to-digital acquisition board. The DAC output port is used to output the mantissa signal corresponding to the mantissa data of the data to be transmitted; The mantissa amplifier circuit is used to amplify the mantissa signal; The general-purpose input / output port is used to output the exponential signal corresponding to the exponential data of the data to be transmitted; The exponential amplifier circuit is used to amplify the exponential signal; The signal conditioning circuit is used to condition the amplified mantissa signal and the amplified exponent signal respectively, and input the conditioned mantissa signal and the conditioned exponent signal into the analog-digital acquisition board.

2. The signal transmission circuit according to claim 1, characterized in that, The mantissa amplifier circuit includes: a first resistor, a second resistor, a first operational amplifier, a third resistor, a first capacitor, and a second capacitor; Wherein, one end of the first resistor is connected to the output port of the DAC; the other end of the first resistor is connected to the non-inverting input terminal of the first operational amplifier; One end of the second resistor is connected to the inverting input terminal of the first operational amplifier, one end of the third resistor, and one end of the second capacitor, respectively. The power supply terminal of the first operational amplifier is connected to a preset first voltage and one end of the first capacitor, respectively. The other end of the second resistor, the ground terminal of the first operational amplifier, and the other end of the first capacitor are all grounded; The output terminal of the first operational amplifier is connected to the other end of the third resistor, the other end of the second capacitor, and the signal conditioning circuit, respectively.

3. The signal transmission circuit according to claim 1, characterized in that, The general-purpose input / output port includes a first output port, a second output port, a third output port, and a fourth output port; the exponential amplifier circuit includes a multi-channel analog switch output module and a non-inverting adder amplifier circuit; The first output port is connected to the first channel selection pin of the multi-channel analog switch output module; the second output port is connected to the second channel selection pin of the multi-channel analog switch output module; and the third output port is connected to the third channel selection pin of the multi-channel analog switch output module. The fourth output port is connected to the first input terminal of the non-inverting adder amplifier circuit; the output pin of the multi-channel analog switch output module is connected to the second input terminal of the non-inverting adder amplifier circuit. The output of the in-phase adder circuit is connected to the signal conditioning circuit.

4. The signal transmission circuit according to claim 3, characterized in that, The non-inverting adder operational amplifier circuit includes: a fourth resistor, a fifth resistor, a sixth resistor, a second operational amplifier, a third capacitor, a seventh resistor, and a fourth capacitor; One end of the fourth resistor is the first input terminal; one end of the fifth resistor is the second input terminal; the other end of the fourth resistor is connected to the other end of the fifth resistor and the non-inverting input terminal of the second operational amplifier, respectively. The inverting input terminal of the second operational amplifier is connected to one end of the sixth resistor, one end of the seventh resistor, and one end of the fourth capacitor, respectively; the power supply terminal of the second operational amplifier is connected to a preset first voltage and one end of the third capacitor, respectively. The other end of the sixth resistor, the ground terminal of the second operational amplifier, and the other end of the third capacitor are all grounded; The output terminal of the second operational amplifier is connected to the other end of the seventh resistor, the other end of the fourth capacitor, and the signal conditioning circuit, respectively.

5. The signal transmission circuit according to claim 4, characterized in that, The output of the in-phase adder circuit is the sum of the output of the multi-channel analog switch output module and the output of the fourth output port.

6. The signal transmission circuit according to claim 1, characterized in that, The signal conditioning circuit includes a mantissa signal conditioning circuit and an exponent signal conditioning circuit; The mantissa signal conditioning circuit is used to condition the amplified mantissa signal and input the conditioned mantissa signal into the analog-digital acquisition board. The exponential signal conditioning circuit is used to condition the amplified exponential signal and input the conditioned exponential signal into the analog-digital acquisition board.

7. The signal transmission circuit according to claim 5, characterized in that, The tail signal conditioning circuit includes: an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a fifth capacitor, a sixth capacitor, a seventh capacitor, an eighth capacitor, a ninth capacitor, a tenth capacitor, a first switching diode, a first Zener diode, a third operational amplifier, and a fourth operational amplifier. Wherein, one end of the eighth resistor is connected to the mantissa amplifier circuit; the other end of the eighth resistor is connected to one end of the fifth capacitor and one end of the ninth resistor; the other end of the ninth resistor is connected to one end of the seventh capacitor and the non-inverting input terminal of the third operational amplifier; the other end of the fifth capacitor is connected to the inverting input terminal of the third operational amplifier, the output terminal of the third operational amplifier, and one end of the tenth resistor. The power supply terminal of the third operational amplifier is connected to a preset first voltage and one end of the eighth capacitor, respectively; the ground terminal of the third operational amplifier is connected to a preset second voltage and one end of the sixth capacitor, respectively. The other end of the tenth resistor is connected to the inverting input of the fourth operational amplifier, one end of the ninth capacitor, and one end of the eleventh resistor, respectively; the output of the fourth operational amplifier is connected to the anode of the first switching diode. The cathode of the first switching diode is connected to one end of the twelfth resistor; the other end of the twelfth resistor is connected to the other end of the ninth capacitor, the other end of the eleventh resistor, the cathode of the first Zener diode, one end of the tenth capacitor, and the analog-to-digital acquisition board, respectively. The other end of the seventh capacitor, the other end of the eighth capacitor, the other end of the sixth capacitor, the non-inverting input of the fourth operational amplifier, the anode of the first Zener diode, and the other end of the tenth capacitor are all grounded.

8. The signal transmission circuit according to claim 5, characterized in that, The mantissa signal conditioning circuit includes: a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eleventh capacitor, a twelfth capacitor, a thirteenth capacitor, a fourteenth capacitor, a fifteenth capacitor, a sixteenth capacitor, a second switching diode, a second Zener diode, a fifth operational amplifier, and a sixth operational amplifier; Wherein, one end of the thirteenth resistor is connected to the mantissa amplifier circuit; the other end of the thirteenth resistor is connected to one end of the eleventh capacitor and one end of the fourteenth resistor; the other end of the fourteenth resistor is connected to one end of the thirteenth capacitor and the non-inverting input terminal of the fifth operational amplifier; the other end of the eleventh capacitor is connected to the inverting input terminal of the fifth operational amplifier, the output terminal of the fifth operational amplifier, and one end of the fifteenth resistor. The power supply terminal of the fifth operational amplifier is connected to a preset first voltage and one end of the fourteenth capacitor, respectively; the ground terminal of the fifth operational amplifier is connected to a preset second voltage and one end of the twelfth capacitor, respectively. The other end of the fifteenth resistor is connected to the inverting input of the sixth operational amplifier, one end of the fifteenth capacitor, and one end of the sixteenth resistor; the output of the sixth operational amplifier is connected to the anode of the second switching diode. The cathode of the second switching diode is connected to one end of the seventeenth resistor; the other end of the seventeenth resistor is connected to the other end of the fifteenth capacitor, the other end of the sixteenth resistor, the cathode of the second Zener diode, one end of the sixteenth capacitor, and the analog-digital acquisition board. The other ends of the thirteenth capacitor, the fourteenth capacitor, the twelfth capacitor, the non-inverting input of the sixth operational amplifier, the anode of the second Zener diode, and the sixteenth capacitor are all grounded.

9. The signal transmission circuit according to any one of claims 1 to 8, characterized in that, It also includes a pin header connector; the mantissa amplifier circuit and the exponent amplifier circuit are connected to the signal conditioning circuit through the pin header connector.

10. A helium mass spectrometer leak detector, characterized in that, include: The signal transmission circuit according to any one of claims 1 to 9.

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