A method for testing a multi-mode master-slave control system and a laser device

Abstract

This application discloses a testing method and laser equipment for a multi-mode master-slave control system, relating to the field of laser testing technology. It obtains structured text representing a hierarchical testing system, including a first text representing board-level characteristic testing rules and a second text representing system-level functional testing rules. Based on the first and second texts, board-level characteristic tests and system-level functional tests are performed on the master control board, slave control board, and beam combiner board, respectively, yielding board-level test results and system-level test results. Based on the board-level and system-level test results, a target text representing a comprehensive test report is generated. This achieves comprehensive testing and verification of the hardware foundation and system functional coordination of each board in the multi-mode master-slave control system, accurately identifying hardware defects and potential collaborative problems on each board. It provides a standardized solution to ensure the overall quality and reliability of the multi-mode master-slave control system, significantly improving the testing efficiency and reliability of the multi-mode master-slave control system.

Description

Technical Field

[0001] This application relates to the field of laser testing technology, and in particular to a testing method and laser equipment for a multimode master-slave control system. Background Technology

[0002] As laser power and performance continue to improve, the hardware architecture of its core control unit, the multimode master-slave control system, becomes increasingly complex, placing higher demands on the long-term reliability of the system. The overall performance and stability of the multimode master-slave control system depend not only on the hardware quality of each board, but also on the efficiency of each board working collaboratively according to its predetermined functional roles after system integration.

[0003] Existing testing procedures typically focus on software testing of the final output function of multi-mode master-slave control systems. This type of testing only verifies whether the system can produce the expected output under specific inputs, representing a black-box verification of the system. However, this type of testing has significant limitations: it cannot delve into the system's internal workings to test and evaluate the basic hardware performance of each board, and it cannot verify whether hardware defects exist when the boards work together under actual system operation. This makes it difficult to comprehensively and accurately identify hardware defects and potential problems affecting system reliability during the R&D and production stages, severely reducing the testing efficiency and reliability of multi-mode master-slave control systems. Summary of the Invention

[0004] The main purpose of this application is to provide a testing method and laser equipment for a multimode master-slave control system, aiming to solve the technical problem that traditional laser testing only focuses on functional testing and fails to accurately identify hardware defects in the multimode master-slave control system, resulting in low testing efficiency and reliability of the multimode master-slave control system.

[0005] To achieve the above objectives, this application proposes a testing method for a multi-mode master-slave control system, applicable to such a system. The multi-mode master-slave control system includes a master control board, slave control boards, and a bundling board. These boards are connected via a communication bus to form a master-slave control architecture. The testing method for the multi-mode master-slave control system includes: Obtain the structured text representing the hierarchical testing system, wherein the structured text includes the first text representing the board-level characteristic testing rules and the second text representing the system-level functional testing rules; Based on the first text, board-level characteristic tests are performed on the main control board, slave control board, and bundled board respectively to obtain board-level test results; Based on the second text, system-level functional tests were performed on the main control board, slave control board and bundled board respectively, corresponding to the functions of each board in the master-slave control architecture, and system-level test results were obtained. The target text of the comprehensive test report is generated based on the board-level test results and the system-level test results.

[0006] In one embodiment, the multi-mode master-slave control system further includes an oscilloscope and a temperature sensor. The oscilloscope is connected to the master control board, the slave control board, and the bundler board, respectively. The temperature sensor is connected to the master control board, the slave control board, and the bundler board, respectively. The board-level characteristic test includes at least one of power performance test, signal integrity test, and thermal stress test. The step of performing board-level characteristic tests on the main control board, slave control board, and bundled board respectively based on the first text to obtain board-level test results includes: Using the board-level characteristic test rules represented by the first text, the oscilloscope is invoked to perform power performance tests on the main control board, slave control board and bundled board respectively, and the power performance test results are obtained. Using the board-level characteristic test rules represented by the first text, the oscilloscope is invoked to perform the signal integrity test on the main control board, slave control board and bundle combiner board respectively, and the signal integrity test results are obtained. Based on the board-level characteristic test rules represented by the first text, the temperature sensor is invoked to perform the thermal stress test on the main control board, slave control board and bundled board respectively, and the thermal stress test results are obtained. The board-level test results are obtained based on the power performance test results, signal integrity test results, and thermal stress test results.

[0007] In one embodiment, the step of using the oscilloscope to perform power performance tests on the main control board, slave control board, and combiner board respectively, and obtaining the power performance test results, includes: When the main control board, slave control board and beam combiner are in the target state, the oscilloscope is used to perform voltage tests to obtain the output voltage and ripple voltage of each board in the target state. When the main control board, slave control board and beam combiner board are in the target operating condition, the oscilloscope is used to obtain the operating current flowing through the preset key components in each board, and the operating derating of the operating current is calculated. The oscilloscope is used to monitor the voltage waveforms of the power supply voltage when the main control board, slave control board, and beam combiner board are in the power-on and power-off states, and the power-on and power-off sequence of each board is determined based on the voltage waveforms. The power supply performance test results are obtained based on the output voltage, ripple voltage, operating derating, and power-on / off timing.

[0008] In one embodiment, the multi-mode master-slave control system further includes a controller local area network transceiver chip and a serial peripheral interface device. The controller local area network transceiver chip is connected to the master control board, the slave control board, and the bundled board, respectively, and the serial peripheral interface device is connected to the master control board, the slave control board, and the bundled board, respectively. The step of using the oscilloscope to perform signal integrity tests on the main control board, slave control board, and beam combiner board respectively, and obtaining the signal integrity test results, includes: When the main control board, slave control board and bundle combiner board are in full-load operation, the oscilloscope is used to measure the first power supply voltage and data signal level of the controller LAN transceiver chip on each board. When the main control board, slave control board and bundle combiner board are in full-load operation, the oscilloscope is used to measure the second power supply voltage and clock data signal of the serial peripheral interface devices on each board respectively. When the main control board, slave control board and bundle combiner board are in full-load operation, the oscilloscope is used to measure the third power supply voltage and output signal of the temperature sensor on each board respectively; The signal integrity test results are obtained based on the first power supply voltage, data signal level, second power supply voltage, clock data signal, third power supply voltage, and output signal.

[0009] In one embodiment, the step of calling the temperature sensor to perform thermal stress tests on the main control board, slave control board, and bundle combiner board respectively, and obtaining the thermal stress test results includes: The main control board, slave control board and bundle assembly board are placed at a preset ambient temperature and operated at full load with rated power until thermal stability is achieved. The temperature sensor is used to test the temperature parameters of each plate under the thermally stable state. Based on the temperature parameters, the operating temperature and stability of the preset key components in each board are evaluated to obtain the thermal stress test results.

[0010] In one embodiment, the system-level test includes at least one of the following: digital-to-analog conversion output signal test, safety interlock interface function verification, scattered light protection test and response verification, power feedback signal verification, and temperature protection function verification; The step of performing system-level functional tests on the master control board, slave control board, and bundled board according to the second text, corresponding to the functions of each board in the master-slave control architecture, and obtaining system-level test results includes: Using the system-level test rules represented by the second text, the main control board is tested for the digital-to-analog conversion output signal and the safety interlock interface function is verified to obtain the control function test results. The system-level test rules represented by the second text are used to perform the scattered light protection test and response verification on the slave control board to obtain the drive function test results. Using the system-level test rules represented by the second text, the power feedback signal and temperature protection function of the bundled board are verified, and the monitoring function test results are obtained. The system-level test results are obtained based on the control function test results, drive function test results, and monitoring function test results.

[0011] In one embodiment, the step of testing the digital-to-analog conversion output signal of the main control board and verifying the safety interlock interface function to obtain the control function test results includes: When the multi-mode master-slave control system is in a preset power output setting state, the digital-to-analog conversion given voltage value output by the master control board and the ripple voltage of the digital-to-analog conversion given voltage value are measured to obtain the digital-to-analog conversion output result. The safety interlock interface of the main control board is disconnected and restored, and the voltage change and ripple voltage at both ends of the safety interlock interface are measured to obtain the function verification results of the safety interlock interface. The control function test results are obtained based on the digital-to-analog conversion output and the safety interlock interface function verification results.

[0012] In one embodiment, the step of performing the scattered light protection test and response verification on the slave control board to obtain the drive function test results includes: When the multimode master-slave control system is in the light-emitting state, a simulated fault signal is injected into the scattered light sampling circuit of the slave control board; Monitor the laser output status of the multimode master-slave control system and measure the delay time from the injection of the simulated fault signal to the multimode master-slave control system triggering protection and cutting off the laser output; The scattered light sampling signal voltage of the slave control board was measured under the standby, half-load and full-load working states of the multi-mode master-slave control system to obtain the verification results of the scattered light protection function. The test results of the driving function are obtained based on the delay time and the verification results of the scattered light protection function.

[0013] In one embodiment, the step of verifying the power feedback signal and the temperature protection function of the beam combiner to obtain the monitoring function test results includes: When the multi-mode master-slave control system is in a preset power output setting state, the power feedback signal voltage of the beam combiner is measured; A preset temperature condition is simulated using a temperature sensor, and the temperature data of the multi-mode master-slave control system is measured under the preset temperature condition. The monitoring function test results are obtained based on the power feedback signal voltage and the temperature data.

[0014] Furthermore, to achieve the above objectives, this application also proposes a laser device applied to the multimode master-slave control system. The laser device includes a memory, a processor, and a computer program stored in the memory and executable on the processor. The computer program is configured to implement the steps of the test method for the multimode master-slave control system as described above. One or more technical solutions proposed in this application have at least the following technical effects: This application embodiment obtains structured text representing a hierarchical testing system. This structured text includes a first text representing board-level characteristic testing rules and a second text representing system-level functional testing rules. Based on the first text, board-level characteristic tests are performed on the main control board, slave control board, and assembly board to obtain board-level test results. Based on the second text, system-level functional tests corresponding to the functions of each board in the master-slave control architecture are performed on the main control board, slave control board, and assembly board to obtain system-level test results. Based on the board-level test results and the system-level test results, a target text representing a comprehensive test report is generated. In other words, this application embodiment uses the first text representing board-level characteristic testing rules to perform board-level characteristic tests on the main control board, slave control board, and assembly board, directly testing and analyzing the actual hardware operating state of each board, thereby identifying potential defects at the hardware level. By using a second text representing the system-level functional test rules, system-level functional tests are performed on the master control board, slave control board, and aggregation board, corresponding to the functions of each board in the master-slave control architecture. While ensuring the hardware reliability of each board, further tests corresponding to the designed functions of each board are executed under actual system operation conditions. This achieves adaptation of test results to the actual operating environment and can accurately identify deep-seated hidden dangers during system collaborative operation. Therefore, a clear testing framework and method are provided for users, significantly improving the comprehensiveness, reliability, and efficiency of testing multi-mode master-slave control systems. Attached Figure Description

[0015] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0016] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a flowchart illustrating an embodiment of the test method for the multi-mode master-slave control system of this application. Figure 2 A schematic flowchart of the power performance testing method provided in Embodiment 1 of this application; Figure 3 A schematic flowchart of the signal integrity testing method provided in Embodiment 1 of this application; Figure 4 A schematic flowchart of the thermal stress testing method provided in Embodiment 1 of this application; Figure 5 This is a flowchart illustrating the second embodiment of the test method for the multi-mode master-slave control system of this application. Figure 6 This is a schematic diagram of the hardware operating environment of the laser device in the embodiments of this application.

[0018] The purpose, features, and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0019] It should be understood that the specific embodiments described herein are merely illustrative of the technical solutions of this application and are not intended to limit this application.

[0020] To better understand the technical solution of this application, a detailed description will be provided below in conjunction with the accompanying drawings and specific implementation methods.

[0021] The main solution of this application embodiment is as follows: Obtain the structured text representing the hierarchical testing system, wherein the structured text includes a first text representing board-level characteristic testing rules and a second text representing system-level functional testing rules; perform board-level characteristic testing on the main control board, slave control board, and bundled board according to the first text to obtain board-level test results; perform system-level functional testing on the main control board, slave control board, and bundled board according to the second text, corresponding to the functions of each board in the master-slave control architecture, to obtain system-level test results; and generate a target text representing a comprehensive test report based on the board-level test results and the system-level test results.

[0022] In this embodiment, for ease of description, the following description uses a multi-mode master-slave control system as the execution subject.

[0023] As laser power and performance continue to improve, the hardware architecture of its core control unit, the multimode master-slave control system, becomes increasingly complex, placing higher demands on the long-term reliability of the system. The overall performance and stability of the multimode master-slave control system depend not only on the hardware quality of each board, but also on the efficiency of each board working collaboratively according to its predetermined functional roles after system integration.

[0024] Existing testing procedures typically focus on software testing of the final output function of multi-mode master-slave control systems. This type of testing only verifies whether the system can produce the expected output under specific inputs, representing a black-box verification of the system. However, this type of testing has significant limitations: it cannot delve into the system's internal workings to test and evaluate the basic hardware performance of each board, and it cannot verify whether hardware defects exist when the boards work together under actual system operation. This makes it difficult to comprehensively and accurately identify hardware defects affecting system reliability and potential collaborative problems during the R&D and production stages, severely reducing the testing efficiency of multi-mode master-slave control systems.

[0025] This application provides a solution to obtain structured text representing a hierarchical testing system. The structured text includes a first text representing board-level characteristic testing rules and a second text representing system-level functional testing rules. Based on the first text, board-level characteristic tests are performed on the main control board, slave control board, and assembly board to obtain board-level test results. Based on the second text, system-level functional tests corresponding to the functions of each board in the master-slave control architecture are performed on the main control board, slave control board, and assembly board to obtain system-level test results. Based on the board-level test results and the system-level test results, a target text representing a comprehensive test report is generated. In other words, this application embodiment uses the first text representing board-level characteristic testing rules to perform board-level characteristic tests on the main control board, slave control board, and assembly board, directly testing and analyzing the actual hardware operating state of each board, thereby identifying potential defects at the hardware level. By using a second text representing the system-level functional test rules, system-level functional tests are performed on the master control board, slave control board, and aggregation board, corresponding to the functions of each board in the master-slave control architecture. While ensuring the hardware reliability of each board, further tests corresponding to the designed functions of each board are executed under actual system operation conditions. This achieves adaptation of test results to the actual operating environment and can accurately identify deep-seated hidden dangers during system collaborative operation. Therefore, a clear testing framework and method are provided for users, significantly improving the comprehensiveness, reliability, and efficiency of testing multi-mode master-slave control systems.

[0026] It should be noted that the executing entity in this embodiment can be a computing service device with data processing, network communication, and program execution functions, such as a multi-mode master-slave control system, a personal computer, or a laser device capable of performing the above functions. The following description uses a multi-mode master-slave control system as an example to illustrate this embodiment and the subsequent embodiments.

[0027] The multi-mode master-slave control system includes a master control board, a slave control board, and a bundled board. The master control board, slave control board, and bundled board are connected through a communication bus to form a master-slave control architecture.

[0028] Specifically, the multi-mode master-slave control system is a control system consisting of a master control board, slave control boards, and a beam combiner board physically interconnected via a communication bus (such as CAN bus and Ethernet), and working collaboratively according to a preset master-slave control structure logic. The master control board, as the system core, is responsible for overall scheduling, command issuance, and status management. The slave control boards are responsible for driving specific laser modules, performing power control, and providing local status feedback. The beam combiner board is responsible for combining the output lasers from each laser module and monitoring key parameters such as the final output power and temperature.

[0029] Based on this, embodiments of this application provide a testing method for a multi-mode master-slave control system, referring to... Figure 1 , Figure 1 This is a flowchart illustrating the first embodiment of the testing method for the multi-mode master-slave control system of this application.

[0030] In this embodiment, the testing method for the multi-mode master-slave control system includes steps S10 to S40: Step S10: Obtain the structured text representing the hierarchical test system, wherein the structured text includes the first text representing the board-level characteristic test rules and the second text representing the system-level functional test rules; It should be noted that structured text refers to an electronic or written document that defines test objectives, items, conditions, methods, and criteria. Obtaining this text allows testers to accurately perform systematic verification of complex systems. The hierarchical testing system is a test logic framework designed for the multi-board collaboration and functional partitioning architecture of multi-mode master-slave control systems. The stable operation of a multi-mode master-slave control system depends on the reliability of the hardware foundation of the master control board, slave control boards, and beam combiner board, as well as the smoothness of their collaborative logic. Direct system-level testing makes it difficult to pinpoint the root causes of board-level hardware defects and system-level collaborative failures. Conversely, board-level testing alone cannot verify the functional effectiveness under multi-board collaboration. Therefore, by constructing a hierarchical testing system, comprehensive testing of the laser can be achieved, improving the accuracy of fault location.

[0031] Additionally, it should be noted that the first document defines specific rules for verifying the independent hardware characteristics of the master control board, slave control board, and aggregation board. The second document defines rules for verifying the unique functions of each board and the collaborative effects of multiple boards in an integrated environment where a multi-mode master-slave control system is powered on and operates collaboratively according to the master-slave architecture. Board-level characteristic testing refers to testing the hardware characteristics of the master control board, slave control board, and aggregation board to verify the hardware reliability of individual boards. Board-level characteristic testing includes power performance testing, signal integrity testing, and thermal stress testing, all of which are core prerequisites for the stable operation of hardware boards. Power performance determines the stability of power supply to each board, avoiding abnormal chip operation due to voltage fluctuations and excessive ripple. Signal integrity determines the accuracy of data transmission within and between boards, avoiding misinterpretation of control commands due to bus signal and interface signal distortion. Thermal stress testing verifies the temperature tolerance of each board under high-power operating scenarios, preventing failure due to overheating of core components. During execution, test data for each board must be independently collected using appropriate testing equipment (oscilloscope for voltage / signal measurement, infrared thermal imager for temperature measurement) based on the hardware configuration of each board (e.g., the main control board contains a temperature and humidity sensor, the combiner board contains a power feedback module). System-level functional testing refers to integrated testing based on a master-slave control architecture, focusing on the specific functions of each board and the collaborative effects of multiple boards, used to verify the functional effectiveness of the system under actual operating conditions. The test content of system-level functional testing corresponds to the function of each board in the master-slave architecture. For example, the main control board, as the control center, focuses on testing its control command output (e.g., digital-to-analog conversion output) and safety protection (e.g., safety interlock interface) functions. The slave control board, as the drive execution unit, focuses on testing its protection response (e.g., scattered light protection) function. The combiner board, as the signal integration unit, focuses on testing its monitoring feedback (e.g., power feedback, temperature protection) function. During execution, the system needs to be powered on and enter a collaborative working state (such as full load light output and power step adjustment). By simulating normal and fault conditions in actual working scenarios (such as injecting scattered light fault signals and simulating abnormal temperature), the timeliness and accuracy of the function triggering of each board, as well as the consistency of collaborative response among multiple boards (such as the feedback delay of the slave control board and beam combining board after the main control board issues a command).

[0032] Step S20: Based on the first text, perform board-level characteristic tests on the main control board, slave control board and bundled board respectively, and obtain board-level test results; It should be noted that by independently performing board-level characteristic tests on the main control board, slave control board, and bundled board according to the first text, basic defects at the single-board hardware level (such as unstable power supply, signal transmission distortion, and insufficient thermal tolerance of components) can be eliminated, thus avoiding classifying board-level faults to subsequent system-level tests, thereby improving the overall fault location efficiency and test result accuracy.

[0033] Additionally, it should be noted that tests on the main control board, slave control board, and combiner board are performed using electronic measurement instruments and equipment such as digital storage oscilloscopes, high-precision power supplies, electronic loads, and thermal imagers. Testers connect measurement probes to specific test points on each board (such as power network outputs, key chip pins, and communication bus interfaces), and collect physical quantity data such as voltage, current, waveform, and temperature by applying preset stimuli or monitoring the natural response of each board under specific operating conditions.

[0034] Understandably, due to significant differences in circuit design, component selection, power consumption levels, and functional focuses among the master control board, slave control board, and bundled control board, a uniform and indiscriminate testing method cannot accurately reflect the performance bottlenecks of each board. For example, the high-speed digital circuits on the master control board focus more on the transient response of the power supply and signal timing. Meanwhile, the analog drive and sampling circuits on the slave control board focus more on the accuracy of the reference voltage and the noise level of the analog signal. By testing them separately, optimal test parameters and criteria can be customized for each type of board, thereby achieving a precise evaluation of the hardware of the multi-mode master-slave control system.

[0035] In one feasible implementation, the multi-mode master-slave control system further includes an oscilloscope and a temperature sensor. The oscilloscope is connected to the master control board, the slave control board, and the bundled board, respectively. The temperature sensor is connected to the master control board, the slave control board, and the bundled board, respectively. The board-level characteristic test includes at least one of power performance test, signal integrity test, and thermal stress test. The step of performing board-level characteristic tests on the main control board, slave control board, and bundled board respectively based on the first text to obtain board-level test results includes steps S21 to S24: Step S21: Using the board-level characteristic test rules represented by the first text, call the oscilloscope to perform the power performance test on the main control board, slave control board and bundled board respectively, and obtain the power performance test results; Step S22: Using the board-level characteristic test rules represented by the first text, call the oscilloscope to perform the signal integrity test on the main control board, slave control board and bundle combiner board respectively, and obtain the signal integrity test results; Step S23: Using the board-level characteristic test rules represented by the first text, call the temperature sensor to perform the thermal stress test on the main control board, slave control board and bundled board respectively, and obtain the thermal stress test results; Step S24: Obtain the board-level test results based on the power performance test results, signal integrity test results, and thermal stress test results.

[0036] It should be noted that power supply performance is the energy foundation for the stable operation of each board. Signal integrity ensures the correct transmission of digital and analog information. Thermal stress is an environmental factor for evaluating the long-term reliability and lifespan of laser hardware components. By performing the above tests sequentially or in parallel, a comprehensive evaluation model of the hardware health status of each board can be systematically constructed. By summarizing and analyzing the test results, integrated input is provided for subsequent overall decision-making.

[0037] Specifically, step S21 not only tests the accuracy of the power supply's output under static conditions (e.g., whether the output voltage is within the design tolerance, and whether the ripple noise is within an acceptable range), but also dynamically verifies the power supply's behavior during various transient processes in the system (e.g., whether the inrush current is safe, and whether the power-on / power-off timing meets the chip requirements). Step S22 tests the quality of key signal paths for communication and control within and between boards. For example, for digital buses such as CAN and SPI, it tests whether their levels, timing, and waveforms are standardized to avoid communication errors caused by signal distortion. Step S23 tests the system under high-power, long-term operating conditions by simulating a high-temperature operating environment and directly measuring the operating temperature of key components. This obtains the long-term reliability of the system hardware under thermal stress. Step S24 summarizes, correlates, and analyzes the test data and preliminary conclusions from various dimensions, outputting a structured test result.

[0038] Reference Figure 2 , Figure 2 This is a flowchart illustrating the power performance testing method provided in Embodiment 1 of this application. The step of calling the oscilloscope to perform power performance tests on the main control board, slave control board, and combiner board respectively, and obtaining the power performance test results, includes steps S31 to S34: Step S31: When the main control board, slave control board and beam combiner board are in the target state, call the oscilloscope to perform voltage test and obtain the output voltage and ripple voltage of each board in the target state; It should be noted that the target state refers to the typical operating point of each board under different loads, such as the power-on initialization state, the standby (no-load) state, and the rated full-load operating state. By connecting the oscilloscope voltage probe to the test point of the critical power network on each board, the DC voltage and ripple voltage of the critical power network can be directly measured.

[0039] Specifically, during the testing of the main control board, the +5V power supply network was measured in standby mode, yielding an output voltage of 4.97V and a ripple voltage of 88mV. Under full load light output, the same network output voltage was 5.01V, with a ripple voltage of 96mV. Comparing the measured data of the main control board with the design specifications (e.g., voltage accuracy ±5%, ripple requirement ≤500mV) determines whether the power supply network is qualified.

[0040] Step S32: When the main control board, slave control board and beam combiner board are in the target operating condition, call the oscilloscope to obtain the operating current flowing through the preset key components in each board, and calculate the operating derating of the operating current. It should be noted that the target operating conditions refer to various current stress scenarios that the power path may experience, including the instantaneous power-on, instantaneous power-off, light-load standby, and heavy-load full-load. Pre-defined key components include ferrite beads and power conversion chips.

[0041] Specifically, the actual current waveform flowing through the input / output pins of the ferrite bead and power conversion chip is obtained by measuring the voltage drop across the sampling resistor using a current probe or oscilloscope. Analyzing this actual current waveform yields the steady-state operating current value and the transient current peak. For example, when testing the ferrite bead on the main control board, the peak inrush current was measured to be 2.03A at power-on, but the steady-state operating current was 419mA. According to the laser hardware derating specifications (requiring a steady-state operating current derating of no more than 80%), the steady-state derating can be calculated to be 20.95%, which meets the requirement.

[0042] Step S33: Use the oscilloscope to monitor the voltage waveforms of the power supply voltage when the main control board, slave control board and beam combiner board are in the power-on and power-off states, and determine the power-on and power-off sequence of each board based on the voltage waveforms; It should be noted that for core chips requiring multiple power supplies and strict timing requirements, a multi-channel oscilloscope must be used to simultaneously monitor the voltage waveforms of each power supply pin of the chip. By analyzing the sequence and time interval of the rising and falling edges of the waveforms, the actual power-on / power-off timing can be verified to ensure it meets the requirements.

[0043] Specifically, monitoring the 3.3V and 1.2V power supply rails of the FPGA chip on the main control board revealed that the actual power-on sequence was 3.3V reaching stability before 2.2V, with a delay of 37.6ms. The power-down sequence was 1.2V dropping before 3.3V, with a delay of 2.6ms. This indicates that the timing control circuit is functioning correctly.

[0044] Step S34: Obtain the power supply performance test results based on the output voltage, ripple voltage, operating derating, and power-on / off timing.

[0045] It should be noted that the output voltage, ripple voltage, operating derating, and power-on / off timing measured for each board will be compared with the pass / fail criteria one by one to generate a structured power supply performance test result. The power supply performance test result includes not only the raw data, but also the judgment conclusion (pass / fail) for each parameter and notes on abnormal data.

[0046] Reference Figure 3 , Figure 3This is a flowchart illustrating the signal integrity testing method provided in Embodiment 1 of this application. The multi-mode master-slave control system further includes a controller local area network transceiver chip and a serial peripheral interface device. The controller local area network transceiver chip is connected to the master control board, the slave control board, and the bundled board, respectively. The serial peripheral interface device is connected to the master control board, the slave control board, and the bundled board, respectively. The step of using the oscilloscope to perform signal integrity tests on the main control board, slave control board, and beam combiner board respectively, and obtaining the signal integrity test results, includes steps S41 to S44: Step S41: When the main control board, slave control board and bundle combiner board are in full-load operation, call the oscilloscope to measure the first power supply voltage and data signal level of the controller LAN transceiver chip on each board respectively; It should be noted that the Controller Area Network (CLAN) bus is the key link in a multi-mode master-slave control system, enabling real-time communication between the master control board, slave control boards, and the combiner board. Testing under full load conditions allows the measured signal quality to reflect the reliability boundaries in practical applications. Measurements of the initial supply voltage ensure that the CLAN transceiver chip operates within its nominal voltage range. Measurements of data signal levels verify that the amplitude, rise / fall time, and common-mode voltage of the digital logic signals conform to the chip's datasheet specifications, ensuring correct signal transmission and recognition, and preventing communication errors or bus lockout due to abnormal signal levels.

[0047] Specifically, by connecting oscilloscope probes to the VCC, TXD, RXD pins, and CANH and CANL signal lines of the Controller Area Network (CAN) transceiver chip, and while the system is running at full load and bus communication is active, the following measurements are taken: whether the VCC pin voltage is stable within the rated range (e.g., 3.0V–3.6V), whether the high and low levels of the TXD input signal meet the logic threshold requirements, whether the RXD output signal is clear, and whether the amplitude of the differential signal between CANH and CANL is within the standard range (e.g., 1.5V–3V and close to 0V) in the dominant and recessive states, respectively. These measurements are then compared item by item with the electrical characteristics section of the chip's datasheet to form a quantitative assessment of the integrity of the CAN bus physical layer of this node.

[0048] Step S42: When the main control board, slave control board and bundle combiner board are in full-load operation, call the oscilloscope to measure the second power supply voltage and clock data signal of the serial peripheral interface devices on each board respectively; It should be noted that the serial peripheral interface bus is used to connect the microcontroller to peripheral devices (such as Flash memory, digital potentiometers, etc.), and its signal integrity is directly related to the reliability of program storage and parameter configuration. Testing under full load is also to evaluate its stability under high system load. Measuring the second supply voltage ensures normal power supply to the serial peripheral interface chip or controller I / O ports. Measuring the clock and data signals focuses on verifying whether the timing relationship between the clock and data lines meets the device requirements, which is crucial for ensuring accurate and error-free transmission of high-speed synchronous serial communication data.

[0049] Specifically, multiple channels of the oscilloscope are connected to the clock line, chip select line, and data input / output lines of the serial peripheral interface bus. During relevant read / write operations, a complete set of data transmission waveforms is captured. Analysis includes verifying that the clock frequency is within the device's maximum allowable frequency, that the data signal has a sufficient stability window before and after the clock edge, that the chip select signal and clock signal are correctly matched, that the amplitude of each signal line meets specifications, and that the waveform is clean and free from severe distortion. Through timing and waveform analysis, the physical layer of the serial peripheral interface bus communication link is determined to be robust.

[0050] Step S43: When the main control board, slave control board and bundle combiner board are in full-load operation, call the oscilloscope to measure the third power supply voltage and output signal of the temperature sensor on each board respectively; It should be noted that the feedback signal from temperature sensors (such as thermistors and digital temperature sensors) is the core basis for the system to achieve temperature monitoring and overheat protection. Its signal integrity is tested by checking the stability of the sensor's power supply, i.e., the third power supply voltage. This directly affects the operation of its internal circuitry, the accuracy of the resistance measurement reference, and whether the output signal can accurately and linearly reflect temperature changes without being severely interfered with by internal system noise. Testing under full load can verify the sensor circuit's anti-interference capability in the overall electromagnetic environment of the system.

[0051] Specifically, use an oscilloscope to measure the stability of the power supply pin voltage and monitor the signal output pin voltage. By changing the ambient temperature of the sensor (e.g., using a temperature chamber) or simulating its input (e.g., changing the parallel resistance of the thermistor), observe whether the change in the output signal voltage is smooth and continuous, and whether its range of change matches the calculated sensitivity. Simultaneously, observe the noise amplitude on the signal waveform to assess whether its signal-to-noise ratio meets the requirements of the downstream analog-to-digital converter.

[0052] Step S44: Obtain the signal integrity test result based on the first power supply voltage, data signal level, second power supply voltage, clock data signal, third power supply voltage, and output signal.

[0053] It should be noted that the signal integrity test results are the result of a comprehensive analysis and conclusion extraction of measurement data from different interfaces and protocols. Each measurement result is judged, and finally a comprehensive diagnostic report on the signal path quality of the entire board is generated.

[0054] Understandably, this multi-level signal integrity assessment system ensures the comprehensive identification of various signal paths on the board.

[0055] Reference Figure 4 , Figure 4 This is a flowchart illustrating the thermal stress testing method provided in Embodiment 1 of this application. The step of calling the temperature sensor to perform thermal stress tests on the main control board, slave control board, and bundle combiner board respectively, and obtaining the thermal stress test results, includes steps S51 to S53: Step S51: Place the main control board, slave control board and bundle combiner board at a preset ambient temperature and run them at full load with rated power until they reach a thermally stable state. It should be noted that the preset ambient temperature refers to the upper limit of the harsh operating conditions encountered by the product in actual applications. Its setting is usually based on the highest operating ambient temperature in the product specifications or relevant industry standards, used to assess hardware reliability under extreme conditions. Running each board at full rated power is to simultaneously apply electrical and thermal stress, simulating its maximum power consumption during actual operation. Reaching thermal stability means that the temperature rise of each heat-generating component in the system reaches dynamic equilibrium; that is, the surface temperature of each heat-generating component no longer changes significantly under continuous monitoring. Only at this point are the measured temperature data representative and repeatable.

[0056] Specifically, the multimode master-slave control system is placed in a high and low temperature test chamber, and the air temperature of the test chamber is set to a specific stringent value (e.g., 40°C), while ensuring that the laser's cooling system is functioning normally (e.g., the coolant temperature is set to 25°C). The system is then started and continuously operates at its maximum design power (rated power). By monitoring the temperature at key points in real time, it is confirmed that after continuous operation for a sufficiently long period (e.g., 2 hours), the temperature readings at each monitoring point stabilize, indicating that the system has reached thermal stability and can proceed to the next step of precise temperature measurement.

[0057] Step S52: Use the temperature sensor to test the temperature parameters of each plate under the thermally stable state; It should be noted that this involves acquiring accurate operating temperature data for each thermally critical component on the circuit board under extreme thermal stress. Temperature sensors are devices used to measure the surface or internal temperature of an object. In electronic hardware thermal testing, non-contact infrared thermal imagers are the most efficient and intuitive tool of choice. They can quickly acquire a temperature distribution image (thermal image) of the entire circuit board and accurately measure the temperature values ​​of specific device surfaces. Selecting pre-defined critical components for testing is based on circuit analysis to identify components that generate a large amount of heat, are temperature-sensitive, or have high reliability risks. These pre-defined critical components include processors (CPU / FPGA), power conversion chips (DC-DC), power semiconductors (MOSFETs), electrolytic capacitors, and magnetic core components.

[0058] Specifically, after the system reaches thermal stability, an infrared thermal imager is used to scan the main control board, slave control board, and combiner board placed inside the temperature chamber. The focal length and emissivity settings of the thermal imager are adjusted to obtain clear temperature distribution images. From the thermal images, the surface temperatures of the casings of each preset key component or specific test points can be directly read. For example, the surface temperature of the FPGA chip on the main control board was measured to be 61.2℃, the surface temperature of the DC-DC power supply chip was 70℃, and the surface temperature of the electrolytic capacitor was 55℃. These measured temperature parameters form the basis of the initial data for subsequent thermal reliability assessments.

[0059] Step S53: Based on the temperature parameters, evaluate the operating temperature and stability of the preset key components in each board to obtain the thermal stress test results.

[0060] It should be noted that for chip-type devices, the internal junction temperature is estimated based on parameters such as surface temperature and package thermal resistance, and it is determined whether this junction temperature meets the maximum junction temperature limit specified in the device datasheet and the established derating design specifications (e.g., the junction temperature does not exceed 80% of the maximum rated value). For components such as electrolytic capacitors whose lifespan is strongly correlated with temperature, their expected lifespan at the actual operating temperature is calculated based on their surface temperature, rated life curve, etc., to determine whether it meets the product design lifespan requirements.

[0061] Understandably, by conducting thermal stress tests on the main control board, slave control board, and beam combiner board respectively, we can not only screen out individuals with substandard thermal design, but also provide direct experimental data feedback for optimizing the product's heat dissipation design. This is a key safeguard to ensure the laser's stability and reliability under long-term, high-load operating conditions and to prevent performance degradation or failure due to overheating.

[0062] Step S30: Based on the second text, perform system-level functional tests on the main control board, slave control board and bundled board respectively, corresponding to the functions of each board in the master-slave control architecture, and obtain system-level test results; It should be noted that system-level functional testing refers to the comprehensive verification performed on the multi-mode master-slave control system as a complete working whole, under its powered-on and normal operating conditions according to the master-slave control architecture logic. System-level functional testing corresponding to the functions of each board in the master-slave control architecture means that the test design closely revolves around the predetermined role and task of each type of board in the system. For example, the master control board, as the control core of the system, corresponds to the global command issuance and coordination; the slave control board, as the drive and protection unit, corresponds to the power execution and local safety protection of the laser module; and the beam combiner board, as the monitoring and synthesis unit, corresponds to the monitoring and protection of the final output state. By performing system-level functional tests on the master control board, slave control board, and beam combiner board respectively, corresponding to the functions of each board in the master-slave control architecture, it is possible to verify whether the designed functions of each board are correctly and reliably implemented in a real system environment, and whether the coordination between functional units is smooth and conflict-free.

[0063] Understandably, by conducting system-level functional tests on the master control board, slave control board, and assembly board, corresponding to the functions of each board in the master-slave control architecture, it is possible to effectively reveal deep-seated problems that may only surface during system integration and operation. These include control command failures due to inconsistent understanding of communication protocols, response blind spots or malfunctions caused by improper cross-board coordination of protection logic, and degradation of critical analog signals under complex electromagnetic environments and load variations. The constructed hierarchical testing system ensures that potential defects can be effectively detected at both the component and system interaction levels, significantly improving the efficiency and accuracy of assessing the overall quality and reliability of complex master-slave control systems.

[0064] In one feasible implementation, the system-level test includes at least one of the following: digital-to-analog conversion output signal test, safety interlock interface function verification, scattered light protection test and response verification, power feedback signal verification, and temperature protection function verification. The step of performing system-level functional tests on the main control board, slave control board, and bundled board according to the second text, corresponding to the functions of each board in the master-slave control architecture, and obtaining system-level test results includes steps S61 to S64: Step S61: Using the system-level test rules represented by the second text, the main control board is tested for the digital-to-analog conversion output signal and the safety interlock interface function is verified to obtain the control function test results. It should be noted that the digital-to-analog conversion output signal is a crucial physical quantity for the main control board to convert its internal digital control commands into the analog control voltage required to drive the laser power module. Its accuracy and stability directly determine the output power precision of the entire laser system. The safety interlock interface is a critical hardware protection link that ensures the laser cannot emit light or is immediately cut off when external safety conditions (such as the protective shield opening or emergency stop triggering) are not met; it is the cornerstone of system safety. By testing the digital-to-analog conversion output signal of the main control board and verifying the safety interlock interface function, we can verify whether it, as the core of the system control, can accurately issue commands and reliably execute safety strategies.

[0065] Step S62: Using the system-level test rules represented by the second text, perform the scattered light protection test and response verification on the slave control board to obtain the drive function test results; It should be noted that scattered light protection is a critical safety mechanism within the laser, used to quickly shut down the laser output when abnormal internal reflections or scattered light are detected (which may indicate faults such as fiber damage), to prevent the accident from escalating. By testing the scattered light protection of the slave control board, we can verify whether it can reliably perform its local protection function as a drive and protection unit. Simultaneously, the scattered light protection response time of the slave control board, i.e., the delay from the appearance of the fault signal to the completion of the protection action, also needs to be verified.

[0066] Step S63: Using the system-level test rules represented by the second text, the power feedback signal and temperature protection function of the bundled board are verified to obtain the monitoring function test results.

[0067] It should be noted that the power feedback signal is the analog electrical signal converted from the final output laser power by the photodetector on the combiner board. It is the core basis for the system to achieve closed-loop power control and power protection. The temperature protection function monitors the temperature of the combiner or output optical cable, triggering an alarm or shutdown when overheating occurs to prevent thermal damage to the components. By verifying the power feedback signal and temperature protection function of the combiner board, we can verify whether it, as a monitoring unit, can accurately perceive the final output state of the system and promptly perform its protection duties.

[0068] Step S64: Obtain the system-level test results based on the control function test results, drive function test results, and monitoring function test results.

[0069] Understandably, performing system-level functional tests on the main control board, slave control board, and bundled board, corresponding to the functions of each board in the master-slave control architecture, and conducting practical tests on their most critical system-level behaviors and performance in a dynamic environment of system collaboration, can effectively expose integration problems that cannot be found by simple hardware testing, and realize the functional and security assessment of the master-slave control system in actual operation.

[0070] In one feasible implementation, the step of testing the digital-to-analog conversion output signal of the main control board and verifying the safety interlock interface function to obtain the control function test results includes steps S71 to S73: Step S71: When the multi-mode master-slave control system is in the preset power output setting state, measure the given digital-to-analog conversion voltage value output by the master control board and the ripple voltage of the given digital-to-analog conversion voltage value to obtain the digital-to-analog conversion output result. It should be noted that the preset power output setting state refers to setting the multi-mode master-slave control system to a series of representative output power points covering its normal operating range, such as multiple states divided into fixed steps (e.g., 10%) between 0% (standby) and 100% (rated full load). The digital-to-analog conversion given voltage is an analog control signal calculated and output by the digital controller inside the main control board based on the power setting value. The quality of this signal directly determines the accuracy and stability of the subsequent power drive circuit, verifying the quality of the main control board's control command output from the signal source.

[0071] Step S72: Disconnect and restore the safety interlock interface of the main control board, measure the voltage change and ripple voltage at both ends of the safety interlock interface, and obtain the function verification result of the safety interlock interface; It should be noted that by measuring the voltage changes and ripple voltage at both ends of the safety interlock interface, it is possible to verify whether the electrical state logic of the interface circuit is correct (e.g., high level when normally connected, low level when disconnected). Furthermore, it is possible to assess the electrical quality of the interface signal during state switching, identifying any abnormal voltage spikes, oscillations, or excessive ripple caused by contact jitter, line interference, or power coupling. These electrical noises may lead to false triggering of protection or misjudgment of status, affecting system reliability.

[0072] Step S73: Obtain the control function test result based on the digital-to-analog conversion output result and the safety interlock interface function verification result.

[0073] Understandably, by testing the digital-to-analog conversion output signals and verifying the safety interlock interface function of the main control board, the core external output function of the main control board in the system was practically verified. This ensures that the commands issued by the system are accurate and that the system's perception and response to critical safety events are rapid and reliable, enabling the early detection and elimination of systemic risks caused by poor control signal quality or unreliable safety links at the system level. This not only improves the performance indicators and safety level of the final product but also provides a stable and reliable control and safety prerequisite for subsequent testing of slave control boards and bundled boards.

[0074] In one feasible implementation, the step of performing the scattered light protection test and response verification on the slave control board to obtain the drive function test results includes steps S81~S84: Step S81: When the multimode master-slave control system is in the light-emitting state, a simulated fault signal is injected into the scattered light sampling circuit of the slave control board; It should be noted that the scattered light sampling circuit is a key monitoring front-end on the control board, used to collect abnormal scattered light signals inside the laser that may be generated due to fiber end-face contamination, excessive bending, or damage in real time, and convert them into electrical signals. The simulated fault signal refers to an electrical or optical signal generated by external testing equipment (such as a tunable light source or signal generator), with an amplitude sufficient to simulate the fault condition where scattered light exceeds a safety threshold in a real-world scenario. By injecting a simulated fault signal into the scattered light sampling circuit, the protection logic can be safely and controllably triggered without damaging the internal optical components of the laser, thereby verifying the functional correctness of the entire protection path.

[0075] Step S82: Monitor the laser output status of the multi-mode master-slave control system and measure the delay time from the injection of the simulated fault signal to the multi-mode master-slave control system triggering protection and cutting off the laser output; It should be noted that the delay time refers to the time elapsed from the occurrence of the fault event (injection of a simulated fault signal) to the completion of the system's safety protection action (reliable cut-off of laser output). Monitoring the "laser output status" can intuitively determine whether the protection has been successfully triggered, which is usually achieved by monitoring the laser's output enable signal, drive current, or directly measuring the output optical power using a power meter.

[0076] Step S83: When the multi-mode master-slave control system is in standby, half-load and full-load working states respectively, measure the scattered light sampling signal voltage of the slave control board to obtain the scattered light protection function verification result; It should be noted that standby, half-load, and full-load represent typical operating points of the laser from zero output to rated output, and the levels of background optical noise, electrical noise, and power supply disturbances are different in each case. Measuring the steady-state voltage of the scattered light sampling signal under different laser states can assess whether the background noise of the monitoring circuit is normal, whether the signal baseline is stable, and whether its dynamic range is sufficient.

[0077] Step S84: Obtain the test result of the driving function based on the delay time and the verification result of the scattered light protection function.

[0078] Step S40: Generate the target text of the comprehensive test report based on the board-level test results and the system-level test results.

[0079] It should be noted that the comprehensive test report is the final output of this testing method. It is not a simple compilation of raw data, but a structured document generated after systematically integrating, analyzing, and interpreting the board-level and system-level test results. First, the quantitative parameters (such as voltage, ripple, timing, and temperature) obtained from the board-level characteristic tests regarding power supply, signals, and thermal stress are correlated and summarized with the functional conclusions (such as protection delay, linearity, and logical correctness) verified in the system-level functional tests regarding control, protection, and monitoring. Then, the summarized data and conclusions are compared and analyzed one by one with the criteria defined at the beginning of the test system construction, derived from design specifications and product requirements. The criteria refer to a pre-established set of technical standards or thresholds used to determine whether each test is qualified. The comparative analysis involves precisely comparing and analyzing each specific parameter and each functional conclusion in the board-level and system-level test results with its corresponding criteria. The comprehensive test report not only includes raw test data (such as measured values ​​of voltage, current, temperature, and time, as well as key waveform screenshots), but also the judgment conclusions for each test item. The report's generation transforms multi-level test data into a clearly structured, conclusive, and directly applicable decision support document that can guide subsequent engineering actions.

[0080] Understandably, this comprehensive test report provides testers with a comprehensive assessment of the hardware and functionality of the multi-mode master-slave control system, significantly improving evaluation efficiency and decision-making accuracy. Furthermore, the data and conclusions in this report provide a basis for subsequent improvements, offering users a clear testing framework and methodology, and significantly enhancing the comprehensiveness, reliability, and efficiency of laser testing.

[0081] Based on the first embodiment of this application, in the second embodiment of this application, the content that is the same as or similar to that in the first embodiment described above can be referred to the above description, and will not be repeated hereafter. Based on this, please refer to... Figure 5 , Figure 5 This is a flowchart illustrating a second embodiment of the testing method for the multi-mode master-slave control system of this application. The steps of verifying the power feedback signal and the temperature protection function of the combining board to obtain the monitoring function test results include steps A21 to A23: Step A21: When the multi-mode master-slave control system is in the preset power output setting state, measure the power feedback signal voltage of the beam combiner. It should be noted that the power feedback signal voltage is an analog electrical signal generated in real time by the photoelectric detection or sampling circuit on the beam combiner, which converts the final output synthesized laser power. By verifying the linear correspondence between the power feedback signal voltage and the output power of the beam combiner, we can verify whether the feedback link can accurately and proportionally convert the continuous and linear changes in optical power into changes in voltage signals across the entire power range.

[0082] Preferably, the laser output power is sequentially set to multiple representative preset points via the system control interface. After each power point stabilizes, two instruments are used for simultaneous measurement: one is a calibrated standard optical power meter placed in front of the laser output end to measure and record the actual output optical power value as a reference value; the other is a high-precision digital voltmeter or oscilloscope connected to a designated power feedback signal test point on the beam combiner board to measure and record the corresponding feedback voltage value. The collected data (actual power value, feedback voltage value) is then processed and analyzed, for example, by plotting a scatter plot or performing linear fitting. By calculating the linear correlation coefficient, the slope and intercept of the fitted line, and the deviation of each data point from the fitted line, the linearity, proportionality coefficient (sensitivity), and zero-point offset of the feedback signal can be quantitatively evaluated. For example, the test results show that when the power changes from 0% to 100%, the feedback voltage linearly increases from near 0V to approximately 8V, the linear correlation coefficient is close to 1, and the deviation at each point is within the allowable range, thus proving that the monitoring link is accurate and effective.

[0083] Step A22: Simulate preset temperature conditions using a temperature sensor, and measure the temperature data of the multi-mode master-slave control system under the preset temperature conditions; It should be noted that temperature protection is another key monitoring and safety responsibility undertaken by the bundle combiner board, which usually prevents overheating damage by monitoring the temperature of the bundle combiner or output optical cable.

[0084] Step A23: Obtain the monitoring function test results based on the power feedback signal voltage and the temperature data.

[0085] Understandably, by verifying the power feedback signal and temperature protection function corresponding to the monitoring function of the bundled board in the master-slave control architecture, it is ensured that the system's perception of its most important output is accurate and reliable, and that the system's perception and protection of the thermal state of its key components are sensitive and correct.

[0086] This embodiment provides a testing method for a multi-mode master-slave control system. It acquires structured text representing a hierarchical testing system, including a first text representing board-level characteristic testing rules and a second text representing system-level functional testing rules. Based on the first text, board-level characteristic tests are performed on the master control board, slave control board, and assembly board to obtain board-level test results. Based on the second text, system-level functional tests corresponding to the functions of each board in the master-slave control architecture are performed on the master control board, slave control board, and assembly board to obtain system-level test results. Based on the board-level test results and the system-level test results, a target text representing a comprehensive test report is generated. In other words, this embodiment uses the first text representing board-level characteristic testing rules to perform board-level characteristic tests on the master control board, slave control board, and assembly board, directly testing and analyzing the actual hardware operating state of each board, thereby identifying potential defects at the hardware level. By using a second text representing the system-level functional test rules, system-level functional tests are performed on the master control board, slave control board, and aggregation board, corresponding to the functions of each board in the master-slave control architecture. While ensuring the hardware reliability of each board, further tests corresponding to the designed functions of each board are executed under actual system operation conditions. This achieves adaptation of test results to the actual operating environment and can accurately identify deep-seated hidden dangers during system collaborative operation. Therefore, a clear testing framework and method are provided for users, significantly improving the comprehensiveness, reliability, and efficiency of testing multi-mode master-slave control systems.

[0087] It should be noted that the above examples are only for understanding this application and do not constitute a limitation on the testing method of the multi-mode master-slave control system of this application. Any simple modifications based on this technical concept are within the protection scope of this application.

[0088] This application provides a laser device for use in a multimode master-slave control system. The laser device includes: at least one processor; and a memory communicatively connected to the at least one processor. The memory stores instructions executable by the at least one processor, which are executed by the at least one processor to enable the at least one processor to perform the test method of the multimode master-slave control system described above.

[0089] The following is for reference. Figure 6The diagram illustrates a structural schematic of a laser device suitable for implementing embodiments of this application. The laser device in the embodiments of this application may include, but is not limited to, mobile terminals such as mobile phones, laptops, digital broadcast receivers, PDAs (Personal Digital Assistants), PADs (Portable Application Descriptions), PMPs (Portable Media Players), in-vehicle terminals (e.g., in-vehicle navigation terminals), and fixed terminals such as digital TVs and desktop computers. Figure 6 The laser device shown is merely an example and should not be construed as limiting the functionality and scope of the embodiments of this application.

[0090] like Figure 6 As shown, the laser device may include a processing unit 1001 (e.g., a central processing unit, a graphics processing unit, etc.), which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 1002 or a program loaded from a storage device 1003 into a random access memory (RAM) 1004. The RAM 1004 also stores various programs and data required for the operation of the laser device. The processing unit 1001, ROM 1002, and RAM 1004 are interconnected via a bus 1005. An input / output (I / O) interface 1006 is also connected to the bus. Typically, the following systems can be connected to the I / O interface 1006: input devices 1007 including, for example, a touchscreen, touchpad, keyboard, mouse, image sensor, microphone, accelerometer, gyroscope, etc.; output devices 1008 including, for example, a liquid crystal display (LCD), speaker, vibrator, etc.; storage devices 1003 including, for example, magnetic tape, hard disk, etc.; and communication devices 1009. Communication device 1009 allows the laser device to communicate wirelessly or wiredly with other devices to exchange data. Although laser devices with various systems are shown in the figures, it should be understood that implementation or possession of all the systems shown is not required. More or fewer systems may be implemented alternatively.

[0091] Specifically, according to the embodiments disclosed in this application, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments disclosed in this application include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via a communication device, or installed from storage device 1003, or installed from ROM 1002. When the computer program is executed by processing device 1001, it performs the functions defined in the methods of the embodiments disclosed in this application.

[0092] The laser device provided in this application, employing the testing method for the multimode master-slave control system described in the above embodiments, solves the technical problem that traditional laser testing only focuses on functional testing and fails to accurately identify hardware defects in the multimode master-slave control system, resulting in low testing efficiency and reliability. Compared with the prior art, the beneficial effects of the laser device provided in this application are the same as those of the testing method for the multimode master-slave control system provided in the above embodiments, and other technical features of this laser device are the same as those disclosed in the previous embodiment method, and will not be repeated here.

[0093] It should be understood that the various parts disclosed in this application can be implemented using hardware, software, firmware, or a combination thereof. In the description of the above embodiments, specific features, structures, materials, or characteristics can be combined in any suitable manner in one or more embodiments or examples.

[0094] The above description is only a part of the embodiments of this application and does not limit the patent scope of this application. All equivalent structural transformations made under the technical concept of this application and using the contents of the specification and drawings of this application, or direct / indirect applications in other related technical fields, are included in the patent protection scope of this application.

Claims

1. A test method for a multi-mode master-slave control system, characterized in that, This invention relates to a multi-mode master-slave control system, which includes a master control board, slave control boards, and a bundler board. The master control board, slave control boards, and bundler board are connected via a communication bus to form a master-slave control architecture. The testing method for the multi-mode master-slave control system includes: Obtain the structured text representing the hierarchical testing system, wherein the structured text includes the first text representing the board-level characteristic testing rules and the second text representing the system-level functional testing rules; Based on the first text, board-level characteristic tests are performed on the main control board, slave control board, and bundled board respectively to obtain board-level test results; Based on the second text, system-level functional tests were performed on the main control board, slave control board and bundled board respectively, corresponding to the functions of each board in the master-slave control architecture, and system-level test results were obtained. The target text of the comprehensive test report is generated based on the board-level test results and the system-level test results.

2. The test method for the multi-mode master-slave control system as described in claim 1, characterized in that, The multi-mode master-slave control system also includes an oscilloscope and a temperature sensor. The oscilloscope is connected to the master control board, slave control board and bundle combiner board respectively. The temperature sensor is connected to the master control board, slave control board and bundle combiner board respectively. The board-level characteristic test includes at least one of power performance test, signal integrity test and thermal stress test. The step of performing board-level characteristic tests on the main control board, slave control board, and bundled board respectively based on the first text to obtain board-level test results includes: Using the board-level characteristic test rules represented by the first text, the oscilloscope is invoked to perform power performance tests on the main control board, slave control board and bundled board respectively, and the power performance test results are obtained. Using the board-level characteristic test rules represented by the first text, the oscilloscope is invoked to perform the signal integrity test on the main control board, slave control board and bundle combiner board respectively, and the signal integrity test results are obtained. Based on the board-level characteristic test rules represented by the first text, the temperature sensor is invoked to perform the thermal stress test on the main control board, slave control board and bundled board respectively, and the thermal stress test results are obtained. The board-level test results are obtained based on the power performance test results, signal integrity test results, and thermal stress test results.

3. The test method for the multi-mode master-slave control system as described in claim 2, characterized in that, The step of using the oscilloscope to perform power performance tests on the main control board, slave control board, and combiner board respectively, and obtaining the power performance test results, includes: When the main control board, slave control board and beam combiner are in the target state, the oscilloscope is used to perform voltage tests to obtain the output voltage and ripple voltage of each board in the target state. When the main control board, slave control board and beam combiner board are in the target operating condition, the oscilloscope is used to obtain the operating current flowing through the preset key components in each board, and the operating derating of the operating current is calculated. The oscilloscope is used to monitor the voltage waveforms of the power supply voltage when the main control board, slave control board, and beam combiner board are in the power-on and power-off states, and the power-on and power-off sequence of each board is determined based on the voltage waveforms. The power supply performance test results are obtained based on the output voltage, ripple voltage, operating derating, and power-on / off timing.

4. The test method for the multi-mode master-slave control system as described in claim 2, characterized in that, The multi-mode master-slave control system also includes a controller local area network transceiver chip and a serial peripheral interface device. The controller local area network transceiver chip is connected to the master control board, the slave control board and the bundled board respectively, and the serial peripheral interface device is connected to the master control board, the slave control board and the bundled board respectively. The step of using the oscilloscope to perform signal integrity tests on the main control board, slave control board, and beam combiner board respectively, and obtaining the signal integrity test results, includes: When the main control board, slave control board and bundle combiner board are in full-load operation, the oscilloscope is used to measure the first power supply voltage and data signal level of the controller LAN transceiver chip on each board. When the main control board, slave control board and bundle combiner board are in full-load operation, the oscilloscope is used to measure the second power supply voltage and clock data signal of the serial peripheral interface devices on each board respectively. When the main control board, slave control board and bundle combiner board are in full-load operation, the oscilloscope is used to measure the third power supply voltage and output signal of the temperature sensor on each board respectively; The signal integrity test results are obtained based on the first power supply voltage, data signal level, second power supply voltage, clock data signal, third power supply voltage, and output signal.

5. The test method for the multi-mode master-slave control system as described in claim 2, characterized in that, The step of calling the temperature sensor to perform thermal stress tests on the main control board, slave control board, and bundle combiner board respectively, and obtaining the thermal stress test results includes: The main control board, slave control board and bundling board are placed at a preset ambient temperature and operated at full load with rated power until thermal stability is achieved. The temperature sensor is used to test the temperature parameters of each plate under the thermally stable state. Based on the temperature parameters, the operating temperature and stability of the preset key components in each board are evaluated to obtain the thermal stress test results.

6. The test method for the multi-mode master-slave control system as described in claim 1, characterized in that, The system-level tests include at least one of the following: digital-to-analog conversion output signal testing, safety interlock interface function verification, scattered light protection testing and response verification, power feedback signal verification, and temperature protection function verification. The step of performing system-level functional tests on the master control board, slave control board, and bundled board according to the second text, corresponding to the functions of each board in the master-slave control architecture, and obtaining system-level test results includes: Using the system-level test rules represented by the second text, the main control board is tested for the digital-to-analog conversion output signal and the safety interlock interface function is verified to obtain the control function test results. The system-level test rules represented by the second text are used to perform the scattered light protection test and response verification on the slave control board to obtain the drive function test results. Using the system-level test rules represented by the second text, the power feedback signal and temperature protection function of the bundled board are verified, and the monitoring function test results are obtained. The system-level test results are obtained based on the control function test results, drive function test results, and monitoring function test results.

7. The test method for the multi-mode master-slave control system as described in claim 6, characterized in that, The steps of testing the digital-to-analog conversion output signal and verifying the safety interlock interface function of the main control board to obtain the control function test results include: When the multi-mode master-slave control system is in a preset power output setting state, the digital-to-analog conversion given voltage value output by the master control board and the ripple voltage of the digital-to-analog conversion given voltage value are measured to obtain the digital-to-analog conversion output result. The safety interlock interface of the main control board is disconnected and restored, and the voltage change and ripple voltage at both ends of the safety interlock interface are measured to obtain the function verification results of the safety interlock interface. The control function test results are obtained based on the digital-to-analog conversion output and the safety interlock interface function verification results.

8. The test method for the multi-mode master-slave control system as described in claim 6, characterized in that, The steps of performing the scattered light protection test and response verification on the slave control board to obtain the drive function test results include: When the multimode master-slave control system is in the light-emitting state, a simulated fault signal is injected into the scattered light sampling circuit of the slave control board; Monitor the laser output status of the multimode master-slave control system and measure the delay time from the injection of the simulated fault signal to the multimode master-slave control system triggering protection and cutting off the laser output; The scattered light sampling signal voltage of the slave control board was measured under the standby, half-load and full-load working states of the multi-mode master-slave control system to obtain the verification results of the scattered light protection function. The test results of the driving function are obtained based on the delay time and the verification results of the scattered light protection function.

9. The test method for the multi-mode master-slave control system as described in claim 6, characterized in that, The steps of verifying the power feedback signal and the temperature protection function of the beam combining plate to obtain the monitoring function test results include: When the multi-mode master-slave control system is in a preset power output setting state, the power feedback signal voltage of the beam combiner is measured; A preset temperature condition is simulated using a temperature sensor, and the temperature data of the multi-mode master-slave control system is measured under the preset temperature condition. The monitoring function test results are obtained based on the power feedback signal voltage and the temperature data.

10. A laser device, characterized in that, The laser device, applied to the multimode master-slave control system, includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, the computer program being configured to implement the steps of the test method for the multimode master-slave control system as claimed in any one of claims 1 to 9.

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