A laminar flow-based sequence of closing method for flexible printed circuit board wiring optimization

Abstract

The application discloses a flexible printed circuit board wiring optimization method based on laminar flow closing sequence, and is oriented to the same layer high-density parallel wiring scene after layering. The method constructs a wireable domain based on the plate shape boundary and the forbidden wiring area, extracts a skeleton channel network, and quantifies the available width on both sides of the channel to form a channel graph with capacity constraints. The same layer line group is expanded into a wiring instance according to the number of parallel roots, a wiring sorting algorithm based on the laminar flow closing sequence is proposed, and the wiring priority of the wiring instance is determined through the 'close first and open later' stack matching rule of the clockwise scanning of the port. Then, the incremental wiring is performed under the capacity constraint according to the sequence, a geometric path meeting the line width, line spacing, safety margin and minimum bending radius is generated, and space occupation update and conflict avoidance are realized through area write-back. The method can reduce the risk of shared channel crossing and crossing, improve the success rate of automatic wiring and manufacturability. At the same time, the manufacturability and regularity of the wiring result are optimized.

Description

Technical Field

[0001] This invention relates to the field of flexible printed circuit board design technology, and in particular to a flexible printed circuit board routing optimization algorithm based on laminar flow shutdown sequence. Background Technology

[0002] Ultra-long flexible printed circuit boards (ULPCs) are widely used in aerospace, consumer electronics, and medical devices due to their unique advantages of bendability, thinness, compactness, and support for three-dimensional assembly. Compared with conventional-sized FPCs, ULPCs often have longer trace distances, larger wiring space, and more pronounced narrow channels and branching structures. They also need to meet electrical and process constraints such as trace width and spacing, safety margins, avoidance of restricted areas, and minimum bending radii. Therefore, automated routing technology is a key component in the design process of ULPCs, and its routing success rate, iteration efficiency, and manufacturability directly affect the product design cycle and reliability.

[0003] Currently, automatic routing methods for FPCs mainly include grid / maze pathfinding, A* algorithm, cost field-based path planning, and heuristic strategies. The core optimization of these automatic routing methods focuses on "finding a feasible path for a single-line network" or minimizing local costs by setting weight functions. Therefore, these automatic routing methods are more suitable for small FPCs with small path search spaces and short routing distances. However, in ultra-long FPCs, the routing space often presents characteristics of large-scale irregular polygonal regions, local narrow channels, and multi-branch topologies. Single-line pathfinding and local cost optimization are prone to the following limitations: On the one hand, the path search space expands significantly, the number of iterations increases rapidly with the number of lines, and the routing efficiency decreases; on the other hand, local cost strategies are difficult to coordinate the occupation of shared channel resources by multiple parallel lines at the global level, which can easily lead to path conflicts, repeated line tearing and rerouting, or even deadlocks in congested areas or corners. As a result, the success rate of automatic routing is highly dependent on empirical parameter tuning, making it difficult to stably output manufacturable routing schemes.

[0004] Furthermore, typical scenarios for ultra-long FPCs often require high-density parallel routing of multiple lines within the same "central channel," especially for wire grouping connections represented by wire harnesses, differential groups, or multiple redundant lines. In such parallel cabling scenarios on the same layer, the core challenge lies not only in path optimization for individual lines but also in the decision-making regarding the routing order and channel space resource allocation among multiple lines. In narrow channels, corners, and bifurcation / merging areas, the routing order of different lines significantly affects the available space for subsequent lines. Common phenomena include "first-laid lines occupying critical channels, leaving no path for later-laid lines," "forced rework at local congestion points," and "uneven distribution of space on the left and right sides causing local stacking and violations of line spacing."

[0005] In summary, existing FPC automatic routing technologies have significant shortcomings in areas such as sequence planning for multi-wire routing on the same layer, quantitative management of channel capacity, and conflict avoidance, making it difficult to meet the needs of high-density parallel routing of multiple lines on the same layer in ultra-long FPCs. The core technical challenge in this scenario lies not only in path optimization for a single wire within a large search space, but also in the scientific decision-making regarding the routing sequence among multiple lines and the allocation of channel space resources. Therefore, there is an urgent need in this field for an optimization method for same-layer routing in ultra-long FPCs after layering. This method should be able to automatically generate a routing sequence adapted to the channel geometry capacity while strictly meeting electrical and technological constraints such as line width and spacing, safety margins, no-route avoidance, and minimum bending radius. Simultaneously, it should achieve incremental space occupancy updates and conflict avoidance throughout the routing process, ultimately improving the success rate of automatic same-layer routing and the manufacturability of optimized routing results. Summary of the Invention

[0006] To address the need for numerous regular routing operations on large-size, multi-channel, ultra-long flexible printed circuit boards, this invention abandons the traditional method of continuous pathfinding within the entire polygonal routing area. This traditional method easily leads to chaotic circuit layout, excessive vias, and low routing success rate. Therefore, this invention employs a simplified skeleton channel network design to achieve orderly routing between line groups; and uses a routing sorting algorithm based on laminar flow shutdown sequence to generate the routing order of multiple conductors on the same layer, achieving orderly and conflict-free routing.

[0007] The technical solution adopted by the present invention to solve the above-mentioned technical problems is as follows: The overall approach is to abstract the same-layer routing problem of ultra-long flexible printed circuit boards into a "multi-path allocation problem in a capacity-constrained ultra-long channel network." By constructing a four-stage collaborative architecture—"routeable domain and structured skeleton modeling - channel capacity quantification - intelligent routing sequence decision-making - incremental routing and conflict avoidance"—orderly and conflict-free routing of multiple traces within the same layer can be achieved. This four-stage architecture uses the "skeleton channel network" as its core hub, connecting the entire process of "input parameter acquisition, path planning, routing sequence decision-making, path generation, and channel network state update," achieving coordinated linkage between each stage and ensuring the continuity and efficiency of the entire routing optimization process.

[0008] The implementation of the above cabling optimization process first requires obtaining the various input parameters needed for same-layer cabling, including the deployable boundary area of ​​the layer, port locations, network sets, the set of lines to be deployed on the same layer, and manufacturing rule parameters. Among these, the three-dimensional unfolded domain of the ultra-long FPC on the same layer is crucial. Use polygons This indicates that the minimum distance from the center of the line to the boundary is... Several no-distribution zones are distributed within this deployment area. Then the wired area of ​​the extra-long FPC on the same layer is:

[0009] Geometric model of the same layer wiring area as follows Figure 1 As shown. Simultaneously, this invention introduces line width... Minimum line spacing Minimum bending radius These basic design parameters serve as the core basis for cabling planning and rule verification.

[0010] Second, construct the backbone channel network. This involves defining the cabling area as described above. Discretization is performed, and multiple "internal centerlines" are extracted using a thinning algorithm. These internal centerlines are then further abstracted into a graph structure, represented as a skeleton graph. skeleton node set Each node in the skeleton node set has unique two-dimensional coordinates. ; Skeleton edge set The schematic diagram of the skeleton channel network construction is shown below. Figure 2 As shown, each edge in the skeleton edge set corresponds to a channel centerline in the form of a polyline or curve. The geometric length is denoted as The core function of the above abstract rules is to transform the irregular geometric routing space into a quantifiable and computable structured problem of "channel segments + bifurcation topology", providing basic support for the efficient implementation of subsequent routing sequence decisions, incremental routing, and other processes.

[0011] Third, the channel capacity is quantitatively calculated, for the skeleton edge At each discrete sampling point, the sampling proceeds along the normal directions on both sides towards the plate boundary until the plate shape boundary is reached, thereby obtaining the locally available half-width. , In the simplified model, the local half-width average at the midpoint of the skeleton edge can be used as an approximation, and its expression is as follows: ,

[0012] After deducting the safety distances on both sides from the total width of the channel, the effective width that can be used for side-by-side cabling is calculated using the following formula: ,

[0013] Based on the aforementioned effective width, the maximum number of lines that can be accommodated on one side of this skeleton is: ,

[0014] The schematic diagram of skeleton edge capacity quantization calculation is shown below. Figure 3 As shown. Finally, a skeleton channel network with capacity annotations can be constructed, and its expression is:

[0015] For each group of wiring We need to find a path from the "entry node" to the "exit node" in the aforementioned channel network, and occupy a "channel" on each skeleton edge along the path. From a graph theory perspective, this process is equivalent to assigning paths to multiple "freight flows" in a network with capacity constraints.

[0016] For a certain wiring layer Consider the set of all line groups assigned to this layer, its expression is:

[0017] Each port Each port needs to be connected to the backbone network, and a corresponding connection node needs to be defined for each port. And define the connection method as a small local channel. Based on this, for each group of wiring... The corresponding source point can be determined on the skeleton diagram. All subsequent cabling operations are completed on this network skeleton, while the fan-out lines of the ports are generated in the post-processing stage.

[0018] Each group of cables needs to be routed. In skeleton network Select a path and on the specified side of the skeleton edge corresponding to the path. Occupy one "channel". Let a certain skeleton edge... one side The number of uses is Then the following capacity constraints must be met:

[0019] On the same wiring layer Above, the set of all routes to be wired is:

[0020] Each configuration It must contain at least two port numbers. Number of parallel walking lines The geometric parameters of the line group, including line width and spacing between traces, are also specified. To clearly illustrate the implementation process, core logic, and optimization effect of this algorithm, the following table provides a trace connection table for a specific application example and related basic parameter descriptions, as shown in Table 1. Subsequent verification of the final results and routing will then follow.

[0021] Table 1. Connection Table for Extra-Long FPC Cables

[0022] Because of the same port pair This may require laying multiple parallel lines, such as wire bundles, differential groups, and redundant lines. If sequential calculations and channel occupancy are performed only on a "wire bundle" basis, the actual number of lines occupied within the common channel and the spacing constraints cannot be accurately reflected. Therefore, this invention configures each wire bundle... Based on the number of parallel lines Expand into several routing instances. Let the set of expanded routing instances be: ,

[0023] Each routing example All inherit the port pairs and rule parameters from their source line group. The ports are numbered clockwise. For any routing instance Its port pair is To standardize the description, normalized endpoints are defined for sequential computation: ,

[0024] Therefore, each trace instance corresponds to a range on a port sequence. ,in, To standardize the left endpoint, To normalize the right endpoint, the line group port intervals in Table 1 are normalized as follows:

[0025] For each routing line It needs to be in a skeleton channel network with capacity. Select a discrete path and along each skeleton edge traversed by the path The upper side occupies one side of the passage. Let a certain edge... The number of uses for the left and right channels are respectively , The corresponding capacity constraint is: ,

[0026] However, merely meeting the above capacity constraints does not necessarily guarantee that traces within the same wiring layer will not geometrically intersect. For example... Figure 4 The diagram shows a scenario where the lines do not intersect. However, in practical engineering applications, the following phenomenon often occurs: Two lines can theoretically achieve "no-intersection routing" in their overall geometric layout. However, if the routing order is not set correctly, the line routed first will occupy a critical lateral position in a common passage (shared skeleton edge), forcing the line routed later to undergo "lateral exchange / crossing" at the common passage, thus creating a geometric intersection within the common passage. For example... Figure 5 The diagram shows how improper wiring sequence caused lines that should not have crossed to intersect. This type of problem is particularly prominent in scenarios where multiple lines have different exit points within the same channel segment and exhibit an "interleaved occupancy relationship."

[0027] Based on this, the present invention further proposes a routing sorting algorithm based on laminar flow shutdown sequence. After determining the skeleton path of each trace, this algorithm calculates a routing priority sequence by analyzing the "entry-exit" order relationship of each trace in the bottleneck channel. Routing according to this priority sequence can minimize the occurrence of lateral swapping at common channels, thereby effectively reducing the probability of crossing and interference. The flowchart of the algorithm is as follows. Figure 6 As shown in Table 1. To facilitate the explanation of the wiring sorting generation process in the subsequent algorithm, a portion of the wire groups in Table 1 are selected as a sub-example, and the number of wires in each group is appropriately reduced for demonstration purposes, as shown in Table 2. This demonstration sub-example is only used to illustrate the algorithm steps and stack matching rules; the algorithm also applies to the original number of wires shown in Table 1.

[0028] Table 2. Example of contact points for ultra-long FPC traces

[0029] The normalized port range for the routing instances in Table 2 is as follows:

[0030] Specifically, the implementation process of this wiring sequence calculation algorithm is as follows: To maintain the open and closed states of trace instances in an event-driven manner during clockwise port scanning, for each port, Construct two sets, an open set and a closed set, to provide "scan to port" functionality. The index for "which lines to process" is defined as follows: Enable collection, i.e., on port The initial routing example to indicate when the scan reaches the port. It should be added to the activity set at that time:

[0031] Close the collection, i.e., at the port End of trace instance to indicate port scanned. It should be removed from the active set and output to the routing sequence:

[0032] In this sub-example, the on and off sets are:

[0033]

[0034]

[0035]

[0036]

[0037]

[0038] A stack structure is introduced as the activity set to maintain "open but not yet closed" trace instances, where the top element of the stack is denoted as... The output sequence close_seq is introduced to record the routing order of routing instances, and incremental routing is performed in this order thereafter.

[0039] When scanning ports clockwise, a "close first, then open" rule is adopted to prevent newly started lines on the current port from blocking the top of the stack to be popped. This applies to each port. Perform the following shutdown and startup operations in sequence: (1) Closure phase make ,repeat The stack pop operation is performed once, in which... For port The number of times the stack is popped, and the top instance of the popped stack must meet the following conditions:

[0040] If the stack is empty, it is determined that the current set of trace instances cannot be closed in terms of port order; if If the current instance set exhibits an "interleaved closure" phenomenon in terms of port order, it indicates that the closing order of some routing instances does not satisfy the laminar flow (non-interleaved) relationship with their opening order. This structure inevitably results in intersections in a shared channel scenario, suggesting an error in the input data of the same-layer routing set and the existence of inevitably intersecting routing instances. These routing instances should be assigned to different routing layers. In this case, output the routing order of the remaining routing instances, the erroneous routing, and the reason. Each successful closure operation adds the popped instances to the output sequence sequentially.

[0041] (2) Start-up phase For the same port Open set , requiring to follow Pushing data onto the stack from largest to smallest ensures that lines that should be popped are not blocked by lines that are popped later, preventing them from being popped. according to After sorting in descending order, push them onto the stack one by one. in, Used when multiple instances have the same A stable sorting is provided. After the clockwise scan operation of all ports is completed, if the stack is not empty, there are unclosed instances. This indicates that the current set of routing instances is not a laminar flow structure, which usually means that there is a problem with the data, or that there are intersections between the lines to be routed on the same layer. The final output sequence close_seq is for the set of routing instances. The wiring sequence.

[0042] In this sub-example, its port At that time, first close the phase: No stack popping; restart phase: for according to Pushing into a stack in descending order results in the following stack: At this point, the output close_seq will be empty.

[0043] port During the shutdown phase: The stack needs to be popped once, and the top of the stack is... ,satisfy Pop up and add output: After popping, the stack is as follows: ; Start-up phase: Push it onto the stack, and the stack is as follows: .

[0044] port During the shutdown phase: It requires two pops from the stack. The first pop: the top of the stack is... ,satisfy Output: Second pop from the stack: the top of the stack is ,satisfy Output: At this point, the stack is: ; Start-up phase: It is not pushed onto the stack.

[0045] port During the shutdown phase: The stack needs to be popped once, and the top of the stack is... ,satisfy Pop up and add output: After popping, the stack is as follows: ; Start-up phase: It is not pushed onto the stack.

[0046] port During the shutdown phase: The stack needs to be popped once, and the top of the stack is... ,satisfy Pop up and add output: After popping, the stack is as follows: ; Start-up phase: No push is made onto the stack. At this point, the scanning operation for all ports is complete, the stack is empty, and the routing order for generating the final routing instance is shown in Table 3 below.

[0047] Table 3. Example of final wiring sequence for extra-long FPC contacts

[0048] Finally, incremental routing and conflict avoidance operations are performed, specifically generating wire paths line by line according to the routing order `close_seq` obtained above. For the... For each routing example, following the path from the entrance connection node to the exit connection node planned above, as well as the routing side and offset, parallel routing groups of specified widths are generated sequentially.

[0049] When generating parallel traces, to ensure the starting and ending terminals of the offset traces remain unchanged, the centerline must first be segmented according to bends, and then segmented offsets performed. For any skeleton edge, the centerline corresponding to the bend line... At each interior point Calculate the turning angle:

[0050] in, , , ;when When exist The point is divided into multiple centerline sub-segments, among which, This is the corner threshold.

[0051] Secondly, perform parallel offsetting on the centerline segments. This involves using any direction vector... Defined as unit tangent vector And define the left and right normal vectors. , For a given offset distance centerline point The offset is: ,

[0052] Among them, offset distance Related to line width and line spacing to meet manufacturing rules.

[0053] Next, extend and connect the centerline segments in each routing line, and connect adjacent centerline segments at the connection point. The angle formed at the point is smoothed by using a circular arc. Let the unit tangents of the two sub-segments be respectively... The corner is Select the fillet radius Then, the distance along the edge from the point of tangency to the point of connection is:

[0054] And using the two points of tangency and the center of the circle to determine the arc, the arc is connected tangent to the two sub-segments, thus obtaining The centerline of the continuously differentiable channel. The center of the rounded corner is obtained by intersecting the offset lines of two adjacent sub-segments: offset the extension lines of the sub-segments on both sides of the connection point along their normal directions by a distance. (Require Two offset lines are obtained. The intersection of the two offset lines is taken as the center of the circle to ensure that the arc is tangent to the two sub-segments.

[0055] The skeleton edge centerline and its effective width on both sides obtained by capacity annotation are used as the basis, and the same centerline representation is shared with the offset trajectory generation, so that capacity calculation, occupancy update and fillet smoothing are completed in the same skeleton channel coordinate system.

[0056] Then, expand along the offset centerline to obtain the actual trace copper foil area (13), with rounded end caps at the ends to form semi-circular ends:

[0057] Finally, in generating the first After determining the continuous geometric path of a trace instance, its space occupation is immediately written back to the restricted area set. middle:

[0058] in, These are the line width and minimum line spacing parameters for this routing example. To make the line with a radius of The expansion is used to obtain a secure envelope. Simultaneously, the available deployable domain is updated synchronously.

[0059] The path selection, occupancy side, and offset decisions for subsequent routing instances are all made in the updated... This is performed under the constraint of remaining channel capacity, thereby achieving conflict avoidance. At this point, the complete geometric path routing from port A → fan-out area → skeleton channel → node splicing → fan-out area → port B is generated, ultimately yielding the wiring result corresponding to the electrical contact table and the flexible printed circuit board outline, as shown below. Figure 7 As shown. Attached Figure Description

[0060] Figure 1 Geometric model diagram of the same-layer wiring area of ​​a flexible printed circuit board; Figure 2 A schematic diagram of the construction of the skeleton channel network; Figure 3 A schematic diagram of capacity quantization calculation for skeleton edges; Figure 4 A cross-free wiring diagram obtained with the correct wiring sequence; Figure 5 Cross-wiring diagram obtained from an incorrect wiring sequence; Figure 6 Flowchart of the stack mechanism for determining routing order; Figure 7 Partial wiring diagram of a flexible printed circuit board; Figure 8 A diagram showing the complete path generation effect of same-layer wiring; In the figure: Wiringable area (1), Port number (2), Board edge no-wiring area (3), Flexible printed circuit board outline (4), Flexible printed circuit board outline skeleton node (5), Flexible printed circuit board outline skeleton edge (6), Safety distance (7), Partial available effective half-width on the left side of the flexible printed circuit board (8), Partial available effective half-width on the right side of the flexible printed circuit board (9), Parallel wiring offset (10), Line width (11), Corner arc (12), Actual copper foil area of ​​the trace (13). Detailed Implementation

[0061] The invention will be further described with reference to the accompanying drawings.

[0062] The overall approach is to abstract the same-layer routing problem of ultra-long flexible printed circuit boards into a "multi-path allocation problem in a capacity-constrained ultra-long channel network." By constructing a four-stage collaborative architecture—"routeable domain and structured skeleton modeling - channel capacity quantification - intelligent routing sequence decision-making - incremental routing and conflict avoidance"—orderly and conflict-free routing of multiple traces within the same layer can be achieved. This four-stage architecture uses the "skeleton channel network" as its core hub, connecting the entire process of "input parameter acquisition, path planning, routing sequence decision-making, path generation, and channel network state update," achieving coordinated linkage between each stage and ensuring the continuity and efficiency of the entire routing optimization process.

[0063] The implementation of the above cabling optimization process first requires obtaining the various input parameters needed for same-layer cabling, including the deployable boundary area of ​​the layer (1), port number and location (2), network set, set of lines to be deployed on the same layer, and manufacturing rule parameters. Among them, the three-dimensional unfolded domain of the ultra-long FPC on the same layer. Use polygons This indicates that the minimum distance from the center of the line to the boundary is... Several no-distribution zones are distributed within this deployment area. (3), then the same-layer wiring area (1) of the ultra-long FPC is:

[0064] Geometric model of the same layer wiring area as follows Figure 1 As shown. Simultaneously, this invention introduces line width... Minimum line spacing Minimum bending radius These basic design parameters serve as the core basis for cabling planning and rule verification.

[0065] Second, construct the backbone channel network. This involves defining the cabling area as described above. (1) Discretize the data and extract multiple “internal centerlines” using a thinning algorithm. Then, further abstract these internal centerlines into a graph structure: represent them as a skeleton graph. , skeleton node (5) set Each node in the skeleton node (5) set has unique two-dimensional coordinates. ; Skeleton edge (6) set The schematic diagram of the skeleton channel network construction is shown below. Figure 2 As shown, each edge in the skeleton edge (6) set corresponds to a channel centerline in the form of a broken line or curve. The geometric length of (6) is denoted as The core function of the above abstract rules is to transform the irregular geometric routing space into a quantifiable and computable structured problem of "channel segments + bifurcation topology", providing basic support for the efficient implementation of subsequent routing sequence decisions, incremental routing, and other processes.

[0066] Third, the channel capacity is quantitatively calculated, for the skeleton edge (6) At each discrete sampling point, advance towards the plate boundary along the normal directions on both sides until the plate boundary is reached, thereby obtaining the locally available half-width. , In the simplified model, the local half-width average at the midpoint of the skeleton edge can be used as an approximation, and its expression is as follows: ,

[0067] After deducting the safety distances on both sides (7) from the total width of the channel, the effective width that can be used for side-by-side cabling is calculated as follows: (8), (9) Based on the aforementioned effective width, the maximum number of lines that can be accommodated on one side of this skeleton is: ,

[0068] The schematic diagram of skeleton edge capacity quantization calculation is shown below. Figure 3 As shown. Finally, a skeleton channel network with capacity annotations can be constructed, and its expression is:

[0069] For each group of wiring We need to find a path from the "entry node" to the "exit node" in the aforementioned channel network, and occupy a "channel" on each skeleton edge along the path. From a graph theory perspective, this process is equivalent to assigning paths to multiple "freight flows" in a network with capacity constraints.

[0070] For a certain wiring layer Consider the set of all line groups assigned to this layer, its expression is:

[0071] Each port Each port needs to be connected to the backbone network, and a corresponding connection node needs to be defined for each port. And define the connection method as a small local channel. Based on this, for each group of wiring... The corresponding source point can be determined on the skeleton diagram. All subsequent cabling operations are completed on this network skeleton, while the fan-out lines of the ports are generated in the post-processing stage.

[0072] Each group of cables needs to be routed. In skeleton network Select a path and on the specified side of the skeleton edge corresponding to the path. Occupy one "channel". Let a certain skeleton edge... one side The number of uses is Then the following capacity constraints must be met:

[0073] On the same wiring layer Above, the set of all routes to be wired is:

[0074] Each configuration It must contain at least two port numbers. Number of parallel walking lines The geometric parameters of the line group, including line width and spacing between traces, are also specified. To clearly illustrate the implementation process, core logic, and optimization effect of this algorithm, the following table provides a trace connection table for a specific application example and related basic parameter descriptions, as shown in Table 1. Subsequent verification of the final results and routing will then follow.

[0075] Table 1. Connection Table for Extra-Long FPC Cables

[0076] Because of the same port pair This may require laying multiple parallel lines, such as wire bundles, differential groups, and redundant lines. If sequential calculations and channel occupancy are performed only on a "wire bundle" basis, the actual number of lines occupied within the common channel and the spacing constraints cannot be accurately reflected. Therefore, this invention configures each wire bundle... Based on the number of parallel lines Expand into several routing instances. Let the set of expanded routing instances be: ,

[0077] Each routing example All inherit the port pairs and rule parameters from their source line group. The ports are numbered clockwise. For any routing instance Its port pair is To standardize the description, normalized endpoints are defined for sequential computation: ,

[0078] Therefore, each trace instance corresponds to a range on a port sequence. ,in, To standardize the left endpoint, To normalize the right endpoint, the line group port intervals in Table 1 are normalized as follows:

[0079] For each routing line It needs to be in a skeleton channel network with capacity. Choose a discrete path, that is, a multi-segment skeleton line from the starting port to the ending port. and along each skeleton edge traversed by the path The upper side occupies one side of the passage. Let a certain edge... The number of uses for the left and right channels are respectively , The corresponding capacity constraint is: ,

[0080] However, merely meeting the above capacity constraints does not necessarily guarantee that traces within the same wiring layer will not geometrically intersect. For example... Figure 4 The diagram shows a scenario where the lines do not intersect. However, in practical engineering applications, the following phenomenon often occurs: Two lines can theoretically achieve "no-intersection routing" in their overall geometric layout. However, if the routing order is not set correctly, the line routed first will occupy a critical lateral position in a common passage (shared skeleton edge), forcing the line routed later to undergo "lateral exchange / crossing" at the common passage, thus creating a geometric intersection within the common passage. For example... Figure 5 The diagram shows how improper wiring sequence caused lines that should not have crossed to intersect. This type of problem is particularly prominent in scenarios where multiple lines have different exit points within the same channel segment and exhibit an "interleaved occupancy relationship."

[0081] Based on this, the present invention further proposes a routing sorting algorithm based on laminar flow shutdown sequence. After determining the skeleton path of each trace, this algorithm calculates a routing priority sequence by analyzing the "entry-exit" order relationship of each trace in the bottleneck channel. Routing according to this priority sequence can minimize the occurrence of lateral swapping at common channels, thereby effectively reducing the probability of crossing and interference. The flowchart of the algorithm is as follows. Figure 6As shown in Table 1. To facilitate the explanation of the wiring sorting generation process in the subsequent algorithm, a portion of the wire groups in Table 1 are selected as a sub-example, and the number of wires in each group is appropriately reduced for demonstration purposes, as shown in Table 2. This demonstration sub-example is only used to illustrate the algorithm steps and stack matching rules; the algorithm also applies to the original number of wires shown in Table 1.

[0082] Table 2. Example of contact points for ultra-long FPC traces

[0083] The normalized port range for the routing instances in Table 2 is as follows:

[0084] Specifically, the implementation process of this wiring sequence calculation algorithm is as follows: To maintain the open and closed states of trace instances in an event-driven manner during clockwise port scanning, for each port, Construct two sets, an open set and a closed set, to provide "scan to port" functionality. The index for "which lines to process" is defined as follows: Enable collection, i.e., on port The initial routing example to indicate when the scan reaches the port. It should be added to the activity set at that time:

[0085] Close the collection, i.e., at the port End of trace instance to indicate port scanned. It should be removed from the active set and output to the routing sequence:

[0086] In this sub-example, the on and off sets are:

[0087]

[0088]

[0089]

[0090]

[0091]

[0092] A stack structure is introduced as the activity set to maintain "open but not yet closed" trace instances, where the top element of the stack is denoted as... The output sequence close_seq is introduced to record the routing order of routing instances, and incremental routing is performed in this order thereafter.

[0093] When scanning ports clockwise, a "close first, then open" rule is adopted to prevent newly started lines on the current port from blocking the top of the stack to be popped. This applies to each port. Perform the following shutdown and startup operations in sequence: (1) Closure phase make ,repeat The stack pop operation is performed once, in which... For port The number of times the stack is popped, and the top instance of the popped stack must meet the following conditions:

[0094] If the stack is empty, it is determined that the current set of trace instances cannot be closed in terms of port order; if If the current instance set exhibits an "interleaved closure" phenomenon in terms of port order, it indicates that the closing order of some routing instances does not satisfy the laminar flow (non-interleaved) relationship with their opening order. This structure inevitably results in intersections in a shared channel scenario, suggesting an error in the input data of the same-layer routing set and the existence of inevitably intersecting routing instances. These routing instances should be assigned to different routing layers. In this case, output the routing order of the remaining routing instances, the erroneous routing, and the reason. Each successful closure operation adds the popped instances to the output sequence sequentially.

[0095] (2) Start-up phase For the same port Open set , requiring to follow Pushing data onto the stack from largest to smallest ensures that lines that should be popped are not blocked by lines that are popped later, preventing them from being popped. according to After sorting in descending order, push them onto the stack one by one. in, Used when multiple instances have the same A stable sorting is provided. After the clockwise scan operation of all ports is completed, if the stack is not empty, there are unclosed instances. This indicates that the current set of routing instances is not a laminar flow structure, which usually means that there is a problem with the data, or that there are intersections between the lines to be routed on the same layer. The final output sequence close_seq is for the set of routing instances. The wiring sequence.

[0096] In this sub-example, its port At that time, first close the phase: No stack popping; restart phase: for according to Pushing into a stack in descending order results in the following stack: At this point, the output close_seq will be empty.

[0097] port During the shutdown phase: The stack needs to be popped once, and the top of the stack is... ,satisfy Pop up and add output: After popping, the stack is as follows: ; Start-up phase: Push it onto the stack, and the stack is as follows: .

[0098] port During the shutdown phase: It requires two pops from the stack. The first pop: the top of the stack is... ,satisfy Output: Second pop from the stack: the top of the stack is ,satisfy Output: At this point, the stack is: ; Start-up phase: It is not pushed onto the stack.

[0099] port During the shutdown phase: The stack needs to be popped once, and the top of the stack is... ,satisfy Pop up and add output: After popping, the stack is as follows: ; Start-up phase: It is not pushed onto the stack.

[0100] port During the shutdown phase: The stack needs to be popped once, and the top of the stack is... ,satisfy Pop up and add output: After popping, the stack is as follows: ; Start-up phase: No push is made onto the stack. At this point, the scanning operation for all ports is complete, the stack is empty, and the routing order for generating the final routing instance is shown in Table 3 below.

[0101] Table 3. Example of final wiring sequence for extra-long FPC contacts

[0102] Finally, incremental routing and conflict avoidance operations are performed, specifically generating wire paths one by one according to the routing order `close_seq` obtained above, such as... Figure 7 The diagram shows a partial routing diagram of a flexible printed circuit board. For the first... For each routing instance, following the path from the entrance connection node to the exit connection node planned above, as well as the routing side and offset (10), parallel routing groups with a specified line width (11) are generated sequentially.

[0103] When generating parallel traces, to ensure the starting and ending terminals of the offset traces remain unchanged, the centerline must first be segmented according to bends, and then segmented offsets performed. For any skeleton edge, the centerline corresponding to the bend line... At each interior point Calculate the turning angle:

[0104] in, , , ;when When exist The point is divided into multiple centerline sub-segments, among which, This is the corner threshold.

[0105] Secondly, perform parallel offsetting on the centerline segments. This involves using any direction vector... Defined as unit tangent vector And define the left and right normal vectors. , For a given offset distance centerline point The offset is: ,

[0106] Among them, offset distance Related to line width and line spacing to meet manufacturing rules.

[0107] Next, extend and connect the centerline segments in each routing line, and connect adjacent centerline segments at the connection point. The angle formed at the point is smoothed by an arc (12). Let the unit tangents of the two sub-segments be respectively The corner is Select the fillet radius Then, the distance along the edge from the point of tangency to the point of connection is:

[0108] And determine the arc (12) by the two tangent points and the center of the circle, so that the arc (12) is tangent to the two sub-segments, thereby obtaining The centerline of the continuously differentiable channel. The center of the rounded corner is obtained by intersecting the offset lines of two adjacent sub-segments: offset the extension lines of the sub-segments on both sides of the connection point along their normal directions by a distance. (Require Two offset lines are obtained, and the intersection of the two offset lines is taken as the center of the circle to ensure that the arc (12) is tangent to the two sub-segments.

[0109] The skeleton edge centerline and its effective width on both sides obtained by capacity annotation are used as the basis, and the same centerline representation is shared with the offset trajectory generation, so that capacity calculation, occupancy update and fillet smoothing are completed in the same skeleton channel coordinate system.

[0110] Then, expand along the offset centerline to obtain the actual trace copper foil area (13), with rounded end caps at the ends to form semi-circular ends:

[0111] Finally, in generating the first After determining the continuous geometric path of a trace instance, its space occupation is immediately written back to the restricted area set. middle:

[0112] in, These are the line width and minimum line spacing parameters for this routing example. To make the line with a radius of The expansion is used to obtain a secure envelope. Simultaneously, the available deployable domain is updated synchronously.

[0113] The path selection, occupancy side, and offset decisions for subsequent routing instances are all made in the updated... This is performed under the constraint of remaining channel capacity, thereby achieving conflict avoidance. At this point, the complete geometric path routing from port A → fan-out area → skeleton channel → node splicing → fan-out area → port B is generated, ultimately yielding the wiring result corresponding to the electrical contact table and the flexible printed circuit board outline, as shown below. Figure 8 As shown.

Claims

1. A flexible printed circuit board routing optimization method based on laminar flow shutdown sequence, applied to same-layer routing after layering is completed; by constructing a four-stage collaborative architecture of "routable domain and structured skeleton modeling - channel capacity quantification - intelligent routing sequence decision - incremental routing and conflict avoidance", the method achieves orderly and conflict-free routing of multiple traces in the same layer; the four-stage architecture of this invention takes "skeleton channel network" as the core hub, connecting the entire process of "input parameter acquisition, path planning, routing sequence decision, path generation and channel network status update", realizing the coordinated linkage of each link, and ensuring the continuity and efficiency of the entire routing optimization process; The implementation of the above cabling optimization process first requires obtaining the various input parameters required for cabling on the same layer, including the deployable boundary area of ​​the layer (1), port number and location (2), network set, set of lines to be deployed on the same layer, and manufacturing rule parameters; among which, 3D unfolding domain of ultra-long FPC in the same layer Use polygons This indicates that the minimum distance from the center of the line to the boundary is... A wire-layable area is constructed based on the combination of the deployable boundary area and the no-layout area. ; Second, construct the skeleton channel network; and define the wireable area. (1) Discretize the data and refine it to multiple "internal centerlines" using a refinement algorithm. Then, further abstract these internal centerlines into a graph structure: represent it as a skeleton graph. ,in For the set of skeleton nodes (5), The set of skeleton edges (6) is given, and each skeleton edge (6) corresponds to a channel centerline. Third, the channel capacity is quantitatively calculated for any skeleton edge. Discrete sampling is performed along the centerline of the channel. At the sampling point, the sampling is advanced along the normal direction on both sides to the effective wireable area after deducting the safety distance to obtain the local actual usable half width on both sides. The parallel capacity on both sides of the skeleton edge is calculated from the usable half width on both sides to obtain the skeleton channel network with capacity label. Fourth, for each group of wiring... We need to find a path from its "entry node" to its "exit node" in the above channel network, and occupy a "channel" on each skeleton edge along the path; Because of the same port pair This may require laying multiple parallel lines, such as wire bundles, differential groups, and redundant lines. If sequential calculations and channel occupancy are performed only on a "wire group" basis, it will not accurately reflect the actual number of lines occupied and the spacing constraints within the common channel. Therefore, this invention configures each wire group... Based on the number of parallel lines Expand into several routing instances; each routing instance inherits the port pairs and rule parameters of its source line group; The ports are numbered clockwise as follows For any routing instance Its port pair is To standardize the description, normalized endpoints are defined for sequential computation: ， Therefore, each trace instance corresponds to a range on a port sequence. ,in, To standardize the left endpoint, To normalize the right endpoint; However, simply satisfying the above constraints does not necessarily guarantee that there will be no geometric intersections among the traces within the same wiring layer; two traces can theoretically achieve no-intersection wiring in terms of overall geometric layout, but if the wiring sequence is not set properly, multiple traces may form geometric intersections within the common channel. Based on this, the present invention further proposes a routing sorting algorithm based on laminar flow shutdown sequence. After determining the skeleton path of each routing line, the algorithm calculates a routing priority sequence by analyzing the "entry-exit" order relationship of each routing line in the bottleneck channel. By routing according to this priority sequence, the occurrence of lateral exchange can be avoided to the greatest extent in the common channel, thereby effectively reducing the probability of crossing and interference. Finally, incremental routing and conflict avoidance operations are performed, specifically generating wire paths line by line according to the routing order `close_seq` obtained above, as shown in Figure 7, a partial routing diagram of the flexible printed circuit board; for the first... For each routing example, following the path from the entrance connection node to the exit connection node planned above, as well as the routing side and offset (10), parallel routing groups with a specified line width (11) are generated sequentially. The path selection, occupancy side, and offset decisions for subsequent routing instances are all made in the updated... The process is carried out under the constraint of remaining channel capacity, thereby achieving conflict avoidance; the final result is the wiring result corresponding to the electrical contact table and the shape of the flexible printed circuit board.

2. The channel capacity quantization calculation according to claim 1, characterized in that: For skeleton edge (6) At each discrete sampling point, advance towards the plate boundary along the normal directions on both sides until the plate boundary is reached, thereby obtaining the locally available half-width. , In the simplified model, the local usable half-width average at the midpoint of the skeleton edge can be used as an approximation, and its expression is as follows: ， After deducting the safety distances on both sides (7) from the total width of the channel, the effective width that can be used for side-by-side cabling is calculated as follows: （8）， （9） Based on the aforementioned effective width, the maximum number of lines that can be accommodated on one side of this skeleton is: ， Finally, a skeleton channel network with capacity annotations can be constructed, and its expression is: 。 3. The routing sorting algorithm based on laminar flow shutdown sequence according to claim 1, characterized in that: To maintain the open and closed states of trace instances in an event-driven manner during clockwise port scanning, for each port, Construct two sets, an open set and a closed set, to provide "scan to port" functionality. The index for "which lines to process" is defined as follows: Enable collection, i.e., on port The initial routing example to indicate when the scan reaches the port. It should be added to the activity set at that time: Close the collection, i.e., at the port End of trace instance to indicate port scanned. It should be removed from the active set and output to the routing sequence: A stack structure is introduced as the activity collection to maintain "open but not yet closed" trace instances, where the top element of the stack is denoted as... The output sequence close_seq is introduced to record the routing sequence of routing instances, and incremental routing is performed in this order thereafter. When scanning ports clockwise, a "close first, open later" rule is used to prevent newly started lines on the current port from blocking the top of the stack to be popped. This applies to each port. Perform the following shutdown and startup operations in sequence: (1) Closure phase make ,repeat The stack pop operation is performed once, in which... For port The number of times the stack is popped, and the top instance of the popped stack must meet the following conditions: If the stack is empty, it is determined that the current set of trace instances cannot be closed in terms of port order; if This indicates that the current instance set exhibits an "interleaved closure" phenomenon in terms of port order; each time a closure operation is successfully executed, the popped instances are added to the output sequence in sequence: (2) Start-up phase For the same port Open set , requiring to follow Pushing data onto the stack from largest to smallest ensures that lines that should be popped are not blocked by lines that are popped later, preventing them from being popped. according to After sorting in descending order, push them onto the stack one by one. in, Used when multiple instances have the same A stable sorting is provided; after the clockwise scan operation of all ports is completed, if the stack is not empty, there are unclosed instances. The current set of routing instances is determined to be a non-laminar structure, which usually means that there is a problem with the data, or that there are intersections between the lines to be laid on the same layer; the final output sequence close_seq is for the set of routing instances. The wiring sequence.

4. The incremental routing and collision avoidance method according to claim 1, characterized in that: When generating parallel line groups, to ensure that the starting and ending terminals of the offset traces remain unchanged, the centerline must first be segmented according to bends, and then segmented offsets must be performed; for any skeleton edge, the centerline break line... At each interior point Calculate the turning angle: in, , , ;when When exist The point is divided into multiple centerline sub-segments, among which, This is the corner threshold; Secondly, perform parallel offsetting on the centerline segments; and use any direction vector Defined as unit tangent vector And define the left and right normal vectors. , For a given offset distance centerline point The offset is: ， Among them, offset distance Related to line width and line spacing to meet manufacturing rules; Next, extend and connect the centerline segments in each routing line, and connect adjacent centerline segments at the connection point. The angle formed at the point is smoothed by an arc; let the unit tangents of the two sub-segments be respectively... The corner is Select the fillet radius Then, the distance along the edge from the point of tangency to the point of connection is: And using the two points of tangency and the center of the circle to determine the arc, the arc is connected tangent to the two sub-segments, thus obtaining The centerline of the continuously differentiable channel; the center of the rounded corner is obtained by intersecting the offset lines of two adjacent sub-segments: the extension lines of the sub-segments on both sides of the connection point are offset along their normal distances. (Require Two offset lines are obtained. The intersection of the two offset lines is taken as the center of the circle to ensure that the arc is tangent to the two sub-segments. The skeleton edge centerline and its effective width on both sides obtained by capacity annotation are used as the basis, and the same centerline representation is shared with the offset trajectory generation, so that capacity calculation, occupancy update and fillet smoothing are completed in the same skeleton channel coordinate system; Then, expand along the offset centerline to obtain the actual trace copper foil area (13), with rounded end caps at the ends to form semi-circular ends: Finally, in generating the first After determining the continuous geometric path of a trace instance, its space occupation is immediately written back to the restricted area set. middle: in, These are the line width and minimum line spacing parameters for this routing example. To make the line with a radius of The expansion is used to obtain a secure envelope; simultaneously, the effective deployable domain is updated synchronously. 。

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