A TCM mode soft switching control method of a multi-phase interleaved parallel bidirectional DCDC converter

Abstract

The application provides a TCM mode soft switching control method of a multi-phase interleaved parallel bidirectional DC / DC converter, which comprises the following steps: collecting state information in the operation process of the bidirectional DC / DC converter to generate an outer loop control error; optimizing the parameters of a PID controller based on an improved whale optimization algorithm to obtain an optimized PID controller which is used to output an outer loop control variable; obtaining the outer loop control variable and the collected state information to calculate a theoretical timing variable of synchronous tube delay turn-on; obtaining the total link delay of a zero-crossing detection circuit to calculate the synchronous tube delay turn-on time after compensation; calculating a dead time timing variable according to the current state information; taking the actual switching period of a main phase as a synchronous reference to synchronize the periods of the remaining phases and set a phase offset, so that the phases can stably operate in a preset staggered phase relationship under the condition of non-fixed frequency; and the method can realize the stable soft switching operation of the multi-phase interleaved parallel bidirectional DC / DC converter under complex working conditions such as voltage fluctuation and load change.

Description

Technical Field

[0001] This invention relates to the field of DC-DC converter control technology, and in particular to a TCM mode soft-switching control method for a multiphase interleaved parallel bidirectional DC-DC converter. Background Technology

[0002] Bidirectional DC / DC converters, with their high power output capability, smooth bidirectional power switching, simple structure, and low voltage and current ripple, are widely used in lithium battery energy storage systems, DC microgrids, and vehicle power supplies to achieve bidirectional energy transfer between the DC bus and the battery side. Traditional bidirectional DC / DC converters mostly operate in continuous conduction mode (CCM) hard switching state, which has large switching losses and limits the improvement of converter operating frequency and power density. By adopting triangular current mode (TCM), the inductor current can generate a sufficient negative peak, and the zero-voltage turn-on (ZVS) of the switch can be achieved by utilizing the resonant process during the dead time, thereby significantly reducing switching losses.

[0003] In TCM mode applications of high-power multiphase interleaved parallel bidirectional DC / DC converters, due to the non-fixed-frequency characteristics of TCM mode, traditional fixed-frequency PID control is difficult to maintain good dynamic response and steady-state accuracy under complex operating conditions. It relies on high-speed zero-crossing detection signals to refresh the switching transistor turn-on time, but hardware detection and transmission delays will cause the synchronous transistor to turn off lagging, leading to problems such as negative current overshoot. The critical resonance time of the junction capacitance of the switching transistor changes dynamically, and the fixed dead time setting has limitations, affecting the implementation of soft switching and loss control. Moreover, in TCM frequency conversion mode, multiphase interleaved parallel technology is difficult to maintain a stable phase shift accurately due to the differences in parasitic parameters of each phase circuit, and current sharing and current ripple cancellation failures are prone to occur. Summary of the Invention

[0004] In view of this, the present invention proposes a TCM mode soft-switching control method for a multiphase interleaved parallel bidirectional DC / DC converter, which effectively solves the problems of dynamic control, soft-switching implementation, dead time optimization and multiphase stable synchronization of high-power multiphase interleaved parallel bidirectional DC / DC converters in TCM mode, thereby improving system performance and reliability.

[0005] The technical solution of this invention is implemented as follows: Firstly, this invention provides a TCM mode soft-switching control method for a multiphase interleaved parallel bidirectional DC-DC converter, comprising the following steps: S1: Collect the status information of the bidirectional DC-DC converter during operation, preset the control target, compare the status information with the corresponding preset control target parameter values, and generate the outer loop control error; S2, based on the outer loop control error, the improved whale optimization algorithm that integrates chaotic sequence initialization and nonlinear decay factor is used to optimize the PID controller parameters to obtain the optimized PID controller, which is used to output the outer loop control quantity. S3: Obtain the outer loop control quantity and the collected status information, determine whether the current operating condition meets the natural zero voltage conduction condition, if not, calculate the critical negative current required to achieve zero voltage conduction, and calculate the theoretical timing quantity of the synchronous tube delay conduction based on the critical negative current; S4. Obtain the total link delay of the zero-crossing detection circuit. Based on the difference between the theoretical timing amount of the synchronous tube delay and the compensation amount of the total link delay, calculate the compensated synchronous tube delay conduction time, and perform amplitude limiting processing on the synchronous tube delay conduction time to output the final synchronous tube drive timing amount, which is used to generate the synchronous tube drive signal. S5. Calculate the dead time timing value based on the current state information. The upper limit of the dead time timing value is constrained by the time when the inductor current rises back to zero during the dead period, and the lower limit is constrained by the time required for the commutation resonance to complete. The upper and lower limits of the dead time timing value are constrained, and the final dead time timing value is output to generate the drive signal of the switching transistor. S6, using the actual switching cycle of the main phase as the synchronization reference, periodically synchronize the remaining phases and set the phase offset, so that each phase can operate stably under non-fixed frequency conditions with a preset interleaved phase relationship. The actual switching cycle of the main phase is determined by the zero-crossing detection signal of the main phase.

[0006] Based on the above technical solutions, preferably, the state information in step S1 includes at least the input voltage, output voltage, inductor current, inductance parameters of each phase, and parasitic output capacitance parameters of the switching transistors, and the control target is set according to the operating conditions of the bidirectional DC-DC converter; when the bidirectional DC-DC converter operates in the condition of transferring energy from the bus to the energy storage side, the control target is the charging current; when the bidirectional DC-DC converter operates in the condition of transferring energy from the energy storage side to the bus side, the control target is the bus voltage.

[0007] Based on the above technical solutions, preferably, step S2 includes the following sub-steps: S21, set the population size, maximum number of iterations and parameter search space boundary, and construct a three-dimensional search space by using the proportional coefficient, integral coefficient and derivative coefficient of the PID controller as variables to be optimized; S22, an initial population is generated by using chaotic mapping, and chaotic variables are mapped to a three-dimensional search space to generate the position vector of the individuals in the initial population. Each individual corresponds to a set of PID control parameter combinations. S23, Construct a fitness function, which includes dynamic performance indicators and steady-state performance indicators, used to quantitatively evaluate the control effect of each combination of PID control parameters; S24, calculate the fitness value of each individual in the initial population based on the fitness function, and obtain the globally optimal individual with the smallest fitness value and the corresponding combination of PID control parameters; S25. During the iteration process, the convergence factor is updated according to the nonlinear decay strategy, and the contraction and expansion control coefficients, perturbation coefficients and random probabilities are updated simultaneously. S26, For each individual, compare the random probability with the first judgment threshold; When the random probability is less than the first judgment threshold, the absolute value of the contraction and expansion control coefficient is compared with the second judgment threshold. If the magnitude of the coefficient vector is not greater than the second judgment threshold, the contraction and encirclement update mechanism is used to update the current population individual position; if the magnitude of the coefficient vector is greater than the second judgment threshold, the random search update mechanism is used to update the current population individual position. When the random probability is not less than the first judgment threshold, the spiral bubble network update mechanism is used to update the current population individual positions and obtain the updated population. S27. Based on the pre-set parameter search space boundary, the position of individuals in the updated population is constrained by the boundary, and the fitness value of each individual in the population after boundary constraint is calculated. The fitness value of each individual is compared with the fitness value of the current global best individual. If there is a better individual, the global best individual and the corresponding PID control parameter combination are updated. S28. When the preset maximum number of iterations is reached, the iteration is terminated, and the proportional coefficient, integral coefficient and derivative coefficient corresponding to the finally obtained global optimal individual are output to the PID controller to generate the outer loop control quantity.

[0008] Based on the above technical solutions, preferably, step S3 includes the following sub-steps: S31: Collect the current operating status information of the bidirectional DC-DC converter and obtain the outer loop control quantity to determine the current power transmission direction and target current requirement; S32, based on the ratio of the input voltage to the output voltage, determine whether the current operating condition meets the conditions for naturally achieving zero-voltage turn-on; If the input voltage is less than twice the output voltage, the voltage resonance of the switching node can naturally reach zero voltage without additional adjustment of the negative current, and the theoretical timing of the synchronous tube's delayed conduction is set to zero. If the input voltage is greater than or equal to twice the output voltage, then the critical initial value of the inductor current required to achieve zero-voltage turn-on of the main switch is calculated based on the ratio of the input voltage to the output voltage, the output voltage value, and the parasitic output capacitance of the switching transistor. S33 calculates the theoretical timing of the synchronous tube's delayed conduction based on the inductor current's negative critical initial value, the current inductor parameters, the voltage difference between the input and output sides, and the switching period.

[0009] Based on the above technical solutions, preferably, step S4 includes the following sub-steps: S41, obtain the total link delay of the zero-crossing detection circuit, the total link delay including at least the current sensing delay, analog filtering delay, comparator response delay and digital controller sampling and calculation delay; S42, subtract the total link delay from the theoretical timing of the synchronous tube's turn-on delay to obtain the compensated synchronous tube's turn-on delay time; S43, the compensation synchro tube delay conduction time is limited; If the compensated synchronous tube delay conduction time is less than zero, then set it to zero or the minimum allowable value; If the compensated synchronous tube delay conduction time is greater than the preset maximum allowable threshold, then it is limited to the maximum allowable range to obtain the limited synchronous tube delay conduction time. S44 outputs the limited synchronous tube delay conduction time as the final synchronous tube drive timing quantity to the synchronous tube drive circuit to generate the synchronous tube drive signal.

[0010] Based on the above technical solutions, preferably, step S5 includes the following sub-steps: S51, based on the current operating status information, calculates the time from the start of resonance to the first zero voltage of the switching node through the resonant circuit, and obtains the basic lower limit value of the dead time; S52, after the junction capacitance of the switching transistor has completed charging and discharging, calculate the time it takes for the inductor current to rise back to zero based on the inductor current and inductor value at the end of resonance, and obtain the basic limit value of the dead time. S53, obtain the turn-on hardware delay and turn-off hardware delay of the switch, add the turn-off hardware delay to the basic lower limit of the dead time and then subtract the turn-off hardware delay to obtain the lower limit correction value of the dead time, and add the lower limit correction value of the dead time to the basic lower limit of the dead time to obtain the upper limit correction value of the dead time. S54, based on the current input and output voltages, inductor currents and commutation conditions of the bidirectional DC-DC converter, the controller calculates the output dead time timing value; S55, compare the dead time timing value with the lower limit correction value and the upper limit correction value of the dead time respectively; If the dead time timing value is less than the lower limit correction value of the dead time, then the dead time timing value is set to the lower limit correction value of the dead time. If the dead time timing value is greater than the dead time upper limit correction value, then the dead time timing value will be set to the dead time upper limit correction value. Otherwise, the dead time timing value is directly output, and the final output dead time timing value is used to generate the switching transistor drive signal.

[0011] Based on the above technical solutions, preferably, step S6 includes the following sub-steps: S61 monitors the voltage of the switching nodes of the main phase control unit in real time, and determines the actual switching cycle of the main phase control unit based on the time interval between two consecutive zero-crossing detections, which serves as the reference cycle for multi-phase synchronous control. S62, the slave phase control unit adjusts the corresponding time base generator parameters according to the actual switching cycle of the master phase control unit, so that the time base of the slave phase control unit is synchronized with the master phase time base; S63. The phase delay of each slave phase control unit is calculated by multiplying the actual switching cycle of the main phase control unit by the corresponding number of slave phases and then dividing by the number of phases of the multiphase interleaved parallel system. S64, the phase control unit adjusts the turn-on time of the switching transistor based on the phase delay of the corresponding number of slave phase control units on the basis of time base synchronization, so that each phase operates with a uniform staggered phase relationship.

[0012] Based on the above technical solutions, preferably, the method further includes updating the outer loop control error, PID control parameters, synchronous tube delay conduction time, dead time timing value, and phase delay parameters of the phase control unit at each control interruption cycle or zero-crossing detection refresh time, and outputting the corresponding drive control signal.

[0013] Secondly, the present invention also provides a TCM mode soft-switching control system for a multiphase interleaved parallel bidirectional DC-DC converter, implemented using a TCM mode soft-switching control method for a multiphase interleaved parallel bidirectional DC-DC converter, comprising: The acquisition module is used to acquire the status information of the bidirectional DC-DC converter during operation, preset the control target, compare the status information with the corresponding preset control target parameter values, and generate the outer loop control error. The PID parameter optimization module is used to optimize the PID controller parameters based on the outer loop control error and an improved whale optimization algorithm that integrates chaotic sequence initialization and nonlinear decay factor, so as to obtain the optimized PID controller and output the outer loop control quantity. The synchronization tube drive timing calculation module is used to obtain the outer loop control quantity and the collected status information, determine whether the current operating condition meets the natural zero voltage conduction condition, if not, calculate the critical negative current required to achieve zero voltage conduction, and calculate the theoretical timing quantity of the synchronization tube delay conduction based on the critical negative current; The correction and compensation module is used to obtain the total link delay of the zero-crossing detection circuit. Based on the difference between the theoretical timing amount of the synchronous tube delay and the compensation amount of the total link delay, the compensated synchronous tube delay conduction time is calculated, and the synchronous tube delay conduction time is limited to output the final synchronous tube drive timing amount, which is used to generate the synchronous tube drive signal. The dead time timing processing module is used to calculate the dead time timing amount based on the current state information. The upper limit of the dead time timing amount is constrained by the time constraint of the inductor current rising back to zero during the dead time, and the lower limit is constrained by the time constraint required for the commutation resonance to complete. The upper and lower limit constraints of the dead time timing amount are applied, and the final dead time timing amount is output to generate the drive signal of the switching transistor. The multi-phase synchronous operation control module is used to perform periodic synchronization and set phase delay for the other phases based on the actual switching cycle of the main phase, so that each phase operates with a uniform staggered phase relationship. The actual switching cycle of the main phase is determined by the zero-crossing detection signal of the main phase.

[0014] Thirdly, the present invention also provides a computer-readable storage medium storing a TCM mode soft-switching control method program for a multiphase interleaved parallel bidirectional DC-DC converter, wherein when the TCM mode soft-switching control method program for a multiphase interleaved parallel bidirectional DC-DC converter is executed, the TCM mode soft-switching control method for the multiphase interleaved parallel bidirectional DC-DC converter is implemented.

[0015] The TCM mode soft-switching control method based on a multiphase interleaved parallel bidirectional DC-DC converter of the present invention has the following advantages over the prior art: (1) The improved whale optimization algorithm is used to optimize the parameters of the PID controller, which can effectively find the optimal parameter combination. This allows the controller to balance fast dynamic response and small steady-state error under TCM non-fixed frequency operation conditions, making the output voltage or current more stable, thereby improving the steady-state performance of the system and improving the adaptability of the outer loop controller to changes in operating conditions. (2) By calculating the theoretical timing of the synchronous tube's delayed conduction based on the real-time operating conditions, the initial negative value of the inductor current before commutation can be adjusted in real time according to the changes in operating conditions, ensuring that suitable current conditions can be provided for the realization of soft switching under different operating conditions, thereby effectively expanding the scope of soft switching, reducing switching losses, and improving the efficiency of the converter. (3) By using ZCD to detect link delay compensation, the conduction time of the synchronizing tube can be determined more accurately, so that the inductor current reaches the required negative value at the appropriate time, thereby reducing the impact of zero-crossing judgment deviation on the control time of the synchronizing tube, effectively reducing the risk of soft switching failure, and improving the reliability of soft switching. (4) The dead time timing is calculated online based on the current input and output voltage, inductor current, and commutation conditions, and upper and lower limits are imposed on it according to the soft switching implementation conditions; so that the dead time can be adjusted in real time according to the changes in load, voltage, and commutation state, and thus the dead time can be dynamically adjusted according to the real-time operating conditions. Under the premise of ensuring the reliable implementation of soft switching, the dead time is minimized as much as possible to reduce conduction losses, thereby improving the overall efficiency of the system; (5) By using the actual switching cycle of the main phase as the synchronization reference, the remaining phases are periodically synchronized and the phase offset is set so that the output current of each phase is evenly distributed in time. After being superimposed, the output ripple can be effectively reduced and the stability of the output voltage or current can be improved. At the same time, the uniformly staggered phase relationship also helps to improve the operating stability of the parallel system, reduce the mutual interference between phases, and improve the reliability of the system. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 The flowchart is a process for the TCM mode soft-switching control method based on a multiphase interleaved parallel bidirectional DC-DC converter according to the present invention. Figure 2 This is the overall control block diagram of the TCM mode soft-switching control method based on a multiphase interleaved parallel bidirectional DC-DC converter of the present invention; Figure 3 The equivalent circuit diagram of the resonant process of the DC / DC converter in the dead time of the present invention is based on the TCM mode soft-switching control method of the multi-phase interleaved parallel bidirectional DC / DC converter. Figure 4 The diagram shows the main waveforms of the DC / DC converter implementing soft switching in TCM mode according to the TCM mode soft switching control method of the present invention based on a multi-phase interleaved parallel bidirectional DC / DC converter. Figure 5 The flowchart shows the PID parameter online optimization algorithm of the TCM mode soft-switching control method based on a multi-phase interleaved parallel bidirectional DC-DC converter of the present invention. Detailed Implementation

[0018] The technical solutions of the present invention will be clearly and completely described below with reference to the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0019] like Figure 2 As shown, this embodiment takes a three-phase interleaved parallel bidirectional DC / DC converter as an example to illustrate the TCM mode soft-switching control method of the present invention applicable to multi-phase interleaved parallel bidirectional DC / DC converters. The three-phase interleaved parallel bidirectional DC / DC converter includes a master phase power unit, a first slave phase power unit, and a second slave phase power unit. Each phase power unit is connected in parallel between the input side and the output side to realize bidirectional energy transfer between the DC bus and the energy storage battery. The bidirectional DC / DC converter operates in TCM mode, and its switching frequency is not fixed, but varies with the operating conditions such as input voltage, output voltage, and load current. Each switching cycle is determined by the zero-crossing detection signal ZCD of the inductor current.

[0020] Each phase has the same structure, including two switching transistors, one capacitor and one inductor. The two switching transistors in each phase work in a complementary manner, and bidirectional energy transfer is achieved by controlling the switching transistors to turn on and off. The capacitor is used to stabilize the input voltage of each phase and filter out high-frequency noise. The inductor plays the role of energy storage and filtering in the energy transfer process, and smooths the output current.

[0021] The input voltage is connected to the capacitors of each phase and the drain of switch S1. The source of switch S1 is connected to the drain of switch S2 and the inductor, respectively. L f One end of the inductor is connected to the ground, and the source of the switching transistor S2 is grounded; L f The other end is connected to the output capacitor. C o With load, the output voltage is V B .

[0022] Figure 3 The equivalent model of the bidirectional DC-DC converter with parasitic parameters mainly includes the input voltage source. V A Parasitic capacitance C ossH and C ossL Parasitic inductance L f and output voltage source V B .

[0023] The input voltage source provides the input energy to the converter, and its positive terminal is connected to the parasitic capacitance. C ossH The positive terminal is electrically connected, and the negative terminal is connected to the parasitic capacitance. C ossL Electrically connected to the negative terminal of the output voltage source; parasitic capacitance C ossH The negative terminals are respectively connected to the parasitic capacitance. C ossL Positive electrode and parasitic inductance L f Electrical connection; parasitic inductance L f The other end is electrically connected to the positive terminal of the output voltage source.

[0024] In this embodiment, the controller is implemented using a digital controller. The digital controller is connected to the voltage sampling circuit, the current sampling circuit, the ZCD detection circuit, and the phase drive circuits, and is used to collect the converter operating status and output the phase switch drive signals.

[0025] like Figure 1-5 As shown, in a first aspect, the present invention provides a TCM mode soft-switching control method for a multiphase interleaved parallel bidirectional DC-DC converter, comprising the following steps: S1 collects the status information of the bidirectional DC-DC converter during operation, presets the control target, compares the status information with the corresponding preset control target parameter values, and generates the outer loop control error.

[0026] The status information mentioned in step S1 includes at least the input side voltage, output side voltage, inductor current, inductor parameters of each phase, and parasitic output capacitance parameters of the switching transistors. The control target is set according to the operating conditions of the bidirectional DC-DC converter. When the bidirectional DC-DC converter operates in the condition of transferring energy from the bus to the energy storage side, the control target is the charging current. When the bidirectional DC-DC converter operates in the condition of transferring energy from the energy storage side to the bus side, the control target is the bus voltage.

[0027] It should be noted that the input voltage reflects the voltage level at the energy supply end, and its magnitude and stability directly affect the input power of the converter and the subsequent energy conversion process. For example, in the case of energy transfer from the bus to the energy storage side, the input voltage is the bus voltage, and its fluctuations may affect the stability of the charging current and the charging efficiency. By collecting the input voltage, the energy input situation can be understood in real time, providing basic data for subsequent control.

[0028] Output voltage is a key parameter for the energy output of the converter. When the bidirectional DC-DC converter operates in the condition of transferring energy from the bus to the energy storage side, the output voltage corresponds to the voltage of the energy storage device; when it operates in the condition of transferring energy from the energy storage side to the bus side, the output voltage is the bus voltage. Accurately acquiring the output voltage helps to determine whether the converter can transfer energy to the target end as required, and ensures the stability and quality of the output voltage.

[0029] Inductors play a crucial role in energy storage and filtering in bidirectional DC-DC converters. The magnitude and variation of inductor current directly reflect the energy flow state within the converter. By collecting inductor current data, the converter's operating status can be monitored in real time. Furthermore, inductor current is a key parameter for current control, directly affecting the converter's output characteristics and efficiency.

[0030] In a multiphase bidirectional DC-DC converter, the parameters of the inductors in each phase may differ to some extent. These differences can lead to unbalanced currents in each phase, thereby affecting the overall performance and efficiency of the converter. Collecting the inductor parameters of each phase can promptly detect changes and differences in the inductor parameters, providing a basis for subsequent equalization control, ensuring that each phase can evenly share the energy transmission task, and improving the reliability and stability of the converter.

[0031] The switching transistor is the core component of a bidirectional DC-DC converter. Its parasitic output capacitance has a significant impact on the switching characteristics of the converter. During the switching process, the charging and discharging of the parasitic output capacitance can lead to problems such as increased switching losses and increased switching noise, which affect the efficiency and electromagnetic compatibility of the converter.

[0032] The control target is set according to the different operating conditions of the bidirectional DC-DC converter. When the bus transfers energy to the energy storage side (charging condition), the main task of the bidirectional DC-DC converter is to transfer the energy on the bus to the energy storage device for storage. At this time, the control target is set as the charging current. By precisely controlling the magnitude and stability of the charging current, the charging process of the energy storage device can be optimized. When the energy storage side transfers energy to the bus side (discharging condition), the control target is set as the bus voltage. Maintaining the stability of the bus voltage is the key to ensuring the normal operation of the entire system. Because the bus usually connects multiple load devices, fluctuations in the bus voltage will affect the working performance and stability of the load devices. By controlling the output of the bidirectional DC-DC converter to keep the bus voltage within the set range, it is possible to ensure that the load devices receive a stable and reliable power supply.

[0033] During charging, the actual charging current is compared with the preset target value. If the actual charging current is greater than the target value, it indicates that the charging process may be too fast, which may cause the energy storage device to overheat or be damaged. In this case, the outer loop control error is negative, and the control system will adjust the converter control parameters according to this error signal to reduce the charging current. Conversely, if the actual charging current is less than the target value, it indicates that the charging process is slow, and the outer loop control error is positive. The control system will increase the charging current accordingly to bring it closer to the target value.

[0034] For discharge conditions, the actual bus voltage collected is compared with the preset target value of the bus voltage. If the actual bus voltage is higher than the target value, it indicates that the energy storage device is outputting too much energy, the outer loop control error is positive, and the control system will adjust the working state of the converter to reduce the energy output to the bus and lower the bus voltage. If the actual bus voltage is lower than the target value, it indicates that the energy storage device is outputting insufficient energy, the outer loop control error is negative, and the control system will increase the energy output to make the bus voltage rise back to the target value.

[0035] S2, based on the outer loop control error, the improved whale optimization algorithm that integrates chaotic sequence initialization and nonlinear decay factor is used to optimize the PID controller parameters to obtain the optimized PID controller, which is used to output the outer loop control quantity.

[0036] Step S2 includes the following sub-steps: S21, set the population size, maximum number of iterations and parameter search space boundary, and construct a three-dimensional search space by using the proportional coefficient, integral coefficient and derivative coefficient of the PID controller as variables to be optimized; S22, an initial population is generated by using chaotic mapping, and chaotic variables are mapped to a three-dimensional search space to generate the position vector of the individuals in the initial population. Each individual corresponds to a set of PID control parameter combinations. It should be noted that chaotic sequences have characteristics such as ergodicity, randomness, and regularity. Compared with traditional random initialization methods, they can make the initial population more evenly distributed in the search space, increasing the possibility of finding the global optimum.

[0037] Let the first i The first individual whale in the... t The position at the next iteration is: ;

[0038] In the formula, For the first i A number of candidate PID parameter combinations For the first i The individual in the first t The scaling factor corresponding to the next iteration. For the firsti The individual in the first t The integral coefficient corresponding to the next iteration. For the first i The individual in the first t The differential coefficients corresponding to the next iteration.

[0039] To improve the uniformity of the initial population distribution in the parameter space, a chaotic mapping is used to generate the initial population, and the chaotic variables are mapped to the PID parameter search interval, as expressed by: ; In the formula, For the first i The first individual j Initial values ​​for the dimension parameters, Let (0,1) be the chaotic variable in the interval (0,1). and These are the lower and upper limits of the corresponding parameters, respectively.

[0040] S23, Construct a fitness function, which includes dynamic performance indicators and steady-state performance indicators, used to quantitatively evaluate the control effect of each combination of PID control parameters; The fitness function is expressed as follows: ; In the formula, For the first i The individual in the first t Fitness value at the next iteration To control error, the upper limit of integration T e To evaluate the time window, For overshoot, To adjust the time, , , and The fitness value is a weighting coefficient; the smaller the fitness value, the better the control performance of the corresponding PID parameter combination.

[0041] S24, calculate the fitness value of each individual in the initial population based on the fitness function, and obtain the globally optimal individual with the smallest fitness value and the corresponding combination of PID control parameters; S25. During the iteration process, the convergence factor is updated according to the nonlinear decay strategy, and the contraction and expansion control coefficients, perturbation coefficients and random probabilities are updated simultaneously. It should be noted that a nonlinear decay strategy is used to update the convergence factor. In the whale optimization algorithm, the convergence factor controls the search range and convergence speed. The nonlinear decay strategy allows the convergence factor to be larger in the early stages of iteration, which is beneficial for the algorithm to perform a global search and expand the search range; and smaller in the later stages of iteration, which is beneficial for the algorithm to perform a fine-grained local search and accelerate the convergence speed. The expression is: ; In the formula, For the first t The nonlinear convergence factor at the next iteration Let m be the maximum number of iterations, and m be the nonlinear adjustment coefficient. m >1.

[0042] The expression for the contraction and expansion control coefficient is: A = 2αr1 - α; In the formula, A is the contraction and expansion control coefficient, and r1 is a random number between [0,1].

[0043] The expression for the disturbance coefficient is: C=2r²; In the formula, C is the perturbation coefficient, and r2 is a random number between [0,1]. random probability p It is a random number between [0,1].

[0044] S26, For each individual, compare the random probability with the first judgment threshold; When the random probability is less than the first judgment threshold, the absolute value of the contraction and expansion control coefficient is compared with the second judgment threshold. If the magnitude of the coefficient vector is not greater than the second judgment threshold, the contraction and encirclement update mechanism is adopted to update the position of the current population individual. If the magnitude of the coefficient vector is greater than the second judgment threshold, a random search update mechanism is used to update the position of the current population individual. When the random probability is not less than the first judgment threshold, the spiral bubble network update mechanism is used to update the current population individual positions and obtain the updated population. Specifically, when random probability p When |A| < 0.5, if |A| ≤ 1, then the shrinking encirclement update mechanism is used to update the current population individual position. The position update formula is: ; In the formula, For the first t The globally optimal individual position at the next iteration.

[0045] When random probability pWhen |A| < 0.5, if |A| > 1, a random search update mechanism is used to update the current population individual position. In this case, the individual performs a random search in the search space to increase search diversity and avoid getting trapped in local optima. The position update formula is: ; In the formula, X rand (t) is the th t In the next iteration, an individual is randomly selected from the population.

[0046] When random probability p When the value is greater than 0.5, a spiral bubble web update mechanism is used to update the current population individual positions, resulting in an updated population. This mechanism simulates the spiraling bubble web behavior of whales during predation, causing individuals to move towards the globally optimal individual along a spiral path in the search space. It possesses both a certain global search capability and the ability to perform local fine-tuning. The position update formula is as follows: ; In the formula, b The constant for the spiral shape. l It is a random variable whose value range is [-1, 1].

[0047] S27. Based on the pre-set parameter search space boundary, the position of individuals in the updated population is constrained by the boundary, and the fitness value of each individual in the population after boundary constraint is calculated. The fitness value of each individual is compared with the fitness value of the current global best individual. If there is a better individual, the global best individual and the corresponding PID control parameter combination are updated. S28. When the preset maximum number of iterations is reached, the iteration is terminated, and the proportional coefficient, integral coefficient and derivative coefficient corresponding to the finally obtained global optimal individual are output to the PID controller to generate the outer loop control quantity.

[0048] In this embodiment, the PID controller parameters are optimized based on the improved whale optimization algorithm, which can effectively find the optimal parameter combination, so that the controller can still take into account both fast dynamic response and small steady-state error under TCM non-fixed frequency operation conditions.

[0049] S3: Obtain the outer loop control quantity and the collected status information, determine whether the current operating condition meets the natural zero voltage conduction condition, if not, calculate the critical negative current required to achieve zero voltage conduction, and calculate the theoretical timing quantity of the synchronous tube delay conduction based on the critical negative current.

[0050] Step S3 includes the following sub-steps: S31: Collect the current operating status information of the bidirectional DC-DC converter and obtain the outer loop control quantity to determine the current power transmission direction and target current requirement; S32, based on the ratio of the input voltage to the output voltage, determine whether the current operating condition meets the conditions for naturally achieving zero-voltage turn-on; If the input voltage is less than twice the output voltage, the voltage resonance of the switching node can naturally reach zero voltage without additional adjustment of the negative current, and the theoretical timing of the synchronous tube's delayed conduction is set to zero. If the input voltage is greater than or equal to twice the output voltage, then the critical initial value of the inductor current required to achieve zero-voltage turn-on of the main switch is calculated based on the ratio of the input voltage to the output voltage, the output voltage value, and the parasitic output capacitance of the switching transistor. S33 calculates the theoretical timing of the synchronous tube's delayed conduction based on the inductor current's negative critical initial value, the current inductor parameters, the voltage difference between the input and output sides, and the switching period.

[0051] It should be noted that, in this embodiment, based on the outer loop control quantity and the real-time sampling signal, the synchronous tube delay conduction timing quantity required for soft switching is generated online. The synchronous tube delay conduction timing quantity is used to adjust the negative initial value of the inductor current before commutation, so that the switching node in the dead zone can complete the voltage transition by relying on the resonance process, thereby realizing the zero-voltage conduction of the main switch or synchronous switch.

[0052] The timing of the synchronous tube's delayed conduction is calculated based on the current operating conditions of the converter. The calculation is based on the input voltage, output voltage, inductor current, inductor parameters, and the power transmission requirements corresponding to the control target.

[0053] Based on the high-voltage side voltage V of this DC / DC converter operating at its rated power. A Low-voltage side voltage V B Switch S H With lower tube S L and the corresponding MOSFET parasitic output capacitor C ossH With C ossL The capacitance values ​​are all C. oss The inductance value of the output inductor is L. f The inductor current and lower transistor voltage of the DC / DC converter are mathematically derived to obtain the lower transistor voltage and inductor current.

[0054] The expression for calculating the voltage of the lower tube is: ; In the formula, V dsl0_buck This is the initial voltage value of the lower MOSFET, with an initial value of 0.

[0055] The expression for calculating inductor current is: ; In the formula, iL_0_buck This is the initial value of the inductor current, which is 0.

[0056] To achieve soft switching in the DC / DC converter, a zero-voltage switching (ZVS) condition determination is performed.

[0057] Based on the expression for the lower transistor voltage, it can be deduced that when the initial value of the inductor current is zero, the maximum value of the lower transistor voltage is equal to twice V. B Therefore, when V A <2*V B At that time, the voltage of the lower tube is 2*V B Greater than the high-voltage side voltage V A Upper tube voltage V dsH It can reach 0V, that is, naturally achieve ZVS; while when V A >2*V B At that time, the voltage of the lower tube is 2*V B Lower than the high-voltage side voltage V A That is, the voltage of the upper tube V dsH If the voltage is greater than 0V, ZVS cannot be achieved naturally; the constraint conditions for achieving ZVS on the upper transistor are: ; In the formula, let the voltage across the lower tube be equal to the voltage across the high-voltage side, V. A It can be transformed into: ; Therefore, let m1 = V A / V B The critical initial current value required for ZVS can be obtained. The expression is: ; The required critical initial current value refers to the inductor current at which the current reaches a critical initial value. t 0 Current value at time It requires delaying the turn-on of the synchronous switch S. H To achieve this, the theoretical timing delay of the corresponding synchronous tube's on-time is calculated using the following expression: ; In the formula, t on_extend This is the theoretical timing quantity for the delay of the synchronous tube's conduction.

[0058] In TCM mode, the inductor current changes in a triangular wave pattern. Soft switching is achieved by the resonant commutation process of the switching node during the dead zone. If the timing of the synchronizing transistor's turn-on is set appropriately, the inductor current can have an appropriate negative initial value before the commutation begins, thus enabling the main switch to achieve zero-voltage conduction at the moment of turn-on. If the synchronizing transistor turns on too early or too late, the negative current peak may be too large or too small, which will deteriorate the soft switching conditions or even cause the soft switch to fail.

[0059] Therefore, unlike the fixed conduction delay method, this embodiment calculates the synchronous tube conduction delay timing online based on information such as input voltage, output voltage, inductor current, outer loop control quantity, and device parameters, and updates it at each control interruption and / or each ZCD refresh time to ensure that the initial negative value of the inductor current before commutation can be adaptively adjusted according to the operating conditions.

[0060] S4. Obtain the total link delay of the zero-crossing detection circuit. Based on the difference between the theoretical timing amount of the synchronous tube delay and the compensation amount of the total link delay, calculate the compensated synchronous tube delay conduction time, and perform amplitude limiting processing on the synchronous tube delay conduction time to output the final synchronous tube drive timing amount, which is used to generate the synchronous tube drive signal. Since the ZCD signal is not an ideal instantaneous signal, there is usually a detection link delay in actual detection and processing. This delay may originate from the current sensor, analog filter circuit, comparator response time, controller sampling time, and delays in digital calculation and drive update. If this delay is not compensated for, the zero-crossing moment of the inductor current detected by the controller will lag behind the actual zero-crossing moment, which will cause a deviation in the timing of the synchronous tube's delayed conduction, resulting in a shift in the negative current peak and a shift in the soft-switching window.

[0061] Therefore, in this embodiment, when generating the synchronization tube delay conduction timing amount, the ZCD detection link delay is further compensated. Specifically, step S4 includes the following sub-steps: S41, obtain the total link delay of the zero-crossing detection circuit, the total link delay including at least the current sensing delay, analog filtering delay, comparator response delay and digital controller sampling and calculation delay; S42, subtract the total link delay from the theoretical timing of the synchronous tube's turn-on delay to obtain the compensated synchronous tube's turn-on delay time; S43, the compensation synchro tube delay conduction time is limited; If the compensated synchronous tube delay conduction time is less than zero, then set it to zero or the minimum allowable value; If the compensated synchronous tube delay conduction time is greater than the preset maximum allowable threshold, then it is limited to the maximum allowable range to obtain the limited synchronous tube delay conduction time. S44 outputs the limited synchronous tube delay conduction time as the final synchronous tube drive timing quantity to the synchronous tube drive circuit to generate the synchronous tube drive signal.

[0062] It should be noted that, due to the link delay in the detection and processing of the ZCD signal, it is necessary to compensate for the ZCD detection link delay and correct the theoretical timing of the synchronous tube conduction delay based on the compensation result.

[0063] The ZCD detection link delay includes at least one or more of the following: current sensing delay, analog filtering delay, comparator response delay, digital controller sampling delay, and controller operation and drive update delay. When compensating for the ZCD detection link delay, a delay compensation amount is introduced on the basis of the uncompensated synchronous tube delay conduction timing amount to obtain the compensated synchronous tube delay conduction timing amount. Furthermore, a limiting constraint can be applied to the compensated synchronous tube delay conduction timing amount to ensure that the compensation result is within the effective control range. The ZCD detection link delay is calibrated through the factory test of the bidirectional DC / DC converter, or it can be obtained through online estimation or table lookup during operation.

[0064] ZCD detection link delay will cause the synchronous tube to turn off at a later time than ideal. The inductor current decreases over a longer period, resulting in a larger negative peak value. The turn-off time of the main control transistor is... Therefore, the negative peak change caused by the delay time The expression is: ; To ensure stable output current or output voltage, the controller's output will increase. To extend the main control period The conduction time, under steady-state conditions, is a constant value, while the increment of the forward peak current is a constant. The expression is: ; The negative peak change and the positive peak current increment change with the input voltage, output voltage and delay time will increase the inductor current ripple, thereby increasing the output current ripple, increasing the inductor loss and generating additional conduction losses.

[0065] Therefore, considering the ZCD delay, compensation is made for the theoretical timing of the synchronous tube's conduction delay. The ZCD delay extends the conduction time of the synchronous tube. Thus, the delay time is subtracted from the originally calculated theoretical timing of the synchronous tube's conduction delay to make the actual extended conduction time closer to the ideal situation. The expression is as follows: ; In the formula, tdelayT The compensated synchronous tube delay conduction time, t delay This represents the total link delay.

[0066] Therefore, the ZCD detection link delay compensation value is calculated online. The expression is: ; By compensating for the ZCD detection link delay, the impact of zero-crossing determination offset on the synchronous tube turn-on time can be reduced, the negative current peak deviation before commutation can be reduced, the robustness of soft switching implementation can be improved, and the risk of soft switching failure due to ZCD determination delay can be avoided.

[0067] To ensure the effectiveness of the control results, in this embodiment, the controller also applies a limiting constraint to the compensated synchronous tube delay conduction timing. When the compensated timing is less than zero, it is set to zero or limited to the minimum allowable value; when the compensated timing exceeds the upper allowable value, it is limited to the maximum allowable value. Through the above processing, the zero-crossing judgment offset caused by ZCD detection link delay can be avoided, the accuracy of synchronous tube delay conduction control can be improved, and the consistency and robustness of soft switching implementation can be enhanced.

[0068] S5. Calculate the dead time timing value based on the current state information. The upper limit of the dead time timing value is constrained by the time it takes for the inductor current to rise back to zero during the dead period, and the lower limit is constrained by the time required for the commutation resonance to complete. The upper and lower limits of the dead time timing value are constrained, and the final dead time timing value is output to generate the drive signal for the switching transistor.

[0069] Besides the timing of the synchronous transistor's turn-on delay, the dead time is also a crucial parameter determining whether soft switching can be reliably implemented. During converter switching, if the dead time is too small, the switching node may not have completed the voltage resonance transition, preventing subsequent devices from achieving zero-voltage turn-on. If the dead time is too large, it will increase the conduction duration of the body diode, resulting in additional conduction losses and current stress.

[0070] Therefore, in this embodiment, the controller calculates the dead time timing online based on the current input / output voltage, inductor current, and commutation conditions, and applies upper and lower limit constraints to it according to the soft-switching implementation conditions. Specifically, step S5 includes the following sub-steps: S51, based on the current operating status information, calculates the time from the start of resonance to the first zero voltage of the switching node through the resonant circuit, and obtains the basic lower limit value of the dead time; S52, after the junction capacitance of the switching transistor has completed charging and discharging, calculate the time it takes for the inductor current to rise back to zero based on the inductor current and inductor value at the end of resonance, and obtain the basic limit value of the dead time. S53, obtain the turn-on hardware delay and turn-off hardware delay of the switch, add the turn-off hardware delay to the basic lower limit of the dead time and then subtract the turn-off hardware delay to obtain the lower limit correction value of the dead time, and add the lower limit correction value of the dead time to the basic lower limit of the dead time to obtain the upper limit correction value of the dead time. S54, based on the current input and output voltages, inductor currents and commutation conditions of the bidirectional DC-DC converter, the controller calculates the output dead time timing value; S55, compare the dead time timing value with the lower limit correction value and the upper limit correction value of the dead time respectively; If the dead time timing value is less than the lower limit correction value of the dead time, then the dead time timing value is set to the lower limit correction value of the dead time. If the dead time timing value is greater than the dead time upper limit correction value, then the dead time timing value will be set to the dead time upper limit correction value. Otherwise, the dead time timing value is directly output, and the final output dead time timing value is used to generate the switching transistor drive signal.

[0071] It should be noted that, to balance reliable soft-switching with loss optimization, upper and lower limits are imposed on the dead-time timing value to ensure it remains within the effective range required for soft-switching. The dead-time timing value is used to ensure sufficient resonant commutation time during switching to prevent shoot-through of the upper and lower bridge arms and to create conditions for zero-voltage turn-on. The dead-time timing value is not a fixed value but is calculated online and dynamically adjusted based on current operating conditions, allowing it to change with input / output voltage and load variations.

[0072] The lower limit of the dead time is determined by the minimum time required for the switching node to complete resonant commutation. This ensures that the dead time is not less than the time required for commutation to be completed, thus avoiding zero-voltage conduction failure due to insufficient dead time. The upper limit of the dead time is determined by the time required for the inductor current to rise back to zero during the dead time. This prevents the dead time from being too large, which would lead to excessively long conduction time of the body diode, increased current stress, and increased additional losses. The controller first calculates the theoretical dead time online based on the current operating conditions, and then limits it between the upper and lower limits to obtain the final adaptive dead time timing value used to drive the output.

[0073] Specifically, to calculate the dead time timing, we first calculate the time from the start of resonance to the first ZVS point, based on the critical value of the constraint conditions for achieving ZVS on the upper tube. Substituting these values ​​into the calculation expressions for the lower diode voltage and the inductor current, the time corresponding to the start of resonance and the first ZVS point can be accurately calculated. t res As shown in the following formula: ; Next, calculate the time t from the completion of the charging and discharging of the MOSFET junction capacitance to the resonance of the inductor current to 0A. zc After resonance is complete, the inductor voltage is V. A -V B The direction is the inductor output direction, and t is the end of resonance. res The corresponding inductor current value is The time corresponding to this inductor discharge phase is: ; Based on this, the upper and lower limits of the dead time correction value can be theoretically calculated, and the expression is: ; In the formula, This is the lower limit correction value for dead time. This is the dead time limit adjustment value. The hardware delay for the switching transistor to turn on. This refers to the hardware delay for turning off the switching transistor.

[0074] The controller calculates the dead time timing online based on the current input and output voltage, inductor current, and commutation conditions, and applies upper and lower limit constraints to it according to the soft switching implementation conditions. In this way, the dead time is no longer a fixed value, but can be adjusted in real time according to changes in load, voltage, and commutation state, thereby maintaining a better soft switching effect and lower losses under different operating conditions.

[0075] S6, using the actual switching cycle of the main phase as the synchronization reference, periodically synchronize the remaining phases and set the phase offset, so that each phase can operate stably under non-fixed frequency conditions with a preset interleaved phase relationship. The actual switching cycle of the main phase is determined by the zero-crossing detection signal of the main phase.

[0076] Step S6 includes the following sub-steps: S61 monitors the voltage of the switching nodes of the main phase control unit in real time, and determines the actual switching cycle of the main phase control unit based on the time interval between two consecutive zero-crossing detections, which serves as the reference cycle for multi-phase synchronous control. S62, the slave phase control unit adjusts the corresponding time base generator parameters according to the actual switching cycle of the master phase control unit, so that the time base of the slave phase control unit is synchronized with the master phase time base; S63. The phase delay of each slave phase control unit is calculated by multiplying the actual switching cycle of the main phase control unit by the corresponding number of slave phases and then dividing by the number of phases of the multiphase interleaved parallel system. S64, the phase control unit adjusts the turn-on time of the switching transistor based on the phase delay of the corresponding number of slave phase control units on the basis of time base synchronization, so that each phase operates with a uniform staggered phase relationship.

[0077] In this embodiment, the multiphase interleaved synchronization control adopts a master-slave structure, including one master phase and at least one slave phase, specifically including: detecting the actual switching cycle of the master phase in the previous cycle. Ts It captures the time interval between two adjacent rising edges of the main phase PWM wave through the eCAP module of the control chip, calculates the period value of the main phase PWM wave in the current cycle, and converts the actual switching cycle... Ts Synchronize with each slave phase to ensure that each slave phase operates at the same frequency as the master phase.

[0078] Based on the number of parallel phases N Set the phase offset of each slave phase relative to the master phase, the first... k Phase delay of each phase T dk for: ,(in k =1,2,…, N -1) By means of the above method, the multiphase power units can still maintain uniform interleaved operation under the non-fixed frequency operation condition of TCM, thereby effectively reducing the input and output current ripple, improving the current sharing characteristics of the parallel system, and improving the system stability and power expansion capability.

[0079] Specifically, the controller detects the preceding switching cycle of the master phase. Ts The period value is synchronized to the two slave phases, ensuring they operate at the same frequency as the master phase. Based on this, phase delays are set for the first and second slave phases relative to the master phase. Specifically, the phase delay of the first slave phase... T dk1 Set as: Phase delay of the second phase T dk2 Set as: .

[0080] This allows the three-phase power units to operate in a uniformly staggered phase relationship of 0°, 120°, and 240°, respectively.

[0081] Since the main phase period in this embodiment is refreshed in real time by the ZCD, the three-phase interleaving synchronization is not based on a fixed frequency clock, but on the real-time operating cycle of the main phase for dynamic synchronization. This method can maintain a stable three-phase uniform interleaving relationship under the non-fixed frequency operation condition of the TCM, avoid interleaving mismatch caused by frequency drift or operating condition differences of each phase, thereby effectively reducing input and output current ripple, improving the current sharing performance of the parallel system and improving the overall stability of the system.

[0082] This embodiment also includes updating the outer loop control error, PID control parameters, synchronous tube delay conduction time, dead time timing value, and phase delay parameters of the phase control unit at each control interruption cycle or zero-crossing detection refresh time, and outputting the corresponding drive control signal.

[0083] Through the above-described cyclic control process, the three-phase interleaved parallel bidirectional DC / DC converter can maintain its soft-switching capability and stable interleaving synchronization effect in TCM mode under conditions of input voltage fluctuations, load changes, and bidirectional power flow switching.

[0084] Secondly, the present invention also provides a TCM mode soft-switching control system for a multiphase interleaved parallel bidirectional DC-DC converter, implemented using a TCM mode soft-switching control method for a multiphase interleaved parallel bidirectional DC-DC converter, comprising: The acquisition module is used to acquire the status information of the bidirectional DC-DC converter during operation, preset the control target, compare the status information with the corresponding preset control target parameter values, and generate the outer loop control error. The PID parameter optimization module is used to optimize the PID controller parameters based on the outer loop control error and an improved whale optimization algorithm that integrates chaotic sequence initialization and nonlinear decay factor, so as to obtain the optimized PID controller and output the outer loop control quantity. The synchronization tube drive timing calculation module is used to obtain the outer loop control quantity and the collected status information, determine whether the current operating condition meets the natural zero voltage conduction condition, if not, calculate the critical negative current required to achieve zero voltage conduction, and calculate the theoretical timing quantity of the synchronization tube delay conduction based on the critical negative current; The correction and compensation module is used to obtain the total link delay of the zero-crossing detection circuit. Based on the difference between the theoretical timing amount of the synchronous tube delay and the compensation amount of the total link delay, the compensated synchronous tube delay conduction time is calculated, and the synchronous tube delay conduction time is limited to output the final synchronous tube drive timing amount, which is used to generate the synchronous tube drive signal. The dead time timing processing module is used to calculate the dead time timing amount based on the current state information. The upper limit of the dead time timing amount is constrained by the time constraint of the inductor current rising back to zero during the dead time, and the lower limit is constrained by the time constraint required for the commutation resonance to complete. The upper and lower limit constraints of the dead time timing amount are applied, and the final dead time timing amount is output to generate the drive signal of the switching transistor. The multi-phase synchronous operation control module is used to perform periodic synchronization and set phase delay for the other phases based on the actual switching cycle of the main phase, so that each phase operates with a uniform staggered phase relationship. The actual switching cycle of the main phase is determined by the zero-crossing detection signal of the main phase.

[0085] It should be noted that this system corresponds to the TCM mode soft-switching control method based on a multi-phase interleaved parallel bidirectional DC-DC converter mentioned above. All implementation methods in the above method embodiments are applicable to the embodiments of this system and can achieve the same technical effect.

[0086] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0087] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working process of the system and modules described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0088] In the embodiments provided by this invention, it should be understood that the disclosed systems and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0089] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0090] In addition, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0091] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, essentially, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, ROM, RAM, magnetic disks, or optical disks.

[0092] Furthermore, it should be noted that in the system and method of the present invention, it is obvious that the components or steps can be decomposed and / or recombined. These decompositions and / or recombinations should be considered equivalent solutions of the present invention. Moreover, the steps performing the above series of processes can naturally be executed in the order described, but are not necessarily required to be executed in chronological order; some steps can be executed in parallel or independently of each other. Those skilled in the art will understand that all or any step or component of the method and apparatus of the present invention can be implemented in any computing device (including processors, storage media, etc.) or network of computing devices, in hardware, firmware, software, or a combination thereof. This is something that those skilled in the art can achieve by using their basic programming skills after reading the description of the present invention.

[0093] Therefore, the object of the present invention can also be achieved by running a program or a set of programs on any computing system. The computing system can be a known general-purpose system. Therefore, the object of the present invention can also be achieved simply by providing a program product containing program code implementing the method or apparatus. That is, such a program product also constitutes the present invention, and the storage medium storing such a program product also constitutes the present invention. Obviously, the storage medium can be any known storage medium or any storage medium developed in the future. It should also be noted that in the apparatus and method of the present invention, it is obvious that the components or steps can be decomposed and / or recombined. These decompositions and / or recombinations should be considered equivalent to the present invention. Furthermore, the steps performing the above series of processes can naturally be performed in the order described, but are not necessarily required to be performed in chronological order. Some steps can be performed in parallel or independently of each other.

[0094] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A TCM mode soft-switching control method for a multiphase interleaved parallel bidirectional DC-DC converter, characterized in that, Includes the following steps: S1: Collect the status information of the bidirectional DC-DC converter during operation, preset the control target, compare the status information with the corresponding preset control target parameter values, and generate the outer loop control error; S2, based on the outer loop control error, the improved whale optimization algorithm that integrates chaotic sequence initialization and nonlinear decay factor is used to optimize the PID controller parameters to obtain the optimized PID controller, which is used to output the outer loop control quantity. S3: Obtain the outer loop control quantity and the collected status information, determine whether the current operating condition meets the natural zero voltage conduction condition, if not, calculate the critical negative current required to achieve zero voltage conduction, and calculate the theoretical timing quantity of the synchronous tube delay conduction based on the critical negative current; S4. Obtain the total link delay of the zero-crossing detection circuit. Based on the difference between the theoretical timing amount of the synchronous tube delay and the compensation amount of the total link delay, calculate the compensated synchronous tube delay conduction time, and perform amplitude limiting processing on the synchronous tube delay conduction time to output the final synchronous tube drive timing amount, which is used to generate the synchronous tube drive signal. S5. Calculate the dead time timing value based on the current state information. The upper limit of the dead time timing value is constrained by the time when the inductor current rises back to zero during the dead period, and the lower limit is constrained by the time required for the commutation resonance to complete. The upper and lower limits of the dead time timing value are constrained, and the final dead time timing value is output to generate the drive signal of the switching transistor. S6, using the actual switching cycle of the main phase as the synchronization reference, periodically synchronize the remaining phases and set the phase offset, so that each phase can operate stably under non-fixed frequency conditions with a preset interleaved phase relationship. The actual switching cycle of the main phase is determined by the zero-crossing detection signal of the main phase.

2. The TCM mode soft-switching control method for a multiphase interleaved parallel bidirectional DC-DC converter as described in claim 1, characterized in that, The status information mentioned in step S1 includes at least the input side voltage, output side voltage, inductor current, inductor parameters of each phase, and parasitic output capacitance parameters of the switching transistors. The control target is set according to the operating conditions of the bidirectional DC-DC converter. When the bidirectional DC-DC converter operates in the condition of transferring energy from the bus to the energy storage side, the control target is the charging current. When the bidirectional DC-DC converter operates in the condition of transferring energy from the energy storage side to the bus side, the control target is the bus voltage.

3. The TCM mode soft-switching control method for a multiphase interleaved parallel bidirectional DC-DC converter as described in claim 2, characterized in that, Step S2 includes the following sub-steps: S21, set the population size, maximum number of iterations and parameter search space boundary, and construct a three-dimensional search space by using the proportional coefficient, integral coefficient and derivative coefficient of the PID controller as variables to be optimized; S22, an initial population is generated by using chaotic mapping, and chaotic variables are mapped to a three-dimensional search space to generate the position vector of the individuals in the initial population. Each individual corresponds to a set of PID control parameter combinations. S23, Construct a fitness function, which includes dynamic performance indicators and steady-state performance indicators, used to quantitatively evaluate the control effect of each combination of PID control parameters; S24, calculate the fitness value of each individual in the initial population based on the fitness function, and obtain the globally optimal individual with the smallest fitness value and the corresponding combination of PID control parameters; S25. During the iteration process, the convergence factor is updated according to the nonlinear decay strategy, and the contraction and expansion control coefficients, perturbation coefficients and random probabilities are updated simultaneously. S26, For each individual, compare the random probability with the first judgment threshold; When the random probability is less than the first judgment threshold, the absolute value of the contraction and expansion control coefficient is compared with the second judgment threshold. If the magnitude of the coefficient vector is not greater than the second judgment threshold, the contraction and encirclement update mechanism is adopted to update the position of the current population individual. If the magnitude of the coefficient vector is greater than the second judgment threshold, a random search update mechanism is used to update the position of the current population individual. When the random probability is not less than the first judgment threshold, the spiral bubble network update mechanism is used to update the current population individual positions and obtain the updated population. S27. Based on the pre-set parameter search space boundary, the position of individuals in the updated population is constrained by the boundary, and the fitness value of each individual in the population after boundary constraint is calculated. The fitness value of each individual is compared with the fitness value of the current global best individual. If there is a better individual, the global best individual and the corresponding PID control parameter combination are updated. S28. When the preset maximum number of iterations is reached, the iteration is terminated, and the proportional coefficient, integral coefficient and derivative coefficient corresponding to the finally obtained global optimal individual are output to the PID controller to generate the outer loop control quantity.

4. The TCM mode soft-switching control method for a multiphase interleaved parallel bidirectional DC-DC converter as described in claim 3, characterized in that, Step S3 includes the following sub-steps: S31: Collect the current operating status information of the bidirectional DC-DC converter and obtain the outer loop control quantity to determine the current power transmission direction and target current requirement; S32, based on the ratio of the input voltage to the output voltage, determine whether the current operating condition meets the conditions for naturally achieving zero-voltage turn-on; If the input voltage is less than twice the output voltage, the voltage resonance of the switching node can naturally reach zero voltage without additional adjustment of the negative current, and the theoretical timing of the synchronous tube's delayed conduction is set to zero. If the input voltage is greater than or equal to twice the output voltage, then the critical initial value of the inductor current required to achieve zero-voltage turn-on of the main switch is calculated based on the ratio of the input voltage to the output voltage, the output voltage value, and the parasitic output capacitance of the switching transistor. S33 calculates the theoretical timing of the synchronous tube's delayed conduction based on the inductor current's negative critical initial value, the current inductor parameters, the voltage difference between the input and output sides, and the switching period.

5. The TCM mode soft-switching control method for a multiphase interleaved parallel bidirectional DC-DC converter as described in claim 4, characterized in that, Step S4 includes the following sub-steps: S41, obtain the total link delay of the zero-crossing detection circuit, the total link delay including at least the current sensing delay, analog filtering delay, comparator response delay and digital controller sampling and calculation delay; S42, subtract the total link delay from the theoretical timing of the synchronous tube's turn-on delay to obtain the compensated synchronous tube's turn-on delay time; S43, the compensation synchro tube delay conduction time is limited; If the compensated synchronous tube delay conduction time is less than zero, then set it to zero or the minimum allowable value; If the compensated synchronous tube delay conduction time is greater than the preset maximum allowable threshold, then it is limited to the maximum allowable range to obtain the limited synchronous tube delay conduction time. S44 outputs the limited synchronous tube delay conduction time as the final synchronous tube drive timing quantity to the synchronous tube drive circuit to generate the synchronous tube drive signal.

6. The TCM mode soft-switching control method for a multiphase interleaved parallel bidirectional DC-DC converter as described in claim 5, characterized in that, Step S5 includes the following sub-steps: S51, based on the current operating status information, calculates the time from the start of resonance to the first zero voltage of the switching node through the resonant circuit, and obtains the basic lower limit value of the dead time; S52, after the junction capacitance of the switching transistor has completed charging and discharging, calculate the time it takes for the inductor current to rise back to zero based on the inductor current and inductor value at the end of resonance, and obtain the basic limit value of the dead time. S53, obtain the turn-on hardware delay and turn-off hardware delay of the switch, add the turn-off hardware delay to the basic lower limit of the dead time and then subtract the turn-off hardware delay to obtain the lower limit correction value of the dead time, and add the lower limit correction value of the dead time to the basic lower limit of the dead time to obtain the upper limit correction value of the dead time. S54, based on the current input and output voltages, inductor currents and commutation conditions of the bidirectional DC-DC converter, the controller calculates the output dead time timing value; S55, compare the dead time timing value with the lower limit correction value and the upper limit correction value of the dead time respectively; If the dead time timing value is less than the lower limit correction value of the dead time, then the dead time timing value is set to the lower limit correction value of the dead time. If the dead time timing value is greater than the dead time upper limit correction value, then the dead time timing value will be set to the dead time upper limit correction value. Otherwise, the dead time timing value is directly output, and the final output dead time timing value is used to generate the switching transistor drive signal.

7. The TCM mode soft-switching control method for a multiphase interleaved parallel bidirectional DC-DC converter as described in claim 6, characterized in that, Step S6 includes the following sub-steps: S61 monitors the voltage of the switching nodes of the main phase control unit in real time, and determines the actual switching cycle of the main phase control unit based on the time interval between two consecutive zero-crossing detections, which serves as the reference cycle for multi-phase synchronous control. S62, the slave phase control unit adjusts the corresponding time base generator parameters according to the actual switching cycle of the master phase control unit, so that the time base of the slave phase control unit is synchronized with the master phase time base; S63. The phase delay of each slave phase control unit is calculated by multiplying the actual switching cycle of the main phase control unit by the corresponding number of slave phases and then dividing by the number of phases of the multiphase interleaved parallel system. S64, the phase control unit adjusts the turn-on time of the switching transistor based on the phase delay of the corresponding number of slave phase control units on the basis of time base synchronization, so that each phase operates with a uniform staggered phase relationship.

8. The TCM mode soft-switching control method for a multiphase interleaved parallel bidirectional DC-DC converter as described in claim 7, characterized in that, It also includes updating the outer loop control error, PID control parameters, synchronous tube delay conduction time, dead time timing value and phase delay parameters of the phase control unit at each control interruption cycle or zero-crossing detection refresh time, and outputting the corresponding drive control signal.

9. A TCM mode soft-switching control system for a multiphase interleaved parallel bidirectional DC-DC converter, implemented using the TCM mode soft-switching control method for a multiphase interleaved parallel bidirectional DC-DC converter as described in any one of claims 1-8, characterized in that, include: The acquisition module is used to acquire the status information of the bidirectional DC-DC converter during operation, preset the control target, compare the status information with the corresponding preset control target parameter values, and generate the outer loop control error. The PID parameter optimization module is used to optimize the PID controller parameters based on the outer loop control error and an improved whale optimization algorithm that integrates chaotic sequence initialization and nonlinear decay factor, so as to obtain the optimized PID controller and output the outer loop control quantity. The synchronization tube drive timing calculation module is used to obtain the outer loop control quantity and the collected status information, determine whether the current operating condition meets the natural zero voltage conduction condition, if not, calculate the critical negative current required to achieve zero voltage conduction, and calculate the theoretical timing quantity of the synchronization tube delay conduction based on the critical negative current; The correction and compensation module is used to obtain the total link delay of the zero-crossing detection circuit. Based on the difference between the theoretical timing amount of the synchronous tube delay and the compensation amount of the total link delay, the compensated synchronous tube delay conduction time is calculated, and the synchronous tube delay conduction time is limited to output the final synchronous tube drive timing amount, which is used to generate the synchronous tube drive signal. The dead time timing processing module is used to calculate the dead time timing amount based on the current state information. The upper limit of the dead time timing amount is constrained by the time constraint of the inductor current rising back to zero during the dead time, and the lower limit is constrained by the time constraint required for the commutation resonance to complete. The upper and lower limit constraints of the dead time timing amount are applied, and the final dead time timing amount is output to generate the drive signal of the switching transistor. The multi-phase synchronous operation control module is used to perform periodic synchronization and set phase delay for the other phases based on the actual switching cycle of the main phase, so that each phase operates with a uniform staggered phase relationship. The actual switching cycle of the main phase is determined by the zero-crossing detection signal of the main phase.

10. A computer-readable storage medium, characterized in that, The storage medium stores a TCM mode soft-switching control method program for a multiphase interleaved parallel bidirectional DC-DC converter. When the TCM mode soft-switching control method program for a multiphase interleaved parallel bidirectional DC-DC converter is executed, it implements the TCM mode soft-switching control method for a multiphase interleaved parallel bidirectional DC-DC converter as described in any one of claims 1-8.

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