A method and system for optimizing low leakage current GaN Schottky diodes

Abstract

The application relates to the field of semiconductor technology, in particular to a low-leakage-current GaN Schottky diode optimization method and system, which comprises the following steps: step one, substrate interface purification treatment: in-situ cleaning is performed on the surface of a gallium nitride substrate after epitaxial growth, surface-attached impurities and a surface natural oxide layer are removed, an atomic-level flatness contact interface is formed, and hybrid interference caused by surface defects is reduced. The application effectively alleviates the interface hybridization effect of direct contact between metal and gallium nitride through the interface decoupling effect of two-dimensional van der Waals materials, weakens the Fermi level pinning effect, and expands the regulation range of the Schottky barrier height; the substrate interface purification and crystal orientation calibration process reduces the interface defect density, reduces charge scattering and leakage channels; the low-temperature annealing and gradient passivation process improves the interface stability and electric field uniformity, and inhibits surface leakage under high voltage.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, specifically to an optimization method and system for low-leakage-current GaN Schottky diodes. Background Technology

[0002] Gallium nitride-based Schottky barrier diodes, leveraging the inherent advantages of their wide bandgap materials, demonstrate immense development potential in high-power, high-frequency power electronics applications, making them a core category driving the iterative upgrades of power devices. These devices effectively reduce circuit switching losses and improve overall operating efficiency, possessing irreplaceable application value in various fields such as industrial power and new energy equipment.

[0003] Authorized patent CN116031159B discloses a low reverse leakage current quasi-vertical structure GaN Schottky diode and its fabrication method. This patent transforms gallium nitride in the etched area of ​​the device into an insulating structure through ion implantation, blocking the sidewall surface leakage caused by etching damage. Combined with passivation layer protection, it improves the reverse withstand voltage of the device. This is the mainstream technical solution for improving the leakage current problem of gallium nitride Schottky diodes.

[0004] Existing optimization techniques for gallium nitride Schottky diodes focus on bulk material modification or surface insulation treatment, failing to eliminate the interface hybridization effect caused by direct contact between the metal and gallium nitride, and thus unable to alleviate the Fermi level pinning phenomenon. This inherent interface problem directly limits the tuning space of the Schottky barrier. Even if surface treatment reduces some leakage current, the reverse leakage current of the device still has an insurmountable lower limit, and the rectification performance is difficult to improve substantially, becoming an obstacle to the high performance of the device. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention provides a method and system for optimizing low-leakage-current GaN Schottky diodes, which solves the problems of interface hybridization, Fermi level pinning, and high reverse leakage current caused by direct contact between metal and GaN.

[0006] To achieve the above objectives, the present invention provides the following technical solution: a method for optimizing low leakage current GaN Schottky diodes, comprising the following steps: Step 1: Substrate interface purification treatment: In-situ cleaning is performed on the surface of the gallium nitride substrate after epitaxial growth to remove surface-attached impurities and the natural oxide layer, forming an atomically flat contact interface and reducing hybridization interference caused by surface defects. Step 2, Van der Waals material crystal orientation calibration: Select a two-dimensional van der Waals material, measure and calibrate the lattice orientation of the two-dimensional van der Waals material through the crystal orientation control module, adjust the direction of the principal axis of the two-dimensional van der Waals material lattice to form a preset matching relationship with the lattice arrangement of the gallium nitride substrate, and reduce the defect sites caused by lattice mismatch at the interface. Step 3, Fixed-point in-situ transfer bonding: The two-dimensional van der Waals material with completed crystal orientation is fixedly covered to the preset contact area of ​​the gallium nitride substrate in a stress-free transfer manner. The physical bonding between the two-dimensional van der Waals material and the gallium nitride interface is achieved by using interatomic forces to form a heterojunction interface with decoupling characteristics. Step 4, Low-temperature interface annealing: Perform heat treatment on the heterojunction interface formed by bonding at a low temperature environment. The heat energy will stimulate intermolecular forces to improve the van der Waals interlayer bonding strength, while maintaining the integrity of the atomic-level arrangement structure inside the material. Step 5, Schottky barrier dynamic matching: Based on the Fermi level distribution on the gallium nitride surface after interface decoupling, a metal material with a corresponding work function is selected, and a metal anode is prepared on the side of the two-dimensional van der Waals material away from gallium nitride. The barrier height is adjusted by the interaction between the metal work function and the heterojunction interface band. Step 6: Gradient electrode forming and packaging: An ohmic cathode is fabricated in the area of ​​the gallium nitride substrate that is not in contact with the two-dimensional van der Waals material, and gradient passivation packaging is performed on the electrode edge and the heterojunction interface to form a protective structure with uniform electric field distribution.

[0007] Furthermore, in the substrate interface purification process described in step one, the gallium nitride substrate is first ultrasonically cleaned in an organic solvent to remove surface organic residues. Subsequently, it is immersed in an acidic solution to remove the natural oxide layer on the surface. Finally, the gallium nitride substrate is transferred to a vacuum chamber, where the contact interface is cleaned in situ by sputtering with a low-energy Ar ion beam or by in-situ treatment with an atomic hydrogen beam to remove any adsorption layers that may be regenerated during the transfer process, until the contact interface exhibits clear atomic arrangement diffraction spots under in-situ monitoring, providing a low-roughness surface basis for the subsequent bonding of van der Waals materials.

[0008] Furthermore, in the van der Waals material crystal orientation calibration process described in step two, the two-dimensional van der Waals material is selected from one or more of the following: hexagonal boron nitride, graphene, molybdenum disulfide, tungsten diselenide, and platinum diselenide, forming a stacked structure. The crystal orientation control module uses optical second harmonic generation technology or polarized Raman spectroscopy to detect the anisotropy of the nonlinear optical response or lattice vibration mode of the two-dimensional van der Waals material. By rotating the stage, the spatial angle of the two-dimensional van der Waals material is adjusted so that the crystal axis direction of the two-dimensional van der Waals material is parallel to or at a preset angle to the crystal plane index direction of the gallium nitride substrate, thereby suppressing charge scattering at the heterojunction.

[0009] Furthermore, in the fixed-point in-situ transfer bonding process described in step three, a polymer support layer is used to cover the two-dimensional van der Waals material. Through a temperature-controlled release mechanism or a chemical dissolution mechanism combined with a wet transfer process, the two-dimensional van der Waals material is bonded to the preset contact area of ​​the gallium nitride substrate. During the bonding process, by adjusting the vacuum level of the transfer environment and applying a small electrostatic force, tiny air bubbles and residual impurities between the two-dimensional van der Waals material and the gallium nitride substrate are removed. The van der Waals force is used to achieve spontaneous wetting and bonding between the interfaces, avoiding wrinkles or breakage of the two-dimensional van der Waals material due to mechanical compression.

[0010] Furthermore, during the low-temperature interface annealing process described in step four, the bonded structure is placed in an annealing furnace protected by an inert gas atmosphere. The annealing temperature is set within a temperature range where the material will not decompose. By setting a stepped heating curve, the contact heat energy between the two-dimensional van der Waals material and the gallium nitride substrate is evenly distributed, promoting the microscopic position adjustment of atoms at the interface. By reducing the thermal stress distribution at the interface, the adhesion between the two-dimensional material and the semiconductor surface is strengthened, while maintaining the covalent bond structure inside the two-dimensional van der Waals material without damage.

[0011] Furthermore, in the Schottky barrier dynamic matching process described in step five, a metal layer is deposited on the surface of the two-dimensional van der Waals material using magnetron sputtering. The metal material is selected as a composite layer composed of one or more of gold, platinum, nickel, and palladium, depending on the required Schottky barrier height. By introducing a van der Waals gap between the two-dimensional van der Waals material and the metal anode, the influence of the metal electron cloud on the wave function hybridization of the gallium nitride surface is reduced, the Fermi level pinning effect on the gallium nitride surface is relieved, and the Schottky barrier height shifts linearly with the work function of the metal material.

[0012] Furthermore, in the gradient electrode forming and packaging process described in step six, the ohmic cathode is prepared by depositing a multilayer metal stack structure on the sidewall or bottom of the gallium nitride substrate and combining it with a rapid thermal annealing process; The gradient passivation packaging employs plasma-enhanced chemical vapor deposition or atomic layer deposition to cover the device surface with multiple layers of dielectric material. The dielectric constant of the dielectric material decreases in a stepwise gradient along the direction away from the gallium nitride substrate, thereby alleviating the electric field concentration effect at the edge of the metal anode and suppressing surface leakage channels under high voltage conditions.

[0013] Furthermore, after step six, there is also an electrical performance characterization and feedback step. By testing the reverse current density-voltage characteristics of the device, the Schottky barrier height and ideality factor are obtained. Based on the test results, the crystal orientation adaptation angle in step two and the annealing temperature in step four are adjusted to reduce the non-uniformity of the Schottky barrier and achieve effective control of the reverse leakage current of the device.

[0014] Furthermore, the number of layers of the two-dimensional van der Waals material is set according to the tunneling current suppression requirements. By increasing the atomic layer thickness of the two-dimensional van der Waals material, the equivalent barrier width at the interface is increased, thereby blocking the exchange of holes and electrons caused by thermal field emission or trap-assisted tunneling without significantly increasing the forward turn-on voltage, and further reducing the saturation leakage current of the device under reverse bias.

[0015] The present invention also provides a low-leakage-current GaN Schottky diode optimization system, comprising: An insulating support substrate serves as the overall load-bearing structure, used to fix the functional layers of the low-leakage-current GaN Schottky diode. A gallium nitride epitaxial layer is continuously grown on the insulating support substrate, serving as the main conductive channel layer; An interface purification layer, covering the contact area on the upper surface of the gallium nitride epitaxial layer, is used to remove interface oxides and maintain atomic-level flatness; A crystal orientation-adaptive van der Waals spacer layer is closely attached to the interface purification layer. Its lattice orientation forms a preset geometric adaptation arrangement with the lattice of the gallium nitride epitaxial layer, which plays a role in interface decoupling. A barrier-matching metal anode is prepared on the surface of the orientation-adaptive van der Waals spacer layer away from the gallium nitride epitaxial layer to form a controlled Schottky barrier. A gradient passivated ohmic cathode is disposed in the region of the gallium nitride epitaxial layer that does not cover the interface purification layer, and extends to the sidewall of the gallium nitride epitaxial layer as a current outflow channel; An interface stabilization module is arranged around the edge of the heterojunction interface and the barrier-matched metal anode and the gradient passivated ohmic cathode, and maintains the structural stability of the heterojunction interface through a gradient-distributed dielectric structure.

[0016] Compared with the prior art, the beneficial effects of the present invention are as follows: This invention effectively alleviates the interface hybridization effect of direct contact between metal and gallium nitride through the interface decoupling effect of two-dimensional van der Waals materials, weakens the Fermi level pinning effect, and expands the controllable range of the Schottky barrier height. The substrate interface purification and crystal orientation calibration process reduces the interface defect density, thereby reducing charge scattering and leakage channels. The low-temperature annealing and gradient passivation process improves the interface stability and electric field uniformity, suppressing surface leakage under high voltage. The thickness control of the van der Waals material can block tunneling current, taking into account both forward conduction and reverse blocking performance. Overall, it achieves the essential optimization of the reverse leakage current of GaN Schottky diodes, improves the rectification performance and operating stability of the device, and adapts to the high-performance application requirements of high-power high-frequency power electronics. Attached Figure Description

[0017] Figure 1 This is a flowchart of the method of the present invention; Figure 2 Optical micrographs of the cross-sectional structure and device of the van der Waals heterojunction of the present invention; Figure 3 This is a system structure diagram of the present invention. Detailed Implementation

[0018] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0019] Please see Figure 1 This invention provides an optimization method for low leakage current GaN Schottky diodes, comprising the following steps: Step 1: Substrate interface purification treatment: In-situ cleaning is performed on the surface of the gallium nitride substrate after epitaxial growth to remove surface-attached impurities and the natural oxide layer, forming an atomically flat contact interface and reducing hybridization interference caused by surface defects. Step 2, Van der Waals material crystal orientation calibration: Select a two-dimensional van der Waals material, measure and calibrate the lattice orientation of the two-dimensional van der Waals material through the crystal orientation control module, adjust the direction of the principal axis of the two-dimensional van der Waals material lattice to form a preset matching relationship with the lattice arrangement of the gallium nitride substrate, and reduce the defect sites caused by lattice mismatch at the interface. Step 3, Fixed-point in-situ transfer bonding: The two-dimensional van der Waals material with completed crystal orientation is fixedly covered to the preset contact area of ​​the gallium nitride substrate in a stress-free transfer manner. The physical bonding between the two-dimensional van der Waals material and the gallium nitride interface is achieved by using interatomic forces to form a heterojunction interface with decoupling characteristics. Step 4, Low-temperature interface annealing: Perform heat treatment on the heterojunction interface formed by bonding at a low temperature environment. The heat energy will stimulate intermolecular forces to improve the van der Waals interlayer bonding strength, while maintaining the integrity of the atomic-level arrangement structure inside the material. Step 5, Schottky barrier dynamic matching: Based on the Fermi level distribution on the gallium nitride surface after interface decoupling, a metal material with a corresponding work function is selected, and a metal anode is prepared on the side of the two-dimensional van der Waals material away from gallium nitride. The barrier height is adjusted by the interaction between the metal work function and the heterojunction interface band. Step 6: Gradient electrode forming and packaging: An ohmic cathode is fabricated in the area of ​​the gallium nitride substrate that is not in contact with the two-dimensional van der Waals material, and gradient passivation packaging is performed on the electrode edge and the heterojunction interface to form a protective structure with uniform electric field distribution.

[0020] Specifically, the first step is to perform a substrate interface purification process. In this embodiment, an n-type gallium nitride substrate epitaxially grown on a sapphire substrate is selected as the base material. This substrate is the mainstream substrate for power GaN Schottky diodes, and the epitaxial layer thickness meets the conductivity requirements of high-voltage power devices. After removing all impurities and oxide layers from the surface through an in-situ cleaning process, the roughness of the contact interface is reduced to the atomic level, the surface defect density is significantly reduced, and the charge hybridization channels caused by surface defects are reduced. This lays the foundation for high-quality bonding of van der Waals materials and effectively avoids the problem of residual leakage channels caused by excessively high interface roughness in traditional processes.

[0021] Furthermore, in the substrate interface purification process described in step one, the gallium nitride substrate is first ultrasonically cleaned in an organic solvent to remove surface organic residues. Subsequently, it is immersed in an acidic solution to remove the natural oxide layer on the surface. Finally, the gallium nitride substrate is transferred to a vacuum chamber, where the contact interface is cleaned in situ by sputtering with a low-energy Ar ion beam or by in-situ treatment with an atomic hydrogen beam. The atomic hydrogen beam reduces surface oxides and passivates dangling bonds, removing adsorbed layers that may be regenerated during the transfer process, until the contact interface exhibits clear atomic arrangement diffraction spots under in-situ monitoring, providing a low-roughness surface basis for subsequent van der Waals material bonding.

[0022] Specifically, the substrate interface purification process follows a layered cleaning logic. Acetone, anhydrous ethanol, and isopropanol are selected as the organic solvents in sequence, with the ultrasonic cleaning time for each solvent controlled within a fixed range to thoroughly remove photoresist, grease, and other organic residues. Dilute hydrochloric acid is used as the acidic solution; the immersion process rapidly decomposes the naturally occurring gallium oxide layer on the gallium nitride surface without causing etching damage to the gallium nitride lattice. The vacuum chamber is maintained in an ultra-high vacuum range. When using a low-energy Ar ion beam, the ion beam energy parameters are controlled; when using an atomic hydrogen beam, the hydrogen beam low-energy parameters are controlled. The in-situ sputtering thinning process is simultaneously monitored in real-time using low-energy electron diffraction. When clear and regular atomic diffraction spots appear on the monitoring screen, the interface is considered to have reached an atomically flat state, at which point the cleaning process is stopped. This treatment method avoids secondary oxidation and impurity adsorption, ensuring the purity and flatness of the interface.

[0023] Furthermore, in the van der Waals material crystal orientation calibration process described in step two, the two-dimensional van der Waals material is selected from one or more of the following: hexagonal boron nitride, graphene, molybdenum disulfide, tungsten diselenide, and platinum diselenide, forming a stacked structure. The crystal orientation control module uses optical second harmonic generation technology or polarized Raman spectroscopy to detect the anisotropy of the nonlinear optical response or lattice vibration mode of the two-dimensional van der Waals material. By rotating the stage, the spatial angle of the two-dimensional van der Waals material is adjusted so that the crystal axis direction of the two-dimensional van der Waals material is parallel to or at a preset angle to the crystal plane index direction of the gallium nitride substrate, thereby suppressing charge scattering at the heterojunction.

[0024] Specifically, after substrate purification, a van der Waals material crystal orientation calibration step is performed. In this embodiment, three layers of platinum diselenide with a thickness of 1.56 nm are selected as the two-dimensional van der Waals material. This material belongs to the transition metal chalcogenide group and has excellent van der Waals bonding characteristics and interface decoupling ability, which can replace conventional two-dimensional materials to form a highly efficient heterojunction interface. The crystal orientation control module uses polarized Raman spectroscopy to accurately identify the lattice principal axis direction by detecting the anisotropic signal of platinum diselenide lattice vibration. The gallium nitride substrate uses the (0001) crystal plane. The spatial angle of platinum diselenide is adjusted by a high-precision rotating stage to keep its crystal axis direction parallel to the [11-20] crystal orientation of the gallium nitride substrate. This preset matching relationship can minimize the lattice mismatch, reduce the generation of interface defect sites, and suppress charge scattering behavior at the heterojunction. This is one of the key steps to achieve low leakage current.

[0025] Furthermore, in the fixed-point in-situ transfer bonding process described in step three, a polymer support layer is used to cover the two-dimensional van der Waals material. Through a temperature-controlled release mechanism or a chemical dissolution mechanism combined with a wet transfer process, the two-dimensional van der Waals material is bonded to the preset contact area of ​​the gallium nitride substrate. During the bonding process, by adjusting the vacuum level of the transfer environment and applying a small electrostatic force, tiny air bubbles and residual impurities between the two-dimensional van der Waals material and the gallium nitride substrate are removed. The van der Waals force is used to achieve spontaneous wetting and bonding between the interfaces, avoiding wrinkles or breakage of the two-dimensional van der Waals material due to mechanical compression.

[0026] Specifically, after crystal orientation calibration, a fixed-point in-situ transfer bonding step is performed. Polydimethylsiloxane is selected as the polymer support layer. This material has good flexibility and peelability, which can completely encapsulate the platinum diselenide sheet and achieve non-destructive transfer. A temperature-controlled release mechanism combined with a wet transfer process is used. The composite structure of the support layer and platinum diselenide is placed in an aqueous environment. By controlling the temperature, the bonding force between the polymer support layer and platinum diselenide is weakened. Relying on the release of the polymer support layer and the adhesion of the interface surface, the platinum diselenide and the pre-set anode contact area of ​​the gallium nitride substrate are precisely bonded. The transfer environment is maintained in a low vacuum range, and a small electrostatic force is applied to quickly remove microbubbles and residual impurities between the interfaces. The interface achieves spontaneous wetting and bonding under the action of interatomic van der Waals forces. There is no mechanical compression throughout the process, and the platinum diselenide sheet remains intact, wrinkle-free, and unbroken. The cross-sectional structure of the device after bonding is as follows: Figure 2 The structure shown in (a) is completely identical, consisting from top to bottom of an Al / Ti metal anode, a platinum diselenide van der Waals layer, a GaN epitaxial layer, and a sapphire substrate. The optical micrograph of the device is identical to that shown in (a). Figure 2 (b) The matching and contact area boundaries are regular, with no interface defects or material damage, forming a Ti platinum diselenide / n-GaN van der Waals heterojunction with interface decoupling characteristics.

[0027] Furthermore, during the low-temperature interface annealing process described in step four, the bonded structure is placed in an annealing furnace protected by an inert gas atmosphere. The annealing temperature is set within a temperature range where the material will not decompose. By setting a stepped heating curve, the contact heat energy between the two-dimensional van der Waals material and the gallium nitride substrate is evenly distributed, promoting the microscopic position adjustment of atoms at the interface. By reducing the thermal stress distribution at the interface, the adhesion between the two-dimensional material and the semiconductor surface is strengthened, while maintaining the covalent bond structure inside the two-dimensional van der Waals material without damage.

[0028] Specifically, after the transfer bonding is completed, a low-temperature interface annealing step is performed. The device is placed in an annealing furnace filled with high-purity argon gas. The inert gas atmosphere can prevent material oxidation and compositional segregation at high temperatures. The annealing temperature is strictly controlled within the thermal stability range of platinum diselenide and GaN. A stepped heating curve is used. First, the temperature is slowly increased to the first holding temperature and held for a fixed duration to allow for initial uniform distribution of interfacial heat energy. Then, the temperature is increased to the second holding temperature at the same rate. After the second holding, the temperature is naturally cooled to room temperature. This annealing process can promote micro-tuning of interfacial atoms, reduce interfacial thermal stress, and significantly enhance the adhesion strength between platinum diselenide and GaN surfaces. At the same time, it preserves the complete covalent lattice structure inside platinum diselenide, avoiding decomposition or lattice distortion of van der Waals materials at high temperatures, and ensuring the long-term stability of the heterojunction interface.

[0029] Furthermore, in the Schottky barrier dynamic matching process described in step five, a metal layer is deposited on the surface of the two-dimensional van der Waals material using magnetron sputtering. The metal material is selected as a composite layer composed of one or more of gold, platinum, nickel, and palladium, depending on the required Schottky barrier height. By introducing a van der Waals gap between the two-dimensional van der Waals material and the metal anode, the influence of the metal electron cloud on the wave function hybridization of the gallium nitride surface is reduced, the Fermi level pinning effect on the gallium nitride surface is relieved, and the Schottky barrier height shifts linearly with the work function of the metal material.

[0030] Specifically, after annealing, a Schottky barrier dynamic matching step is performed, and a metal anode is deposited using magnetron sputtering. The vacuum level is maintained in the high vacuum range, and the metal deposition rate remains slow and stable to ensure the uniformity and density of the metal layer. In this embodiment, Ti / Al composite metal is selected as the anode material for verification. This low work function metal system can verify the suppression effect of two-dimensional van der Waals materials on Fermi level pinning. Experiments show that the Fermi level pinning effect can still be effectively reduced under this system. Meanwhile, high work function metals such as gold, platinum, nickel, and palladium have a higher band structure matching degree with platinum diselenide / GaN heterojunction. Selecting such high work function metals can achieve a better Schottky barrier height control effect. The platinum diselenide layer forms a natural van der Waals gap between the metal anode and GaN. This gap can significantly reduce the wave function hybridization effect of the metal electron cloud on the GaN surface, effectively reducing the Fermi level pinning effect caused by traditional metal-GaN direct contact. The Schottky barrier height can be linearly shifted with the change of the metal work function, achieving precise control of the barrier height. This solves the technical bottleneck of the inflexible adjustment of the barrier in traditional devices from the perspective of bandgap modulation.

[0031] Furthermore, in the gradient electrode forming and packaging process described in step six, the ohmic cathode is prepared by depositing a multilayer metal stack structure on the sidewall or bottom of the gallium nitride substrate and combining it with a rapid thermal annealing process; The gradient passivation packaging employs plasma-enhanced chemical vapor deposition or atomic layer deposition to cover the device surface with multiple layers of dielectric material. The dielectric constant of the dielectric material decreases in a stepwise gradient along the direction away from the gallium nitride substrate, thereby alleviating the electric field concentration effect at the edge of the metal anode and suppressing surface leakage channels under high voltage conditions.

[0032] Specifically, after barrier matching is completed, a gradient electrode forming and packaging step is performed. The ohmic cathode uses a Ti / Al / Ni / Au multilayer metal stack structure, which is deposited sequentially on the sidewalls and bottom regions of the GaN substrate by magnetron sputtering. Then, a low-resistance ohmic contact is formed by rapid thermal annealing, resulting in stable contact resistance and no lattice damage. The gradient passivation packaging uses atomic layer deposition to deposit three layers of dielectric material sequentially on the device surface. The dielectric constant of the dielectric material decreases in a step-like gradient away from the GaN substrate. This structure can effectively disperse the electric field intensity at the edge of the metal anode, alleviate the electric field concentration phenomenon under high voltage operation, block the surface leakage current channel at the sidewalls and interface, and further improve the reverse withstand voltage and low leakage current characteristics of the device.

[0033] Furthermore, after step six, there is also an electrical performance characterization and feedback step. By testing the reverse current density-voltage characteristics of the device, the Schottky barrier height and ideality factor are obtained. Based on the test results, the crystal orientation adaptation angle in step two and the annealing temperature in step four are adjusted to reduce the non-uniformity of the Schottky barrier and achieve effective control of the reverse leakage current of the device.

[0034] Specifically, after gradient packaging is completed, electrical performance characterization and feedback steps are performed. A semiconductor parameter analyzer is used to test the current density-voltage characteristics of the device, focusing on collecting electrical parameters under reverse bias to extract the Schottky barrier height and ideality factor. If the test results show insufficient barrier uniformity or high leakage current, the data is fed back to the crystal orientation calibration and low-temperature annealing stages. The crystal orientation adaptation angles of PtSe2 and GaN are fine-tuned, and the annealing temperature and holding time are optimized. Through closed-loop control, the interface quality and barrier uniformity are continuously optimized, ultimately achieving precise control of the reverse leakage current of the device and enabling the device to maintain a stable low leakage current operating state.

[0035] Furthermore, the number of layers of the two-dimensional van der Waals material is set according to the tunneling current suppression requirements. By increasing the atomic layer thickness of the two-dimensional van der Waals material, the equivalent barrier width at the interface is increased, thereby blocking the exchange of holes and electrons caused by thermal field emission or trap-assisted tunneling without significantly increasing the forward turn-on voltage, and further reducing the saturation leakage current of the device under reverse bias.

[0036] Specifically, the number of layers in a two-dimensional van der Waals material directly determines the suppression effect of tunneling current. In this embodiment, three layers of platinum diselenide with a thickness of 1.56 nm are selected. This thickness can significantly increase the width of the equivalent barrier at the interface without significantly increasing the forward turn-on voltage of the device, effectively blocking carrier exchange behavior caused by thermal field emission and trap-assisted tunneling, and avoiding leakage current under reverse bias. If higher withstand voltage requirements are needed, the atomic layer thickness can be appropriately increased to continuously improve the width of the equivalent barrier and further reduce the reverse saturation leakage current, thus balancing the forward conduction and reverse blocking performance of the device.

[0037] In summary, this invention effectively alleviates the interface hybridization effect of direct contact between metal and gallium nitride through the interface decoupling effect of two-dimensional van der Waals materials, weakens the Fermi level pinning effect, and expands the controllable range of the Schottky barrier height. The substrate interface purification and crystal orientation calibration process reduces the interface defect density, thereby reducing charge scattering and leakage channels. The low-temperature annealing and gradient passivation process improves interface stability and electric field uniformity, suppressing surface leakage under high voltage. The thickness control of the van der Waals material can block tunneling current, taking into account both forward conduction and reverse blocking performance. Overall, it achieves the essential optimization of the reverse leakage current of GaN Schottky diodes, improves the rectification performance and operating stability of the device, and adapts to the high-performance application requirements of high-power high-frequency power electronics.

[0038] Example 2 Please see Figure 3 The present invention also provides a low-leakage-current GaN Schottky diode optimization system, characterized in that it comprises: An insulating support substrate serves as the overall load-bearing structure, used to fix the functional layers of the low-leakage-current GaN Schottky diode. A gallium nitride epitaxial layer is continuously grown on the insulating support substrate, serving as the main conductive channel layer; An interface purification layer, covering the contact area on the upper surface of the gallium nitride epitaxial layer, is used to remove interface oxides and maintain atomic-level flatness; A crystal orientation-adaptive van der Waals spacer layer is closely attached to the interface purification layer. Its lattice orientation forms a preset geometric adaptation arrangement with the lattice of the gallium nitride epitaxial layer, which plays a role in interface decoupling. A barrier-matching metal anode is prepared on the surface of the orientation-adaptive van der Waals spacer layer away from the gallium nitride epitaxial layer to form a controlled Schottky barrier. A gradient passivated ohmic cathode is disposed in the region of the gallium nitride epitaxial layer that does not cover the interface purification layer, and extends to the sidewall of the gallium nitride epitaxial layer as a current outflow channel; An interface stabilization module is arranged around the edge of the heterojunction interface and the barrier-matched metal anode and the gradient passivated ohmic cathode, and maintains the structural stability of the heterojunction interface through a gradient-distributed dielectric structure.

[0039] Specifically, this system uses an insulating support substrate as its core support, on which a gallium nitride epitaxial layer is continuously grown to form the main conductive channel of the device. The interface purification layer is formed by substrate purification processes to ensure atomic-level flatness and purity of the contact interface. The crystal orientation-adaptive van der Waals spacer layer can be one or more of platinum diselenide, hexagonal boron nitride, graphene, molybdenum disulfide, and tungsten diselenide, forming a lattice-adaptive heterojunction interface with the gallium nitride epitaxial layer to achieve decoupling between the metal and semiconductor interfaces and reduce the Fermi level pinning effect. The barrier-matching metal anode preferably uses high work function metals such as gold, platinum, nickel, and palladium to form a controllable Schottky barrier through work function matching. Metals such as Ti / Al can also be used to verify the suppression effect. The gradient passivated ohmic cathode provides a low-resistance current output channel. The interface stabilization module is arranged around the core interface and electrode edges, stabilizing the interface electric field and suppressing leakage current through a gradient dielectric structure. All components work together to fully realize the optimization method of Example 1, continuously outputting a GaN Schottky diode with low leakage current and high rectification performance.

[0040] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus.

[0041] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A method for optimizing low-leakage-current GaN Schottky diodes, characterized in that, Includes the following steps: Step 1: Substrate interface purification treatment: In-situ cleaning is performed on the surface of the gallium nitride substrate after epitaxial growth to remove surface-attached impurities and the natural oxide layer, forming an atomically flat contact interface and reducing hybridization interference caused by surface defects. Step 2, Van der Waals material crystal orientation calibration: Select a two-dimensional van der Waals material, measure and calibrate the lattice orientation of the two-dimensional van der Waals material through the crystal orientation control module, adjust the direction of the principal axis of the two-dimensional van der Waals material lattice to form a preset matching relationship with the lattice arrangement of the gallium nitride substrate, and reduce the defect sites caused by lattice mismatch at the interface. Step 3, Fixed-point in-situ transfer bonding: The two-dimensional van der Waals material with completed crystal orientation is fixedly covered to the preset contact area of ​​the gallium nitride substrate in a stress-free transfer manner. The physical bonding between the two-dimensional van der Waals material and the gallium nitride interface is achieved by using interatomic forces to form a heterojunction interface with decoupling characteristics. Step 4, Low-temperature interface annealing: Perform heat treatment on the heterojunction interface formed by bonding at a low temperature environment. The heat energy will stimulate intermolecular forces to improve the van der Waals interlayer bonding strength, while maintaining the integrity of the atomic-level arrangement structure inside the material. Step 5, Schottky barrier dynamic matching: Based on the Fermi level distribution on the gallium nitride surface after interface decoupling, a metal material with a corresponding work function is selected, and a metal anode is prepared on the side of the two-dimensional van der Waals material away from gallium nitride. The barrier height is adjusted by the interaction between the metal work function and the heterojunction interface band. Step 6: Gradient electrode forming and packaging: An ohmic cathode is fabricated in the area of ​​the gallium nitride substrate that is not in contact with the two-dimensional van der Waals material, and gradient passivation packaging is performed on the electrode edge and the heterojunction interface to form a protective structure with uniform electric field distribution.

2. The method for optimizing a low-leakage-current GaN Schottky diode according to claim 1, characterized in that: In the substrate interface purification process described in step one, the gallium nitride substrate is first placed in an organic solvent for ultrasonic cleaning to remove surface organic residues. Then, it is immersed in an acidic solution to remove the natural oxide layer on the surface. Finally, the gallium nitride substrate is transferred to a vacuum chamber, and the contact interface is cleaned in situ by sputtering with a low-energy Ar ion beam or by in-situ treatment with an atomic hydrogen beam to remove the adsorption layer that may be regenerated during the transfer process, until the contact interface shows clear atomic arrangement diffraction spots under in-situ monitoring, providing a low-roughness surface basis for the subsequent bonding of van der Waals materials.

3. The method for optimizing a low-leakage-current GaN Schottky diode according to claim 1, characterized in that: In the van der Waals material crystal orientation calibration process described in step two, the two-dimensional van der Waals material is selected from one or more of the following: hexagonal boron nitride, graphene, molybdenum disulfide, tungsten diselenide, and platinum diselenide, forming a stacked structure. The crystal orientation control module uses optical second harmonic generation technology or polarized Raman spectroscopy to detect the anisotropy of the nonlinear optical response or lattice vibration mode of the two-dimensional van der Waals material. By rotating the stage, the spatial angle of the two-dimensional van der Waals material is adjusted so that the crystal axis direction of the two-dimensional van der Waals material is parallel to or at a preset angle to the crystal plane index direction of the gallium nitride substrate, thereby suppressing charge scattering at the heterojunction.

4. The method for optimizing a low-leakage-current GaN Schottky diode according to claim 1, characterized in that: In the fixed-point in-situ transfer bonding process described in step three, a polymer support layer is used to cover the two-dimensional van der Waals material. The two-dimensional van der Waals material is bonded to the preset contact area of ​​the gallium nitride substrate through a temperature-controlled release mechanism or a chemical dissolution mechanism combined with a wet transfer process. During the bonding process, by adjusting the vacuum level of the transfer environment and applying a small electrostatic force, tiny air bubbles and residual impurities between the two-dimensional van der Waals material and the gallium nitride substrate are removed. The van der Waals force is used to achieve spontaneous wetting and bonding between the interfaces, avoiding wrinkles or breakage of the two-dimensional van der Waals material due to mechanical compression.

5. The method for optimizing a low-leakage-current GaN Schottky diode according to claim 1, characterized in that: In the low-temperature interface annealing process described in step four, the bonded structure is placed in an annealing furnace protected by an inert gas atmosphere. The annealing temperature is set within the temperature range where the material will not decompose. By setting a stepped heating curve, the contact heat energy between the two-dimensional van der Waals material and the gallium nitride substrate is evenly distributed, promoting the microscopic position adjustment of atoms at the interface. By reducing the thermal stress distribution at the interface, the adhesion between the two-dimensional material and the semiconductor surface is strengthened, while maintaining the covalent bond structure inside the two-dimensional van der Waals material without damage.

6. The method for optimizing a low-leakage-current GaN Schottky diode according to claim 1, characterized in that: In the Schottky barrier dynamic matching process described in step five, a metal layer is deposited on the surface of the two-dimensional van der Waals material using magnetron sputtering. The metal material is selected as a composite layer composed of one or more of gold, platinum, nickel, and palladium, depending on the required Schottky barrier height. By introducing a van der Waals gap between the two-dimensional van der Waals material and the metal anode, the influence of the metal electron cloud on the wave function hybridization of the gallium nitride surface is reduced, the Fermi level pinning effect on the gallium nitride surface is relieved, and the Schottky barrier height shifts linearly with the work function of the metal material.

7. The method for optimizing a low-leakage-current GaN Schottky diode according to claim 1, characterized in that: In the gradient electrode forming and packaging process described in step six, the ohmic cathode is prepared by depositing a multilayer metal stack structure on the sidewall or bottom of the gallium nitride substrate and combining it with a rapid thermal annealing process; The gradient passivation packaging employs plasma-enhanced chemical vapor deposition or atomic layer deposition to cover the device surface with multiple layers of dielectric material. The dielectric constant of the dielectric material decreases in a stepwise gradient along the direction away from the gallium nitride substrate, thereby alleviating the electric field concentration effect at the edge of the metal anode and suppressing surface leakage channels under high voltage conditions.

8. The method for optimizing a low-leakage-current GaN Schottky diode according to claim 1, characterized in that: Following step six, there is also an electrical performance characterization and feedback step. By testing the reverse current density-voltage characteristics of the device, the Schottky barrier height and ideality factor are obtained. Based on the test results, the crystal orientation adaptation angle in step two and the annealing temperature in step four are adjusted to reduce the non-uniformity of the Schottky barrier and achieve effective control of the reverse leakage current of the device.

9. The optimization method for a low leakage current GaN Schottky diode according to claim 1, characterized in that: The number of layers of the two-dimensional van der Waals material is set according to the tunneling current suppression requirements. By increasing the atomic layer thickness of the two-dimensional van der Waals material, the equivalent barrier width at the interface is increased, thereby blocking the exchange of holes and electrons caused by thermal field emission or trap-assisted tunneling without significantly increasing the forward turn-on voltage, and further reducing the saturation leakage current of the device under reverse bias.

10. A low-leakage-current GaN Schottky diode optimization system, used to execute the low-leakage-current GaN Schottky diode optimization method according to any one of claims 1-9, characterized in that, include: An insulating support substrate serves as the overall load-bearing structure, used to fix the functional layers of the low-leakage-current GaN Schottky diode. A gallium nitride epitaxial layer is continuously grown on the insulating support substrate, serving as the main conductive channel layer; An interface purification layer, covering the contact area on the upper surface of the gallium nitride epitaxial layer, is used to remove interface oxides and maintain atomic-level flatness; A crystal orientation-adaptive van der Waals spacer layer is closely attached to the interface purification layer. Its lattice orientation forms a preset geometric adaptation arrangement with the lattice of the gallium nitride epitaxial layer, which plays a role in interface decoupling. A barrier-matching metal anode is prepared on the surface of the orientation-adaptive van der Waals spacer layer away from the gallium nitride epitaxial layer to form a controlled Schottky barrier. A gradient passivated ohmic cathode is disposed in the region of the gallium nitride epitaxial layer that does not cover the interface purification layer, and extends to the sidewall of the gallium nitride epitaxial layer as a current outflow channel; An interface stabilization module is arranged around the edge of the heterojunction interface and the barrier-matched metal anode and the gradient passivated ohmic cathode, and maintains the structural stability of the heterojunction interface through a gradient-distributed dielectric structure.

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