Frequency controller and frequency control method based on pll

Abstract

This application relates to the field of power grid voltage control technology and relates to a PLL-based frequency controller and frequency control method. The purpose of this application is to address the problems of complex control and high switching risks associated with existing islanding detection algorithms combined with mode switching logic. This application generates a first frequency correction value based on the q-axis component of the common coupling point voltage; generates a second frequency correction value using the deviation between a fixed frequency reference and the real-time output frequency of the phase-locked loop (PLL); and synthesizes the first frequency correction value, the second frequency correction value, and the rated angular frequency to correct the PLL output frequency. By superimposing the correction value at the frequency output terminal to achieve feedforward compensation, the frequency deviation generated by the PLL automatically switches to dominate the frequency correction stage during off-grid operation, enabling the PLL to automatically adapt to both grid-connected and off-grid operating states.

Description

Technical Field

[0001] This application belongs to the field of power grid voltage control technology. Background Technology

[0002] Traditional grid-following control strategies typically rely on phase-locked loops (PLLs) to track the phase and frequency of the grid voltage in real time to achieve unity power factor grid connection. When using a traditional three-phase synchronous rotating coordinate system (SRF-PLL) to synchronize with the grid, its closed-loop regulation mechanism depends entirely on the directional effect of the grid voltage. When the system (the entire grid-connected system to which the inverter is connected) is in grid-connected mode, the three-phase voltage is supported by the grid, and the q-axis component obtained by the Park transform... It can accurately reflect phase error, and can be adjusted... The inverter frequency approaches zero, thus achieving precise synchronization with the grid frequency. However, if the grid is suddenly disconnected while the system is in grid-connected mode, significant frequency instability will occur after the system enters islanded operation, causing the inverter output frequency to deviate from the rated value. Long-term deviation of the system frequency from the rated value can easily lead to saturation of passive components such as transformers and inductors, activation of frequency relay protection devices, and over-charge and over-discharge of energy storage devices, seriously affecting the service life of equipment and the reliability of the system.

[0003] When the system disconnects from the main grid due to grid faults or planned islanding, the PCC voltage is jointly determined by the local load and the inverter output current. The PLL input signal no longer comes from the rigid grid but switches to the inverter's own output voltage. The phase of the PLL output directly affects the inverter output voltage, causing the PLL control loop to form an internal closed loop. Simultaneously, the adjustment process of the power outer loop is coupled with the dynamic response of the PLL, ultimately causing a dynamic shift in the inverter output frequency. Furthermore, it is difficult to automatically recover to the rated frequency in steady state, severely impacting the power quality and safety of the local load. Existing solutions often employ additional islanding detection algorithms combined with mode switching logic. This not only increases the complexity of the control system but also introduces detection blind spots and switching delays, increasing switching risks. Summary of the Invention

[0004] This application aims to address the problems of complex control and high switching risks associated with existing island detection algorithms combined with mode switching logic. It provides a PLL-based frequency controller and frequency control method.

[0005] The first aspect of this application provides a PLL-based frequency controller, including:

[0006] The first branch is used to generate the first frequency correction amount based on the q-axis component of the common coupling point voltage;

[0007] The second branch is used to generate a second frequency correction value by utilizing the deviation between the fixed frequency reference and the real-time output frequency of the phase-locked loop;

[0008] The synthesis unit is used to synthesize the first frequency correction amount, the second frequency correction amount, and the rated angular frequency to achieve correction of the phase-locked loop output frequency.

[0009] In one possible design, the first branch includes:

[0010] Park Transform Unit: Used to perform Park transformation on the voltage at the common coupling point to obtain the q-axis component;

[0011] The transfer function of a traditional phase-locked loop branch is used to take the q-axis component as a phase error signal and modulate the phase error signal to generate a first frequency correction value.

[0012] In one possible design, the second branch includes:

[0013] Subtractor: Used to subtract the fixed frequency reference from the real-time output frequency of the phase-locked loop to obtain the deviation between the two;

[0014] The transfer function of the frequency compensation loop is used to modulate the deviation and generate a second frequency correction value.

[0015] The second aspect of this application provides a frequency control method based on a PLL, including:

[0016] The first frequency correction is generated based on the q-axis component of the voltage at the common coupling point;

[0017] A second frequency correction value is generated by using the deviation between a fixed frequency reference and the real-time output frequency of the phase-locked loop;

[0018] The first frequency correction value, the second frequency correction value, and the rated angular frequency are combined to achieve the correction of the phase-locked loop output frequency.

[0019] In one possible design, generating the first frequency correction amount based on the q-axis component of the common coupling point voltage includes:

[0020] The q-axis component is obtained by performing a Park transform on the voltage at the common coupling point.

[0021] The q-axis component is used as a phase error signal and fed into the transfer function of a traditional phase-locked loop branch to generate a first frequency correction value.

[0022] In one possible design, generating the second frequency correction value using the deviation between a fixed frequency reference and the real-time output frequency of the phase-locked loop includes:

[0023] The deviation between the fixed frequency reference and the real-time output frequency of the phase-locked loop is obtained by subtracting the two frequencies.

[0024] The deviation is passed through the transfer function of the frequency compensation loop to generate a second frequency correction value.

[0025] The beneficial effects of this application are:

[0026] This application proposes a frequency controller and frequency control method based on PLL. While retaining the traditional SRF-PLL topology, it introduces a deviation adjustment channel between a 50Hz fixed frequency reference and the real-time output frequency of the PLL. Feedforward compensation is completed by superimposing a correction amount at the frequency output end. When operating off-grid, the frequency deviation generated by the phase-locked loop is automatically switched to dominate the frequency correction stage, so that the phase-locked loop can automatically adapt to both grid-connected and off-grid operating states. Attached Figure Description

[0027] Figure 1 This is a topology diagram of the inverter's main circuit.

[0028] Figure 2 The inverter control structure diagram with the proposed PLL-based frequency controller is shown below.

[0029] Figure 3 The main circuit diagram for an inverter connected to the grid with a load;

[0030] Figure 4 This is the main circuit diagram of the inverter connected to an off-grid load.

[0031] Figure 5 The output impedance verification diagram for an inverter with a phase-locked loop-based frequency controller is shown in (a), where (a) represents the positive-sequence output impedance of the inverter. (b) represents the negative sequence impedance of the inverter output. ;

[0032] Figure 6 The Nyquist plot is drawn based on the impedance ratio;

[0033] Figure 7 The following are comparison diagrams of frequency simulation waveforms during the grid-connected-off-grid process of the inverter under typical control and implementation control modes: (a) represents typical SRF-PLL frequency control, and (b) represents PLL-based frequency control.

[0034] Figure 8 This is a schematic diagram of the experimental platform;

[0035] Figure 9 The following are waveform diagrams of the inverter grid-connected-off-grid test using SRF-PLL: (a) shows the overall voltage and current waveforms, and (b) shows the detailed voltage and current waveforms.

[0036] Figure 10The waveform diagrams for the off-grid and grid-connected inverter experiment using SRF-PLL are shown in (a) and (b). (a) shows the overall voltage and current waveform diagram, and (b) shows the detailed voltage and current waveform diagram.

[0037] Figure 11 The following are waveform diagrams from the grid-connected to off-grid experiment of the inverter using a phase-locked loop-based frequency controller: (a) shows the overall voltage and current waveforms, and (b) shows the detailed voltage and current waveforms.

[0038] Figure 12 The following are waveform diagrams from the off-grid and grid-connected inverter experiment using a phase-locked loop (PLL)-based frequency controller: (a) shows the overall voltage and current waveforms, and (b) shows the detailed voltage and current waveforms.

[0039] Figure 13 The experimental waveform diagram is shown when an inverter with a phase-locked loop-based frequency controller is connected to a weak power grid. Detailed Implementation

[0040] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application. It should be noted that, unless otherwise specified, the embodiments and features in the embodiments of this application can be combined with each other.

[0041] Specific Implementation Method 1: The PLL-based frequency controller described in this implementation method includes:

[0042] The first branch is used to generate the first frequency correction amount based on the q-axis component of the common coupling point voltage;

[0043] The second branch is used to generate a second frequency correction value by utilizing the deviation between the fixed frequency reference and the real-time output frequency of the phase-locked loop;

[0044] The synthesis unit is used to synthesize the first frequency correction amount, the second frequency correction amount, and the rated angular frequency to achieve correction of the phase-locked loop output frequency.

[0045] In one implementation, the first branch includes:

[0046] Park Transform Unit: Used to perform Park transformation on the voltage at the common coupling point to obtain the q-axis component;

[0047] The transfer function of a traditional phase-locked loop branch is used to take the q-axis component as a phase error signal and modulate the phase error signal to generate a first frequency correction value.

[0048] In one embodiment, the second branch includes:

[0049] Subtractor: Used to subtract the fixed frequency reference from the real-time output frequency of the phase-locked loop to obtain the deviation between the two;

[0050] The transfer function of the frequency compensation loop is used to modulate the deviation and generate a second frequency correction value.

[0051] Specific Implementation Method Two: The frequency control method based on PLL described in this implementation method includes:

[0052] The first frequency correction is generated based on the q-axis component of the voltage at the common coupling point;

[0053] A second frequency correction value is generated by using the deviation between a fixed frequency reference and the real-time output frequency of the phase-locked loop;

[0054] The first frequency correction value, the second frequency correction value, and the rated angular frequency are combined to achieve the correction of the phase-locked loop output frequency.

[0055] In one embodiment, generating the first frequency correction amount based on the q-axis component of the common coupling point voltage includes:

[0056] The q-axis component is obtained by performing a Park transform on the voltage at the common coupling point.

[0057] The q-axis component is used as a phase error signal and fed into the transfer function of a traditional phase-locked loop branch to generate a first frequency correction value.

[0058] In one embodiment, generating a second frequency correction value using the deviation between a fixed frequency reference and the real-time output frequency of the phase-locked loop includes:

[0059] The deviation between the fixed frequency reference and the real-time output frequency of the phase-locked loop is obtained by subtracting the two frequencies.

[0060] The deviation is passed through the transfer function of the frequency compensation loop to generate a second frequency correction value.

[0061] To further illustrate the implementation scheme of this application, the following embodiments are provided:

[0062] I. Frequency Control Strategy Based on Phase-Locked Loop

[0063] 1.1 Inverter Main Circuit Topology

[0064] The main circuit topology of a three-phase grid-connected inverter is as follows: Figure 1 As shown, where, DC voltage This refers to the output voltage of the inverter bridge arm. , For grid connection point current, For the inverter-side filter inductor, The voltage at the grid connection point. For damping resistor, For filtering capacitors, For grid-side filter inductors, For the impedance of the power grid line, This refers to the current of the grid-side filter inductor. The voltage is the grid voltage. To reflect the operating characteristics of the inverter system, it is assumed that all power switches in the main circuit are ideal devices, and the effect of dead time is not considered.

[0065] 1.2 Frequency Control Based on Phase-Locked Loop

[0066] The inverter controller structure is as follows Figure 2 As shown, it mainly includes an outer loop power control module and a voltage control module, and an inner loop current control module, and outputs the control angle through the proposed phase-locked loop-based frequency controller. (See figure.) For the PI regulator of AC power control loop, For voltage loop PI regulator, It is a PI regulator for the current loop. This is the feedforward function for the proportional low-pass filter. .

[0067] The inverter's power-voltage-current loop control strategy combines the characteristics of constant current control. The inner-loop current controller is decoupled via dq, ensuring that the inverter output current can quickly and accurately track the reference command. Furthermore, power and voltage loops are added. The outermost power loop controls the entire inverter output in real time, while the voltage loop maintains and stabilizes the grid-connected voltage. Simultaneously, a low-pass filter voltage feedback is incorporated to reduce the interference of grid harmonics on the stability of the grid-connected system. Additionally, the phase of the entire controller is provided by the proposed phase-locked loop-based frequency controller, thereby achieving synchronous operation during grid-connected operation and precise frequency control during off-grid operation.

[0068] The structure of a frequency controller based on a phase-locked loop is as follows: Figure 2 As shown in the red dashed box diagram. On one hand, utilizing the PCC (point of common coupling) voltage... The dq-axis components are obtained through the Park transform, where the q-axis component is... The transfer function used as the phase error signal is fed into the traditional phase-locked loop branch. Generate the first frequency correction amount This channel ensures that the PLL (phase-locked loop) can quickly respond to grid frequency fluctuations and maintain precise synchronization with the grid under grid-connected conditions. On the other hand, a compensation loop is added to the traditional SRF-PLL (three-phase synchronous rotating coordinate system phase-locked loop) structure to fix the frequency reference. The frequency of the phase-locked loop output in real time The deviation between the two is compared through the transfer function of the frequency compensation loop. Generate a second frequency correction value In off-grid mode, it dominates control, thereby stabilizing the frequency. Finally, the first frequency correction amount... Second frequency correction amount and rated angular frequency Synthesize to obtain the real-time output angular frequency of the phase-locked loop and angular frequency Integrating the phase angles of the phase-locked loop output in real time yields the results. Using phase angle right

[0069] like Figure 3 As shown, when the inverter is connected to the power grid, the voltage at the PCC point is forcibly clamped by the grid, and the frequency is strictly maintained at the rated angular frequency. Nearby. At this time, the traditional PLL loop has extremely high gain bandwidth, which can quickly eliminate... Errors cause the real-time output angular frequency of the phase-locked loop to be... In this state, the frequency deviation The output of the compensation loop Approaching zero. The system frequency is mainly determined by the basic structure of the traditional PLL, ensuring that the inverter output current and grid voltage maintain strict synchronization and phase, achieving high-quality grid connection. Simultaneously, the output limit of the compensation loop is slightly lower than that of the phase-locked loop (PLL) to ensure that even if the correction amount of the compensation loop accumulates to the limit value over a long period, it will not exceed the control capability of the PLL. Therefore, the PLL-based frequency controller proposed during grid-connected operation will not interfere with the normal grid following characteristics.

[0070] like Figure 4 As shown, when the AC circuit breaker S is open and the system is in islanded operation, the inverter independently supplies power to the load, and the PLL loses its external phase reference. The input error signal no longer reflects the true frequency requirement, and the transfer function of the phase-locked loop branch... Output frequency correction Rapid drop. Once the controller outputs the angular frequency... Deviation from rated angular frequency , deviation signal The value immediately increases, activating the feedforward compensation loop as the primary control. The compensation loop then generates a reverse correction. Control the system frequency at a fixed frequency reference. Therefore, the limiting value of the compensation loop must be greater than the frequency offset caused by the phase-locked loop to ensure that the compensation loop has sufficient frequency support capability.

[0071] Due to the presence of the feedforward compensation loop, the inverter using the proposed frequency controller automatically behaves as a frequency-stable source during islanding, eliminating the need for a dedicated logic judgment module to trigger mode changes. It can automatically adjust the dominant control based on the system state, thereby achieving stable frequency control. Furthermore, this improved structure is based on the traditional SRF-PLL structure, offering a simple design. The logic-free design significantly reduces the complexity of the controller program, thus improving the overall reliability of the inverter to some extent.

[0072] II. Small-signal stability analysis of the inverter under proposed frequency control

[0073] Traditional grid-connected inverters exhibit negative damping characteristics in certain frequency bands. Under weak grid conditions, the grid impedance and inverter impedance interact, causing the inverter to fall into the negative damping region, which can easily lead to oscillation and instability. Therefore, it is necessary to perform sequence impedance modeling on grid-connected inverters using phase-locked loop (PLL)-based frequency controllers, analyze the small-signal stability of the grid-connected system using the impedance method, and verify the adaptability of the proposed control under weak grid conditions.

[0074] 2.1 Inverter sequence impedance modeling under frequency control

[0075] First, using harmonic linearization, a sequence impedance model of the inverter is established. Taking phase A as an example, assuming a small signal of positive and negative sequence voltage disturbance is applied to point PCC, the current disturbance response will be obtained, defined as:

[0076] (1),

[0077] in, and These are the instantaneous voltage and current of phase A, respectively. and These are the fundamental voltage and current amplitudes, respectively. The fundamental angular frequency, The positive-sequence perturbation angular frequency, The negative sequence perturbation angular frequency. For time, The initial phase of the fundamental current. and These are the positive-sequence disturbance voltage and current amplitudes, respectively. and These represent the initial phases of the positive-sequence disturbance voltage and current, respectively. and These are the negative sequence disturbance voltage and current amplitudes, respectively. and These are the initial phases of the negative sequence disturbance voltage.

[0078] The expressions for the voltage and current at point PCC in the frequency domain are:

[0079] (2),

[0080] in, and The frequency domain representations of phase A voltage and current are shown below. The amplitude of the fundamental voltage. and These represent the positive-sequence and negative-sequence disturbance voltage amplitudes, respectively. This represents the initial phase of the fundamental voltage.

[0081] Under steady-state conditions, the converter PLL tracks the voltage phase angle of the grid-connected converter PCC in real time. The dq coordinate system is aligned with the system's dq coordinate system. This is based on the Park transformation matrix. The frequency domain expressions for the voltage and current dq components are:

[0082] (3),

[0083] (4),

[0084] in, The fundamental angular frequency, This represents the DC component at the fundamental frequency. It is the imaginary unit.

[0085] During small-signal disturbances, the controller's dq coordinate system is no longer aligned with the grid's dq coordinate system, resulting in an angular difference between the two coordinate systems. ,Right now , This refers to the small-signal deviation between the phase angle of the phase-locked loop (PLL) output and the fundamental phase angle of the grid voltage. The impact of small disturbances in the PLL on the dq components needs to be considered.

[0086] because It is very small, and can be approximated as follows:

[0087] (5),

[0088] The perturbation Park transformation matrix of the phase-locked loop will be considered. Using the ideal Park transformation matrix and This means that we can obtain:

[0089] (6),

[0090] in, .

[0091] Therefore, the voltage frequency domain expression considering small-signal disturbances is:

[0092] (7),

[0093] in, and These are the d-axis voltage components and q-axis voltage components in the dq rotating coordinate system after considering the small-signal disturbance of the phase-locked loop; and These are the d-axis and q-axis steady-state voltage components obtained after performing the ideal Park transformation.

[0094] Based on the phase-locked loop-based frequency controller structure shown in the figure, we can see that:

[0095] (8),

[0096] in, For the Laplace operator; the transfer function of the PI controller in the basic phase-locked loop. , and These are the proportional and integral coefficients, respectively; the transfer function of the PI controller in the feedforward compensation loop. , and These are the proportional and integral coefficients, respectively.

[0097] According to equations (4) and (5), Frequency domain expression It can be set as:

[0098] (9),

[0099] in, and These are the transfer functions for positive-order and negative-order perturbations, respectively.

[0100] Combining equations (7), (8), and (9), we can obtain:

[0101] (10)

[0102] Therefore, we can obtain Frequency domain components:

[0103] (11),

[0104] in, .

[0105] Meanwhile, under small-signal disturbances, the sine and cosine functions of the output phase angle of the frequency controller based on the phase-locked loop are used as approximations:

[0106] (12)

[0107] in, This is the actual phase angle output by the phase-locked loop.

[0108] By combining equations (9), (10), and (12), we can obtain:

[0109] (13)

[0110] The current components in the three-phase stationary coordinate system, when transformed to the dq rotating coordinate system, are:

[0111] (14)

[0112] By combining equations (13) and (14), we obtain The frequency domain expression is:

[0113] (15)

[0114] According to the instantaneous power calculation formula:

[0115] (16)

[0116] in, and These represent the instantaneous active and reactive power outputs of the inverter, respectively.

[0117] Substituting equation (4) into equation (16), we obtain the frequency domain expressions for active and reactive power as follows:

[0118] (17)

[0119] In the formula, The superscript * indicates the conjugate operation.

[0120] Based on the power loop control structure, we can obtain The expression is:

[0121] (18)

[0122] in, This is the reference value for the d-axis voltage output of the power loop. The active power setpoint, This is the transfer function of the power loop PI regulator.

[0123] Since the power is given as a constant, according to equations (17) and (18), the frequency domain expression of the power loop output can be obtained as follows:

[0124] (19).

[0125] Based on the PI control and dq decoupling of the voltage loop, the voltage loop expression can be obtained as follows:

[0126] (20)

[0127] in, This is the reference value for the d-axis current output by the power loop. This is the transfer function of the voltage loop PI regulator. This represents the voltage feedforward decoupling coefficient.

[0128] By combining equations (11) and (20), the frequency domain expression for the current output can be obtained as follows:

[0129] (twenty one).

[0130] Similarly, the current loop output, i.e., the modulated wave, can be obtained. The frequency domain expression is:

[0131] (twenty two).

[0132] The three-phase stationary coordinate system can be obtained through the inverse Park transformation. Taking phase a as an example, its frequency domain expression is:

[0133] (twenty three),

[0134] The voltage feedforward method using low-pass filtering can be expressed as follows:

[0135] (twenty four),

[0136] in, The signal is a-phase modulated wave. This is the control signal for phase a output from the current loop. This is the low-pass filter voltage feedforward transfer function.

[0137] According to the inverter grid-connected circuit diagram, the relationship between the output voltage, current, and PCC point voltage of the grid-connected inverter is as follows:

[0138] (25)

[0139] in, For the Laplace operator, For the inverter-side filter inductor, This is the current at the three-phase grid connection point. It is a three-phase modulated wave signal.

[0140] By combining equations (23), (24), and (25), the positive and negative sequence output impedances of the inverter can be obtained. and expression:

[0141] (26)

[0142] (27)

[0143] in, , .

[0144] 2.2 Frequency sweep verification and stability analysis of inverter sequence impedance model

[0145] The parameters of the inverter simulation model are shown in Table 1:

[0146] Table 1 Parameters of Grid-Connected Inverters

[0147]

[0148] To extract the swept admittance model in the simulation, a swept frequency program needs to be designed. Simulation software is used to generate a series of disturbance signal frequencies within a certain range. Each time, positive-sequence or negative-sequence voltage disturbances at each frequency are added separately. Then, FFT analysis is used to read the response at the response frequency and store it in an array. Finally, the swept frequency discrete points of the simulation model are obtained according to the definition. The correctness of the impedance model is verified by fitting the swept frequency points to the theoretical curve.

[0149] like Figure 5 As shown, the solid lines represent the equivalent analytical sequence impedance model of the inverter, and the discrete points represent the simulation frequency sweep measurement results. It can be seen that the matching effect of each frequency band is good, which proves the correctness of the proposed inverter output impedance model under frequency control.

[0150] Based on impedance analysis, plot... and The Nyquist curve, depending on whether it encloses The stability of the grid-connected system is determined by several factors, including grid impedance. The grid inductance is 6mH and the grid resistance is 1m. The corresponding short-circuit ratio (SCR) is 2.6. For example... Figure 6 As shown, an inverter with a phase-locked loop-based frequency controller connected to a weak power grid with an SCR of 2.6 does not have its corresponding Nyquist curve included. Distance surrounding There is still room for improvement. Analysis shows that in a weak grid scenario with a short-circuit ratio of 2.6, the inverter using a phase-locked loop-based frequency controller exhibits good stability when connected to the grid, and the proposed frequency-controlled inverter has strong adaptability to weak grids.

[0151] III. Simulation and Experimental Verification

[0152] 3.1 Simulation Verification

[0153] The parameters of the simulation model are shown in Table 3-1. Both the traditional SRF-PLL and the proposed phase-locked loop-based frequency controller are used, and the theoretical analysis is verified by comparing the inverter frequencies. For ease of comparison, the output deviation of the phase-locked loop is limited to 10Hz.

[0154] like Figure 7 As shown in (a), using a traditional SRF-PLL, the inverter's output frequency drops during off-grid operation, but remains around 42.5Hz after the drop. Based on the design principles, the compensation loop output limit is set at 9Hz to meet the requirements for grid-connected stable synchronization and off-grid frequency support. Figure 7 (b) shows that when the inverter with frequency controller is off-grid, the inverter output frequency is adjusted and restored to the rated frequency, which proves the effectiveness of the design.

[0155] 3.2 Experimental Verification

[0156] To verify the theoretical analysis of the proposed control, an experimental platform was built, such as... Figure 8 As shown, the entire platform consists of an oscilloscope, a feedback bidirectional DC power supply, a power hardware controller equipped with a converter, a resistive load box, an inductor box, an autotransformer, etc.

[0157] The core component is the power hardware controller, which mainly consists of a DSP core board, a signal conditioning board, and a main power circuit. The main control CPU is a TI TMS320F28335, which, along with peripheral circuits, forms a minimum system and incorporates conditioning and logic control circuits. The signal conditioning board primarily includes sensor conditioning circuits, overvoltage and overcurrent protection circuits, and CPLD logic protection circuits. The converter internally employs a three-phase, two-level full-bridge structure, using Infineon's FS100R12KT4G switching transistors. Four film capacitors and eight electrolytic capacitors are added to the DC bus. The four film capacitors are connected in parallel to absorb voltage spikes across the power transistors; the eight electrolytic capacitors are used in a 2-series-4-parallel configuration to reduce the impact of ripple current on the capacitors while meeting voltage and capacitance requirements. The power device parameters of the experimental platform are shown in Table 2.

[0158] Table 2 Power Device Parameters of Experimental Platform

[0159]

[0160] The control parameters for the grid-connected and off-grid experiments are shown in Table 2, with a load of 14.5. The inverter employed both a traditional SRF-PLL and the proposed phase-locked loop-based frequency controller for grid-connected / off-grid and off-grid / reconnected experiments. For ease of comparison, the PLL output frequency was limited to 40-60Hz. In the experimental waveforms, the red waveform represents the line voltage at the PCC point. The green waveform represents the load current. The blue waveform represents the grid-connected current. .

[0161] Figure 9 These are experimental waveforms of an inverter operating between grid connection and off-grid mode using a conventional SRF-PLL. Figure 9 (b) It can be seen that the time axis is 20ms per division, corresponding to a period of 50Hz, and the marked load current A cycle significantly larger than one division indicates a frequency below 50Hz. Experiments show that while the system can regain stability when operating off-grid using a traditional SRF-PLL, the frequency of the system's voltage and current drops significantly.

[0162] Figure 10 These are experimental waveforms of an inverter operating between grid connection and off-grid mode using a conventional SRF-PLL. Figure 10 (a) It can be seen that when the inverter reconnects from an off-grid state, although the grid-connected system voltage and current can stabilize, the inverter frequency is below 50Hz in the off-grid state, and there may be a large phase difference between the grid angle and the controller angle during grid connection, resulting in a large impact on the grid-connected current. Figure 10 (b) It can be seen that, in the off-grid state, the voltage and current of the inverter in steady state are still lower than 50Hz.

[0163] Figure 11 The waveforms are from the grid-connected-off-grid experiment of the inverter using a phase-locked loop (PLL)-based frequency controller. Figure 11 (a) It can be seen that by using a frequency controller based on a phase-locked loop, the inverter maintains synchronous and stable operation with the grid during grid-connected operation, and enters islanded control after being disconnected from the grid. After a short adjustment, the system also returns to stability. The inverter can operate stably in both grid-connected and off-grid states. Figure 11 (b) It can be seen that the load current One cycle equals one division, indicating that the corresponding frequency is controlled at 50Hz. Experiments show that when the inverter uses the proposed phase-locked loop-based frequency controller, the frequency of the system voltage and current can quickly recover to 50Hz when switching from grid-connected to off-grid operation.

[0164] Figure 12The experimental waveforms of the inverter during grid-connected and off-grid operation using a phase-locked loop (PLL)-based frequency controller are shown. It can be seen that in off-grid mode, the inverter's steady-state voltage and current remain at the rated frequency of 50Hz. After adopting the proposed PLL-based frequency controller, the system's voltage and current remain stable when the inverter switches from off-grid to grid-connected operation. Furthermore, since the inverter operates at 50Hz during off-grid operation, the phase difference between the inverter and the grid is small during grid-connection, resulting in a smoother grid-connection process with minimal current surge.

[0165] Experimental results show that the proposed phase-locked loop-based frequency controller enables the inverter to operate synchronously and stably when connected to the grid, and can also maintain the system at the rated frequency when disconnected from the grid. Compared with the traditional SRF-PLL, it has a significant advantage in off-grid scenarios.

[0166] Figure 13 The waveforms for an inverter connected to a weak grid with a phase-locked loop (PLL)-based frequency controller are shown, where red represents the grid-connected voltage. Blue represents grid-connected current. As shown in the figure, when connected to a weak grid with SCR=2.6, the inverter waveform under the proposed frequency control is good, and the voltage and current of the grid-connected system are stable without distortion. Experiments demonstrate that even under weak grid conditions, the proposed phase-locked loop-based frequency controller does not interfere with the normal grid following characteristics, and the inverter under this control strategy has good adaptability to weak grids.

[0167] In summary, this embodiment proposes a phase-locked loop (PLL)-based frequency controller for grid-connected and off-grid applications. Compared to traditional SRF-PLLs, this frequency controller eliminates the need for additional logic checks to switch control, automatically adapts to both grid-connected and off-grid operating states, and possesses grid-connected synchronization tracking capability and off-grid frequency self-maintenance capability. Furthermore, the inverter under the proposed frequency control exhibits good stability under weak grid conditions and demonstrates a certain degree of adaptability to weak grid environments.

[0168] While specific embodiments of this application have been described herein with reference to them, it should be understood that these embodiments are merely examples of the principles and applications of this application. Therefore, it should be understood that many modifications can be made to the exemplary embodiments, and other arrangements can be designed without departing from the spirit and scope of this application as defined by the appended claims. It should be understood that different dependent claims and features described herein can be combined in ways different from those described in the original claims. It is also understood that features described in conjunction with individual embodiments can be used in other described embodiments.

Claims

1. A PLL-based frequency controller, characterized by, include: The first branch is used to generate the first frequency correction amount based on the q-axis component of the common coupling point voltage; The second branch is used to generate a second frequency correction value by utilizing the deviation between the fixed frequency reference and the real-time output frequency of the phase-locked loop; The synthesis unit is used to synthesize the first frequency correction amount, the second frequency correction amount, and the rated angular frequency to achieve correction of the phase-locked loop output frequency.

2. The PLL-based frequency controller of claim 1, wherein, The first branch includes: Park Transform Unit: Used to perform Park transformation on the voltage at the common coupling point to obtain the q-axis component; The transfer function of a traditional phase-locked loop branch is used to take the q-axis component as a phase error signal and modulate the phase error signal to generate a first frequency correction value.

3. The PLL-based frequency controller of claim 1 or 2, wherein, The second branch includes: Subtractor: Used to subtract the fixed frequency reference from the real-time output frequency of the phase-locked loop to obtain the deviation between the two; The transfer function of the frequency compensation loop is used to modulate the deviation and generate a second frequency correction value.

4. A frequency control method based on PLL, characterized in that, include: The first frequency correction is generated based on the q-axis component of the voltage at the common coupling point; A second frequency correction value is generated by using the deviation between a fixed frequency reference and the real-time output frequency of the phase-locked loop; The first frequency correction value, the second frequency correction value, and the rated angular frequency are combined to achieve the correction of the phase-locked loop output frequency.

5. The PLL-based frequency controller according to claim 4, characterized in that, The step of generating the first frequency correction amount based on the q-axis component of the common coupling point voltage includes: The q-axis component is obtained by performing a Park transform on the voltage at the common coupling point. The q-axis component is used as a phase error signal and fed into the transfer function of a traditional phase-locked loop branch to generate a first frequency correction value.

6. The PLL-based frequency controller according to claim 4 or 5, characterized in that, The method of generating a second frequency correction value by utilizing the deviation between a fixed frequency reference and the real-time output frequency of the phase-locked loop includes: The deviation between the fixed frequency reference and the real-time output frequency of the phase-locked loop is obtained by subtracting the two frequencies. The deviation is passed through the transfer function of the frequency compensation loop to generate a second frequency correction value.

Images