Inductive current sampling circuit, switching power converter, chip and electronic device

Abstract

This application provides an inductor current sampling circuit, a switching power converter, a chip, and an electronic device, relating to the field of electronic circuit technology. The inductor current sampling circuit includes: a lower MOSFET sampling circuit for acquiring the inductor current of the switching power converter circuit using the current mirror method of the lower MOSFET to obtain the inductor sampling current; an upper MOSFET fitting circuit for charging a first capacitor based on a first code value during the upper MOSFET's conduction phase to fit the rising phase current waveform of the inductor current at the sampling output terminal; a lower MOSFET fitting circuit for discharging the first capacitor based on a second code value within a first preset time after the lower MOSFET is turned on to fit the first falling phase current waveform of the inductor current at the sampling output terminal; a first switch turning on at the end of the first preset time and turning off when the lower MOSFET is turned off; and a first capacitor converting the inductor sampling current into the second falling phase current waveform of the inductor current when the first switch is turned on. This achieves high accuracy and high robustness in inductor current detection.

Description

Technical Field

[0001] This application relates to the field of electronic circuit technology, and in particular to an inductor current sampling circuit, a switching power supply converter, a chip, and an electronic device. Background Technology

[0002] A switching power supply conversion circuit is a power conversion device that uses high-frequency switching to boost, buck, or stabilize the input electrical energy. It is widely used in portable electronic devices, computer and communication equipment, medical equipment, and industrial equipment.

[0003] In switching power supply conversion circuits, current information of the inductor can be collected through a current sampling circuit. This current information can be used to realize functions such as current mode control, overcurrent detection, and multiphase current sharing control in multiphase converter systems. Figure 1 This diagram illustrates the principle of collecting current information from the inductor of a switching power supply conversion circuit in related technologies. (Refer to...) Figure 1 As shown, a full sampling circuit can be used to acquire the inductor current of a switching power supply conversion circuit. This full sampling circuit can achieve inductor current sampling through the series resistor method, the inductor direct current resistance (DCR) sampling method, or the current mirror method. Among them, the series resistor method requires a resistor to be connected in series directly in the power path, resulting in significant power loss; the inductor DCR sampling method has low sampling accuracy due to large inductor parameter errors and large temperature drift; the current mirror method achieves inductor current sampling by mirroring the current of both the upper and lower transistors of the switching power supply conversion circuit. Although it can achieve better sampling accuracy, for high-transfer-ratio switching power supply conversion circuits, the high switching frequency required necessitates a sampling operational amplifier with extremely high bandwidth when sampling the inductor current from the upper transistor. This places high demands on the BCD (Bipolar-CMOS-DMOS) process. Moreover, due to the presence of complex parasitic capacitances, the high-bandwidth sampling loop has the risk of instability. While high-efficiency switching power supply circuits can achieve low switching losses by compressing the dead time to the extreme, a short dead time can cause excessive current changes during the switching phase. This can lead to large oscillation amplitudes and prolonged damped oscillations in the switching power supply circuit, which can easily cause the parasitic bipolar junction transistor (BJT) at the sampling tube to conduct, thereby reducing sampling accuracy and potentially causing the chip to burn out.

[0004] Therefore, for high-transfer-ratio switching power supply conversion circuits, the inductor current sampling schemes in related technologies cannot simultaneously meet the detection requirements of both detection accuracy and high robustness. Summary of the Invention

[0005] This application provides an inductor current sampling circuit, a switching power converter, a chip, and an electronic device to achieve high-precision detection of inductor current in a switching power conversion circuit and ensure the robustness of inductor current detection.

[0006] In a first aspect, this application provides an inductor current sampling circuit, including a first sampling terminal, a second sampling terminal, a lower MOSFET sampling circuit, a first switch, a first capacitor, an upper MOSFET fitting circuit, a lower MOSFET fitting circuit, and a sampling output terminal; The first input terminal of the lower MOSFET sampling circuit serves as the first sampling terminal and is connected to the first terminal of the switching power conversion circuit. The second input terminal of the lower MOSFET sampling circuit serves as the second sampling terminal and is connected to the second terminal of the switching power conversion circuit. The output terminal of the lower MOSFET sampling circuit is connected to the sampling output terminal via the first switch. The first capacitor is connected between the sampling output terminal and ground. The output terminal of the upper MOSFET fitting circuit is connected to the positive plate of the first capacitor. The first terminal of the lower MOSFET fitting circuit is connected to the sampling output terminal. The second terminal of the lower MOSFET fitting circuit is connected to ground. The power supply terminal of the upper MOSFET fitting circuit is used to input the power supply voltage. The first terminal of the switching power conversion circuit is the connection terminal where the lower MOSFET is connected to the inductor in the switching power conversion circuit, and the second terminal of the switching power conversion circuit is the connection terminal where the lower MOSFET is connected to ground. The lower transistor sampling circuit is used to acquire the current of the inductor in the switching power supply conversion circuit using the current mirror method of the lower transistor, so as to obtain the inductor sampling current. The upper transistor fitting circuit is used to charge the first capacitor based on a first code value during the upper transistor conduction phase of the switching power supply conversion circuit, so as to fit the rising phase current waveform of the inductor current at the sampling output terminal; the first code value is used to control the rising slope of the rising phase current waveform. The lower transistor fitting circuit is used to discharge the first capacitor based on a second code value within a first preset time after the lower transistor of the switching power supply conversion circuit is turned on, so as to fit the first falling phase current waveform of the inductor current at the sampling output terminal; the second code value is used to control the falling slope of the first falling phase current waveform. The first switch is turned on at the end of the first preset duration and turned off when the lower tube is turned off; when the first switch is turned on, the first capacitor directly converts the inductor sampling current into the second falling phase current waveform of the inductor current at the sampling output terminal.

[0007] In one alternative design, the upper tube fitting circuit includes a first current digital-to-analog converter and a second switch; The power supply terminal of the first current digital-to-analog converter is used as the power supply terminal of the upper tube fitting circuit to input the power supply voltage. The current output terminal of the first current digital-to-analog converter is connected to the first terminal of the second switch. The second terminal of the second switch is used as the output terminal of the upper tube fitting circuit to connect to the positive plate of the first capacitor. The code value input terminal of the first current digital-to-analog converter is used to input the first code value. The second switch is turned on when the upper tube is turned on, and turned off when the upper tube is turned off; The first current-to-analog converter is used to convert the first code value into a first current input to the first capacitor when the second switch is turned on, so as to charge the first capacitor.

[0008] In an optional design, the upper transistor fitting circuit further includes a first code value control circuit; the first input terminal of the first code value control circuit is connected to the output terminal of the lower transistor sampling circuit as the first input terminal of the upper transistor fitting circuit, the second input terminal of the first code value control circuit is connected to the sampling output terminal as the second input terminal of the upper transistor fitting circuit, and the output terminal of the first code value control circuit is connected to the code value input terminal of the first current digital-to-analog converter. The first code value control circuit is used to collect the first voltage output by the output terminal of the lower tube sampling circuit and the second voltage output by the sampling output terminal when it receives the first enable signal sent by the switching power supply conversion circuit, and compare the second voltage with the first voltage, and adjust the first code value input to the first current digital-to-analog converter once according to the obtained first comparison result; The first enable signal is sent by the switching power supply conversion circuit after the lower transistor is turned on for a second preset time, wherein the second preset time is less than the first preset time.

[0009] In one alternative design, the first code value control circuit is specifically used for: If the first comparison result indicates that the second voltage is less than the first voltage, increment the first code value by 1; If the first comparison result indicates that the second voltage is greater than the first voltage, the first code value is decremented by 1.

[0010] In one alternative design, the lower-tube fitting circuit includes a second current-to-analog converter and a third switch; The first terminal of the third switch is connected to the sampling output terminal as the first terminal of the lower transistor fitting circuit. The second terminal of the third switch is connected to the power supply input terminal of the second current digital-to-analog converter. The current output terminal of the second current digital-to-analog converter is connected to ground as the second terminal of the lower transistor fitting circuit. The code value input terminal of the second current digital-to-analog converter is used to input the second code value. The third switch is turned on when the lower tube is turned on; The second current-to-analog converter is used to convert the second code value into a second current, and to discharge the first capacitor through the second current when the third switch is turned on.

[0011] In an alternative design, the lower tube fitting circuit further includes a second code value control circuit; The first connection terminal of the second code value control circuit is connected to the sampling output terminal as the third terminal of the lower tube fitting circuit, the second connection terminal of the second code value control circuit is connected to the power supply input terminal of the second current digital-to-analog converter, and the output terminal of the second code value control circuit is connected to the code value input terminal of the second current digital-to-analog converter. The second code value control circuit is used to adjust the second code value input to the second current digital-to-analog converter once based on the second voltage output by the sampling output terminal after the first switch is turned on for a third preset time, so that the slope of the first falling phase current waveform approaches the slope of the second falling phase current waveform cycle by cycle. Wherein, the period is the switching period of the switching power supply conversion circuit.

[0012] In one alternative design, the second code value control circuit includes a second code value adjustment circuit, a second capacitor, a fourth switch, and a fifth switch; The first input terminal of the second code value adjustment circuit is connected to the sampling output terminal as the first connection terminal of the second code value control circuit. The second input terminal of the second code value adjustment circuit is grounded through the second capacitor and connected to the power supply input terminal of the second current digital-to-analog converter through the fourth switch. The output terminal of the second code value adjustment circuit is connected to the code value input terminal of the second current digital-to-analog converter as the output terminal of the second code value control circuit. The fifth switch is connected between the first input terminal and the second input terminal of the second code value adjustment circuit. The fifth switch is turned on after a third preset time after the first switch is turned on, and is turned off when the on-time is equal to a fourth preset time, so that the voltage of the positive plate of the second capacitor is equal to the voltage of the positive plate of the first capacitor during the on-time. The fourth switch is turned on before the fifth switch is turned off, and is turned off when the lower tube is turned off; the third switch is turned off when the fourth switch is turned on. The second code value adjustment circuit is used to compare the positive plate voltage during the discharge process of the second capacitor with the second voltage output by the sampling output terminal when receiving the second enable signal sent by the switching power supply conversion circuit, and adjust the second code value once according to the obtained second comparison result; wherein, the second enable signal is sent by the switching power supply conversion circuit after the fourth switch is turned on for a fifth preset time.

[0013] In one alternative design, the second code value adjustment circuit is specifically used for: If the second comparison result indicates that the positive plate voltage during the discharge process of the second capacitor is greater than the second voltage, then the second code value is incremented by 1. If the second comparison result indicates that the positive plate voltage during the discharge process of the second capacitor is less than the second voltage, then the second code value is decremented by 1.

[0014] In an alternative design, the inductor current sampling circuit further includes a third capacitor connected between the output of the lower tube sampling circuit and ground. The third capacitor is used to filter the inductor sampling current output by the lower transistor sampling circuit.

[0015] In a second aspect, this application provides a switching power converter, including a switching power conversion circuit and an inductor current sampling circuit as described in any of the first aspects above. The first sampling terminal of the inductor current sampling circuit is connected to the first terminal of the switching power supply conversion circuit, and the second sampling terminal of the inductor current sampling circuit is connected to the second terminal of the switching power supply conversion circuit; wherein, the first terminal of the switching power supply conversion circuit is the connection terminal between the lower transistor and the inductor in the switching power supply conversion circuit, and the second terminal of the switching power supply conversion circuit is the connection terminal between the lower transistor and ground.

[0016] Thirdly, this application provides a chip including an inductor current sampling circuit as described in any of the first aspects above, or including a switching power converter as described in the second aspect above.

[0017] Fourthly, this application provides an electronic device, including a switching power converter as described in the second aspect above, or including a chip as described in the third aspect above.

[0018] The inductor current sampling circuit, switching power converter, chip, and electronic device provided in this application include a first sampling terminal, a second sampling terminal, a lower MOSFET sampling circuit, a first switch, a first capacitor, an upper MOSFET fitting circuit, a lower MOSFET fitting circuit, and a sampling output terminal. The lower MOSFET sampling circuit is used to acquire the current of the inductor in the switching power converter circuit using the current mirror method of the lower MOSFET to obtain the inductor sampling current. The upper MOSFET fitting circuit is used to charge the first capacitor based on a first code value during the upper MOSFET conduction phase of the switching power converter circuit, so as to fit the rising phase current waveform of the inductor current at the sampling output terminal. The first code value in the circuit is used to control the rising slope of the current waveform during the rising phase. The lower MOSFET fitting circuit discharges the first capacitor based on the second code value within a first preset time after the lower MOSFET of the switching power supply conversion circuit is turned on, so as to fit the first falling phase current waveform of the inductor current at the sampling output terminal. The second code value is used to control the falling slope of the first falling phase current waveform. The first switch is turned on at the end of the first preset time and turned off when the lower MOSFET is turned off. When the first switch is turned on, the first capacitor directly converts the inductor sampling current into the second falling phase current waveform of the inductor current at the sampling output terminal. In this way, the rising phase current waveform of the inductor current can be fitted by current fitting during the upper MOSFET's on phase, the first falling phase current waveform of the inductor current can be fitted by current fitting during the high noise phase when the lower MOSFET is just turned on, and the second falling phase current waveform of the inductor current can be acquired by current mirroring method of the lower MOSFET during the low noise phase after the lower MOSFET is turned on. Finally, the inductor current information of the entire switching cycle can be summarized and integrated, realizing high-precision sampling output of the inductor current. This scheme only uses the current mirror method for sampling the lower transistor, eliminating the need for the high-bandwidth sampling operational amplifier corresponding to the upper transistor, and eliminating the need to consider excessive parasitics. While ensuring high-precision detection of inductor current, it also ensures the robustness of inductor current detection. In particular, for high-transfer-ratio and high-efficiency switching power supply conversion circuits, it can guarantee high accuracy and high robustness of inductor current detection. Attached Figure Description

[0019] Figure 1 This is a schematic diagram illustrating the principle of collecting current information from the inductor of a switching power supply conversion circuit in related technologies. Figure 2 This is a schematic diagram of a switching power supply conversion circuit provided in an embodiment of this application; Figure 3 This is one of the structural schematic diagrams of the inductor current sampling circuit provided in the embodiments of this application; Figure 4 This is a schematic diagram of the structure of a lower transistor sampling circuit provided in an embodiment of this application; Figure 5 This is a second schematic diagram of the structure of the inductor current sampling circuit provided in the embodiments of this application; Figure 6This is the third schematic diagram of the structure of the inductor current sampling circuit provided in the embodiments of this application; Figure 7 A waveform diagram illustrating the switching timing of the inductor current sampling circuit provided in an embodiment of this application; Figure 8 This is a schematic diagram of the switching timing of the inductor current sampling circuit provided in an embodiment of this application during one switching cycle; Figure 9 This is a schematic diagram of the voltage waveform output from the sampling output terminal of the inductor current sampling circuit provided in the embodiments of this application; Figure 10 This is a schematic diagram of the structure of a switching power supply converter provided in an embodiment of this application. Detailed Implementation

[0020] In this application, "at least one" means one or more, and "more than one" means two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can mean: A alone, A and B simultaneously, or B alone. A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c alone can mean: a alone, b alone, c alone, a combination of a and b, a combination of a and c, a combination of b and c, or a, b, and c. a, b, and c can be single or multiple. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0021] The terms “center,” “longitudinal,” “lateral,” “up,” “down,” “left,” “right,” “front,” and “rear,” etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0022] The terms "connected" and "connected" should be interpreted broadly. For example, in circuit structures, "connected" or "connected" can refer not only to physical connections but also to electrical or signal connections. This could be a direct connection (physical connection) or an indirect connection via at least one intermediate component, as long as the circuit is connected. It could also refer to the internal connection between two components. Similarly, a signal connection can refer to a connection via a circuit or a medium, such as radio waves. Those skilled in the art will understand the specific meaning of these terms in this application based on the specific circumstances.

[0023] The core principle of a switching power supply conversion circuit is to control the charging and discharging process of energy storage elements by periodically switching on and off the switching devices, thereby achieving voltage boosting / pull-down conversion by adjusting the duty cycle. For example, Figure 2 This paper shows a schematic diagram of a switching power supply conversion circuit according to an embodiment of this application. (Refer to...) Figure 2 As shown, taking a buck converter circuit as an example, this converter circuit can include an upper transistor QH, a lower transistor QL, an inductor L, and an output capacitor Cout. The first terminal of the upper transistor QH serves as the input terminal VIN of the converter circuit, used to input the voltage signal to be converted. The second terminal of the upper transistor QH is connected to the first terminal of inductor L and the first terminal of the lower transistor QL. The second terminal of the lower transistor QL is connected to ground PGND. The second terminal of inductor L serves as the output terminal VOUT of the converter circuit, used to output the converted output voltage. The output capacitor Cout is connected between the second terminal of inductor L and the second terminal of the lower transistor QL. The control terminals of the upper transistor QH and the lower transistor QL are connected to their respective driver circuits (not shown in the figure). The upper transistor QH and the lower transistor QL can periodically alternately conduct under the control of the drive control signals output by their respective driver circuits, causing the inductor L to periodically charge and discharge, thus achieving the buck conversion of the input power.

[0024] Both the upper transistor QH and the lower transistor QL can be N-type metal-oxide-semiconductor field-effect transistors (MOS) or P-type MOS transistors. For example, when both the upper transistor QH and the lower transistor QL are N-type MOS transistors, their first electrode is the drain, their second electrode is the source, and their control electrode is the gate.

[0025] For switching power supply conversion circuits, the current information of its inductor L can be collected by a current sampling circuit. This current information can be used to realize functions such as current mode control, overcurrent detection, and multiphase current sharing control in multiphase converter systems.

[0026] Combination Figure 1 and Figure 2As shown, in related technologies, a full sampling circuit can be used to collect the inductor current of a switching power supply conversion circuit. This full sampling circuit can sample the inductor current in the switching power supply conversion circuit through the series resistance method, the inductor DCR sampling method, or the current mirror method. Among these, the series resistance method samples the inductor current by directly connecting a resistor in series in the power path of the switching power supply conversion circuit; however, the series resistor consumes a certain amount of power, resulting in significant power loss. The inductor DCR sampling method indirectly measures the current flowing through the inductor using its inherent DC resistance (DCR). However, its sampling accuracy is relatively low due to the influence of factors such as the inductance parameters of the inductor L and temperature drift. The current mirror method uses matched transistors to mirror the current of inductor L from both the upper transistor QH and the lower transistor QL in a switching power supply circuit to sample the inductor current. Specifically, at the first terminal E1 and the second terminal E2 of the switching power supply circuit, matched transistors mirror the current of inductor L from the lower transistor QL, and simultaneously at the first terminal E1 and the first terminal of the upper transistor QH, matched transistors mirror the current of inductor L from the upper transistor QH. While the current mirror method can achieve relatively good sampling accuracy, for high-transfer-ratio switching power supply circuits, such as the 16V to 0.8V buck converter circuit used in server power supplies, the high switching frequency requires a sampling amplifier with extremely high bandwidth to achieve accurate sampling of the inductor L current from the upper transistor QH. This places high demands on the BCD process, and the presence of complex parasitic capacitances poses an instability risk to the high-bandwidth sampling loop. While high-efficiency switching power supply circuits can achieve low switching losses by compressing the dead time to the extreme, the short dead time will cause excessive current changes during the switching phase, which will lead to large oscillation amplitude and long-term damped oscillation in the switching power supply circuit. This can easily cause the parasitic BJT at the sampling tube to conduct, thereby reducing the sampling accuracy and potentially causing the chip to burn out.

[0027] Based on this, embodiments of this application provide an inductor current sampling circuit for use in switching power supply conversion circuits, for example, it can be applied to... Figure 2 The switching power supply conversion circuit shown is... It is understandable that... Figure 2 The circuit structure shown is merely a commonly used BUCK-type switching power supply conversion circuit in the art, and does not imply that the inductor current sampling circuit provided in this application embodiment can only be applied to this specific BUCK-type switching power supply conversion circuit. In fact, the inductor current sampling circuit provided in this application embodiment can be applied to, for example... Figure 2 The BUCK-type switching power supply conversion circuit and its related variations shown are illustrated. Furthermore, the inductor current sampling circuit provided in the embodiments of this application can also be applied to boost-type switching power supply conversion circuits of various structures.

[0028] Specifically, the inductor current sampling circuit provided in this application includes a first sampling terminal, a second sampling terminal, a lower MOSFET sampling circuit, a first switch, a first capacitor, an upper MOSFET fitting circuit, a lower MOSFET fitting circuit, and a sampling output terminal. The lower MOSFET sampling circuit uses the current mirror method of the lower MOSFET to collect the current of the inductor in the switching power conversion circuit to obtain the inductor sampling current. During the conduction phase of the upper MOSFET in the switching power conversion circuit, the upper MOSFET fitting circuit charges the first capacitor based on the first code value to fit the rising phase current waveform of the inductor current at the sampling output terminal. The first code value is used to control the rising slope of the rising phase current waveform. During the first preset time after the lower MOSFET of the switching power conversion circuit is turned on, the lower MOSFET fitting circuit discharges the first capacitor based on the second code value to fit the first falling phase current waveform of the inductor current at the sampling output terminal. The second code value is used to control the falling slope of the first falling phase current waveform. The first switch is turned on at the end of the first preset time and turned off when the lower MOSFET is turned off. When the first switch is turned on, the first capacitor directly converts the inductor sampling current collected by the lower MOSFET sampling circuit into the second falling phase current waveform of the inductor current at the sampling output terminal. In this way, by fitting the rising phase current waveform of the inductor current during the high-noise phase (i.e., the on-state phase of the upper transistor), fitting the first falling phase current waveform of the inductor current during the oscillation phase (i.e., the high-noise phase) of the lower transistor, and then sampling the second falling phase current waveform of the inductor current during the remaining stable phase (i.e., the low-noise phase) after the lower transistor is on, the current mirror method of the lower transistor is used to collect the inductor current waveform. This allows for the aggregation and integration of inductor current information for the entire switching cycle, achieving high-precision sampling output. This scheme only performs current mirror sampling on the lower transistor, eliminating the need for a high-bandwidth sampling operational amplifier and avoiding excessive complex parasitics. It ensures both high-precision inductor current detection and robustness of the inductor current detection.

[0029] The following is combined Figures 3-9 The inductor current sampling circuit provided in the embodiments of this application will be described in detail. This inductor current sampling circuit can be applied to various types of switching power supply conversion circuits, especially for high-transfer-ratio switching power supply conversion circuits, where it can achieve better inductor current detection results.

[0030] Figure 3 This paper shows one of the structural schematic diagrams of the inductor current sampling circuit provided in an embodiment of this application. (Refer to...) Figure 3As shown, the inductor current sampling circuit may include a first sampling terminal S1, a second sampling terminal S2, a lower MOSFET sampling circuit 31, a first switch K1, a first capacitor C1, an upper MOSFET fitting circuit 32, a lower MOSFET fitting circuit 33, and a sampling output terminal OUT. The first input terminal of the lower MOSFET sampling circuit 31 serves as the first sampling terminal S1 of the inductor current sampling circuit and is connected to the first terminal of the switching power supply conversion circuit. The second input terminal of the lower MOSFET sampling circuit 31 serves as the second sampling terminal S2 of the inductor current sampling circuit and is connected to the second terminal of the switching power supply conversion circuit. The output terminal P1 of the lower MOSFET sampling circuit 31 is connected to the sampling output terminal OUT through the first switch K1. The first capacitor C1 is connected between the sampling output terminal OUT and ground PGND. The output terminal of the upper MOSFET fitting circuit 32 is connected to the positive plate of the first capacitor C1, and the power supply terminal AVDD of the upper MOSFET fitting circuit 32 is used to input the power supply voltage. The first terminal of the lower MOSFET fitting circuit 33 is connected to the sampling output terminal OUT, and the second terminal of the lower MOSFET fitting circuit 33 is connected to ground PGND. The first terminal of the switching power supply conversion circuit is the connection terminal between the lower transistor and the inductor, and the second terminal of the switching power supply conversion circuit is the connection terminal between the lower transistor and ground (PGND).

[0031] For example, with Figure 2 Taking the switching power supply conversion circuit shown as an example, the first sampling terminal S1 is used to connect to the first terminal E1 of the switching power supply conversion circuit, and the second sampling terminal S2 is used to connect to the second terminal E2 of the switching power supply conversion circuit.

[0032] Among them, the lower transistor sampling circuit 31 is used to collect the current of the inductor in the switching power supply conversion circuit by using the current mirror method of the lower transistor to obtain the inductor sampling current.

[0033] Specifically, with Figure 2 Taking the switching power supply conversion circuit shown as an example, it can be understood that because the switching power supply conversion circuit experiences load transient events in actual operation, the current in the inductor L can be either positive or negative. That is, when the lower transistor QL is turned on, the current may flow from the drain of the lower transistor QL to the inductor L, or it may flow from the drain of the lower transistor QL to ground PGND. Therefore, the lower transistor sampling circuit 31 needs to sample both positive and negative currents simultaneously.

[0034] Based on this, in this embodiment of the application, the designed lower transistor sampling circuit 31 is a current mirror sampling circuit of the lower transistor. The lower transistor sampling circuit 31 can use the matching transistors at the first terminal E1 and the second terminal E2 of the switching power supply conversion circuit to mirror the current of the inductor L from the lower transistor QL and obtain the inductor sampling current.

[0035] For example, Figure 4 A schematic diagram of a lower transistor sampling circuit is shown, with reference to... Figure 4As shown, the lower transistor sampling circuit 31 may include a first transistor Q1, a second transistor Q2, a comparator A0, a first resistor R1, and a second resistor R2. The second terminal of the first transistor Q1 serves as the first input terminal S1 of the lower transistor sampling circuit 31, which is connected to the first terminal of the switching power supply conversion circuit. The first terminal of the first transistor Q1 is connected to the non-inverting input terminal of the comparator A0. The second terminal of the second transistor Q2 serves as the second input terminal S2 of the lower transistor sampling circuit 31, which is connected to the second terminal of the switching power supply conversion circuit. The first terminal of the second transistor Q2 is connected to the negative input terminal of the comparator A0. The negative input terminal of the comparator A0 is connected to the output terminal of the comparator A0 through the first resistor R1. One end of the second resistor R2 is connected to the non-inverting input terminal of the comparator A0, and the other end serves as the reference input terminal VREF of the lower transistor sampling circuit 31 for inputting a reference voltage. The output terminal P1 of the comparator A0 serves as the output terminal of the lower transistor sampling circuit 31 and is connected to the sampling output terminal OUT through the first switch K1.

[0036] In this circuit, the first transistor Q1 and the second transistor Q2 are matched with the lower transistor of the switching power supply conversion circuit, and their control terminals receive the same control signal as the control terminals of the lower transistor. Both the first transistor Q1 and the second transistor Q2 can be N-type MOSFETs or P-type MOSFETs. For example, if both the first transistor Q1 and the second transistor Q2 are N-type MOSFETs, their first terminal is the drain, their second terminal is the source, and their control terminal is the gate.

[0037] according to Figure 4 The lower-side sampling circuit 31, as described above, is used to... Figure 2 Taking the switching power supply conversion circuit shown as an example, the lower transistor sampling circuit 31 can use the first transistor Q1 and the second transistor Q2 to mirror the current of the inductor L from the lower transistor QL, and obtain the inductor sampling current output by the output terminal P1.

[0038] The upper-side fitting circuit 32 is used to charge the first capacitor C1 based on a first code value during the upper-side conduction phase of the switching power supply conversion circuit, so as to fit the rising phase current waveform of the inductor current at the sampling output terminal OUT. The first code value is used to control the rising slope of the rising phase current waveform.

[0039] For example, the first code value can be a preset code value, which can be determined based on the inductance value of the inductor in the applied switching power supply conversion circuit. For instance, different inductance values ​​can correspond to different rising slope code values. In practical applications, the required first code value can be determined from the correspondence between the inductance value and the rising slope code value based on the inductance value in the switching power supply conversion circuit. For each inductance value, a precise rising slope code value can be determined in advance based on experience or experiments, according to the current rising slope of the inductor, as the first code value corresponding to that inductor. Therefore, the preset first code value can accurately characterize the current rising slope of the inductor, and the upper transistor fitting circuit 32 can fit a high-precision rising phase current waveform during the charging process of the first capacitor C1 using the first code value.

[0040] For example, in each switching cycle of the switching power supply conversion circuit, the first code value can be obtained by calibrating the first falling phase current fitted by the lower MOSFET fitting circuit 33 based on the inductor sampling current collected by the lower MOSFET sampling circuit 31 during the first falling phase of the previous switching cycle. Thus, by calibrating the first code value once per switching cycle based on the actual inductor sampling current collected by the lower MOSFET sampling circuit 31, the first code value can be calibrated cycle by cycle, ultimately achieving accurate fitting of the fitted current information of the upper MOSFET's conduction phase to the real-time inductor current information, enabling the upper MOSFET fitting circuit 32 to fit an accurate rising phase current waveform. The first falling phase is a high-noise phase when the lower MOSFET has just turned on. When the falling slope of the inductor current in this phase decreases relative to the previous switching cycle, the rising slope of the inductor current in the upper MOSFET's conduction phase also decreases relative to the previous switching cycle. That is, the rising slope of the inductor current in the upper MOSFET's conduction phase and the falling slope of the inductor current in the first falling phase of the lower MOSFET have the same changing pattern in each switching cycle. Therefore, the first code value can be updated using the calibration result of the current fitted by the lower MOSFET fitting circuit 33 during the first falling phase.

[0041] The lower transistor fitting circuit 33 is used to discharge the first capacitor C1 based on a second code value within a first preset time after the lower transistor of the switching power supply conversion circuit is turned on, so as to fit the first falling phase current waveform of the inductor current at the sampling output terminal OUT. The second code value is used to control the falling slope of the first falling phase current waveform.

[0042] For example, the second code value can be a preset code value, which can be determined based on the inductance value of the inductor in the applied switching power supply conversion circuit. For instance, different inductance values ​​can correspond to different falling slope code values. In practical applications, the required second code value can be determined from the correspondence between the inductance value and the falling slope code value based on the inductance value in the switching power supply conversion circuit. For each inductance value, a precise falling slope code value can be determined in advance based on experience or experiments, according to the current falling slope of the inductor, as the second code value corresponding to that inductor. During the discharge of the first capacitor C1 using this second code value, the lower transistor fitting circuit 33 can fit a high-precision falling phase current waveform in the first falling phase.

[0043] The first falling phase is the high-noise phase when the lower transistor just turns on. Specifically, for a switching power supply conversion circuit, at the instant the lower transistor turns on and off, the lower transistor drive circuit needs to charge the lower transistor capacitor with a large current (up to tens of amperes). The charging current loop will simultaneously contain parasitic resistance, parasitic capacitance, and parasitic inductance. The huge current change will cause loop damped oscillation, with a maximum oscillation amplitude of up to 3V. During the period of large oscillation amplitude, the lower transistor sampling circuit 31 cannot correctly sample the inductor current during that period. That is, in the high-noise phase when the lower transistor just turns on (the first falling phase), the lower transistor sampling circuit 31 cannot correctly sample the inductor current during that period. Therefore, in the high-noise phase when the lower transistor just turns on, the lower transistor fitting circuit 33 can be used to fit the current waveform of the falling phase.

[0044] For example, in each switching cycle of the switching power supply conversion circuit, the second code value can be obtained by calibrating the second falling phase current fitted by the lower MOSFET fitting circuit 33 based on the inductor sampling current collected by the lower MOSFET sampling circuit 31 during the second falling phase of the previous switching cycle. Here, the second falling phase is the low-noise phase after the lower MOSFET is turned on, during which the lower MOSFET sampling circuit 31 can already collect accurate inductor current information. Thus, by calibrating the second code value once per switching cycle based on the actual inductor sampling current collected by the lower MOSFET sampling circuit 31, the second code value can be calibrated cycle by cycle, ultimately achieving accurate fitting of the fitted current information of the high-noise phase immediately after the lower MOSFET is turned on to the real-time inductor current information, enabling the lower MOSFET fitting circuit 33 to fit an accurate first falling phase current waveform.

[0045] The first switch K1 is turned on at the end of the first preset time and turned off when the lower transistor is turned off; when the first switch K1 is turned on, the first capacitor C1 directly converts the inductor sampling current output by the lower transistor sampling circuit 31 into the second falling stage current waveform of the inductor current at the sampling output terminal OUT.

[0046] The first preset duration can be determined empirically or experimentally, for example, 200 nanoseconds (ns). After the lower transistor has been conducting for the first preset duration, due to the low output impedance of the lower transistor sampling circuit 31, the voltage waveform formed at the sampling output terminal OUT after the inductor sampling current sampled by the lower transistor sampling circuit 31 passes through the first capacitor C1 can be considered as the accurate current information of the inductor. In the subsequent sampling stage, the circuit noise caused by oscillation is small, and the RLC oscillation amplitude of the circuit can be ignored. The lower transistor sampling circuit 31 can already sample the accurate current information of the inductor, thus achieving accurate lower transistor current sampling in the low-noise stage. Here, RLC oscillation refers to the electromagnetic oscillation generated by the resistor (R), inductor (L), and capacitor (C).

[0047] The inductor current sampling circuit provided in this application includes a first sampling terminal, a second sampling terminal, a lower MOSFET sampling circuit, a first switch, a first capacitor, an upper MOSFET fitting circuit, a lower MOSFET fitting circuit, and a sampling output terminal. The lower MOSFET sampling circuit is used to acquire the inductor current in the switching power supply conversion circuit using the current mirror method of the lower MOSFET to obtain the inductor sampling current. The upper MOSFET fitting circuit is used to charge the first capacitor based on a first code value during the upper MOSFET conduction phase of the switching power supply conversion circuit to fit the rising phase current waveform of the inductor current at the sampling output terminal, wherein the first code value is used to control the rising slope of the rising phase current waveform. The lower MOSFET fitting circuit is used to discharge the first capacitor based on a second code value within a first preset time after the lower MOSFET of the switching power supply conversion circuit is turned on, to fit the first falling phase current waveform of the inductor current at the sampling output terminal, wherein the second code value is used to control the falling slope of the first falling phase current waveform. The first switch is turned on at the end of the first preset time and turned off when the lower MOSFET is turned off. When the first switch is turned on, the first capacitor directly converts the inductor sampling current into the second falling phase current waveform of the inductor current at the sampling output terminal. In this way, the rising phase current waveform of the inductor current can be fitted using current fitting during the conduction phase of the upper transistor. During the high-noise phase immediately following the conduction of the lower transistor, the first falling phase current waveform can be fitted using the same method. Finally, during the low-noise phase after the lower transistor conducts, the second falling phase current waveform is acquired using the current mirror method of the lower transistor. This allows for the aggregation and integration of inductor current information for the entire switching cycle, achieving high-precision sampling and output of the inductor current. This scheme only uses current mirror sampling for the lower transistor, eliminating the need for the high-bandwidth sampling operational amplifier for the upper transistor and avoiding excessive parasitic interference. While ensuring high-precision inductor current detection, it also guarantees robustness, especially for high-transfer-ratio and high-efficiency switching power supply circuits, ensuring both high accuracy and robustness in inductor current detection. Furthermore, no parasitic resistance is introduced into the power path, preventing additional power loss and ensuring high power conversion efficiency.

[0048] based on Figure 3 The inductor current sampling circuit in the corresponding embodiment, Figure 5 This is a second schematic diagram of the inductor current sampling circuit provided in an embodiment of this application. (Refer to...) Figure 5 As shown, the inductor current sampling circuit may include a first sampling terminal S1, a second sampling terminal S2, a lower MOSFET sampling circuit 31, a first switch K1, a first capacitor C1, an upper MOSFET fitting circuit 32, a lower MOSFET fitting circuit 33, and a sampling output terminal OUT. The upper MOSFET fitting circuit 32 may include a first current digital-to-analog converter (IDAC1) and a second switch K2. The power supply terminal of the first current DAC1 serves as the power supply terminal AVDD of the upper MOSFET fitting circuit 32 for inputting the power supply voltage. The current output terminal of the first current DAC1 is connected to the first terminal of the second switch K2, and the second terminal of the second switch K2 serves as the output terminal of the upper MOSFET fitting circuit 32 and is connected to the positive plate of the first capacitor C1. The code value input terminal M1 of the first current DAC1 is used to input a first code value. This first code value can be used to control the rising slope of the current waveform during the rising phase.

[0049] The second switch K2 is turned on when the upper transistor of the switching power conversion circuit is turned on, and turned off when the upper transistor of the switching power conversion circuit is turned off. The first current digital-to-analog converter IDAC1 is used to convert the received first code value into a first current input to the first capacitor C1 when the second switch K2 is turned on, so as to charge the first capacitor C1.

[0050] For example, the first code value input from the code value input terminal M1 of the first current digital-to-analog converter IDAC1 can be a preset code value, which can be determined based on the inductance value of the inductor in the applied switching power supply conversion circuit. This preset first code value can accurately characterize the current rise slope of the inductor. The first current digital-to-analog converter IDAC1 converts this preset first code value into a first current input to the first capacitor C1, which can charge the first capacitor C1 and realize the charging of the first capacitor C1. During the charging process, the first capacitor C1 can fit a high-precision rising phase current waveform of the inductor.

[0051] For example, the first code value input to the first current digital-to-analog converter IDAC1 can also be calibrated and updated in each switching cycle, so that the fitted rising phase current waveform approximates the real inductor current information cycle by cycle. After multiple switching cycles, the fitted current information of the upper tube in the conducting phase can be accurately fitted to the real-time inductor current information, so that the upper tube fitting circuit 32 can fit an accurate rising phase current waveform.

[0052] In this way, during the conduction phase of the upper transistor, the first current digital-to-analog converter IDAC1 is controlled by the first code value to charge the first capacitor C1. The current waveform of the rising phase of the inductor current can be fitted at the sampling output terminal OUT using the first capacitor C1. Compared with the method of sampling the inductor current using the current mirror method during the conduction phase of the upper transistor in related technologies, this method eliminates the need for the high-bandwidth sampling operational amplifier corresponding to the upper transistor and does not require consideration of excessive complex parasitics. It ensures both high-precision detection of the inductor current and robustness of the inductor current detection.

[0053] Reference Figure 5 As shown, in one embodiment, the lower transistor fitting circuit 33 may include a second current digital-to-analog converter (IDAC2) and a third switch (K3); the first terminal of the third switch (K3) is connected to the sampling output terminal OUT as the first terminal of the lower transistor fitting circuit 33, the second terminal of the third switch (K3) is connected to the power supply input terminal of the second current digital-to-analog converter (IDAC2), the current output terminal of the second current digital-to-analog converter (IDAC2) is connected to ground PGND as the second terminal of the lower transistor fitting circuit 33, and the code value input terminal M2 of the second current digital-to-analog converter (IDAC2) is used to input a second code value.

[0054] The third switch K3 is turned on when the lower transistor of the switching power supply conversion circuit is turned on; the second current digital-to-analog converter IDAC2 is used to convert the second code value into a second current, and discharges the first capacitor C1 through the second current when the third switch K3 is turned on.

[0055] For example, the second code value input from the code value input terminal M2 of the second current digital-to-analog converter IDAC2 can be a preset code value, which can be determined based on the inductance value of the inductor in the applied switching power supply conversion circuit. This preset second code value can accurately characterize the current drop slope of the inductor. The second current digital-to-analog converter IDAC2 can convert the preset second code value into a second current. When the lower transistor of the switching power supply conversion circuit is turned on, the third switch K3 is turned on. At this time, the second current can draw charge from the first capacitor C1 to ground PGND, causing the first capacitor C1 to discharge. The voltage output at the sampling output terminal OUT will gradually decrease as the first capacitor C1 discharges, forming a current drop waveform. The second code value can accurately control the current drop slope of the inductor, so that a high-precision current waveform of the drop phase can be fitted by the discharge of the first capacitor C1 during the first drop phase (the high-noise phase when the lower transistor is just turned on).

[0056] For example, the second code value input to the second current digital-to-analog converter IDAC2 can also be calibrated and updated in the second falling phase of each switching cycle (the low-noise phase after the lower transistor is turned on), so that the current waveform fitted in the first falling phase approximates the real inductor current information cycle by cycle. After multiple switching cycles, the fitted current information in the high-noise phase when the lower transistor is just turned on can be accurately fitted to the real-time inductor current information, so that the lower transistor fitting circuit 33 can fit an accurate first falling phase current waveform.

[0057] In this way, during the high-noise phase when the lower transistor is just turned on, the second current digital-to-analog converter IDAC2 is controlled by the second code value to discharge the first capacitor C1. The first capacitor C1 can be used to fit the current waveform of the first falling phase of the inductor current at the sampling output terminal OUT, which ensures both high-precision detection of the inductor current and robustness of the inductor current detection.

[0058] Based on the inductor current sampling circuits of the above embodiments Figure 6 The third schematic diagram of the inductor current sampling circuit provided in this application embodiment is shown below. Figure 6 As shown, the inductor current sampling circuit may include a first sampling terminal S1, a second sampling terminal S2, a lower MOSFET sampling circuit 31, a first switch K1, a first capacitor C1, an upper MOSFET fitting circuit 32, a lower MOSFET fitting circuit 33, and a sampling output terminal OUT. The upper-side fitting circuit 32 may include a first current digital-to-analog converter (IDAC1), a second switch (K2), and a first code value control circuit 321. The first input terminal of the first code value control circuit 321 is connected to the output terminal P1 of the lower-side sampling circuit 31 as the first input terminal of the upper-side fitting circuit 32. The second input terminal of the first code value control circuit 321 is connected to the sampling output terminal OUT as the second input terminal of the upper-side fitting circuit 32. The output terminal of the first code value control circuit 321 is connected to the code value input terminal M1 of the first current digital-to-analog converter (IDAC1). The enable terminal Latch1 of the first code value control circuit 321 is used to input a first enable signal. The power supply terminal of the first current digital-to-analog converter (IDAC1) is used as the power supply terminal AVDD of the upper-side fitting circuit 32 to input the power supply voltage. The current output terminal of the first current digital-to-analog converter (IDAC1) is connected to the first terminal of the second switch (K2). The second terminal of the second switch (K2) is connected to the positive plate of the first capacitor C1 as the output terminal of the upper-side fitting circuit 32.

[0059] The second switch K2 is turned on when the upper transistor of the switching power conversion circuit is turned on, and turned off when the upper transistor of the switching power conversion circuit is turned off. The first current digital-to-analog converter IDAC1 is used to convert the received first code value into a first current input to the first capacitor C1 when the second switch K2 is turned on, so as to charge the first capacitor C1.

[0060] The first code value control circuit 321 is used to, upon receiving a first enable signal sent by the switching power supply conversion circuit, acquire the first voltage output from the output terminal P1 of the lower transistor sampling circuit 31 and the second voltage output from the sampling output terminal OUT, compare the second voltage with the first voltage, and adjust the first code value input to the first current digital-to-analog converter IDAC1 based on the obtained first comparison result; wherein, the first enable signal is sent by the switching power supply conversion circuit after the lower transistor is turned on for a second preset time, the second preset time being less than the first preset time. For example, the first preset time can be 200ns, and the second preset time can be 180ns.

[0061] Specifically, when the first code value control circuit 321 adjusts the first code value input to the first current digital-to-analog converter IDAC1 based on the obtained first comparison result, it is specifically used to: increment the first code value by 1 when the first comparison result is that the second voltage is less than the first voltage; and decrement the first code value by 1 when the first comparison result is that the second voltage is greater than the first voltage.

[0062] When the second voltage is less than the first voltage, it indicates that the inductor current information fitted by the upper transistor fitting circuit 32 is smaller than the actual inductor current information collected by the lower transistor sampling circuit 31. Therefore, the charging current of the first capacitor C1 needs to be increased to increase the inductor current information fitted by the upper transistor fitting circuit 32. At this time, the first code value control circuit 321 can increment the first code value by 1 to obtain the adjusted first code value. In the next switching cycle, the input to the first current digital-to-analog converter IDAC1 will be updated to this adjusted first code value. Conversely, when the second voltage is greater than the first voltage, it indicates that the inductor current information fitted by the upper transistor fitting circuit 32 is larger than the actual inductor current information collected by the lower transistor sampling circuit 31. Therefore, the charging current of the first capacitor C1 needs to be decreased to decrease the inductor current information fitted by the upper transistor fitting circuit 32. At this time, the first code value control circuit 321 can decrement the first code value by 1 to obtain the adjusted first code value. In the next switching cycle, the input to the first current digital-to-analog converter IDAC1 will be updated to this adjusted first code value. When the second voltage equals the first voltage, the current first code value can be kept unchanged. In this way, by calibrating the first code value in each switching cycle and using the calibrated first code value to fit the inductor current in the next switching cycle, the current waveform of the upper transistor's conduction phase fitted by the upper transistor fitting circuit 32 can approximate the real inductor current information collected by the lower transistor sampling circuit 31 cycle by cycle. After multiple switching cycles, the fitted current information of the upper transistor's conduction phase can be accurately fitted to the real-time inductor current information, achieving high-precision sampling output during the rising phase of the inductor current.

[0063] For example, the first code value control circuit 321 may be a first analog-to-digital converter. Alternatively, the first code value control circuit 321 may include a first comparator and a first counter unit. The non-inverting input of the first comparator is connected to the output P1 of the lower transistor sampling circuit 31 as the first input of the first code value control circuit 321. The negative input of the first comparator is connected to the sampling output OUT as the second input of the first code value control circuit 321. The output of the first comparator is connected to the controlled terminal of the first counter unit. The output of the first counter unit is connected to the code value input M1 of the first current digital-to-analog converter IDAC1 as the output of the first code value control circuit 321. When the first comparator finds that the voltage at the negative input is less than the voltage at the positive input, it controls the first counter unit to increment the first code value by 1. When the first comparator finds that the voltage at the negative input is greater than the voltage at the positive input, it controls the first counter unit to decrement the first code value by 1.

[0064] Reference Figure 6 As shown, in one embodiment, the lower transistor fitting circuit 33 may include a second current digital-to-analog converter (IDAC2), a third switch (K3), and a second code value control circuit 331. The first terminal of the third switch (K3) serves as the first terminal of the lower transistor fitting circuit 33 and is connected to the sampling output terminal OUT. The second terminal of the third switch (K3) is connected to the power supply input terminal of the second current digital-to-analog converter (IDAC2), and the current output terminal of the second current digital-to-analog converter (IDAC2) serves as the second terminal of the lower transistor fitting circuit 33 and is connected to ground (PGND). The first connection terminal a1 of the second code value control circuit 331 serves as the third terminal of the lower transistor fitting circuit 33 and is connected to the sampling output terminal OUT. The second connection terminal a2 of the second code value control circuit 331 is connected to the power supply input terminal of the second current digital-to-analog converter (IDAC2). The output terminal of the second code value control circuit 331 is connected to the code value input terminal M2 of the second current digital-to-analog converter (IDAC2), and the enable terminal Latch2 of the second code value control circuit 331 is used to input a second enable signal.

[0065] The third switch K3 is turned on when the lower transistor of the switching power supply conversion circuit is turned on; the second current digital-to-analog converter IDAC2 is used to convert the second code value into a second current, and discharges the first capacitor C1 through the second current when the third switch K3 is turned on.

[0066] The second code value control circuit 331 is used to adjust the second code value input to the second current digital-to-analog converter IDAC2 based on the second voltage output at the sampling output terminal OUT after the first switch K1 is turned on for a third preset time. This adjusts the slope of the first falling phase current waveform to approximate the slope of the second falling phase current waveform cycle by cycle. The second falling phase current waveform is the current waveform formed by injecting the actual inductor sampling current sampled by the lower transistor sampling circuit 31 into the first capacitor C1 after the first switch K1 is turned on. Since the output impedance of the lower transistor sampling circuit 31 is relatively small, the voltage output at the sampling output terminal OUT is equal to the voltage of the first capacitor C1, thus forming a high-precision second falling phase current waveform at the sampling output terminal OUT. The cycle in the cycle-by-cycle approximation refers to the switching cycle of the switching power supply conversion circuit.

[0067] For example, the second code value control circuit 331 may include a second code value adjustment circuit 3311, a second capacitor C2, a fourth switch K4, and a fifth switch K5. The first input terminal of the second code value adjustment circuit 3311 is connected to the sampling output terminal OUT as the first connection terminal a1 of the second code value control circuit 3311. The second input terminal of the second code value adjustment circuit 3311 is connected to ground PGND through the second capacitor C2 and to the power supply input terminal of the second current digital-to-analog converter IDAC2 through the fourth switch K4. The output terminal of the second code value adjustment circuit 3311 is connected to the code value input terminal M2 of the second current digital-to-analog converter IDAC2 as the output terminal of the second code value control circuit 3311. The fifth switch K5 is connected between the first input terminal and the second input terminal of the second code value adjustment circuit 3311.

[0068] The fifth switch K5 turns on after a third preset time following the turn-on of the first switch K1, and turns off when the on-time equals a fourth preset time, ensuring that the voltage across the positive plate of the second capacitor C2 is equal to the voltage across the positive plate of the first capacitor C1 within the on-time. The fourth switch K4 turns on before the fifth switch K5 turns off, and turns off when the lower transistor of the switching power supply conversion circuit turns off. The third switch K3 turns off when the fourth switch K4 turns on. The third preset time can be set empirically or experimentally, for example, 10 ns, to ensure that when the fifth switch K5 turns on, the voltage corresponding to the actual inductor sampling current sampled by the lower transistor sampling circuit 31 has been formed using the first capacitor C1. The fourth preset time can be determined empirically or experimentally, for example, 40 ns, to ensure that when the fifth switch K5 turns on, the voltage across the positive plate of the second capacitor C2 is equal to the voltage across the positive plate of the first capacitor C1.

[0069] For example, the fourth switch K4 can be turned on for a sixth preset time before the fifth switch K5 is turned off. This sixth preset time can be determined based on experience or through experiments, for example, it can be set to 10ns. The fourth switch K4 can be turned on 10ns before the fifth switch K5 is turned off.

[0070] With the fifth switch K5 open and the fourth switch K4 open, the current converted by the second current digital-to-analog converter IDAC2 releases part of the charge of the second capacitor C2 to ground PGND through the fourth switch K4, and the second capacitor C2 is in a discharging state.

[0071] The second code value adjustment circuit 3311 is used to compare the positive plate voltage of the second capacitor C2 during discharge with the second voltage output by the sampling output terminal OUT when a second enable signal is received from the switching power supply conversion circuit, and adjust the second code value once according to the obtained second comparison result; wherein, the second enable signal is sent by the switching power supply conversion circuit after the fourth switch K4 is turned on for a fifth preset time. The fifth preset time can be determined by experience or through experimentation, for example, set to 160ns.

[0072] Specifically, when the second code value adjustment circuit 3311 adjusts the second code value based on the obtained second comparison result, it is used to: increment the second code value by 1 if the second comparison result indicates that the positive plate voltage during the discharge process of the second capacitor C2 is greater than the second voltage; and decrement the second code value by 1 if the second comparison result indicates that the positive plate voltage during the discharge process of the second capacitor C2 is less than the second voltage.

[0073] When the positive plate voltage of the second capacitor C2 is greater than the second voltage during the discharge process, it indicates that the inductor current fitted by the discharge of the second capacitor C2 is larger than the actual inductor current information collected by the sampling circuit 31 of the lower tube. The falling slope of the fitted inductor current is also greater than the falling slope of the actual inductor current. At this time, it is necessary to make the second capacitor C2 release more charge to approximate the actual inductor current information. The second code value adjustment circuit 3311 can add 1 to the second code value. By increasing the second code value, the current output of the second current digital-to-analog converter IDAC2 is increased, so as to extract more charge from the second capacitor C2 and obtain the adjusted second code value. In the next switching cycle, the input to the second current digital-to-analog converter IDAC2 will be updated to the adjusted second code value. When the positive plate voltage of the second capacitor C2 is less than the second voltage during discharge, it indicates that the inductor current fitted using the discharge of the second capacitor C2 is smaller than the actual inductor current information collected by the sampling circuit 31 of the lower transistor. The slope of the fitted inductor current's descent is also less than the slope of the actual inductor current's descent. In this case, it is necessary to reduce the charge released by the second capacitor C2 to approximate the actual inductor current information. The second code value adjustment circuit 3311 can decrement the second code value by 1. By reducing the second code value, the current output by the second current digital-to-analog converter IDAC2 is reduced, thereby reducing the charge drawn from the second capacitor C2, resulting in an adjusted second code value. In the next switching cycle, the input to the second current digital-to-analog converter IDAC2 will be updated to this adjusted second code value. When the positive plate voltage of the second capacitor C2 is equal to the second voltage during discharge, the current second code value can be kept unchanged. In this way, by calibrating the second code value in each switching cycle and using the calibrated second code value to fit the inductor current in the first falling phase in the next switching cycle, the current waveform of the high-noise phase when the lower transistor is just turned on, fitted by the lower transistor fitting circuit 33, can approximate the real inductor current information collected by the lower transistor sampling circuit 31 cycle by cycle. After multiple switching cycles, the fitting current information of the high-noise phase when the transistor is just turned on can be accurately fitted to the real-time inductor current information, and high-precision sampling output of the inductor current falling phase can be achieved.

[0074] For example, the second code value adjustment circuit 3311 may be a second analog-to-digital converter. Alternatively, the second code value adjustment circuit 3311 may include a second comparator and a second counter unit. The negative input terminal of the second comparator is connected to the sampling output terminal OUT as the first input terminal of the second code value adjustment circuit 3311. The positive input terminal of the second comparator is connected to ground PGND through the second capacitor C2 and to the power supply input terminal of the second current digital-to-analog converter IDAC2 through the fourth switch K4. The output terminal of the second comparator is connected to the controlled terminal of the second counter unit. The output terminal of the second counter unit is connected to the code value input terminal M2 of the second current digital-to-analog converter IDAC2 as the output terminal of the second code value adjustment circuit 3311. When the second comparator finds that the voltage at the negative input terminal is less than the voltage at the positive input terminal, it controls the second counter unit to increment the second code value by 1. When the second comparator finds that the voltage at the negative input terminal is greater than the voltage at the positive input terminal, it controls the second counter unit to decrement the second code value by 1.

[0075] In the embodiments of this application, the first capacitor C1 is the main capacitor, and the second capacitor C2 is the auxiliary capacitor, with the two capacitors having equal capacitance values.

[0076] Based on any of the above embodiments, the inductor current sampling circuit, for example... Figure 6 In one embodiment, the inductor current sampling circuit shown may further include a third capacitor C3, which is connected between the output terminal P1 of the lower transistor sampling circuit 31 and ground PGND. The third capacitor C3 is used to filter the inductor sampling current output by the lower transistor sampling circuit 31.

[0077] The following is based on Figure 6 Taking the inductor current sampling circuit shown as an example, the working principle of the inductor current sampling circuit provided in this application embodiment will be further illustrated.

[0078] Figure 7 The diagram shows a waveform representation of the switching timing of the inductor current sampling circuit provided in an embodiment of this application. Figure 8 This diagram illustrates the switching timing of an inductor current sampling circuit provided in an embodiment of this application during one switching cycle. EN is the enable signal for the inductor current sampling circuit, PWM is the switching drive signal for the switching power supply conversion circuit, HG is the gate-source voltage of the upper transistor, LG is the gate-source voltage of the lower transistor, and K1~K5 are... Figure 6 The control signals for each switch in the middle, Latch_ADC1 ( Figure 8 (abbreviated as ADC1) is the first enable signal input to Latch1 of the first code value control circuit 321, and Latch_ADC2 ( Figure 8The second enable signal (abbreviated as ADC2) is the second enable signal input to the enable terminal Latch2 of the second code value control circuit 331, and t0~t5 represent the time.

[0079] Combination Figures 6-8 As shown, when the enable signal EN of the inductor current sampling circuit is high, the inductor current sampling circuit begins to operate normally. When the switching drive signal PWM of the switching power supply conversion circuit is high, the gate-source voltage HG of the upper transistor becomes high after a short delay, and the upper transistor is turned on. When the switching drive signal PWM of the switching power supply conversion circuit is low, the gate-source voltage HG of the lower transistor becomes high after a short delay, and the lower transistor is turned on.

[0080] When the upper transistor is turned on at time t0, only the second switch K2 is turned on. At this time, the first current-to-analog converter IDAC1 converts the received first code value into a first current input to the first capacitor C1, charging the first capacitor C1. The rising phase current waveform of the inductor current is fitted at the sampling output terminal OUT through the charging process of the first capacitor C1. Subsequently, when the upper transistor is turned off at time t1, the second switch K2 is turned off.

[0081] When the lower transistor is turned on, only the third switch K3 is turned on. At this time, the second current digital-to-analog converter IDAC2 converts the received second code value into a second current, extracts charge from the first capacitor C1, and uses the discharge process of the first capacitor C1 to fit the inductor current information in the first falling stage (the high noise stage when the lower transistor is just turned on).

[0082] After the lower transistor is turned on and a second preset time (e.g., 180ns) has elapsed, the circuit noise is relatively low and the RLC oscillation amplitude is negligible. It can be assumed that the lower transistor sampling circuit 31 has been able to sample the accurate current information of the inductor. At this time, the first enable signal Latch_ADC1 input to the enable terminal Latch1 of the first code value control circuit 321 is at a high level (pulse duration, e.g., 10ns), triggering the first code value control circuit 321 to compare the second voltage output from the sampling output terminal OUT with the first voltage output from the output terminal P1 of the lower transistor sampling circuit 31. In other words, the fitted current information is compared with the accurate current information sampled by the lower transistor sampling circuit 31. Based on the comparison result, the first code value input to the first current digital-to-analog converter IDAC1 is adjusted to change the magnitude of the first current output by the first current digital-to-analog converter IDAC1. By changing the magnitude of the first current cycle by cycle, the rising edge slope of the rising edge stage of the inductor current is successively fitted.

[0083] When the lower transistor is turned on and a first preset time (e.g., 200ns) is reached at time t2, the first switch K1 starts to conduct. The accurate inductor sampling current collected by the lower transistor sampling circuit 31 is directly injected into the first capacitor C1. Since the output impedance of the lower transistor sampling circuit 31 is small, the voltage of the first capacitor C1 is equal to the voltage output by the output terminal P1 of the lower transistor sampling circuit 31, which can realize accurate sampling of the lower transistor current during the low noise stage.

[0084] After the first switch K1 is turned on, a third preset time (e.g., 10ns) is elapsed before the fifth switch K5 is turned on. The fifth switch K5 is turned off at time t3. The pulse width of the fifth switch K5 is a fourth preset time (e.g., 40ns) to ensure that the voltage of the second capacitor C2 is equal to the voltage of the first capacitor C1 during the time the fifth switch K5 is turned on.

[0085] The fourth switch K4 is turned on before the fifth switch K5 is turned off, for example, 10ns before the fifth switch K5 is turned off. The moment the fourth switch K4 turns on is exactly the moment the third switch K3 is turned off. During the period when the fourth switch K4 is turned on, the second current output by the second current digital-to-analog converter IDAC2 releases part of the charge of the second capacitor C2 to ground PGND through the fourth switch K4. After the fourth switch K4 turns on, after a fifth preset time (for example, 160ns), the second enable signal Latch_ADC2 input to the enable terminal Latch2 of the second code value control circuit 331 is at a high level, triggering the second code value adjustment circuit 3311 in the second code value control circuit 331 to compare the positive plate voltage of the second capacitor C2 during the discharge process with the second voltage output by the sampling output terminal OUT. Based on the comparison result, the second code value input to the second current digital-to-analog converter IDAC2 is adjusted to change the magnitude of the second current output by the second current digital-to-analog converter IDAC2. In this way, by changing the magnitude of the second current cycle by cycle, the current information fitted by the second capacitor C2 is made to approximate the real inductor current information collected by the sampling circuit 31 of the lower transistor, and finally the accurate second code value of the second current digital-to-analog converter IDAC2 is obtained, so as to realize the accurate current information output during the high noise stage when the lower transistor is just turned on.

[0086] When the lower transistor is turned off at time t4, the first switch K1 and the fourth switch K4 are turned off. At this time, all switches are in the off state, completing the inductor current sampling of one switching cycle.

[0087] according to Figure 6 The inductor current sampling circuit shown is illustrated using the example of a first code value control circuit 321 (ADC1) and a second code value adjustment circuit 3311 (ADC2). Figure 9A schematic diagram of the voltage waveform output from the sampling output terminal of the inductor current sampling circuit is shown. Vout is the voltage output from the sampling output terminal OUT of the inductor current sampling circuit. Waveform ① is the actual inductor current information waveform, and waveform ② is the fitted inductor current information waveform.

[0088] Reference Figure 9 As shown, the error between waveform ② and waveform ① is the fitting error during the cycle-by-cycle approximation process. When the bit depth of the first analog-to-digital converter ADC1 and the second analog-to-digital converter ADC2 is sufficiently high (e.g., 7 bits), the fitting error can be ignored within the range of the load current of interest. Thus, the fitted inductor current information during the upper transistor's conduction phase and the fitted inductor current information during the high-noise phase immediately after the lower transistor turns on can be highly fitted to the actual inductor current information through cycle-by-cycle approximation, enabling high-precision detection of the inductor current in high-transfer-ratio switching power supply conversion circuits.

[0089] The inductor current sampling circuit provided in this application uses precise sampling information of the inductor current during the high-voltage transistor's conduction phase to fit the rising phase current information of the inductor current. During the high-noise phase immediately following the low-voltage transistor's conduction, it uses the same precise sampling information to fit the first falling phase current information of the inductor current. In the low-noise phase after the low-voltage transistor is turned on, it directly uses a high-precision, low-bandwidth sampling operational amplifier's current mirror method to sample the second falling phase current information of the inductor current. Finally, it summarizes the inductor current information for the entire cycle, achieving high-precision sampling output of the inductor current information. This inductor current sampling circuit does not add parasitic resistance to the power path, thus avoiding additional power loss and ensuring high power conversion efficiency. Moreover, it only performs current mirror sampling on the low-voltage transistor, eliminating the need for a high-bandwidth sampling operational amplifier and avoiding excessive parasitic considerations. While ensuring high-precision inductor current detection, it also ensures robustness of the inductor current detection, achieving high-precision and high-robust current sampling for inductors in high-transfer-ratio and high-efficiency switching power supply conversion circuits.

[0090] This application also provides a switching power supply converter. Figure 10 A schematic diagram of the structure of the switching power supply converter provided in an embodiment of this application is shown, with reference to... Figure 10 As shown, the switching power converter may include a switching power conversion circuit 101 and an inductor current sampling circuit 102. The inductor current sampling circuit 102 may be the inductor current sampling circuit described in any of the above embodiments. The first sampling terminal S1 of the inductor current sampling circuit 102 is connected to the first terminal of the switching power conversion circuit 101, and the second sampling terminal S2 of the inductor current sampling circuit 102 is connected to the second terminal of the switching power conversion circuit 101.

[0091] The first terminal of the switching power conversion circuit 101 is the connection terminal connecting the lower transistor to the inductor, and the second terminal of the switching power conversion circuit 101 is the connection terminal connecting the lower transistor to ground.

[0092] For example, with Figure 2 Taking the switching power supply conversion circuit shown as an example, the first sampling terminal S1 of the inductor current sampling circuit 102 is connected to the first terminal E1 of the switching power supply conversion circuit, and the second sampling terminal S2 of the inductor current sampling circuit 102 is connected to the second terminal E2 of the switching power supply conversion circuit.

[0093] The switching power converter provided in this application embodiment can realize the function of the inductor current sampling circuit as described in any of the above embodiments, and can achieve the beneficial effects achieved by the inductor current sampling circuit as described in any of the above embodiments, which will not be repeated here.

[0094] This application also provides a chip that may include an inductor current sampling circuit as described in any of the above embodiments, or a switching power converter as described in the above embodiments. This chip can achieve the functions of the inductor current sampling circuit as described in any of the above embodiments, and can achieve the beneficial effects achieved by the inductor current sampling circuit as described in any of the above embodiments, which will not be elaborated further here.

[0095] This application also provides an electronic device, which includes a switching power converter as described in the above embodiments, or includes a chip as described in the above embodiments. This electronic device can achieve the functions of the inductor current sampling circuit described in any of the above embodiments, and can achieve the beneficial effects achieved by the inductor current sampling circuit described in any of the above embodiments, which will not be elaborated further here.

[0096] For example, the electronic device provided in this embodiment may include at least one of the following, but is not limited to: a server, a mobile phone, a computer, an in-vehicle terminal, a tablet computer, a wearable device, a smart home device, an augmented reality (AR) device, and a virtual reality (VR) device. The server may include a standalone server and a cluster server.

[0097] In one embodiment of this application, the electronic device may include a processor, an external memory interface, internal memory, a Universal Serial Bus (USB) interface, a charging management module, a power management module, a battery, an antenna, a mobile communication module, a wireless communication module, an audio module, a speaker, a microphone, a headphone jack, a sensor module, buttons, a motor, an indicator, a camera, a display screen, and a Subscriber Identification Module (SIM) card interface, etc. The sensor module may include motion sensors and gyroscopes, etc.

[0098] It is understood that the structures illustrated in the embodiments of this application do not constitute a specific limitation on the electronic device. In other embodiments of this application, the electronic device may include more or fewer components, or combine some components, or split some components, or have different component arrangements. These components may be implemented in hardware, software, or a combination of software and hardware.

[0099] The processor may include one or more processing units, such as, but not limited to, an application processor (AP), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a controller, a video codec, a digital signal processor (DSP), a baseband processor, and a neural network processing unit (NPU). Different processing units may be independent devices or integrated into one or more processors. The controller can generate operation control signals based on instruction opcodes and timing signals to control instruction fetching and execution. The processor may also include memory for storing instructions and data. In some embodiments, the memory in the processor may be a cache memory. This memory can store instructions or data that the processor has just used or that are used repeatedly. If the processor needs to reuse the instruction or data, it can retrieve it from memory. This avoids repeated accesses, reduces processor waiting time, and thus improves system efficiency.

[0100] The charging management module receives charging signals from the charger. The charger may include a wireless charger or a wired charger. In some wired charging embodiments, the charging management module receives charging input from the wired charger via a USB interface. In some wireless charging embodiments, the charging management module receives wireless charging input via the wireless charging coil of the electronic device. While charging the battery, the charging management module can also supply power to the electronic device via the power management module.

[0101] The power management module connects the battery, the charging management module, and the processor. It receives input from the battery and / or the charging management module to power the processor, internal memory, display screen, camera, and wireless communication module. The power management module can also monitor parameters such as battery capacity, battery cycle count, and battery health status (leakage current, impedance). In some embodiments, the power management module may be located within the processor. In other embodiments, the power management module and the charging management module may be located in the same device.

[0102] Wireless communication functionality in electronic devices can be implemented through antennas, mobile communication modules, wireless communication modules, modem processors, and baseband processors. Antennas are used to transmit and receive electromagnetic wave signals. Mobile communication modules can provide solutions for wireless communication applications in electronic devices, including 2G / 3G / 4G / 5G. In some embodiments, at least some functional modules of the mobile communication module can be housed in the same device as at least some modules of the processor.

[0103] Wireless communication modules can provide solutions for at least one of the following wireless communication technologies used in electronic devices: Wireless Local Area Networks (WLANs) (such as Wireless Fidelity (Wi-Fi) networks), Bluetooth (BT), Global Navigation Satellite System (GNSS), Frequency Modulation (FM), Near Field Communication (NFC), and Infrared (IR), but are not limited to these. A wireless communication module can be one or more devices integrating at least one communication processing module. The wireless communication module receives electromagnetic waves via an antenna, modulates and filters the electromagnetic wave signal, and sends the processed signal to a processor. The wireless communication module can also receive signals to be transmitted from the processor, modulate and amplify them, and then radiate them as electromagnetic waves via the antenna.

[0104] Other embodiments of this application will readily occur to those skilled in the art upon consideration of the specification and practice of the disclosure herein. This application is intended to cover any variations, uses, or adaptations thereof that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this application are indicated by the claims.

Claims

1. An inductor current sampling circuit, characterized in that, It includes a first sampling terminal, a second sampling terminal, a lower MOSFET sampling circuit, a first switch, a first capacitor, an upper MOSFET fitting circuit, a lower MOSFET fitting circuit, and a sampling output terminal; The first input terminal of the lower MOSFET sampling circuit serves as the first sampling terminal and is connected to the first terminal of the switching power conversion circuit. The second input terminal of the lower MOSFET sampling circuit serves as the second sampling terminal and is connected to the second terminal of the switching power conversion circuit. The output terminal of the lower MOSFET sampling circuit is connected to the sampling output terminal via the first switch. The first capacitor is connected between the sampling output terminal and ground. The output terminal of the upper MOSFET fitting circuit is connected to the positive plate of the first capacitor. The first terminal of the lower MOSFET fitting circuit is connected to the sampling output terminal. The second terminal of the lower MOSFET fitting circuit is connected to ground. The power supply terminal of the upper MOSFET fitting circuit is used to input the power supply voltage. The first terminal of the switching power conversion circuit is the connection terminal where the lower MOSFET is connected to the inductor in the switching power conversion circuit, and the second terminal of the switching power conversion circuit is the connection terminal where the lower MOSFET is connected to ground. The lower transistor sampling circuit is used to acquire the current of the inductor in the switching power supply conversion circuit using the current mirror method of the lower transistor, so as to obtain the inductor sampling current. The upper transistor fitting circuit is used to charge the first capacitor based on a first code value during the upper transistor conduction phase of the switching power supply conversion circuit, so as to fit the rising phase current waveform of the inductor current at the sampling output terminal; the first code value is used to control the rising slope of the rising phase current waveform. The lower transistor fitting circuit is used to discharge the first capacitor based on a second code value within a first preset time after the lower transistor of the switching power supply conversion circuit is turned on, so as to fit the first falling phase current waveform of the inductor current at the sampling output terminal; the second code value is used to control the falling slope of the first falling phase current waveform. The first switch is turned on at the end of the first preset duration and turned off when the lower tube is turned off; when the first switch is turned on, the first capacitor directly converts the inductor sampling current into the second falling phase current waveform of the inductor current at the sampling output terminal.

2. The inductor current sampling circuit according to claim 1, characterized in that, The upper tube fitting circuit includes a first current digital-to-analog converter and a second switch; The power supply terminal of the first current digital-to-analog converter is used as the power supply terminal of the upper tube fitting circuit to input the power supply voltage. The current output terminal of the first current digital-to-analog converter is connected to the first terminal of the second switch. The second terminal of the second switch is used as the output terminal of the upper tube fitting circuit to connect to the positive plate of the first capacitor. The code value input terminal of the first current digital-to-analog converter is used to input the first code value. The second switch is turned on when the upper tube is turned on, and turned off when the upper tube is turned off; The first current-to-analog converter is used to convert the first code value into a first current input to the first capacitor when the second switch is turned on, so as to charge the first capacitor.

3. The inductor current sampling circuit according to claim 2, characterized in that, The upper transistor fitting circuit further includes a first code value control circuit; the first input terminal of the first code value control circuit is connected to the output terminal of the lower transistor sampling circuit as the first input terminal of the upper transistor fitting circuit, the second input terminal of the first code value control circuit is connected to the sampling output terminal as the second input terminal of the upper transistor fitting circuit, and the output terminal of the first code value control circuit is connected to the code value input terminal of the first current digital-to-analog converter. The first code value control circuit is used to collect the first voltage output by the output terminal of the lower tube sampling circuit and the second voltage output by the sampling output terminal when it receives the first enable signal sent by the switching power supply conversion circuit, and compare the second voltage with the first voltage, and adjust the first code value input to the first current digital-to-analog converter once according to the obtained first comparison result; The first enable signal is sent by the switching power supply conversion circuit after the lower transistor is turned on for a second preset time, wherein the second preset time is less than the first preset time.

4. The inductor current sampling circuit according to claim 3, characterized in that, The first code value control circuit is specifically used for: If the first comparison result indicates that the second voltage is less than the first voltage, increment the first code value by 1; If the first comparison result indicates that the second voltage is greater than the first voltage, the first code value is decremented by 1.

5. The inductor current sampling circuit according to claim 1, characterized in that, The lower tube fitting circuit includes a second current digital-to-analog converter and a third switch; The first terminal of the third switch is connected to the sampling output terminal as the first terminal of the lower transistor fitting circuit. The second terminal of the third switch is connected to the power supply input terminal of the second current digital-to-analog converter. The current output terminal of the second current digital-to-analog converter is connected to ground as the second terminal of the lower transistor fitting circuit. The code value input terminal of the second current digital-to-analog converter is used to input the second code value. The third switch is turned on when the lower tube is turned on; The second current-to-analog converter is used to convert the second code value into a second current, and to discharge the first capacitor through the second current when the third switch is turned on.

6. The inductor current sampling circuit according to claim 5, characterized in that, The lower tube fitting circuit also includes a second code value control circuit; The first connection terminal of the second code value control circuit is connected to the sampling output terminal as the third terminal of the lower tube fitting circuit, the second connection terminal of the second code value control circuit is connected to the power supply input terminal of the second current digital-to-analog converter, and the output terminal of the second code value control circuit is connected to the code value input terminal of the second current digital-to-analog converter. The second code value control circuit is used to adjust the second code value input to the second current digital-to-analog converter once based on the second voltage output by the sampling output terminal after the first switch is turned on for a third preset time, so that the slope of the first falling phase current waveform approaches the slope of the second falling phase current waveform cycle by cycle. Wherein, the period is the switching period of the switching power supply conversion circuit.

7. The inductor current sampling circuit according to claim 6, characterized in that, The second code value control circuit includes a second code value adjustment circuit, a second capacitor, a fourth switch, and a fifth switch; The first input terminal of the second code value adjustment circuit is connected to the sampling output terminal as the first connection terminal of the second code value control circuit. The second input terminal of the second code value adjustment circuit is grounded through the second capacitor and connected to the power supply input terminal of the second current digital-to-analog converter through the fourth switch. The output terminal of the second code value adjustment circuit is connected to the code value input terminal of the second current digital-to-analog converter as the output terminal of the second code value control circuit. The fifth switch is connected between the first and second input terminals of the second code value adjustment circuit; The fifth switch is turned on after a third preset time after the first switch is turned on, and is turned off when the on-time is equal to a fourth preset time, so that the voltage of the positive plate of the second capacitor is equal to the voltage of the positive plate of the first capacitor during the on-time. The fourth switch is turned on before the fifth switch is turned off, and is turned off when the lower tube is turned off; the third switch is turned off when the fourth switch is turned on. The second code value adjustment circuit is used to compare the positive plate voltage during the discharge process of the second capacitor with the second voltage output by the sampling output terminal when receiving the second enable signal sent by the switching power supply conversion circuit, and adjust the second code value once according to the obtained second comparison result; wherein, the second enable signal is sent by the switching power supply conversion circuit after the fourth switch is turned on for a fifth preset time.

8. The inductor current sampling circuit according to claim 7, characterized in that, The second code value adjustment circuit is specifically used for: If the second comparison result indicates that the positive plate voltage during the discharge process of the second capacitor is greater than the second voltage, then the second code value is incremented by 1. If the second comparison result indicates that the positive plate voltage during the discharge process of the second capacitor is less than the second voltage, then the second code value is decremented by 1.

9. The inductor current sampling circuit according to any one of claims 1 to 8, characterized in that, The inductor current sampling circuit also includes a third capacitor, which is connected between the output terminal of the lower tube sampling circuit and ground. The third capacitor is used to filter the inductor sampling current output by the lower transistor sampling circuit.

10. A switching power supply converter, characterized in that, Includes a switching power supply conversion circuit and an inductor current sampling circuit as described in any one of claims 1 to 9; The first sampling terminal of the inductor current sampling circuit is connected to the first terminal of the switching power supply conversion circuit, and the second sampling terminal of the inductor current sampling circuit is connected to the second terminal of the switching power supply conversion circuit; wherein, the first terminal of the switching power supply conversion circuit is the connection terminal between the lower transistor and the inductor in the switching power supply conversion circuit, and the second terminal of the switching power supply conversion circuit is the connection terminal between the lower transistor and ground.

11. A chip, characterized in that, It includes the inductor current sampling circuit as described in any one of claims 1 to 9, or the switching power supply converter as described in claim 10.

12. An electronic device, characterized in that, It includes the switching power converter as described in claim 10, or the chip as described in claim 11.

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