Unified power format file generation method and apparatus, electronic device, and readable medium

Abstract

This invention provides a method, apparatus, electronic device, and readable medium for generating unified power format files, relating to the field of chip technology. The method involves obtaining a target description file for a voltage domain design diagram. The voltage domain design diagram includes at least two module levels, each module level including at least one module, each module corresponding to at least one voltage domain, and each voltage domain corresponding to at least one power group. Based on the target description file, directed trees representing the hierarchical relationships between modules and the correspondence between modules and voltage domains, directed trees representing the correspondence between voltage domains and power groups, and directed trees representing the composition of power groups are created. Based on the directed trees of modules, voltage domains, and power groups, unified power format files corresponding to each module are generated. This reduces implementation costs and improves the efficiency of generating unified power format files.

Description

Technical Field

[0001] The present invention relates to the field of chip technology, and in particular to a method, apparatus, electronic device and readable medium for generating a unified power format file. Background Technology

[0002] Currently, low-power design techniques are frequently used in chip design. Low-power design refers to employing specific strategies and techniques during the design phase to reduce chip power consumption. To achieve low-power design, a standardized power supply format file is required.

[0003] In existing technologies, a standardized power supply format is often manually written by designers. This approach is costly and inefficient. Summary of the Invention

[0004] This invention provides a method, apparatus, electronic device, and readable medium for generating a unified power format file, which can reduce implementation costs and improve implementation efficiency.

[0005] To address the aforementioned problems, this invention discloses a method for generating a unified power format file, the method comprising:

[0006] Obtain the target description file of the voltage domain design diagram; the voltage domain design diagram includes at least two module levels, each module level includes at least one module, each module corresponds to at least one voltage domain, and each voltage domain corresponds to at least one power supply group.

[0007] Based on the target description file, a directed tree for modules is created to represent the hierarchical relationship between modules and the correspondence between modules and voltage domains, a directed tree for voltage domains to represent the correspondence between voltage domains and power supply groups, and a directed tree for power supply groups to represent the composition of power supply groups.

[0008] Based on the directed tree of the modules, the directed tree of the voltage domain, and the directed tree of the power supply group, a unified power supply format file corresponding to each module is generated.

[0009] On the other hand, embodiments of the present invention disclose a unified power format file generation apparatus, the apparatus comprising:

[0010] The acquisition module is used to acquire the target description file of the voltage domain design diagram; the voltage domain design diagram includes at least two module levels, each module level includes at least one module, each module corresponds to at least one voltage domain, and each voltage domain corresponds to at least one power supply group.

[0011] The first creation module is used to create, based on the target description file, a module directed tree representing the hierarchical relationship between modules and the correspondence between modules and voltage domains, a voltage domain directed tree representing the correspondence between voltage domains and power supply groups, and a power supply group directed tree representing the composition of power supply groups.

[0012] The generation module is used to generate a unified power format file corresponding to each module based on the directed tree of the module, the directed tree of the voltage domain, and the directed tree of the power group.

[0013] In another aspect, embodiments of the present invention disclose an electronic device, including: a processor, a memory, a communication interface, and a communication bus, wherein the processor, the memory, and the communication interface communicate with each other through the communication bus; the memory is used to store at least one executable instruction, the executable instruction causing the processor to execute the aforementioned method.

[0014] This invention also discloses a machine-readable medium storing instructions that, when executed by one or more processors, cause the processors to perform the methods described above.

[0015] The embodiments of this invention offer the following advantages: The unified power format file generation method provided by these embodiments obtains a target description file for a voltage domain design diagram. The voltage domain design diagram includes at least two module levels, each module level including at least one module, each module corresponding to at least one voltage domain, and each voltage domain corresponding to at least one power supply group. Based on the target description file, directed trees representing the hierarchical relationships between modules and the correspondence between modules and voltage domains, directed trees representing the correspondence between voltage domains and power supply groups, and directed trees representing the composition of power supply groups are created. Based on the directed trees of modules, voltage domains, and power supply groups, unified power format files corresponding to each module are generated. This eliminates the need for manual coding of unified power format files, thus reducing implementation costs, shortening the time required to generate unified power format files, and improving the efficiency of generating unified power format files.

[0016] Meanwhile, in this embodiment, a unified power format file is generated for each level of module, which can be applied to hierarchical design and thus adapt to the needs of large-scale or ultra-large-scale chip design. Attached Figure Description

[0017] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a flowchart illustrating the steps of a method for generating a unified power format file according to an embodiment of the present invention.

[0019] Figure 2 This is a schematic diagram of a processing procedure provided in an embodiment of the present invention;

[0020] Figure 3 This is a schematic diagram of a low-power constraint provided by an embodiment of the present invention;

[0021] Figure 4 This is a module directed tree provided in an embodiment of the present invention;

[0022] Figure 5 This is a schematic diagram of a voltage domain directed tree provided in an embodiment of the present invention;

[0023] Figure 6 This is a schematic diagram of another voltage domain directed tree provided in an embodiment of the present invention;

[0024] Figure 7 This is a schematic diagram of a directed tree for a power supply group provided in an embodiment of the present invention;

[0025] Figure 8 This is a schematic diagram of another directed tree for a power supply group provided in an embodiment of the present invention;

[0026] Figure 9 This is a schematic diagram of an index provided in an embodiment of the present invention;

[0027] Figure 10 This is another index diagram provided in an embodiment of the present invention;

[0028] Figure 11 This is a schematic diagram of a directory structure provided in an embodiment of the present invention;

[0029] Figure 12 This is a block diagram of a unified power format file generation device provided in an embodiment of the present invention;

[0030] Figure 13 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0031] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0032] First, let's describe an application scenario related to this invention. In chip design scenarios, such as chip power management systems and digital circuit design, chip design scale is constantly increasing. With the continuous shrinking of process dimensions and the increasing number of units that can be integrated within the same area, more and more functional blocks are integrated into the chip, and the internal power supply and power control systems are becoming increasingly complex. This makes the internal circuitry of the chip more complex, and the power density increases dramatically. To control power consumption, low-power design techniques are increasingly widely used in chip design. For example, techniques such as multi-threshold devices and power gating (PG) are used to reduce the static power consumption of the chip (e.g., reducing leakage power consumption), while techniques such as integrated clock gating (ICG) units, multiple power supply voltages, dynamic voltage and frequency scaling (DVFS), adaptive voltage and frequency scaling (AVFS), and multi-bit flip-flop units are used to reduce the dynamic power consumption of the chip. Specifically, these low-power techniques can be used as power constraints to design low-power constraint diagrams.

[0033] The low-power constraint diagram can be provided by the front-end designer. A unified power format file is generated based on the low-power constraint diagram. This unified power format file can be either a Unified Power Format (UPF) file or a Common Power Format (CFC) file. Subsequently, it can be combined with Electronic Design Automation (EDA) tools to implement the low-power constraints in the chip design. The unified power format file, also known as unified power format code, is a readable file for EDA tools, providing them with descriptions of the power network and related power management constraints in the integrated circuit (IC) design. These descriptions are crucial for achieving low-power design, ensuring circuit reliability, and optimizing performance. EDA tools can use the unified power format file to perform automated power network analysis, optimization, and verification.

[0034] However, currently, the common method for generating unified power format (UPF) files involves front-end engineers manually writing them based on low-power constraint diagrams. As the number of integrated functional blocks and voltage domains in chips increases, manual editing becomes costly, time-consuming, and prone to errors. Furthermore, the high level of abstraction in UPF files makes reading and error localization difficult. Moreover, after generating the UPF file, subsequent chip design is based on it and the chip's Register Transfer Level (RTL) code. When chip design enters a rapid iteration phase, with frequent RTL code updates, the speed of manually editing the UPF file often cannot keep up with the pace of RTL code updates, hindering version iteration. In large-scale designs, the UPF file often becomes a bottleneck in chip design.

[0035] As chips integrate more and more functional blocks and become increasingly larger, a hierarchical design approach is typically adopted to handle ultra-large-scale chip designs. This involves dividing the chip into at least two levels, either bottom-up or top-down, for example, a top-level module and several sub-modules. Accordingly, independent designs can be implemented based on constraints such as power consumption and timing, and then combined into the entire chip to reduce runtime, accelerate iteration, and expedite chip convergence. Consequently, to support hierarchical design, the unified power format file also needs to support it, requiring unified power format files for both the top-level module and sub-module designs. This increases the difficulty of writing unified power format files, and manually writing them becomes less suitable for hierarchical design scenarios.

[0036] In one existing approach, low-power constraint files are written into a power domain description file. Then, power domain description information and the hierarchical relationships between power domains are obtained. Node information is stored based on the power domain hierarchy, and finally, a unified power format code is generated. This reduces manual work for engineers and minimizes errors.

[0037] However, this approach yields flattened code, meaning all voltage-domain related information in the chip is nested and stored in a single unified power format code file. This approach is only suitable for small-scale chips that employ flattened design methods. However, flattened design methods can lead to long design runtimes and slow iteration processes, hindering design convergence. Therefore, for large-scale chips, hierarchical design is often used; however, this approach is not suitable for hierarchical designs, as it cannot generate separate unified power format files for each module at each level.

[0038] Therefore, embodiments of the present invention provide a method for generating a unified power format file, which will be described in detail below.

[0039] Reference Figure 1 This diagram illustrates a flowchart of a method for generating a unified power format file according to an embodiment of the present invention. This method can be applied to electronic devices. Figure 1 As shown, the method for generating a unified power format file specifically includes the following steps:

[0040] Step 101: Obtain the target description file of the voltage domain design diagram; the voltage domain design diagram includes at least two module levels, each module level includes at least one module, each module corresponds to at least one voltage domain, and each voltage domain corresponds to at least one power supply group.

[0041] The unified power format file generation method can handle large-scale and ultra-large-scale chip designs. The voltage domain design diagram can be a low-power constraint file, also known as a low-power constraint schematic diagram, which can be designed by designers according to chip design requirements. As a graphical representation, the voltage domain design diagram can be used to demonstrate and plan how to achieve low-power goals in chip design. The voltage domain design diagram in this embodiment can include at least two module levels. Each module level consists of at least one module, and the voltage domain corresponding to the module is the voltage domain included in that module. Different modules may have overlapping voltage domains. For a voltage domain, at least one power supply set can be used, and the power supply set usable by the voltage domain is the power supply set corresponding to that voltage domain. The voltage domain design diagram can be used to characterize the relationship between modules and voltage domains (PDs) in the chip, the hierarchical relationship between modules, and the power information in the power supply sets (SSs) used by each voltage domain. A voltage domain refers to the parts of a circuit with the same voltage level. Components within this domain operate under the same supply voltage, share the same power network, and can be power-managed independently of other voltage domains.

[0042] The target description file can be derived from a voltage domain design diagram. The target description file can be structured data, meaning data organized in a predefined manner, represented by a fixed set of fields. For example, the required key fields can be predefined. The voltage domain design diagram is displayed, and each key field is shown to the user in tabular form. Correspondingly, the field values ​​input by the user for each key field based on the voltage domain design diagram can be received, thus obtaining the target description file. In tabular form, the target description file can also be called a power status table. Key fields can include fields reflecting the relationship between modules and voltage domains, the hierarchical relationship between modules, and power information of the power supplies used in each voltage domain's power supply group. Because the target description file uses fields for differentiation, it facilitates the retrieval of required information from the target description file in subsequent processing flows.

[0043] Step 102: Based on the target description file, create a module directed tree representing the hierarchical relationship between modules and the correspondence between modules and voltage domains, a voltage domain directed tree representing the correspondence between voltage domains and power supply groups, and a power supply group directed tree representing the composition of power supply groups.

[0044] In this embodiment of the invention, the block domain tree, power domain tree, and supply set tree can be represented using a tree-like data structure. Specifically, the block domain tree can be generated based on the hierarchical relationships between modules and the relationships between modules and voltage domains as reflected in the target description file. Based on the relationships between modules and voltage domains as reflected in the target description file and the power sets used by each voltage domain, a voltage domain tree is created for each voltage domain of each module. Simultaneously, a power set tree is created for each power set based on the power information of the power sets in the power sets reflected in the target description file.

[0045] Step 103: Based on the directed tree of the module, the directed tree of the voltage domain, and the directed tree of the power supply group, generate a unified power supply format file corresponding to each module.

[0046] Since modules, voltage domains, and power supply groups are sequentially interconnected, tree-structured data are generated for each of these three dimensions. The directed tree for modules represents the hierarchical relationships between modules and the correspondence between modules and voltage domains; the directed tree for voltage domains represents the correspondence between voltage domains and power supply groups; and the directed tree for power supply groups represents the components of a power supply group. Therefore, in this step, a unified power format file corresponding to each module can be generated based on the directed trees for modules, voltage domains, and power supply groups.

[0047] In summary, the unified power format file generation method provided in this embodiment of the invention obtains a target description file of a voltage domain design diagram. The voltage domain design diagram includes at least two module levels, each module level including at least one module, each module corresponding to at least one voltage domain, and each voltage domain corresponding to at least one power supply group. Based on the target description file, directed trees representing the hierarchical relationships between modules and the correspondence between modules and voltage domains, directed trees representing the correspondence between voltage domains and power supply groups, and directed trees representing the composition of power supply groups are created. Based on the directed trees of modules, voltage domains, and power supply groups, unified power format files corresponding to each module are generated. This eliminates the need for manual coding of unified power format files, thus reducing implementation costs, shortening the time required to generate unified power format files, and improving the efficiency of generating unified power format files.

[0048] Meanwhile, in this embodiment, a unified power format file is generated for each level of module, which can be applied to hierarchical design and thus adapt to the needs of large-scale or ultra-large-scale chip design.

[0049] Figure 2 This is a schematic diagram of a processing procedure provided by an embodiment of the present invention, such as... Figure 2 As shown, the target description file can be obtained based on the low-power constraint diagram. Then, directed trees are generated based on the target description file, namely the directed tree of the above modules, the directed tree of the voltage domain, and the directed tree of the power supply group. Finally, a unified power format file corresponding to each module is generated based on the directed trees.

[0050] Optionally, step 102 in this embodiment of the invention may specifically include:

[0051] Step 1021: Based on the module information of each module in the target description file, the voltage domain information of the voltage domain corresponding to each module, and the relationship information of each module, generate the directed tree of the module.

[0052] Step 1022: Based on the available power supply group information of each voltage domain in the target description file, generate a directed voltage domain tree for each voltage domain.

[0053] Step 1023: Based on the power information of each power group in the target description file, generate a directed tree for each power group.

[0054] In this embodiment of the invention, the target description file may include at least the module information of each module, the voltage domain information of the voltage domain corresponding to each module, the relationship information of each module, the available power supply group information of each voltage domain, and the power supply information of each power supply group.

[0055] The module information for each module may include at least the module name. Further, the module information may also include all other information corresponding to each module in the target description file; this embodiment of the invention does not impose limitations on this. The voltage domain information corresponding to each module may include at least the name of the voltage domain corresponding to the name of each module; that is, the voltage domain information of the voltage domain corresponding to a module can reflect the correspondence between the module and the voltage domain. The relationship information of each module can be used to reflect the hierarchical relationship between modules, wherein the hierarchical relationship can include being at the same level or at two different levels. For example, the relationship information of each module may include the upper-level module of each module. The upper-level module of a module may refer to the module connected to the module in the level above the module's current level; that is, the superior module of the module in the level above the current level. The relationship information may also include the level of each module to facilitate the determination of the level of each module.

[0056] The target description file can include fields specifically designed to represent relationship information. Alternatively, the hierarchy of modules and their parent modules can be determined based on other fields in the target description file; this embodiment does not impose any limitations on this approach. Since module information can identify modules, voltage domain information corresponding to a module can represent the correspondence between modules and voltage domains, and module relationship information can represent the hierarchical relationship between modules and other modules, a directed tree of modules can be generated based on these three types of information.

[0057] Furthermore, the available power supply group information for each voltage domain can at least include the names of the power supply groups available in each voltage domain. Thus, generating a directed tree for the voltage domain based on the available power supply group information allows the directed tree to reflect the correspondence between voltage domains and available power supply groups to some extent. Furthermore, the power supply information for each power supply group can at least include the power supply information of each power source within the group. Thus, generating a directed tree for the power supply group based on the power supply information allows the directed tree to represent the composition of the power supply group to some extent.

[0058] For example, Figure 3 This is a schematic diagram illustrating a low-power constraint provided by an embodiment of the present invention. For example... Figure 3As shown, an example with two module levels is presented. The TOP module is the top-level module, and block_A and block_B are modules in the next level below the TOP module. Block_A and block_B are at the same level, and their parent modules are both TOP modules. For the TOP module, its input power supplies are VDD and GND, where VDD has a voltage of 0.8V and is normally open. For the block_A module, its input power supplies are VDDG and GND, where VDDG is generated from the VDD power supply through a power gating mechanism (not shown in the diagram). VDDG has a voltage of 0.8V or can be turned off. For the block_B module, its input power supplies are VDDO and GND, where VDDO has a voltage of 1.2V and is normally open. Furthermore, the block_B module includes a MACRO unit, which has a special independent power supply; for example, the MACRO unit can be externally powered. This unit's power supply is 1.8V VDDA and GNDA. The MACRO unit can have a power domain property, and the MACRO unit can be regarded as a voltage domain.

[0059] Accordingly, a readable file can be generated based on this low-power constraint diagram as the target description file. For example, for... Figure 3 The low-power constraint diagram in the example can generate the target description file shown in the table below:

[0060]

[0061]

[0062] This table records detailed information about the voltage domain for each module. For example, for the voltage domain PD_B, the corresponding module is block_B, and the available power supply groups (Available SS) are bSS and anaSS, where bSS is the primary power supply group (Primary SS) for PD_B. The power supply for the bSS power group is VDDO, which is an external power supply network (i.e., Power is Gen 0), and the voltage of the VDDO power supply is 1.2V. Corresponding to the voltage domain PD_B, there is a special power supply macrocell: the MACRO cell, whose power supply is VDDA and ground is GNDA. END is the keyword for ending the power state table.

[0063] Specifically, the Elements field indicates the module corresponding to the voltage domain. The Default isolation field indicates the power group to which the isolation unit can be connected. The isolation unit can be used to provide isolation between different power domains to prevent unexpected interactions during power transitions. The Default retention field indicates the power group to which the retention trigger can be connected. The SupplySet field indicates the power group. The Power Name field indicates the power port name. The Power isGen field indicates whether the power supply is internally powered (e.g., a value of 1 indicates an internally powered power supply, and a value of 0 indicates an externally powered power supply, not internally generated). The power group is used to define a set of power and ground networks, and the power port is the connection point provided by the power group. The Power Voltage field indicates the power voltage value. The Ground Name field indicates the ground port name. The Ground isGen field indicates whether the ground port is internally powered. The Ground Voltage field indicates the ground port voltage value. The Pwell field indicates a P-well. The Nwell field indicates an N-well. The Macro field indicates a macrocell. The PowerNet field indicates a power network. The PowerPin field indicates a power pin. The GroundNet field indicates a ground network. The GroundPin field indicates a ground pin. PowerNet0, PowerPin0, GroundNet0, and GroundPin0 represent the PowerNet field, PowerPin field, GroundNet field, and GroundPin field, respectively, which are numbered 0. In practical applications, other numbers can be set for PowerNet, PowerPin, GroundNet, and GroundPin, and this embodiment of the invention does not impose any restrictions on this.

[0064] Based on the table above, the values ​​of the Elements field can be extracted to obtain the module names: TOP, block_A, and block_B. For any module name, the values ​​of the Power Domin field in the same row as the module name and the target Macro field are extracted. The Power Domin field values ​​in the row containing the target Macro field are identical to those in the row containing the module name, thus obtaining the voltage domain corresponding to the module represented by that module name. Accordingly, the voltage domain information for each module can be obtained: (TOP, PD_TOP), (block_A, PD_A), and (block_B, PD_B, MACRO). The voltage domain name for TOP is PD_TOP, for block_A it is PD_A, and for block_B it includes both PD_B and MACRO. The Levels and Higherblock fields represent the module's level and the module's parent module, respectively. Modules with the same Levels field value are at the same level. Modules with a Levels field value difference of 1 are at two different levels. In this invention, the smaller the value of the Levels field, the higher the level of the module. Accordingly, for any module, the values ​​of the Levels field and the Higherblock field (located in the same row as the module name) can be extracted to obtain the module's level and its parent modules. For example, the relationship information of each module can be obtained as follows: (TOP, 1, -), (block_A, 2, TOP), (block_B, 2, TOP). Here, - indicates an empty value. It should be noted that in this embodiment, the Elements field can also be set with content indicating the module's level and its parent modules; this embodiment does not limit this approach.

[0065] Further, for any value in the Power Domin field, extract that value and the value of the Available SS field in the same row as that value to form the available power group information corresponding to the voltage domain represented by the Power Domin field value. For any value in the Macro field, extract that value and the target available power group information corresponding to that Macro field value. The values ​​of the Power Name and Ground Name fields in the row containing the target available power group information are the same as the values ​​of the PowerNet and GroundNet fields in the row containing the Macro field value, forming the available power group information corresponding to the voltage domain represented by the Macro field value. For example, the available power group information corresponding to each voltage domain can be: (PD_TOP, socSS, bSS, anaSS), (PD_A, socSS, aSS), (PD_B, bSS, anaSS), (MACRO, anaSS). It should be noted that the specific values ​​of the Primary SS field, Default isolation field, and Defaultretention field can be further extracted so that when creating voltage domain nodes in the voltage domain directed tree, these field values ​​can be written into the sub-data structure of the voltage domain node. This allows the information to be extracted from the voltage domain directed tree when generating the unified power format code, and then defined in the unified power format code.

[0066] Furthermore, for the MACRO voltage domain, the specific values ​​of other fields in the same row as the Macro field can be extracted. When creating voltage domain nodes in the directed tree for the MACRO voltage domain, these field values ​​can be written into the sub-data structure of the voltage domain node. This allows the information to be extracted from the directed tree for the voltage domain when generating the unified power format code, and then defined in the unified power format code.

[0067] Furthermore, for any field value of the SupplySet field, extract that field value, the field values ​​in the same row as that field value, and the specific field corresponding to the field values ​​in the same row to obtain the power information corresponding to the power group represented by the field value of the SupplySet field. The specific field can be a pre-specified partial or complete field. For example, the specific field may include parts of the PowerName field: "Power", and parts of the Ground Name field: "Ground", the Pwell field, and the Nwell field. For example, for the field value of the SupplySet field: socSS, the power information of the socSS power group can be obtained as: (socSS, VDD(Power), 0, 0.8, GND(Ground), 0, 0, GND(Pwell), VDD(Nwell)).

[0068] In this embodiment, when generating different types of directed trees—namely, when generating module directed trees, voltage domain directed trees, and power group directed trees—the corresponding type of information is selected as the basis for generation. This ensures that the final generated module directed trees accurately represent the hierarchical relationships between modules and the correspondence between modules and voltage domains; that the generated voltage domain directed trees accurately represent the correspondence between voltage domains and power groups; and that the generated power group directed trees accurately represent the composition of power groups. This ensures the effectiveness of the directed tree generation and, consequently, the accuracy of the unified power format file subsequently generated based on these directed trees.

[0069] Optionally, in this embodiment of the invention, the step of generating the directed tree of modules based on the module information of each module in the target description file, the voltage domain information of the voltage domain corresponding to each module, and the relationship information of each module may specifically include:

[0070] Step 1021a: Create module nodes for each module based on the module information of each module, and create voltage domain nodes for the voltage domain corresponding to each module based on the voltage domain information of the voltage domain corresponding to each module.

[0071] Step 1021b: Add directed edges to the module nodes based on the relationship information, and add directed edges between the module nodes of each module and the voltage domain nodes of the corresponding voltage domain to obtain the directed tree of the modules.

[0072] In this embodiment, a tree-like data structure can be predefined. When a unified power format file needs to be generated, the required field values ​​defined in the tree-like data structure can be used to search the target description file, and the found information can be recorded in the tree-like data structure, i.e., the information is categorized. The required field values ​​defined in the tree-like data structure include the module information of each module, the voltage domain information of the voltage domain corresponding to each module, the relationship information of each module, the available power supply group information of each voltage domain, and the power supply information of each power supply group. This tree-like data structure can be implemented in the form of an algorithm or script. The algorithm or script can extract the required information from the target description file and write the extracted information into the corresponding positions in the tree-like data structure.

[0073] A first tree-like data structure can be loaded. This first tree-like data structure is a pre-constructed data structure template for a directed tree of modules. The number of sub-data structures representing module nodes in this first tree-like data structure is set to the number of modules, ensuring that one module corresponds to one sub-data structure representing a module node. Similarly, the number of sub-data structures representing voltage domain nodes in this first tree-like data structure is set to the total number of voltage domains, ensuring that one voltage domain corresponds to one sub-data structure representing a voltage domain node. The number of modules can be the total number of module names extracted in the preceding steps, and the total number of voltage domains can be the total number of voltage domain names extracted in the preceding steps.

[0074] Next, for any module, its module information is written into a sub-data structure representing a module node, thus obtaining the module node representing that module. For any voltage domain corresponding to any module, its voltage domain information is written into a sub-data structure representing a voltage domain node. For any module, its parent module is determined based on relational information, and edge data is set to represent: from the sub-data structure of the module node of the parent module to the sub-data structure of the module node of the module, thus adding directed edges between the module node of the module and the module node of the parent module. Here, the module node of a module refers to the module node created for that module.

[0075] Furthermore, the voltage domain corresponding to a module node refers to the voltage domain defined in the voltage domain information of that module, i.e., the voltage domain corresponding to that module. For example, for module TOP, the voltage domain corresponding to the module node of module TOP can be PD_TOP. For any module, edge data is set to represent: from the sub-data structure of the module node of that module to the sub-data structure of the voltage domain node of the corresponding voltage domain of that module, so as to add directed edges between the module node of that module and the voltage domain node of the corresponding voltage domain. Finally, after adding the directed edges, the directed tree of the module corresponding to the target description file can be obtained.

[0076] In this embodiment of the invention, different types of nodes can be represented in different styles. For example, a circle can represent a module node, a hexagon can represent a voltage domain node, and a trapezoid can represent a voltage domain node corresponding to a macrocell. Accordingly, the sub-data structure of each node can include a field representing the node shape. The shape of the node is set by setting the specific value of this field. Different shapes represent different types; therefore, the field representing the node shape is also the field representing the node type.

[0077] Furthermore, arrows can be used to represent directed edges, where directed edges are used to identify directional connections between nodes. A directed edge can represent the hierarchical relationship between the two connected nodes. Figure 4 This is a module directed tree provided in an embodiment of the present invention, such as... Figure 4 As shown, the TOP module, as the upper-level module of block_A and block_B, has arrows pointing from the TOP module's module nodes to the module nodes of block_A and block_B modules. For the TOP module, there is an arrow pointing from the TOP module node to the PD_TOP voltage domain node. For the block_A module, there is an arrow pointing from the block_A module node to the PD_A voltage domain node. For the block_B module, there are arrows pointing from the block_B module node to the PD_B voltage domain node, and also an arrow pointing to the MACRO voltage domain node.

[0078] In this embodiment of the invention, during the generation of the directed tree of modules, module nodes are first created for each module based on its module information, and voltage domain nodes are created for each module based on its corresponding voltage domain information. Then, directed edges are added to the module nodes based on relationship information, and directed edges are added between each module node and its corresponding voltage domain node. This ensures that each module and its voltage domain can be represented in the directed tree of modules, accurately reflecting the hierarchical relationships between modules and the correspondence between modules and voltage domains, thereby ensuring the accuracy of the generated directed tree of modules. Furthermore, the unified power format code corresponding to each module is subsequently generated based on the directed tree of modules, so that all the final unified power format files can reflect this tree structure.

[0079] Optionally, in this embodiment of the invention, the step of generating a directed voltage domain tree for each voltage domain based on the available power supply group information of each voltage domain in the target description file may specifically include:

[0080] Step 1022a: For any of the voltage domains, based on the available power supply group information of the voltage domain, create a power supply group node representing each of the available power supply groups.

[0081] Step 1022b: Create a voltage domain node representing the voltage domain, and create a module node representing the module to which the voltage domain belongs.

[0082] Step 1022c: Add directed edges to the power group node, the voltage domain node, and the module node to obtain the voltage domain directed tree.

[0083] In this embodiment of the invention, for any voltage domain, the following operation can be performed to generate a directed tree for that voltage domain: a second tree data structure can be loaded. The second tree data structure is a pre-constructed data structure template for the directed tree of the voltage domain. The number of sub-data structures representing power group nodes in the second tree data structure is set to the total number of available power groups, ensuring that each available power group corresponding to the voltage domain corresponds to one sub-data structure representing a power group node. Further, since a directed tree is generated for each voltage domain, the number of sub-data structures representing voltage domain nodes in the second tree data structure can be set to 1, and the number of sub-data structures representing module nodes in the second tree data structure can be set to the number of modules corresponding to that voltage domain.

[0084] Next, the voltage domain information of the voltage domain is written into the sub-data structure representing the voltage domain node in the second tree data structure to obtain the voltage domain node of the voltage domain. Also, the module information of the module to which the voltage domain belongs is written into the sub-data structure representing the module node in the second tree data structure to obtain the module node of the module to which the voltage domain belongs. Finally, the available power group information of each available power group in the voltage domain is written into the sub-data structure representing the power group node in the second tree data structure to obtain the power group node of each available power group in the voltage domain.

[0085] Furthermore, edge data can be set to represent: from the sub-data structure of a voltage domain node in the voltage domain to the sub-data structure of a power group node in the voltage domain, and from the sub-data structure of a voltage domain node to the sub-data structure of a module node to which the voltage domain belongs, so as to add directed edges to power group nodes, voltage domain nodes, and module nodes. Finally, after adding the directed edges, a directed tree of the voltage domain can be obtained.

[0086] The voltage domain information and the module information of the module to which the voltage domain belongs can be extracted in the preceding steps. For example, based on the above example, there can be four voltage domain information (including voltage domain names): PD_TOP, PD_A, PD_B, and MACRO. Based on the voltage domain information of each module: (TOP, PD_TOP), (block_A, PD_A), (block_B, PD_B, MACRO), it can be determined that the module information of the module to which PD_TOP belongs can include "TOP", the module information of the module to which PD_A belongs can include "block_A", the module information of the module to which PD_B belongs can include "block_B", and the module information of the module to which MACRO belongs can include "block_B".

[0087] For example, the available power supply group information corresponding to each voltage domain is as follows: (PD_TOP, socSS, bSS, anaSS), (PD_A, socSS, aSS), (PD_B, bSS, anaSS), (MACRO, anaSS). Taking PD_TOP as an example, socSS, bSS, and anaSS can be written into the sub-data structures representing power supply group nodes in the second tree data structure, resulting in three power supply group nodes representing socSS, bSS, and anaSS respectively. A voltage domain node representing the voltage domain PD_TOP is created, and a module node representing module TOP is also created. By adding directed edges from the voltage domain node representing the voltage domain PD_TOP to the three power supply group nodes representing socSS, bSS, and anaSS, and from the module node representing module TOP, the directed tree of the voltage domain PD_TOP can be obtained. Figure 5 This is a schematic diagram of a voltage domain directed tree provided in an embodiment of the present invention. The voltage domain directed tree of PD_TOP can be as follows: Figure 5 As shown. Figure 6 This is a schematic diagram of another voltage domain directed tree provided in an embodiment of the present invention, as shown below. Figure 6 As shown, from left to right, they represent the voltage domain directed tree of PD_A, the voltage domain directed tree of PD_B, and the voltage domain directed tree of MACRO, respectively.

[0088] In this embodiment of the invention, for any voltage domain, during the generation of the directed tree of the voltage domain, firstly, based on the available power supply group information of the voltage domain, power supply group nodes representing each available power supply group are created, voltage domain nodes representing the voltage domain are created, and module nodes representing the modules to which the voltage domain belongs are created. Then, directed edges are added to the power supply group nodes, voltage domain nodes, and module nodes to obtain the directed tree of the voltage domain. In this way, it can be ensured that each available power supply group of the voltage domain can be represented in the directed tree of the voltage domain. At the same time, since the directed tree of the voltage domain sets up voltage domain nodes to represent the voltage domain and module nodes to represent the modules to which the voltage domain belongs, more information can be provided for the subsequent code generation stage, and it is also convenient to determine the voltage domain and module corresponding to the directed tree of the voltage domain.

[0089] Optionally, in this embodiment of the invention, the step of generating a directed tree for each power group based on the power information of each power group in the target description file may specifically include:

[0090] Step 1023a: For any of the power groups, create a power group node representing the power group, and create a power node corresponding to each power supply based on the power information in the power information of the power group.

[0091] Step 1023b: Add directed edges to the power node and the power group node to obtain the power group directed tree of the power group.

[0092] In this embodiment of the invention, for any power group, the following operation can be performed to generate a directed tree for that power group: a third tree-like data structure can be loaded. The third tree-like data structure is a pre-constructed data structure template for the directed tree of the power group. Power information may include power ground information and power ground attribute information. Correspondingly, power nodes can be divided into power nodes representing power ground and power nodes representing power ground attributes. For example, power ground information may include Power, Ground, Pwell, and Nwell. Power ground attribute information can correspond one-to-one with power ground information, and power ground attribute information can characterize the specific value of the corresponding power ground information. For example, it includes the power ground name, whether it is an internal or external power supply, the power voltage value, the Pwell value, the nwell value, etc.

[0093] Accordingly, the number of sub-data structures representing power nodes and the number of sub-data structures representing power attributes in the third tree-structured data structure are set to the total number of power ground information items. Furthermore, a directed tree for a power group is generated; therefore, the number of sub-data structures representing power group nodes in the third tree-structured data structure can be set to 1.

[0094] Next, the power group information of the power supply group is written into the sub-data structure representing the power group node in the third tree data structure to obtain the power group node for this voltage domain. The power group information may include the name of the power supply group. The ground information of each power supply is written into the sub-data structure representing the ground node in the third tree data structure to obtain the first power node. The attribute information of each power supply is written into the sub-data structure representing the attribute of the ground node in the third tree data structure to obtain the second power node. The ground information and its attribute information characterize the composition of the power supply group.

[0095] Furthermore, edge data can be set to represent: from the sub-data structure of the power group node of the power group to the sub-data structure of the power node representing the power ground; and edge data can be set to represent: from the sub-data structure of the power node of the power ground to the sub-data structure of the power node with the corresponding power ground attribute. This adds directed edges to the first power node and the second power node. Finally, after adding the directed edges, the directed tree of the power group can be obtained.

[0096] The power group information, power ground information, and power ground attribute information of the power group can be extracted in the preceding steps. For example, based on the above example, for the power information of power group socSS: (socSS, VDD(Power), 0, 0.8, GND(Ground), 0, 0, GND(Pwell), VDD(Nwell)), a power group node representing power group socSS is created. First power nodes representing Power, Ground, Pwell, and Nwell are created respectively. A second power node corresponding to the first power node representing Power is also created. This second power node can represent the power attribute information: Power's value is VDD, Power is an external power supply, and Power's voltage is 0.8V. A second power node corresponding to the first power node representing Ground is created. This second power node can represent the power attribute information: Ground's value is GND, Ground is an external power supply, and Ground's voltage is 0V. A second power node corresponding to the first power node representing Pwell is created. This second power node can represent the power attribute information: Pwell's value is GND. Create a second power node corresponding to the first power node of Nwell. This second power node can represent power attribute information: the value of Nwell is VDD. Power group nodes are represented by diamonds, power ground nodes by triangles, and power ground attribute nodes by ellipses. Figure 7 This is a schematic diagram of a directed power supply tree provided in an embodiment of the present invention. The directed power supply tree of the power supply group SOCSS can be as follows: Figure 7 As shown. Furthermore, Figure 8 This is a schematic diagram of another directed tree for power supply groups provided in an embodiment of the present invention, as shown below. Figure 8 As shown, from top to bottom, these are the directed power tree trees for power group aSS, bSS, and anaSS, respectively.

[0097] In this embodiment of the invention, for any power group, during the generation of the directed tree for the power group, a power group node representing the power group is first created, and a power node corresponding to each power supply is created based on the power information of each power supply in the power group's power information. Then, directed edges are added to the power nodes and the power group nodes to obtain the directed tree of the power group. In this way, it can be ensured to a certain extent that the generated directed tree of the power group can accurately reflect the composition of the power group.

[0098] Optionally, in this embodiment of the invention, the step of generating a unified power format file corresponding to each module based on the directed tree of the modules, the directed tree of the voltage domain, and the directed tree of the power supply group may specifically include:

[0099] Step 1031: Traverse the directed tree of the modules, and generate a first statement when a module node is traversed, and index the directed tree of the voltage domain represented by the voltage domain node when a voltage domain node is traversed; the first statement is used to represent the module represented by the module node.

[0100] Step 1032: Based on the voltage domain directed tree and the power group directed tree of this index, generate the unified power format code corresponding to the voltage domain node currently traversed.

[0101] Step 1033: For any of the modules, generate a unified power format file for the module based on the first statement corresponding to the module and the unified power format code corresponding to all voltage domain nodes of the module.

[0102] In this invention, after creating the directed trees, the data structures of the aforementioned module directed trees, voltage domain directed trees, and power group directed trees can be reorganized and converted into a unified power format file. That is, a graph indexing method can be used to connect the discrete tree-like data structures, and unified power format code can be generated during the indexing process. Specifically, the module directed trees can be used as the indexing base, and the module directed trees can be traversed in a preset order. The preset order can be from top to bottom or from left to right. During the traversal, the names of each module can be used for indexing sequentially. If the information included in a node contains the module name, then the module node in the module directed tree is determined to have been traversed. Correspondingly, the name used in this indexing can be used to generate a first statement for that module node. The first statement can be a `load_` statement, specifically used to indicate loading the unified power format file of the module represented by that module node. For example, when traversing to the TOP node, taking a UPF file as an example, load_upf TOP.upf-scope TOP can be generated; when traversing to block_A, load_upf block_A.upf-scope block_A can be generated; and when traversing to block_B, load_upf block_B.upf-scope block_B can be generated. Here, TOP.upf, block_A, and block_B can be uniform power format filenames, respectively indicating the uniform power format files for module TOP, module block_A, and module block_B.

[0103] Furthermore, if the information included in a node does not include the module name, it can be determined that a voltage domain node has been traversed. When a voltage domain node is reached, the directed voltage domain tree representing the voltage domain represented by that node can be indexed based on its voltage domain name, and then the indexed directed voltage domain tree can be traversed. The information included in a node can be information filled into the sub-data structure corresponding to that node. For example, assuming the traversal reaches the PD_TOP voltage domain node, the voltage domain name "PD_TOP" can be used to search for a directed voltage domain tree in the previously generated directed voltage domain tree whose included voltage domain node information contains "PD_TOP," which can then be used as the directed voltage domain tree for this indexing. Next, based on the currently indexed directed voltage domain tree and the previously generated directed power supply group tree, the unified power format code corresponding to that voltage domain node can be generated.

[0104] Once the directed tree of modules has been traversed, the generation of the unified power format file is complete. For any module, the first statement corresponding to that module, the first statement corresponding to the next-level module of that module, and the unified power format code for all voltage domain nodes corresponding to that module can be combined into the unified power format file for that module. This allows the unified power format file of a module to not only reflect the specific details of the power supply groups in each voltage domain of that module, but also the relevant information of the next-level modules, thus enabling the unified power format files of each module to also reflect the hierarchical relationship between modules. Specifically, the next-level module can be the module represented by the module node pointed to by the directed edge of the module node representing that module, the first statement corresponding to the module can be the first statement generated for the module node representing that module, and the voltage domain nodes corresponding to the module can be the voltage domains represented by the voltage domain nodes pointed to by the directed edges of the module node representing that module.

[0105] In this embodiment of the invention, during the traversal of the directed tree of modules, a first statement is generated for each module node. Simultaneously, for each voltage domain node, the directed tree of the voltage domain is further indexed. Based on the currently indexed directed tree of the voltage domain and the previously generated directed tree of the power supply group, corresponding unified power format code is generated for each traversed voltage domain node. Finally, based on the first statement corresponding to the module and the unified power format code corresponding to all voltage domain nodes of the module, the unified power format file for that module can be obtained. This ensures the efficiency of generating the unified power format file to a certain extent. Furthermore, by setting the first statement, the association between the unified power format file generated by that module and the module itself can be represented.

[0106] Optionally, in this embodiment of the invention, the step of generating the unified power format code corresponding to the currently traversed voltage domain node based on the current indexed directed tree of the voltage domain and the directed tree of the power supply group may specifically include:

[0107] Step 1032a: Traverse the directed tree of the voltage domain in this index, and generate a second statement when traversing to a module node, generate a third statement when traversing to a voltage domain node, and, when traversing to a power group node, index the directed tree of the power group represented by the power group currently traversed; the second statement is used to indicate the module to which the voltage domain represented by the voltage domain of the currently traversed voltage domain node belongs, and the third statement is used to define the voltage domain.

[0108] Step 1032b: Convert the directed tree of the power group indexed this time into the unified power format code corresponding to the power group node currently traversed.

[0109] Step 1032c: Determine the second statement, the third statement, and the unified power format code corresponding to each power group node as the unified power format code corresponding to the voltage domain node.

[0110] Specifically, during the directed tree traversal of the voltage domain in this index, if the type of the currently traversed node is a module node, then it is determined that a module node has been traversed. Accordingly, the name of the module node can be used to generate a second statement for that module node. This second statement can be the same as the first statement mentioned above.

[0111] Furthermore, if the type of the currently traversed node is a voltage domain node, then the traversal will definitely reach a voltage domain node. Accordingly, the voltage domain represented by the voltage domain node can be defined using the voltage domain creation command of the unified power format file. For example, the voltage domain creation command can be the `create_power_domain` command, which can generate `create_power_domain PD_A`. In the directed tree of the voltage domain, the information of the voltage domain node can also include the primary power group name, other available power group names, the power group names that the isolation unit can connect to, and the power group names that the retention trigger can connect to. That is, the sub-data structure corresponding to the voltage domain node can also set the specific value of the Primary SS field, the other values ​​in the Available SS field besides the specific value of the Primary SS field (i.e., the specific value of extrasupply), the specific value of the Default isolation field, and the specific value of the Default retention field. Accordingly, for this voltage domain node, a second statement can be generated to represent: the voltage domain represented by the voltage domain node, the Primary SS of the represented voltage domain, the power supply groups that the isolation units of the represented voltage domain can connect to, and the power supply groups that the retention triggers of the represented voltage domain can connect to. This allows the information to be defined in the unified power format code. Taking PD_A as an example, since the Default retention field is empty, the value of the Default isolation field is aSS.

[0112] Furthermore, if the type of the currently traversed node is a power group node, then the traversal is confirmed to be to a power group node. Specifically, the specific value of the node shape field can be detected from the substructure data of the power group node. If the shape represented by this specific value is the shape of a power group node, then the type of the currently traversed node can be determined to be a power group node. Further, based on the power group name of the power group node, the directed tree representing the power group of the power group node can be indexed, and the indexed directed tree can be converted into Uniform Power Format (UPF) code. Specifically, for any node in the indexed directed tree, the corresponding UPF command is used, combined with the information included in the node, to generate the statement corresponding to the node, ultimately obtaining the UPF code corresponding to the directed tree. In other words, the directed tree is converted into UPF code that conforms to the UPF syntax specification. For example, the information included in the node can be extracted and combined with the statement corresponding to the node to obtain the statement corresponding to the node.

[0113] For example, for a power group node in a directed power group tree, a power set creation command can be used. For example, the power set creation command can be the `create_supply_set` command. The information of the power group node in the directed power group tree can also include the specific values ​​of specific fields for that power group. For the first power node and the second power node, a power port creation command, a power network creation command, a power connection command, and a status table creation command can be used. For example, the power port creation command, power network creation command, power connection command, and status table creation command can be the `create_supply_port` command, the `create_supply_net` command, the `connect_supply_net` command, and the `Create_pst` command, respectively. It should be noted that if an internal power supply exists in the directed power group tree, a power switch creation command can also be used. For example, the power switch creation command can be the `create_power_switch` command, which generates corresponding statements for the power node representing the internal power supply.

[0114] After completing the traversal of the directed tree of the voltage domain, the unified power format code corresponding to the voltage domain node currently traversed in the module's directed tree is obtained. Specifically, the second statement, the third statement, and the unified power format code corresponding to each power group node can be combined to obtain the unified power format code corresponding to that voltage domain node. Here, the unified power format code corresponding to each power group node refers to the unified power format code obtained by converting all the directed trees of the indexed power groups during the current traversal of the voltage domain directed tree.

[0115] In this embodiment of the invention, the directed tree of the modules is traversed. When traversing to a voltage domain node in the directed tree of the modules, the directed tree of the voltage domain is further indexed; when traversing to a power group node in the directed tree of the voltage domain, the directed tree of the power group is further indexed. For example, Figure 9 This is a schematic diagram of an index provided in an embodiment of the present invention. The index logic can be as follows: Figure 9 As shown. Further, after processing the indexed power group directed tree (i.e., converting the indexed power group directed tree into a unified power format code), the current voltage domain directed tree can be traversed. If the traversal of the current voltage domain directed tree is complete, the process returns to continue traversing the module directed tree until the module directed tree traversal is complete. This ensures that each directed tree created is processed when the module directed tree traversal is complete.

[0116] Figure 10 This is another index diagram provided in an embodiment of the present invention, such as... Figure 10 As shown, dashed lines represent index relationships. For example, based on... Figure 10 It can be seen that for the PD_TOP voltage domain, the power group directed tree of socSS, the power group directed tree of bSS, and the power group directed tree of anaSS can be indexed respectively. Therefore, for the PD_TOP voltage domain, the second statement generated for the module node in the PD_TOP voltage domain directed tree, the third statement generated for the voltage domain node in the PD_TOP voltage domain directed tree, the unified power format code obtained by converting the power group directed tree of socSS, the unified power format code obtained by converting the power group directed tree of bSS, and the unified power format code obtained by converting the power group directed tree of anaSS can be identified as the unified power format code corresponding to the PD_TOP voltage domain node in the module directed tree.

[0117] In this embodiment of the invention, by further traversing the indexed voltage domain directed tree and converting the indexed power group directed tree into unified power format code during the traversal, the unified power format code corresponding to the power group represented by each power group node in the final indexed voltage domain directed tree is obtained. Thus, based on the unified power format code corresponding to each power group node and the generated second and third statements, the obtained unified power format code can relatively completely represent the unified power format code corresponding to the voltage domain node currently traversed in the module directed tree. Simultaneously, by generating the second and third statements, the unified power format code corresponding to the final obtained voltage domain node can reflect the association between the unified power format code generated for that voltage domain and the module to which that voltage domain belongs.

[0118] Optionally, in this embodiment of the invention, the following steps may also be performed:

[0119] Step S21: Based on the module information and relationship information of each module, create a target file directory; one directory level in the target file directory corresponds to one module level, and the subdirectories included in the same directory level correspond to each module in a module level.

[0120] Step S22: Store the unified power format code corresponding to each module in the subdirectory corresponding to the module.

[0121] Specifically, for any module, a directory name can be generated based on the module name in the module information. For example, combining the module name with a specified suffix yields the directory name. For instance, for the module names TOP, block_A, and block_B in the UPF file, combining them with the specified suffix .upf yields the target names TOP.upf, block_A.upf, and block_B.upf, respectively.

[0122] The number of subdirectories within the same directory hierarchy can be the same as the number of modules within the corresponding module hierarchy. For example, referring to the above example, the top-level directory hierarchy within the module hierarchy can contain only one subdirectory. The second-level directory hierarchy within the module hierarchy can contain two subdirectories. These three subdirectories can be layered in the same way as the module hierarchy to obtain the target file directory. Figure 11 This is a schematic diagram of a directory structure provided in an embodiment of the present invention, taking a UPF file as an example, such as... Figure 11 As shown, the top-level directory hierarchy includes a subdirectory corresponding to the TOP module: top.upf, and the second-level directory hierarchy includes two subdirectories corresponding to the block_A module and the block_B module: block_A.upf and block_B.upf, respectively.

[0123] For any module, a subdirectory whose directory name includes the module's name can be identified as the subdirectory corresponding to that module. Accordingly, the unified power format file corresponding to that module can be stored in that subdirectory. Specifically, during the generation process, the generated unified power format code can be directly output to the corresponding subdirectory to improve storage efficiency. It should be noted that in this embodiment of the invention, when outputting the unified power format code, it can be output in reverse order of generation, or it can be output sequentially according to the index; this embodiment of the invention does not impose any restrictions on this.

[0124] In this embodiment of the invention, a target file directory is created based on the module information and relationship information of each module. One directory level within the target file directory corresponds to one module level, and subdirectories within the same directory level correspond to modules within that module level. The unified power format code corresponding to each module is stored in the subdirectory corresponding to that module. Thus, by constructing a hierarchical target file directory and storing the unified power format code corresponding to each module in the target file directory, the generated unified power format code can be easily viewed according to the module hierarchy. Simultaneously, by generating hierarchical unified power format files according to the module hierarchy information, the final result is more consistent with the multi-level modular design approach.

[0125] It should be noted that, in this embodiment of the invention, a directed tree of modules can also be used for indexing, and the indexing order can be recorded. After all the directed trees of the voltage domain and the directed trees of the power supply group have been indexed, each directed tree is converted into a unified power format code, resulting in multiple unified power format code fragments. Then, using the recorded indexing order, the unified power format code fragments corresponding to the same module are organized sequentially to obtain the unified power format code corresponding to that module.

[0126] In this embodiment of the invention, the target description file can also reflect the hierarchical relationship between voltage domains. Specifically, after determining the hierarchical relationship between modules and the relationship between modules and voltage domains, the hierarchical relationship between voltage domains can be obtained; that is, the hierarchical relationship of modules can characterize the hierarchical relationship between the voltage domains corresponding to the modules. Accordingly, the unified power format file generated based on this target description file can reflect the hierarchical relationship between modules and the hierarchical relationship between voltage domains.

[0127] Furthermore, in design iteration scenarios, such as RTL code iteration, low-power constraint files may be frequently modified. In this embodiment of the invention, when the low-power constraint file is modified, only the target description file needs to be modified synchronously. Based on the modified target description file, the unified power format file corresponding to each module can be automatically regenerated. Since the low-power constraint file and target description file are highly readable, they can be easily read by designers, quickly modified, and error located. Compared to manually rewriting the unified power format file, this method shortens the generation time of the unified power format file, reduces the probability of errors, and enables rapid updates of the unified power format file, thus accelerating version iteration.

[0128] Reference Figure 12 This diagram illustrates a block diagram of a unified power format file generation apparatus provided by an embodiment of the present invention, such as... Figure 12 As shown, the unified power format file generation device specifically includes:

[0129] The acquisition module 201 is used to acquire the target description file of the voltage domain design diagram; the voltage domain design diagram includes at least two module levels, each module level includes at least one module, each module corresponds to at least one voltage domain, and each voltage domain corresponds to at least one power supply group.

[0130] The first creation module 202 is used to create, based on the target description file, a module directed tree representing the hierarchical relationship between modules and the correspondence between modules and voltage domains, a voltage domain directed tree representing the correspondence between voltage domains and power supply groups, and a power supply group directed tree representing the composition of power supply groups.

[0131] The generation module 203 is used to generate a unified power format file corresponding to each module based on the directed tree of the modules, the directed tree of the voltage domain, and the directed tree of the power supply group.

[0132] Optionally, the first creation module 202 is specifically used for:

[0133] Based on the module information of each module in the target description file, the voltage domain information of the voltage domain corresponding to each module, and the relationship information of each module, a directed tree of the modules is generated;

[0134] Based on the available power supply group information for each voltage domain in the target description file, a directed voltage domain tree is generated for each voltage domain.

[0135] Based on the power information of each power group in the target description file, a directed tree for each power group is generated.

[0136] Optionally, the first creation module 202 is further used for:

[0137] Based on the module information of each module, a module node is created for each module; and based on the voltage domain information of the voltage domain corresponding to each module, a voltage domain node is created for the voltage domain corresponding to each module.

[0138] Based on the relationship information, directed edges are added to the module nodes, and directed edges are added between the module nodes of each module and the voltage domain nodes of the corresponding voltage domain, to obtain the directed tree of the modules.

[0139] Optionally, the first creation module 202 is further used for:

[0140] For any of the voltage domains, based on the available power supply group information of the voltage domain, a power supply group node representing each of the available power supply groups is created;

[0141] Create voltage domain nodes that represent the voltage domain, and create module nodes that represent the modules to which the voltage domain belongs;

[0142] Directed edges are added to the power group node, the voltage domain node, and the module node to obtain the voltage domain directed tree.

[0143] Optionally, the first creation module 202 is further used for:

[0144] For any of the power groups, create a power group node representing the power group, and create a power node corresponding to each power supply based on the power information in the power information of the power group.

[0145] Add directed edges to the power node and the power group node to obtain the power group directed tree of the power group.

[0146] Optionally, the generation module 203 is specifically used for:

[0147] The directed tree of the modules is traversed, and a first statement is generated when a module node is reached. When a voltage domain node is reached, the directed tree of the voltage domain represented by the voltage domain node is indexed. The first statement is used to represent the module represented by the module node.

[0148] Based on the directed tree of the voltage domain and the directed tree of the power group in this index, generate the unified power format code corresponding to the voltage domain node currently traversed;

[0149] For any of the modules, a unified power format file for the module is generated based on the first statement corresponding to the module and the unified power format code corresponding to all voltage domain nodes of the module.

[0150] Optionally, the generation module 203 is further configured to:

[0151] The directed tree of the voltage domain in this index is traversed, and a second statement is generated when a module node is reached, a third statement is generated when a voltage domain node is reached, and the directed tree of the power group represented by the power group node is indexed when a power group node is reached. The second statement is used to indicate the module to which the voltage domain represented by the voltage domain of the currently traversed voltage domain node belongs, and the third statement is used to define the voltage domain.

[0152] The directed tree of the power group indexed this time is converted into the uniform power format code corresponding to the power group node currently traversed;

[0153] The second statement, the third statement, and the unified power format code corresponding to each power group node are determined as the unified power format code corresponding to the voltage domain node.

[0154] Optionally, the device further includes:

[0155] The second creation module is used to create a target file directory based on the module information and relationship information of each module; one directory level in the target file directory corresponds to one module level, and the subdirectories included in the same directory level correspond to each module in a module level;

[0156] The storage module is used to store the unified power format code corresponding to each module into a subdirectory corresponding to the module.

[0157] In summary, the unified power format file generation apparatus provided in this embodiment of the invention obtains a target description file of a voltage domain design diagram. The voltage domain design diagram includes at least two module levels, each module level including at least one module, each module corresponding to at least one voltage domain, and each voltage domain corresponding to at least one power supply group. Based on the target description file, directed trees representing the hierarchical relationships between modules and the correspondence between modules and voltage domains, directed trees representing the correspondence between voltage domains and power supply groups, and directed trees representing the composition of power supply groups are created. Based on the directed trees of modules, voltage domains, and power supply groups, unified power format files corresponding to each module are generated. In this way, unified power format files can be obtained without manual writing, thus reducing implementation costs, shortening the time required to generate unified power format files, and improving the efficiency of generating unified power format files.

[0158] Meanwhile, in this embodiment, a unified power format file is generated for each level of module, which can be applied to hierarchical design and thus adapt to the needs of large-scale or ultra-large-scale chip design.

[0159] Reference Figure 13 This is a schematic diagram of the structure of the electronic device provided in an embodiment of the present invention. Figure 13 As shown, the electronic device includes: a processor, a memory, a communication interface, and a communication bus. The processor, the memory, and the communication interface communicate with each other through the communication bus. The memory is used to store at least one executable instruction, which causes the processor to execute the unified power format file generation method of the aforementioned embodiment.

[0160] This invention provides a machine-readable medium storing instructions that, when executed by one or more processors, enable the processors to perform the unified power format file generation method described in the foregoing embodiments. The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably.

[0161] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, apparatus, or computer program products. Therefore, embodiments of the present invention can take the form of entirely hardware embodiments, entirely software embodiments, or embodiments combining software and hardware aspects. Furthermore, embodiments of the present invention can take the form of computer program products implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0162] It should be noted that all actions involving the acquisition of signals, information, or data in this application are carried out in compliance with the relevant data protection laws and policies of the country where the application is located, and with the authorization granted by the owner of the relevant device.

[0163] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing terminal device to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal device, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0164] These computer program instructions may also be stored in a computer-readable storage medium capable of directing a computer or other programmable data processing terminal device to operate in a predictive manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0165] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal equipment, causing a series of operational steps to be performed on the computer or other programmable terminal equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable terminal equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0166] Although preferred embodiments of the present invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of the present invention.

[0167] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or terminal device that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or terminal device. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or terminal device that includes said element.

[0168] The foregoing has provided a detailed description of a method for generating a unified power format file, a device for generating a unified power format file, an electronic device, and one or more machine-readable media provided by the present invention. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A method for generating a unified power format file, characterized in that, The method includes: Obtain the target description file of the voltage domain design diagram; the voltage domain design diagram includes at least two module levels, each module level includes at least one module, each module corresponds to at least one voltage domain, and each voltage domain corresponds to at least one power supply group. Based on the target description file, a directed tree for modules is created to represent the hierarchical relationship between modules and the correspondence between modules and voltage domains, a directed tree for voltage domains to represent the correspondence between voltage domains and power supply groups, and a directed tree for power supply groups to represent the composition of power supply groups. Based on the directed tree of the modules, the directed tree of the voltage domain, and the directed tree of the power supply group, a unified power supply format file corresponding to each module is generated.

2. The method according to claim 1, characterized in that, Based on the target description file, the following steps are taken: creating a module directed tree representing the hierarchical relationship between modules and the correspondence between modules and voltage domains; a voltage domain directed tree representing the correspondence between voltage domains and power supply groups; and a power supply group directed tree representing the composition of power supply groups. Based on the module information of each module in the target description file, the voltage domain information of the voltage domain corresponding to each module, and the relationship information of each module, a directed tree of the modules is generated; Based on the available power supply group information for each voltage domain in the target description file, a directed voltage domain tree is generated for each voltage domain. Based on the power information of each power group in the target description file, a directed tree for each power group is generated.

3. The method according to claim 2, characterized in that, The step of generating the directed tree of modules based on the module information of each module in the target description file, the voltage domain information of the voltage domain corresponding to each module, and the relationship information of each module includes: Based on the module information of each module, a module node is created for each module; and based on the voltage domain information of the voltage domain corresponding to each module, a voltage domain node is created for the voltage domain corresponding to each module. Based on the relationship information, directed edges are added to the module nodes, and directed edges are added between the module nodes of each module and the voltage domain nodes of the corresponding voltage domain, to obtain the directed tree of the modules.

4. The method according to claim 2, characterized in that, The step of generating a directed voltage domain tree for each voltage domain based on the available power supply group information for each voltage domain in the target description file includes: For any of the voltage domains, based on the available power supply group information of the voltage domain, a power supply group node representing each of the available power supply groups is created; Create voltage domain nodes that represent the voltage domain, and create module nodes that represent the modules to which the voltage domain belongs; Directed edges are added to the power group node, the voltage domain node, and the module node to obtain the voltage domain directed tree.

5. The method according to claim 2, characterized in that, The step of generating a directed tree for each power group based on the power information of each power group in the target description file includes: For any of the power groups, create a power group node representing the power group, and create a power node corresponding to each power supply based on the power information in the power information of the power group. Add directed edges to the power node and the power group node to obtain the power group directed tree of the power group.

6. The method according to any one of claims 1 to 5, characterized in that, The process of generating a unified power format file corresponding to each module based on the directed tree of the module, the directed tree of the voltage domain, and the directed tree of the power supply group includes: The directed tree of the modules is traversed, and a first statement is generated when a module node is reached. When a voltage domain node is reached, the directed tree of the voltage domain represented by the voltage domain node is indexed. The first statement is used to represent the module represented by the module node. Based on the directed tree of the voltage domain and the directed tree of the power group in this index, generate the unified power format code corresponding to the voltage domain node currently traversed; For any of the modules, a unified power format file for the module is generated based on the first statement corresponding to the module and the unified power format code corresponding to all voltage domain nodes of the module.

7. The method according to claim 6, characterized in that, The directed tree of the voltage domain based on the current index and the directed tree of the power supply group generate the unified power format code corresponding to the currently traversed voltage domain node, including: The directed tree of the voltage domain in this index is traversed, and a second statement is generated when a module node is reached, a third statement is generated when a voltage domain node is reached, and the directed tree of the power group represented by the power group node is indexed when a power group node is reached. The second statement is used to indicate the module to which the voltage domain represented by the voltage domain of the currently traversed voltage domain node belongs, and the third statement is used to define the voltage domain. The directed tree of the power group indexed this time is converted into the uniform power format code corresponding to the power group node currently traversed; The second statement, the third statement, and the unified power format code corresponding to each power group node are determined as the unified power format code corresponding to the voltage domain node.

8. The method according to claim 3, characterized in that, The method further includes: Based on the module information and relationship information of each module, a target file directory is created; one directory level in the target file directory corresponds to one module level, and the subdirectories included in the same directory level correspond to the modules in one module level. The unified power format code corresponding to each module is stored in the subdirectory corresponding to the module.

9. A unified power format file generation device, characterized in that, The device includes: The acquisition module is used to acquire the target description file of the voltage domain design diagram; the voltage domain design diagram includes at least two module levels, each module level includes at least one module, each module corresponds to at least one voltage domain, and each voltage domain corresponds to at least one power supply group. The first creation module is used to create, based on the target description file, a module directed tree representing the hierarchical relationship between modules and the correspondence between modules and voltage domains, a voltage domain directed tree representing the correspondence between voltage domains and power supply groups, and a power supply group directed tree representing the composition of power supply groups. The generation module is used to generate a unified power format file corresponding to each module based on the directed tree of the module, the directed tree of the voltage domain, and the directed tree of the power group.

10. The apparatus according to claim 9, characterized in that, The first creation module is specifically used for: Based on the module information of each module in the target description file, the voltage domain information of the voltage domain corresponding to each module, and the relationship information of each module, a directed tree of the modules is generated; Based on the available power supply group information for each voltage domain in the target description file, a directed voltage domain tree is generated for each voltage domain. Based on the power information of each power group in the target description file, a directed tree for each power group is generated.

11. The apparatus according to claim 10, characterized in that, The first creation module is further used for: Based on the module information of each module, a module node is created for each module; and based on the voltage domain information of the voltage domain corresponding to each module, a voltage domain node is created for the voltage domain corresponding to each module. Based on the relationship information, directed edges are added to the module nodes, and directed edges are added between the module nodes of each module and the voltage domain nodes of the corresponding voltage domain, to obtain the directed tree of the modules.

12. The apparatus according to claim 10, characterized in that, The first creation module is further used for: For any of the voltage domains, based on the available power supply group information of the voltage domain, a power supply group node representing each of the available power supply groups is created; Create voltage domain nodes that represent the voltage domain, and create module nodes that represent the modules to which the voltage domain belongs; Directed edges are added to the power group node, the voltage domain node, and the module node to obtain the voltage domain directed tree.

13. The apparatus according to claim 10, characterized in that, The first creation module is further used for: For any of the power groups, create a power group node representing the power group, and create a power node corresponding to each power supply based on the power information in the power information of the power group. Add directed edges to the power node and the power group node to obtain the power group directed tree of the power group.

14. The apparatus according to any one of claims 9 to 13, characterized in that, The generation module is specifically used for: The directed tree of the module is traversed, and a first statement is generated when a module node is reached. When a voltage domain node is reached, the directed tree of the voltage domain represented by the voltage domain node is indexed. The first statement is used to characterize the module represented by the module node; Based on the directed tree of the voltage domain and the directed tree of the power group in this index, generate the unified power format code corresponding to the voltage domain node currently traversed; For any of the modules, a unified power format file for the module is generated based on the first statement corresponding to the module and the unified power format code corresponding to all voltage domain nodes of the module.

15. The apparatus according to claim 14, characterized in that, The generation module is further used for: Traverse the voltage domain directed tree of this index, and generate the second statement when traversing to the module node, generate the third statement when traversing to the voltage domain node, and, when traversing to the power group node, index the power group directed tree of the power group represented by the power group currently traversed. The second statement is used to indicate the module to which the voltage domain represented by the currently traversed voltage domain node belongs, and the third statement is used to define the voltage domain; The directed tree of the power group indexed this time is converted into the uniform power format code corresponding to the power group node currently traversed; The second statement, the third statement, and the unified power format code corresponding to each power group node are determined as the unified power format code corresponding to the voltage domain node.

16. The apparatus according to claim 11, characterized in that, The device further includes: The second creation module is used to create a target file directory based on the module information and relationship information of each module; one directory level in the target file directory corresponds to one module level, and the subdirectories included in the same directory level correspond to each module in the module level; The storage module is used to store the unified power format code corresponding to each module into a subdirectory corresponding to the module.

17. An electronic device, characterized in that, include: The processor, memory, communication interface, and communication bus are provided, wherein the processor, memory, and communication interface communicate with each other via the communication bus. The memory is used to store executable instructions that cause the processor to perform the method as described in any one of claims 1 to 8.

18. One or more machine-readable media, characterized in that, It stores instructions that, when executed by one or more processors, cause the processors to perform the method as described in any one of claims 1-8.

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