Multi-dimensional pwq method and system

By using a multi-dimensional PWQ method combined with three-layer GDS overlay inspection, the problem that the traditional PWQ method cannot detect the interconnects between upper and lower layers is solved, achieving efficient inspection of the back-end BEOL process of integrated circuits, and improving product yield and inspection efficiency.

CN122349252APending Publication Date: 2026-07-07SHANGHAI HUALI INTEGRATED CIRCUIT CORP
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Patent Information

Application Number
CN202610416846.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-03-31
Publication Date
2026-07-07

AI Technical Summary

Technical Problem

Traditional PWQ methods only focus on defects in the current layer's wiring and cannot detect the connection status of the interconnects between the upper and lower layers. This results in the failure to detect hot spots of process defects, a high probability of product failure, and insufficient yield assurance.

Method used

The multidimensional PWQ method is adopted, and the GDS of three layers are superimposed for detection. The coverage ratio of the via on the metal layer is calculated by combining the GDS of the current metal layer and the connecting vias of the upper and lower layers, the interlayer connectivity is evaluated, and a test report is generated.

Benefits of technology

It enables multi-dimensional detection of process defect hotspots related to the connection between the connection hole and the metal layer, significantly reducing the probability of product failure and improving detection efficiency and yield.

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Abstract

The application discloses a multi-dimensional PWQ method for BEOL process defect hotspot detection of an integrated circuit, which comprises the following steps: 1) adopting a traditional PWQ method to detect and screen out weak patterns within a process window range of a target metal layer; 2) for the weak patterns within the process window range, calling a GDS of a same layer of the target metal layer, a via hole GDS of an upper layer of the target metal layer and a via hole GDS of a lower layer of the target metal layer to form three-layer GDS; 3) aligning and measuring original image data obtained by EP5 shooting with the three-layer GDS to complete multi-dimensional D2DB processing; 4) calculating a landing coverage ratio of a via hole on a line of the target metal layer, combining a defect detection result of a line of the same layer to judge a connection condition of the target metal layer and the via holes of the upper and lower layers; and 5) generating a detection report containing line defect information of the same layer and the landing coverage ratio of the via hole. The application can realize defect detection of a same layer wiring, obtain information of connection holes of upper and lower layers and evaluate the connection condition of the same layer metal and the connection holes / via holes of the upper and lower layers.
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Description

Technical Field

[0001] This invention relates to the field of integrated circuits, and in particular to a multi-dimensional PWQ method and system for detecting defect hotspots in the back-end BEOL process of integrated circuits. Background Technology

[0002] Integrated circuit manufacturing is characterized by complex structure, stringent process requirements, and numerous process steps. Process Window Qualification (PWQ) is a core process for ensuring product yield during the integrated circuit R&D stage. It monitors the process window of each process to ensure that the process window is greater than the sum of errors generated during manufacturing, thereby ensuring the process stability of chip manufacturing.

[0003] Traditional process window verification and inspection procedures are fixed at six steps: KLA optical inspection, sampling, EP5 image capture, D2DB (Die to Database, chip and database comparison), review, and report. A single inspection takes approximately one week to complete. The D2DB step is the core inspection step. This step involves overlaying the image contour extracted from the Rawdata (EP5 image) with the current layer's GDS (Graphics Data Structures), and then measuring the CD / space change using a gauge (cutline) on the GDS. This enables defect detection of the current layer's wiring. The GDS is the GDSII layout data stream format.

[0004] The core of backend-of-line (BEOL) technology for integrated circuits is the construction of multilayer conductive metal lines and the interconnection between layers vias (or pinholes) to connect transistors on the substrate according to design requirements to achieve specific functions. Successful interconnection between the metal layers is a key criterion for determining the quality of this process. However, traditional PWQ (Power Wrapper Quality) testing methods only focus on defects in the current layer's wiring, completely ignoring the connection relationship between the current layer's metal and the vias / pinholes on the upper and lower layers. They cannot detect the landing conditions of the vias / pinholes, nor can they assess the connectivity between the current layer's metal and the vias / pinholes on the upper and lower layers. This means that even if the CD / space ratio of the current layer's wiring is normal, defects in the connection between the vias / pinholes and the metal can still create process defect hotspots, causing product failure. Existing testing methods suffer from drawbacks such as limited testing dimensions, low detection rate of process defect hotspots, and insufficient product yield assurance. Summary of the Invention

[0005] The summary of this invention introduces a series of simplified concepts, all of which are simplifications of existing technologies in the field, and will be further explained in detail in the detailed description section. This summary is not intended to limit the key features and essential technical features of the claimed technical solution, nor is it intended to determine the scope of protection of the claimed technical solution.

[0006] To address the shortcomings of existing technologies, the technical problem solved by this invention is that the traditional PWQ method only uses the local layer GDS for detection in the D2DB stage, which can only detect defects in the local layer wiring and cannot obtain information on the connection holes between the upper and lower layers. It cannot assess the connectivity between the local layer metal and the connection holes / connection holes between the upper and lower layers, resulting in the inability to detect process defect hotspots related to the connection holes / connection holes and the metal connection. This leads to a high probability of product failure and insufficient yield assurance.

[0007] To address the aforementioned technical problems, this invention provides a multi-dimensional PWQ method for detecting defect hotspots in the back-end BEOL process of integrated circuits, comprising the following steps: 1) The traditional PWQ method is used to perform defect detection on the line of the target metal layer, obtain preliminary detection results, and screen out weak patterns within the process window range; The traditional PWQ method includes the following steps in sequence: PWQ wafer inspection, YE optical inspection, sampling, EP5 image capture, single-level D2DB processing, and review, which can be implemented using existing technologies; 2) For the weak pattern within the process window range, retrieve the current layer GDS of the target metal layer, the upper layer via GDS of the target metal layer, and the lower layer via GDS of the target metal layer to form a three-layer GDS. 3) Align and measure the raw image data obtained from the EP5 image with the three-layer GDS to complete the multidimensional D2DB processing; 4) Calculate the landing coverage ratio of the via on the target metal layer line, and combine it with the defect detection results of the current layer line to determine the connectivity between the target metal layer and the vias in the upper and lower layers; 5) Generate an inspection report that includes information on the line defects of the current layer and the coverage ratio of vias and landings.

[0008] Preferably, in a further improved version of the multi-dimensional PWQ method, in step 1), the exposure conditions outside the process window range are considered failure conditions, and no subsequent detection is performed on the area within that range.

[0009] Preferably, in a further improved version of the multi-dimensional PWQ method, in step 2), when the target metal layer is layer M1, the corresponding upper via is M1V0 and the lower via is M1V1. When the target metal layer is layer M3, the corresponding upper via is M3V2 and the lower via is M3V3.

[0010] Preferably, in a further improved version of the multi-dimensional PWQ method, in step 4), the Landing coverage ratio is the ratio of the effective coverage area of ​​the via on the target metal layer line to the total area of ​​the via.

[0011] Preferably, the improved multi-dimensional PWQ method further includes: a step of performing OPC correction on the process defect hotspot pattern on the mask based on the inspection report, wherein the correction is based on the defect status of the current layer line and the via landing coverage ratio.

[0012] Preferably, in a further improved version of the multi-dimensional PWQ method, the target metal layer is any one of the metal layers MO to M13 in the semiconductor back-end BEOL process.

[0013] This invention provides a multi-dimensional PWQ detection system for implementing any of the above-described multi-dimensional PWQ methods, comprising: The optical inspection module is used to perform optical defect inspection on the target metal layer of the PWQ wafer at the line level. The sampling module is signal-connected to the optical detection module and is used to perform sampling processing on the area after optical detection. An image acquisition module, signal-connected to the sampling module, is used to take EP5 images of the sampling area to acquire raw image data; The multidimensional D2DB processing module is signal-connected to the image acquisition module. It has a built-in database of the current layer GDS, the upper layer via GDS, and the lower layer via GDS. It is used to complete the alignment and measurement of the original image data with the three layers of GDS and to calculate the via landing coverage ratio. The report output module is signal-connected to the multidimensional D2DB processing module and is used to generate an inspection report containing the current layer lineDefect information and the via landing coverage ratio.

[0014] Preferably, the multi-dimensional PWQ detection system is further improved, wherein the multi-dimensional D2DB processing module includes a weak image screening unit and a coverage ratio calculation unit; The weak pattern screening unit is used to screen weak patterns within the process window range, and the coverage ratio calculation unit is used to calculate the landing coverage ratio of the via on the target metal layer line.

[0015] Preferably, in a further improved version of the multi-dimensional PWQ detection system, the optical detection module is a KLA optical detection device, the image acquisition module is an EP5 imaging device, and the modules are electrically connected. The superposition and measurement of the three-layer GDS are achieved through computer programming.

[0016] Based on the above technical solution, the working principle of the present invention is explained as follows; This invention is based on the traditional PWQ method. By modifying the D2DB process in the weak pattern region within the process window by superimposing three layers of GDS, the GDS of the current metal layer is combined with the GDS of the upper and lower connecting holes. This enables simultaneous detection of wiring defects in the current layer and the connection status of connecting holes between layers. By quantifying the coverage ratio of connecting holes on the metal layer, the landing status of connecting holes and the interlayer connectivity are determined, thereby detecting process defect hotspots related to connecting hole connections and making up for the lack of dimensions in traditional detection.

[0017] Based on the above technical solution and working principle, the present invention can achieve at least the following technical effects compared with the prior art; 1) The traditional PWQ method only uses the GDS of the current layer for detection, without the GDS information of the connecting holes between the upper and lower layers. It cannot obtain the landing status of the connecting holes and the interlayer connectivity data, and cannot identify such process defect hotspots. The detection dimension is limited to the single dimension of the current layer wiring.

[0018] This invention enables multi-dimensional detection of process defect hotspots, effectively detecting process defect hotspots related to the connection between the hole and the metal layer. The detection range of process defect hotspots covers both in-layer wiring defects and interlayer connection defects.

[0019] 2) The traditional PWQ method does not have the step of superimposing the upper and lower layers of GDS, so it cannot obtain the relative position information of the connection hole and the metal layer, nor can it perform quantitative calculation of the matching relationship between the two. It can only make qualitative judgments based on the CD / space data of the routing in the current layer.

[0020] This invention enables a quantitative assessment of the bonding hole laying condition, and provides quantifiable objective data for determining interlayer connectivity by calculating the coverage ratio.

[0021] 3) The traditional PWQ method does not have additional testing conditions set. It only uses the CD / space index of the current layer wiring as the basis for judging the process qualification. Even if the current layer index is normal, potential defects in the interlayer connection can still cause product failure, and there is no additional testing step to check for such defects.

[0022] This invention adds a detection dimension without changing the core process of traditional PWQ, and adds interlayer connection detection conditions to the normal in-layer wiring of CD / space, which significantly reduces the probability of product failure.

[0023] 4) The traditional PWQ method is a uniform detection mode throughout the entire process. It does not perform differentiated detection for the process window range. It still performs the same detection steps for areas outside the window range where the exposure conditions fail, resulting in low detection efficiency and poor targeting.

[0024] This invention performs multidimensional detection only within the process window, avoiding invalid detection operations and ensuring detection efficiency while improving the targeting and effectiveness of the detection.

[0025] 5) Traditional PWQ methods cannot detect process defect hotspots related to the connection between the hole and the metal layer due to the lack of detection dimensions. These potential defects will be transformed into actual product failures in subsequent processes, thus limiting the improvement of yield.

[0026] This invention can effectively improve the product yield of the back-end BEOL process of integrated circuits and provide a more comprehensive basis for process qualification judgment for process window verification. Attached Figure Description

[0027] The accompanying drawings are intended to illustrate the general characteristics of the methods, structures, and / or materials used in specific exemplary embodiments of the invention, supplementing the description in the specification. However, the drawings are schematic diagrams not drawn to scale and may not accurately reflect the precise structural or performance characteristics of any of the given embodiments. The drawings should not be construed as limiting or restricting the range of numerical values ​​or properties covered by exemplary embodiments of the invention. The invention will now be described in further detail with reference to the accompanying drawings and specific embodiments.

[0028] Figure 1 is a schematic diagram of the detection process of the traditional PWQ method, showing the complete steps of PWQ Wafer, YE optical inspection, Sampling, HMI operation, EP5 image capture, Defect identification, D2DB processing, and Report output in sequence; Figure 2 shows the SEM cross-sectional view of the metal layer structure of the subsequent BEOL process, showing the distribution of metal layers from MO to M13. Among them, M0-M3, M4-M8, M9 & M10, M11 (Cu), M12 (Cu), and M13 (Al) are metal layers of different levels, and each metal layer is connected by a connecting hole. Figure 3 This is a schematic diagram of the via landing coverage ratio detection results of the present invention, showing the Coverage Ratio of M1V0, M1V1, M3V2, and M3V3. Detailed Implementation

[0029] The following specific embodiments illustrate the implementation of the present invention. Those skilled in the art can fully understand other advantages and technical effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through different specific embodiments, and the details in this specification can also be applied based on different viewpoints, with various modifications or changes made without departing from the overall design concept of the invention. It should be noted that, unless otherwise specified, the following embodiments and features can be combined with each other. The following exemplary embodiments of the present invention can be implemented in many different forms and should not be construed as being limited to the specific embodiments set forth herein. It should be understood that these embodiments are provided to make the disclosure of the present invention thorough and complete, and to fully convey the technical solutions of these exemplary embodiments to those skilled in the art.

[0030] Technical Terminology Explanation: 1. D2DB: DietoDatabase, chip-to-database comparison, is the core comparison and measurement step in PWQ testing; 2. PWQ: Process Window Qualification, a process inspection procedure during the integrated circuit R&D stage; 3. BEOL: backendofline, the process stage in integrated circuit manufacturing where metal interconnect layers are built; 4. Hotspot: A process defect hotspot, referring to an area or process defect itself that is prone to occur; 5. Via: Connecting hole / connecting via / through hole / pillar metal, used to realize electrical connections between multilayer metal lines in integrated circuits; 6. Metal: A conductive metal layer in an integrated circuit; 7. line: metal wire, metal wiring; 8. Coverage Ratio: This quantifies the area covered by Via on Metal, determining the relative position and connectivity between Via and Metal. 9. Weak pattern: The weak pattern area refers to the pattern area within the process window that is prone to process defects. Example

[0031] The multi-dimensional PWQ method described in this invention is applied to the 1XMetal layer process defect hotspot detection / process window verification in the back-end BEOL process of integrated circuits. Specific implementation steps are combined with… Figure 2 As shown, it includes the following steps: S1. Defect detection of the current layer metal wiring is performed using the traditional multi-dimensional PWQ method. More specifically, the traditional PWQ method is used to perform defect detection on the current line of the back-end 1XMetal layer, which involves six steps in sequence: KLA optical inspection, sampling, EP5 image capture, D2DB, review, and report. The D2DB step uses a single GDS of the current 1XMetal layer. The image contour of the raw data obtained from the EP5 image is extracted and superimposed on the current GDS. Gauges (cut lines) are applied to the GDS to measure the CD / space change, thus completing the defect detection of the current line and outputting the traditional PWQ detection results.

[0032] S2. Based on the detection results of step S1, weak pattern areas within the process window range are selected. These areas are key areas where hotspots are likely to occur. Areas outside the window range are not included in the subsequent detection range because the exposure conditions are completely ineffective. Multi-dimensional process window verification detection is performed on the raw data of the weak pattern areas. S3. In the D2DB step of multi-dimensional process window verification and detection, the original single GDS layout of the current metal layer is replaced with a three-layer GDS layout that superimposes the GDS layout of the current metal layer, the GDS layout of the upper connecting hole, and the GDS layout of the lower connecting hole. The image contour extracted from the original data is superimposed and measured with the three-layer GDS layout. At the same time, the wiring of the current metal layer and the landing of the upper and lower connecting holes are detected, and the connectivity between the current metal layer and the upper and lower connecting holes is evaluated, so as to realize the multi-dimensional detection of process defect hotspots. This step is the core of this application and can be briefly summarized as follows: replace the original single 1XMetal GDS with a three-layer GDS consisting of the 1XMetal GDS, the upper layer connection hole GDS, and the lower layer connection hole GDS, and then overlay and measure the imagecontour extracted from the raw data with the three-layer GDS. By using three layers of GDS for overlapping measurements, detection in two dimensions can be achieved simultaneously: 1. Detect the defect status of the line in the current 1XMetal layer and obtain the CD / space change; 2. The Landing of the connecting holes between the upper and lower layers is detected by calculating the coverage ratio of Via on 1XMetal to quantitatively determine the relative position of Via and Metal.

[0033] Based on the obtained Coverage Ratio value, the connectivity between the current 1XMetal layer and the connecting holes of the upper and lower layers is evaluated. If the coverage ratio does not meet the process design requirements, it is determined that there are process defect hotspots related to the connection between the connecting hole and the metal layer in this area, thus completing the multi-dimensional process defect hotspot detection.

[0034] The multidimensional PWQ test results are reviewed and reported. The hot data of process defects such as wiring defects in the current layer and connection defects between the hole and the metal layer are summarized to provide a basis for process optimization and achieve accurate verification of the process window.

[0035] This invention can not only detect the defect status of the current layer line, but also detect the interconnection status of adjacent metals by measuring the landing status of the visor on the line (Coverage Ratio, as shown in the formula below). It is a PWQ method that detects the process from multiple dimensions, which will more effectively ensure the improvement of product yield.

[0036] This embodiment has been practically applied in PWQ verification of M1 and M3 layers. This invention can not only detect the defect of the current layer line, but also detect the interconnection of adjacent metals by measuring the landing of the Via on the line (Coverage Ratio, as shown in the following formula). ; It is the nominal area of ​​the via design. It is the actual outline area of ​​the metal wire.

[0037] Combination Figure 3 The test results show that the Coverage Ratio of M1V0 is 66.8%, the Coverage Ratio of M1V1 is 72.6%, the Coverage Ratio of M3V2 is 66.8%, and the Coverage Ratio of M3V3 is 73.7%. This quantitative value can be used to directly determine the landing status of each Metal layer and the corresponding Via layer. Areas with low coverage (such as M3V2, 66.8%) can be identified as potential hotspots for process defects. Timely process adjustments can effectively reduce the probability of product failure due to interlayer connection defects.

[0038] Optionally, the above embodiments can be further improved. The core of this invention is the three-layer GDS superposition in the D2DB stage. Those skilled in the art can adjust the detection Metal layer type (such as 2XMetal, 3XMetal) and the matching type of the Via layer within the principles of this invention. As long as the three-layer GDS superposition method of "current metal layer GDS + upper and lower connecting hole GDS" is adopted to achieve multi-dimensional detection in the D2DB stage, it falls within the protection scope of this invention.

[0039] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. It will also be understood that, unless explicitly defined herein, terms such as those defined in a general dictionary shall be interpreted as having the meaning consistent with their meaning in the relevant field context, and not as having an idealized or overly formal meaning.

[0040] The present invention has been described in detail above through specific embodiments and examples, but these are not intended to limit the invention. Many modifications and improvements can be made by those skilled in the art without departing from the principles of the invention, and these should also be considered within the scope of protection of the present invention.

Claims

1. A multi-dimensional PWQ method for detecting defect hotspots in the back-end BEOL process of integrated circuits, characterized in that, Includes the following steps: 1) The traditional PWQ method is used to perform defect detection on the line of the target metal layer, obtain preliminary detection results, and screen out weak patterns within the process window range; 2) For the weak pattern within the process window range, retrieve the current layer GDS of the target metal layer, the upper layer via GDS of the target metal layer, and the lower layer via GDS of the target metal layer to form a three-layer GDS. 3) Align and measure the raw image data obtained from the EP5 image with the three-layer GDS to complete the multidimensional D2DB processing; 4) Calculate the landing coverage ratio of the via on the target metal layer line, and combine it with the defect detection results of the current layer line to determine the connectivity between the target metal layer and the vias in the upper and lower layers; 5) Generate an inspection report that includes information on the line defects of the current layer and the coverage ratio of vias and landings.

2. The multi-dimensional PWQ method according to claim 1, characterized in that: In step 1), exposure conditions outside the process window range are considered failure conditions, and no further detection is performed on areas within that range.

3. The multi-dimensional PWQ method according to claim 1, characterized in that: In step 2), when the target metal layer is layer M1, the corresponding upper via is M1V0 and the lower via is M1V1. When the target metal layer is layer M3, the corresponding upper via is M3V2 and the lower via is M3V3.

4. The multi-dimensional PWQ method according to claim 1, characterized in that: In step 4), the Landing coverage ratio is the ratio of the effective coverage area of ​​the via on the target metal layer line to the total area of ​​the via.

5. The multi-dimensional PWQ method according to claim 1, characterized in that, Also includes: The steps for OPC correction of process defect hotspot patterns on the mask according to the inspection report include the defect status of the current layer line and the coverage ratio of via landing.

6. The multi-dimensional PWQ method according to claim 1, characterized in that: The target metal layer is any one of the metal layers MO to M13 in the semiconductor back-end BEOL process.

7. A multi-dimensional PWQ detection system, used to implement the multi-dimensional PWQ method according to any one of claims 1-6, characterized in that, include: The optical inspection module is used to perform optical defect inspection on the target metal layer of the PWQ wafer at the line level. The sampling module is signal-connected to the optical detection module and is used to perform sampling processing on the area after optical detection. An image acquisition module, which is signal-connected to the sampling module, is used to take EP5 images of the sampling area and acquire raw image data; The multidimensional D2DB processing module is signal-connected to the image acquisition module. It has a built-in database of the current layer GDS, the upper layer via GDS, and the lower layer via GDS. It is used to complete the alignment and measurement of the original image data with the three layers of GDS and to calculate the via landing coverage ratio. The report output module is signal-connected to the multidimensional D2DB processing module and is used to generate an inspection report containing the current layer lineDefect information and the via landing coverage ratio.

8. The multi-dimensional PWQ detection system according to claim 7, characterized in that: The multidimensional D2DB processing module includes a weak image filtering unit and a coverage ratio calculation unit; The weak pattern screening unit is used to screen weak patterns within the process window range, and the coverage ratio calculation unit is used to calculate the landing coverage ratio of the via on the target metal layer line.

9. The multi-dimensional PWQ detection system according to claim 7, characterized in that: The optical inspection module is a KLA optical inspection device, and the image acquisition module is an EP5 imaging device. The modules are electrically connected, and the superposition and measurement of the three-layer GDS are realized through computer programming.