A magnesium-hydrogen co-doped indium zinc oxide thin film transistor and a preparation method thereof

Abstract

This invention proposes a low-cost, high-efficiency co-sputtering technique for magnesium-hydrogen co-doped indium zinc oxide (IZO) thin-film transistors and their fabrication methods. The device is fabricated using heavily doped N-type silicon and silicon dioxide as the gate and insulating layer, respectively. A magnesium-doped IZO semiconductor channel layer is deposited using a dual-target co-sputtering method followed by hydrogen plasma treatment. Aluminum is then deposited as the electrode using DC sputtering. All deposition processes are patterned using a mask, ultimately resulting in a high-performance magnesium-hydrogen co-doped IZO thin-film transistor. This invention improves IZO defects and controls oxygen vacancy concentration by doping magnesium with an appropriate atomic concentration using dual-target co-sputtering. Hydrogen plasma treatment is used to modulate the interface defect states and carrier transport characteristics. This fabrication process not only offers advantages such as high efficiency and low cost, but also produces devices with high carrier mobility and good stability, providing a technical reference for optimizing low-cost and high-efficiency new co-doping processes.

Description

Technical Field

[0001] This invention belongs to the field of thin film materials and thin film devices, specifically a magnesium-hydrogen co-doped indium zinc oxide thin film transistor using co-sputtering technology and its fabrication method. Background Technology

[0002] Since the beginning of the 21st century, flat panel display (FPD) technology has developed rapidly, leading the trend in the display field. The upgrading and development of digital electronic products such as smartphones, computers, and televisions used in daily life are inseparable from the development of display technology. Display technology has gradually evolved from the earliest vacuum tube displays based on traditional cathode ray tubes to the most widely used flat panel displays today. Currently, flat panel display technologies mainly include: Active Matrix Organic Light Emitting Diode (AMOLED) and Active Matrix Liquid Crystal Display (AMLCD). As two of the most promising and potential mainstream flat panel display technologies, AMOLED and AMOLED have received widespread attention and research. Thin Film Transistors (TFTs), as the core component of active matrix displays, constitute the pixel circuit array and, together with storage capacitors, form the driving circuit of the active matrix display. Therefore, the performance of TFT devices directly determines the quality and performance of the flat panel display.

[0003] Amorphous silicon semiconductor thin films have low fabrication costs, low deposition temperatures (approximately 350°C), good large-area uniformity, and can achieve large-area color displays. However, amorphous silicon thin-film transistors have low field-effect mobility (<1 cm). 2 V -1 s -1 The low aperture ratio of amorphous silicon makes it difficult to use in AMOLED display driving. Furthermore, while amorphous silicon films are excellent photosensitive materials, this also means that amorphous silicon thin-film transistors are highly susceptible to light exposure, leading to unstable device performance. Under prolonged light exposure, the performance of amorphous silicon films deteriorates significantly, resulting in a decline in the performance of amorphous silicon thin-film transistors. Polycrystalline silicon (poly-Si) films can be fabricated under both low and high temperature conditions. Low-temperature fabricated polycrystalline silicon thin-film transistors can be used for flexible transistor fabrication and exhibit high mobility (approximately 100 cm⁻¹). 2 V -1 s -1Polycrystalline silicon (PSS) transistors offer advantages such as high integration, fast response speed, strong resistance to light interference, self-aligned structure, and the ability to fabricate integrated drive circuits. Their smaller size also improves yield. However, the fabrication temperature of high-temperature polycrystalline silicon semiconductor thin films is generally above 600°C, therefore quartz crystals are commonly used as the substrate for fabricating PSS transistors in industry. In general, the high fabrication temperature (600°C) of polycrystalline silicon thin films necessitates high crystallization temperatures, resulting in complex fabrication processes, poor device uniformity, and incompatibility with low-temperature processes on flexible substrates. These factors contribute to high economic costs in actual production, hindering the widespread application of PSS transistors. Oxide semiconductor thin-film transistors (OSTs) have significant development and application prospects in the flat panel display field, rapidly attracting widespread attention and research from scholars both domestically and internationally. Compared with other thin-film transistors (TFTs), oxide semiconductor TFTs have the following advantages: high field-effect mobility, good conductivity and optical transparency; oxide semiconductors are mostly wide-bandgap semiconductors, resulting in devices that are less affected by light, have good light stability, and exhibit high electrical performance uniformity; oxide semiconductor thin films are prepared at low temperatures, making them compatible with flexible substrates; and they have low manufacturing costs, enabling large-area production. Currently, oxide semiconductor TFTs have gradually moved from the experimental stage to the industrial application stage. Currently, the semiconductor materials commonly used for the channel layer of oxide TFTs include binary oxide semiconductors, including ZnO, In2O3, SnO2, and Ga2O3. The metal cations of these oxides all possess (n-1)d... 10 ns 0 In terms of electronic structure, when n≥5, the s orbitals of adjacent ions overlap to form electron channels, making them less sensitive to lattice order. Ternary oxide semiconductors include InZnO and ZnSnO. Quaternary oxide semiconductors include InGaZnO and InTiZnO. Therefore, elements such as Al, Hf, F, and Mg are doped into ZnO and SnO2 to improve the quality of thin films and devices. However, while traditional single-target magnetron sputtering can achieve a high proportion of metal atoms to ensure optimal electrical performance and stability, its elemental composition is fixed. To optimize the thin film composition, the atomic ratio of each target material must be precisely controlled. This significantly increases the manufacturing cost of single-target magnetron sputtering. In contrast, co-sputtering technology can achieve a more ideal atomic ratio by controlling the target doping amount. Furthermore, compared to traditional single-target sputtering, co-sputtering technology is not only lower in cost but also allows for more precise control of elemental doping ratios and oxygen vacancies (V0). OThis paper describes a method to improve the mobility and stability of indium zinc oxide (IZO) thin-film transistors (TFTs) by incorporating rare-earth Mg to passivate oxygen vacancies, unfilled well density, and surface roughness. This contributes to enhancing the performance and stability of IZO TFTs. Furthermore, plasma treatment in a hydrogen-argon mixed atmosphere achieves excellent carrier concentration and thus good mobility. This method of optimizing device performance through co-sputtering and co-doping holds potential application prospects for IZO-based TFTs in low-cost oxide thin-film electronics. Summary of the Invention

[0004] The core objective of this invention is to address the shortcomings of existing technologies. This paper proposes a magnesium-hydrogen co-doped indium zinc oxide thin-film transistor using co-sputtering technology. Its fabrication process is simple and low-cost, while also exhibiting high carrier mobility and excellent operational stability. A complete fabrication process is provided for reference.

[0005] The specific solution of the present invention is as follows:

[0006] A magnesium-hydrogen co-doped indium zinc oxide (IZO) thin-film transistor (LTV) using co-sputtering technology and its fabrication method are disclosed. A schematic diagram of the device structure of the IZO-Mg-doped LTV thin-film transistor with bottom gate and top contact is shown. Transmission electron microscopy (TEM) and scanning electron microscopy (SEM) characterizations are shown below. Figure 1 , Figure 2 and Figure 3 As shown, the device structure consists of source / drain electrodes, a semiconductor channel layer, an insulating layer, and a gate. 40–60 nm aluminum is used as the source / drain electrode material; the semiconductor channel layer is composed of magnesium-hydrogen co-doped indium zinc oxide; 90–110 nm silicon dioxide is used as the insulating layer; and N-type heavily doped silicon serves as both the substrate and the gate.

[0007] The specific fabrication method of the aforementioned indium zinc magnesium hydrogen-doped thin-film transistor is as follows: A magnesium-hydrogen co-doped indium zinc oxide semiconductor channel layer is deposited using radio frequency magnetron sputtering, followed by the deposition of aluminum source and drain electrodes via DC sputtering. The specific steps are as follows:

[0008] (1) Using N-type heavily doped silicon and silicon dioxide grown on it as a substrate, magnesium hydrogen co-doped indium zinc oxide semiconductor channel layer is deposited on it in a hydrogen environment using dual-target RF co-sputtering magnesium oxide and indium zinc oxide targets, and patterning is performed using a mask.

[0009] (2) In step (1), aluminum source and drain electrodes are sputtered using DC magnetron sputtering and patterned using a mask. Magnesium-hydrogen co-doped indium zinc oxide thin film transistors can then be obtained.

[0010] The preferred thickness of the silicon dioxide in step (1) is 90–110 nm.

[0011] The preferred conditions for the radio frequency magnetron sputtering described in step (1) are: the sputtering atmosphere is a mixture of argon and hydrogen, the sputtering gas flow rate is 30-35 sccm, the sputtering gas pressure is 0.8-1.2 Pa, the sputtering power is 30-80 W, and the substrate temperature is 100-150 ℃.

[0012] The preferred conditions for DC sputtering in step (2) are: the sputtering atmosphere is pure argon, the sputtering gas flow rate is 8-10 sccm, the sputtering gas pressure is 0.8-1.2 Pa, and the sputtering power is 50-60 W.

[0013] Compared with the prior art, the present invention has the following advantages and benefits:

[0014] (1) The magnesium-hydrogen co-doped indium zinc oxide thin film transistor of the present invention uses a new fabrication process to dope magnesium with indium zinc oxide to improve its intrinsic defects and control oxygen vacancy concentration, and uses hydrogen plasma treatment to regulate the device interface state and carrier concentration to improve mobility.

[0015] (2) The magnesium-hydrogen co-doped indium zinc oxide thin film transistor prepared by the present invention has a simple preparation process, high preparation efficiency, low preparation cost, and the threshold voltage can be adjusted to make the device have a smaller threshold voltage, thereby reducing power consumption. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the structure of the magnesium-hydrogen co-doped indium zinc oxide thin film transistor of the present invention: wherein, 1 is the magnesium oxide target used in co-sputtering preparation, 2 is the indium zinc oxide target used in co-sputtering preparation, 3 is aluminum metal as the source and drain electrodes, 4 is the indium zinc magnesium hydrogen-doped channel layer, 5 is the silicon dioxide insulating layer, and 6 is the gate N-type heavily doped silicon.

[0017] Figure 2 This is a transmission electron microscope (TEM) characterization image of a magnesium-hydrogen co-doped indium zinc oxide thin-film transistor.

[0018] Figure 3 This is a scanning electron microscope (SEM) characterization image of a magnesium-hydrogen co-doped indium zinc oxide (IZO) thin-film transistor.

[0019] Figure 4 The graphs show the electrical transfer characteristics of indium zinc magnesium thin-film transistors (IZMH) fabricated by co-sputtering in Examples 1, 2, and 3. The left vertical axis represents the relationship between source and drain currents under gate voltage, and the right vertical axis represents the relationship between mobility under different gate voltages.

[0020] Figure 5 The graph shows the electrical transfer characteristics of the indium zinc magnesium thin film transistors prepared by co-sputtering in Examples 4, 5, and 6. The left vertical axis represents the relationship between source and drain currents under gate voltage, and the right vertical axis represents the relationship between mobility under different gate voltages.

[0021] Figure 6 The graphs show the electrical transfer characteristics of magnesium-hydrogen co-doped indium zinc oxide thin-film transistors in Examples 7, 8, and 9, fabricated by co-sputtering. The left vertical axis represents the relationship between source and drain currents under gate voltage, and the right vertical axis represents the relationship between mobility under different gate voltages.

[0022] Figure 7 This is a comparison graph of the electrical transfer characteristics of magnesium-hydrogen co-doped indium zinc oxide thin film transistors prepared by co-sputtering in Examples 2, 7 and 10. The left vertical axis represents the relationship between source and drain currents under gate voltage, and the right vertical axis represents the relationship between mobility under different gate voltages.

[0023] Figure 8 This is a comparison chart of the electrical output characteristics of magnesium-hydrogen co-doped indium zinc oxide thin film transistors prepared by co-sputtering in Examples 2, 7, and 10.

[0024] Figure 9 The X-ray photoelectron spectroscopy of the indium zinc oxide thin film prepared by co-sputtering in Example 10 is shown.

[0025] Figure 10 The X-ray photoelectron spectroscopy of the indium zinc magnesium oxide thin film prepared in Example 2 of target preparation is shown.

[0026] Figure 11 The X-ray photoelectron spectroscopy of the indium zinc magnesium oxide hydrogen-doped thin film prepared by co-sputtering in Example 7 is shown.

[0027] Figure 12 The dielectric constant energy spectrum of the indium zinc oxide thin film prepared by co-sputtering in Example 2 is shown.

[0028] Figure 13 The dielectric constant energy spectrum of the indium zinc magnesium oxide thin film prepared by co-sputtering in Example 2 is shown.

[0029] Figure 14 The dielectric constant energy spectrum of the magnesium-hydrogen co-doped indium zinc oxide thin film prepared by Example 2 is shown.

[0030] Figure 15 This is the evolution of the electrical transfer characteristic curve of the magnesium-hydrogen co-doped indium zinc oxide thin film transistor prepared in Example 7 under atmospheric conditions with negative bias (-20V) illumination stress for 3600 s; "←" indicates that when negative bias illumination is applied, the electrical transfer characteristic curve of the thin film transistor shifts from the right (0 s) to the left (3600 s).

[0031] Figure 16This is an evolution graph of the electrical transfer characteristic curve of the magnesium-hydrogen co-doped indium zinc oxide thin film transistor prepared in Example 7 under atmospheric conditions with negative bias voltage (-20V) stress for 3600 s; "←" indicates that when a negative bias voltage is applied, the electrical transfer characteristic curve of the thin film transistor shifts from the right (0 s) to the left (3600 s).

[0032] Figure 17 This is an evolution graph of the electrical transfer characteristic curve of the magnesium-hydrogen co-doped indium zinc oxide thin film transistor prepared in step 7 under atmospheric conditions with positive bias (20 V) illumination stress over a time of 3600 s; "→" indicates that when positive bias illumination is applied, the electrical transfer characteristic curve of the thin film transistor shifts from the left (0 s) to the right (3600 s).

[0033] Figure 18 This is an evolution diagram of the electrical transfer characteristic curve of the magnesium-hydrogen co-doped indium zinc oxide thin film transistor prepared in Example 7 under atmospheric conditions with a positive bias voltage (20V) stress changing over a time of 3600 s; "→" indicates that when a positive bias voltage is applied, the electrical transfer characteristic curve of the thin film transistor shifts from the left (0 s) to the right (3600 s). Detailed Implementation

[0034] The present invention will be further described in detail below with reference to examples, but the implementation methods of the present invention include, but are not limited to, these examples.

[0035] Example 1

[0036] (1) A heavily doped N-type silicon wafer with 100 nm silicon dioxide was cleaned with acetone and deionized water, dried with nitrogen, and then a 30 nm indium zinc oxide (IZO) thin film was deposited on it by radio frequency co-sputtering of magnesium oxide and IZO, and patterned with a mask. The sputtering temperature was 150 °C, the gas pressure was 1 Pa, the sputtering atmosphere was pure argon, and the sputtering power was 60 W and 40 W, respectively.

[0037] (2) Based on (1), a 50 nm aluminum electrode was sputtered at room temperature using DC RF at a power of 50 W. The sputtering atmosphere was pure argon and the sputtering pressure was 1 Pa. A single-layer indium zinc magnesium oxide thin film transistor was finally obtained.

[0038] Example 2

[0039] (1) A heavily doped N-type silicon wafer with 100 nm silicon dioxide was cleaned with acetone and deionized water, dried with nitrogen, and then RF co-sputtered with magnesium oxide and indium zinc oxide to deposit an indium zinc oxide (30 nm) thin film, which was then patterned with a mask. The sputtering temperature was 150 °C, the gas pressure was 1 Pa, the sputtering atmosphere was pure argon, and the sputtering power was 50 W and 40 W, respectively.

[0040] (2) Based on (1), a 50 nm aluminum electrode was sputtered at room temperature using DC RF at a power of 50 W. The sputtering atmosphere was pure argon and the sputtering pressure was 1 Pa. Finally, an indium zinc magnesium thin film transistor was obtained.

[0041] Example 3

[0042] (1) A heavily doped N-type silicon wafer with 100 nm silicon dioxide was cleaned with acetone and deionized water, dried with nitrogen, and then RF co-sputtered with magnesium oxide and indium zinc oxide to deposit an indium zinc oxide (30 nm) thin film, which was then patterned with a mask. The sputtering temperature was 150 °C, the gas pressure was 1 Pa, the sputtering atmosphere was pure argon, and the sputtering power was 40 W and 40 W, respectively.

[0043] (2) Based on (1), a 50 nm aluminum electrode was sputtered at room temperature using DC RF at a power of 50 W. The sputtering atmosphere was pure argon and the sputtering pressure was 1 Pa. Finally, an indium zinc magnesium thin film transistor was obtained.

[0044] Example 4

[0045] (1) A heavily doped N-type silicon wafer with 100 nm silicon dioxide was cleaned with acetone and deionized water, dried with nitrogen, and then RF co-sputtered with magnesium oxide and indium zinc oxide to deposit an indium zinc oxide (30 nm) thin film, which was then patterned with a mask. The sputtering temperature was 150 °C, the gas pressure was 1 Pa, the sputtering atmosphere was pure argon, and the sputtering power was 50 W and 30 W, respectively.

[0046] (2) Based on (1), a 50 nm aluminum electrode was sputtered at room temperature using DC RF at a power of 50 W. The sputtering atmosphere was pure argon and the sputtering pressure was 1 Pa. Finally, an indium zinc magnesium thin film transistor was obtained.

[0047] Example 5

[0048] (1) A heavily doped N-type silicon wafer with 100 nm silicon dioxide was cleaned with acetone and deionized water, dried with nitrogen, and then RF co-sputtered with magnesium oxide and indium zinc oxide to deposit an indium zinc magnesium oxide (30 nm) film, which was then patterned with a mask. The sputtering temperature was 150 °C, the gas pressure was 1 Pa, the sputtering atmosphere was pure argon, and the sputtering power was 50 W and 40 W, respectively.

[0049] (2) Based on (1), a 50 nm aluminum electrode was sputtered at room temperature using DC RF at a power of 50 W. The sputtering atmosphere was pure argon and the sputtering pressure was 1 Pa. Finally, an indium zinc magnesium thin film transistor was obtained.

[0050] Example 6

[0051] (1) A heavily doped N-type silicon wafer with 100 nm silicon dioxide was cleaned with acetone and deionized water, dried with nitrogen, and then indium zinc oxide (30 nm) thin films were deposited on it with magnesium oxide and indium zinc oxide, and patterned with a mask. The sputtering temperature was 150 °C, the gas pressure was 1 Pa, the sputtering atmosphere was pure argon, and the sputtering power was 50 W and 50 W, respectively.

[0052] (2) Based on (1), a 50 nm aluminum electrode was sputtered at room temperature using DC RF at a power of 50 W. The sputtering atmosphere was pure argon and the sputtering pressure was 1 Pa. Finally, an indium zinc magnesium thin film transistor was obtained.

[0053] Example 7

[0054] (1) A heavily doped N-type silicon wafer with 100 nm silicon dioxide was cleaned with acetone and deionized water, dried with nitrogen, and then indium zinc oxide (InZnO) thin films were deposited on it with magnesium oxide and indium zinc oxide, and patterned with a mask. The sputtering temperature was 150 °C, the gas pressure was 1 Pa, the sputtering atmosphere was a mixture of hydrogen and argon, the sputtering power was 50 W and 40 W respectively, and the hydrogen plasma treatment time was 1 minute.

[0055] (2) Based on (1), a 50 nm aluminum electrode was sputtered at room temperature using DC RF at a power of 50 W. The sputtering atmosphere was pure argon and the sputtering pressure was 1 Pa. The magnesium-hydrogen co-doped indium zinc oxide thin film transistor was finally obtained.

[0056] Example 8

[0057] (1) A heavily doped N-type silicon wafer with 100 nm silicon dioxide was cleaned with acetone and deionized water, dried with nitrogen, and then indium zinc oxide (InZnO) thin films (30 nm) were deposited on it with magnesium oxide and indium zinc oxide, and patterned with a mask. The sputtering temperature was 150 °C, the gas pressure was 1 Pa, the sputtering atmosphere was a mixture of hydrogen and argon, the sputtering power was 50 W and 40 W respectively, and the hydrogen plasma treatment time was 3 minutes.

[0058] (2) Based on (1), a 50 nm aluminum electrode was sputtered at room temperature using DC RF at a power of 50 W. The sputtering atmosphere was pure argon and the sputtering pressure was 1 Pa. The magnesium-hydrogen co-doped indium zinc oxide thin film transistor was finally obtained.

[0059] Example 9

[0060] (1) A heavily doped N-type silicon wafer with 100 nm silicon dioxide was cleaned with acetone and deionized water, dried with nitrogen, and then indium zinc oxide (InZnO) thin films were deposited on it with magnesium oxide and indium zinc oxide, and patterned with a mask. The sputtering temperature was 150 °C, the gas pressure was 1 Pa, the sputtering atmosphere was a mixture of hydrogen and argon, the sputtering power was 50 W and 40 W respectively, and the hydrogen plasma treatment time was 5 minutes.

[0061] (2) Based on (1), a 50 nm aluminum electrode was sputtered at room temperature using DC RF at a power of 50 W. The sputtering atmosphere was pure argon and the sputtering pressure was 1 Pa. The magnesium-hydrogen co-doped indium zinc oxide thin film transistor was finally obtained.

[0062] Example 10

[0063] (1) The heavily doped N-type silicon wafer with 100 nm silicon dioxide was cleaned with acetone and deionized water, dried with nitrogen, and then indium zinc oxide (InZN) thin film (30 nm) was deposited on it and patterned with a mask. The sputtering temperature was 150 °C, the gas pressure was 1 Pa, the sputtering atmosphere was a mixture of hydrogen and argon, and the sputtering power was 40 W.

[0064] (2) Based on (1), a 50 nm aluminum electrode was sputtered at room temperature using DC RF at a power of 50 W. The sputtering atmosphere was pure argon and the sputtering pressure was 1 Pa. Finally, an indium zinc oxide thin film transistor was obtained.

[0065] The electrical transfer characteristics of the indium zinc oxide-based thin-film transistors prepared in Examples 2, 7, and 10 are compared as follows: Figure 7 As shown in the figure, the indium zinc magnesium oxide (P2O3) prepared according to the method of the present invention is hydrogen-doped (P2O3) IZO -40W-P MgO -50W:H) thin-film transistor with a carrier field-effect mobility as high as 30.4 cm⁻¹ 2 / Vs, switching current ratio higher than 10 7 High-performance thin-film transistors with a threshold voltage of 0.5 V and a subthreshold swing of less than 400 mV / decade exhibit superior electrical performance. This indicates that the electrical performance of magnesium-hydrogen co-doped indium zinc oxide thin-film transistors with excellent magnesium doping content, achieved through co-sputtering, is significantly improved compared to thin films in other examples.

[0066] The X-ray photoelectron spectra of the indium zinc magnesium oxide thin film prepared by co-sputtering in Example 2 and the magnesium hydrogen co-doped indium zinc oxide thin film and indium zinc oxide thin film prepared by co-sputtering in Example 7 are shown below. Figure 9 , Figure 10 and Figure 11As shown in the figure, Example 7 exhibits a lower oxygen vacancy concentration compared to Example 10, but the mobility of Example 7 is higher than that of Example 2, indicating that a superior atomic doping concentration is beneficial to the electrical performance of the device. Furthermore, hydrogen plasma treatment successfully enhanced the carrier mobility of the device, improving the mobility of Example 7. The magnesium-hydrogen co-doped indium zinc oxide thin-film transistor fabricated in Example 7 underwent positive / negative bias stability testing and positive / negative bias stability testing under illumination with a time variation of 3600 s in an atmospheric environment. The transfer curves are shown in the figure. Figure 13 , 14 As shown in Figures 15 and 16, the results demonstrate that after 1 hour of positive / negative bias stress and positive / negative bias illumination stress, the magnesium-hydrogen co-doped indium zinc oxide thin-film transistors (MgHO) fabricated by co-sputtering exhibit good stability, with a threshold voltage less than 1.0 V. Therefore, the MgHO co-doped indium zinc oxide thin-film transistors fabricated using the co-sputtering method for improving device performance exhibit excellent electrical performance and stability, providing a reference for optimizing low-cost and high-efficiency fabrication processes.

[0067] The above embodiments are preferred embodiments of the present invention, but the embodiments of the present invention are not limited to the above embodiments. Any changes, modifications, substitutions, combinations, or simplifications made without departing from the spirit and principle of the present invention shall be considered equivalent substitutions and shall be included within the protection scope of the present invention.

Claims

1. A magnesium-hydrogen co-doped indium zinc oxide thin-film transistor using co-sputtering technology and its fabrication method, characterized in that: The active layer, which is treated with magnesium oxide and indium zinc oxide and hydrogen plasma, is used as the semiconductor layer of the thin film transistor; the thickness of the magnesium-hydrogen co-doped indium zinc oxide semiconductor layer is 15-30 nm.

2. The high-performance magnesium-hydrogen co-doped indium zinc oxide thin-film transistor according to claim 1, characterized in that: Includes source / drain electrodes, semiconductor channel layer, gate, insulating layer, and substrate; In this case, the N-type heavily doped silicon wafer serves as both the substrate and the gate. A layer of silicon dioxide is grown on a pure silicon wafer as an insulating layer; The semiconductor channel layer is magnesium-hydrogen co-doped indium zinc oxide; Aluminum is used as the source and drain electrode material.

3. The magnesium-hydrogen co-doped indium zinc oxide semiconductor channel thin-film transistor according to claim 2, characterized in that: The thickness of the silicon dioxide insulating layer is 90–110 nm.

4. The method for fabricating the magnesium-hydrogen co-doped indium zinc oxide semiconductor channel layer thin-film transistor according to claim 1 specifically includes the following steps: (1) Using heavily doped N-type silicon and silicon dioxide grown on it as substrates, patterning is first performed through a mask, and then magnesium hydrogen co-doped indium zinc oxide semiconductor channel layer is deposited in a hydrogen environment by dual-target radio frequency co-sputtering of magnesium oxide and indium zinc oxide targets. (2) An aluminum electrode is deposited on the magnesium-hydrogen co-doped indium zinc oxide semiconductor layer prepared in step (1) by DC magnetron sputtering and patterned by a mask to obtain a magnesium-hydrogen co-doped indium zinc oxide semiconductor channel layer thin film transistor.

5. The method for fabricating a magnesium-hydrogen co-doped indium zinc oxide semiconductor channel layer thin-film transistor according to claim 4, characterized in that: The conditions for radio frequency magnetron sputtering in step (1) are as follows: the sputtering atmosphere is a mixture of argon and hydrogen, the gas flow rate is 30-35 sccm, the sputtering pressure is 0.8-1.2 Pa, the sputtering power is 30-60 W, and the substrate temperature is 100-150 ℃.

6. The method for fabricating a magnesium-hydrogen co-doped indium zinc oxide semiconductor channel layer thin-film transistor according to claim 4, characterized in that: The DC sputtering conditions described in step (2) are: the sputtering atmosphere is pure argon, the gas flow rate is 8-10 sccm, the sputtering pressure is 0.8-1.2 Pa, and the power is 50-60 W.

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