Hardware acceleration for motion blur utilizing ray tracing
By generating interpolated bounding boxes through a spatiotemporal interpolation circuit and performing ray intersection tests using a hardware accelerator, the high resource consumption problem in combining ray tracing and motion blur is solved, thereby improving the processor's performance and power efficiency.
CN122374793APending Publication Date: 2026-07-10APPLE INC
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- APPLE INC
- Filing Date
- 2024-11-12
- Publication Date
- 2026-07-10
AI Technical Summary
Technical Problem
When combining ray tracing and motion blur, the existing technology for testing the intersection of rays with primitives within the motion blur interval consumes high processor resources and power, leading to performance degradation.
Method used
A spatiotemporal interpolation circuit is used to generate an interpolated bounding box, and a ray intersection test is performed using a hardware accelerator to reduce the number of misses and improve processing efficiency.
Benefits of technology
By using the spatiotemporal interpolation circuit of the hardware accelerator, the number of light-to-primary intersection tests is reduced, thereby improving processor performance and power efficiency.
✦ Generated by Eureka AI based on patent content.
Smart Images
Figure CN122374793A_ABST
Abstract
Techniques related to ray tracing and motion blur in graphics processing units are disclosed. In some embodiments, a ray intersection accelerator circuit is configured to perform a traversal operation on an accelerated data structure (ADS) including a hierarchical bounding volume, wherein the ADS includes a first node specifying: a first coordinate of the bounding volume at a first motion blur time and a second coordinate of the bounding volume at a second motion blur time. The ray accelerator can determine a ray time interval representation indicating an upper and lower bound of an error bound representing a quantized ray time value. An interpolation circuit can operate on the first coordinate, the second coordinate, and the ray time interval representation to generate interpolated coordinates of the bounding volume. A box test circuit can determine whether a ray intersects with the bounding volume based on the interpolated coordinates and the ray coordinates.
Need to check novelty before this filing date? Find Prior Art
Citation Information
Patent Citations
US11676327B2