RISC-V-based unmanned aerial vehicle array obstacle avoidance system, control method and storage device

Abstract

The application relates to the field of RISC-V-based unmanned aerial vehicle array obstacle avoidance, and an obstacle avoidance system thereof comprises a single unmanned aerial vehicle obstacle avoidance unit and an array cooperative control unit. Through construction of a RISC-V+FPGA double-pipeline vertical orthogonal architecture, a traditional bus scheduling mechanism is abandoned, the instruction execution path and the sensing data carrying path are decoupled and symbiotic at the physical layout and register resource levels, the probability of instruction waiting and data carrying conflict is significantly reduced, the obstacle avoidance response delay is stably controlled at the order of magnitude of microseconds, and the problem of decision lag caused by pipeline pause in a high-speed flight scene is fundamentally solved.

Description

Technical Field

[0001] This invention relates to the field of intelligent obstacle avoidance and autonomous collaborative control technology for unmanned aerial vehicles (UAVs), specifically to a RISC-V-based UAV array obstacle avoidance system, control method, and storage device. Background Technology

[0002] Currently, drone arrays are increasingly widely used in scenarios such as aerial photography and inspection, airspace security, logistics transportation, and emergency rescue. Their obstacle avoidance capabilities directly determine operational safety and system reliability. Mainstream technical solutions generally adopt embedded computing platforms based on x86 or ARM instruction set architectures, relying on traditional silicon-based rigid fuselage structures and integrating silicon-based environmental perception modules such as LiDAR, cameras, and ultrasonic sensors. They lack accurate biomimetic perception capabilities of environmental fluid characteristics such as airflow and wind force, and generally adopt a closed-loop control link of "independent perception by a single machine - complex scheduling in the local / cloud - execution feedback." The command and data pipelines lack coordinated design, resulting in large delays and uncertainties in obstacle avoidance response. At the same time, closed-source architectures pose supply chain security risks, and it is difficult to balance computing power and power consumption. In high-speed flight and complex airspace scenarios, problems such as delayed obstacle avoidance decisions, array coordination conflicts, and poor environmental adaptability are prone to occur. Furthermore, traditional drone fuselage materials cannot participate in biological cycles, posing environmental pollution risks and failing to meet the requirements for high reliability and environmentally friendly obstacle avoidance and applications. Furthermore, at the array level, existing technologies mostly adopt master-slave or distributed communication architectures, using wireless links to achieve flight status sharing and simple path coordination. Their core processing relies on general-purpose processors and complex bus interconnection mechanisms to complete instruction scheduling and multi-source data fusion. The overall system design follows the traditional paradigm of taking spatial obstacle recognition and avoidance as the single objective, emphasizing geometric modeling and trajectory prediction of the position, size, and motion trend of static / dynamic obstacles.

[0003] Furthermore, existing technologies exhibit several inherent limitations in high-speed dynamic airspace environments: First, the x86 / ARM architecture, constrained by the coupling characteristics of the general instruction pipeline and the data path of the shared bus, suffers from uncontrollable timing competition between instruction execution and sensor data transfer, resulting in an undeterministic distribution of obstacle avoidance response latency, making it difficult to meet the microsecond-level real-time decision-making requirements; Second, the closed-source chip ecosystem limits hardware customization capabilities, making it impossible to tailor instruction sets and deeply optimize pipelines for the obstacle avoidance tasks of UAV arrays, and hindering the coordinated control of computing resources and power consumption budgets; Third, the rigid silicon-based fuselage lacks the ability to interact with fluid environments. First, the existing sensing system is unable to participate in the natural biological cycle, thus incurring a long-term environmental burden, and also lacks the ability to perceive key fluid parameters such as airflow disturbances and wind shear in situ. Second, the existing sensing system only covers spatial obstacle information and has not established a fluid sensing channel coupled with the physical deformation and aerodynamic response of the flight vehicle, resulting in a decrease in obstacle avoidance robustness in complex turbulent fields. Third, array coordination is still at the level of state broadcasting and rule-based avoidance, lacking a unified spatiotemporal representation mechanism and conflict resolution algorithm for neighborhood topology. Multi-aircraft path planning is prone to local optima and global mismatch, resulting in low airspace resource utilization efficiency and an increased risk of coordination failure.

[0004] Overall, existing drone array obstacle avoidance technology has formed a technical system of "closed-source architecture + silicon-based rigid body + single silicon-based sensor + bus scheduling". It has not achieved the integration of command-data coordination of hardware architecture, the integration of a self-growing carbon-based shell that participates in biological cycles with a silicon-based brain, and the combination of carbon-based biomimetic perception and silicon-based environmental perception. It has inherent defects such as high latency, poor controllability, weak environmental adaptability, poor environmental protection, and low array coordination efficiency. Summary of the Invention

[0005] To address the shortcomings of existing technologies, the present invention aims to provide a RISC-V-based obstacle avoidance system, control method, and storage device for unmanned aerial vehicle (UAV) arrays. This system ensures the safety of UAV arrays during high-speed flight and complex airspace operations while achieving deterministic low-latency obstacle avoidance response, deep integration of silicon-based computing power and carbon-based biomimetic characteristics, dimensional expansion of multi-source environmental perception, array-level conflict-free collaborative scheduling, and the unification of autonomous and controllable hardware architecture with the overall environmental sustainability of the system.

[0006] To achieve the above objectives, the present invention adopts the following technical solution:

[0007] A RISC-V-based UAV array obstacle avoidance system includes a single UAV obstacle avoidance unit and an array cooperative control unit; the single UAV obstacle avoidance unit includes at least a perception module, a RISC-V+FPGA-based dual-pipeline processing module, an obstacle avoidance decision module, and a flight control module; the array cooperative control unit includes at least an array communication module, a cooperative scheduling module, and a global path planning module; characterized in that...

[0008] The sensing module includes a carbon-based airflow sensing module integrated into the carbon-based bionic shell of the UAV and a separately set silicon-based environmental sensing module. The two modules simultaneously collect physical signals characterizing fluid disturbance characteristics: airflow vector direction angle, wind speed amplitude and turbulence intensity index, as well as physical signals characterizing the distribution of spatial obstacles: position, motion state and terrain information, and convert one or more of the physical signals into time-aligned and quantized consistent digital feature signals.

[0009] The dual-pipeline processing module adopts a hardware architecture in which the RISC-V instruction pipeline and the sensor data pipeline are perpendicular and orthogonal. Its core is a symbiotic register array, which integrates RISC-V general-purpose register resources and fluid / space data operation cache at the physical level. It supports single-cycle access on the instruction side and concurrent access on the data side. It is used to receive and fuse digital feature signals from the sensing module and extract core obstacle avoidance features including obstacle spatial distribution, local airflow disturbances and the UAV's own state.

[0010] A RISC-V-based obstacle avoidance control method for unmanned aerial vehicle (UAV) arrays, wherein the control method is applied to the UAV array obstacle avoidance system as described in any one of claims 1-7, characterized by comprising one or more of the following steps: S1: carbon-based-silicon-based multi-source biomimetic sensing; S2: dual-pipeline high-speed fusion processing; S3: initial obstacle avoidance decision for a single UAV; S4: array-wide information synchronization; S5: array global path planning; S6: array cooperative obstacle avoidance scheduling; S7: final confirmation of obstacle avoidance decision.

[0011] A computer device includes the aforementioned dual-pipeline processing unit and a memory, wherein the memory stores a computer program, and the dual-pipeline processing unit executes the computer program to implement the steps of the aforementioned RISC-V-based unmanned aerial vehicle array obstacle avoidance control method.

[0012] A computer storage device storing a computer program, which, when executed by a computer, implements the steps of the aforementioned RISC-V-based UAV array obstacle avoidance control method.

[0013] Compared to existing technologies, this application constructs a RISC-V+FPGA dual-pipeline vertical orthogonal architecture, abandoning the traditional bus scheduling mechanism. It decouples and symbiotically integrates the instruction execution path and the sensor data transport path at the physical layout and register resource levels, significantly reducing the probability of instruction waiting and data transport conflicts. This ensures that obstacle avoidance response latency is stably controlled at the microsecond level, fundamentally solving the decision-making lag problem caused by pipeline stalls in high-speed flight scenarios. Furthermore, it replaces the traditional silicon-based rigid fuselage with a self-growing, biomimetic carbon-based shell that participates in natural biological cycles. This achieves lightweighting and biomimetic dynamic optimization while eliminating the risk of electronic waste pollution from the material source, aligning with the green and low-carbon development direction. Innovatively, the carbon-based shell itself serves as an airflow sensing carrier, integrating a distributed carbon-based airflow sensing module. This overcomes the dimensional limitations of silicon-based sensors, which can only acquire spatial geometric information, achieving for the first time a three-in-one coupling of "fluid-structure-sensing," significantly improving the UAV's performance in complex flow fields such as strong winds, crosswinds, and turbulence. The system enhances flight stability and obstacle avoidance robustness. A proposed 3×3 grid-based neighborhood cooperative obstacle avoidance algorithm uses neighborhood topology as spatial constraints, combined with dual-window caching and integer logic for fast judgment. Without introducing a highly complex model, it achieves an organic unity of single-machine obstacle avoidance and array collaboration. Coupled with a two-layer closed-loop architecture consisting of a cooperative scheduling unit and a global path planning unit, it effectively avoids multi-machine path overlap and airspace resource contention. Real-world testing shows that the overall array operating efficiency is improved by over 60%. The system adopts a lightweight hardware architecture design with low FPGA resource utilization and supports a dynamic power consumption adjustment mechanism. Compared to traditional deep learning-based embedded obstacle avoidance solutions, power consumption is reduced by over 70%, significantly extending the continuous operating time of battery-powered UAVs. The end-to-end closed-loop design of "perception—processing—decision-scheduling—control—feedback" ensures that any change in the state of any link can trigger a reprocessing process, improving system reliability to over 99% and meeting the requirements of high-safety industrial applications. Attached Figure Description

[0014] Figure 1 This is a schematic diagram of the single UAV obstacle avoidance unit module connection in this application.

[0015] Figure 2 This is a schematic diagram of the array cooperative control unit module connection in this application.

[0016] Figure 3 This is a flowchart of the obstacle avoidance control method for unmanned aerial vehicle arrays in this application.

[0017] Figure 4 This is a system block diagram of the RISC-V+FPGA dual-pipeline processing unit of this application.

[0018] Figure 5 This is a schematic diagram of two overlapping 3×3 co-occurring register windows in this application. Detailed Implementation

[0019] The technical solutions of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. The components of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely represents selected embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application. It should be noted that similar reference numerals and letters in the following drawings indicate similar items; therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. Furthermore, in the description of this application, the terms "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0020] In existing technologies, UAV array obstacle avoidance systems generally employ x86 / ARM architecture with complex bus interconnect mechanisms to achieve instruction scheduling and multi-source data fusion. Their hardware processing paths suffer from the problem of instruction and data streams competing for shared bus resources, leading to frequent pipeline pauses and non-deterministic distribution of obstacle avoidance response latency. Furthermore, the system as a whole relies on cloud-based or on-chip general-purpose processors for decision-making, lacking hardware-level collaborative processing capabilities tailored to the characteristics of obstacle avoidance tasks, making it difficult to meet the microsecond-level real-time response requirements in high-speed dynamic airspace. To overcome the shortcomings of existing technologies, this application provides a RISC-V-based UAV array obstacle avoidance system, control method, and storage device, with the specific implementation scheme as follows.

[0021] Example 1:

[0022] A RISC-V-based UAV array obstacle avoidance system includes a single UAV obstacle avoidance unit and an array cooperative control unit;

[0023] The single UAV obstacle avoidance unit includes a carbon-based airflow sensing module (enclosed in a carbon-based bionic shell), a silicon-based environmental sensing module, a RISC-V+FPGA dual pipeline processing unit, an obstacle avoidance decision unit, and a flight control unit.

[0024] The array collaborative control unit includes an array communication module, a collaborative scheduling unit, and a global path planning unit;

[0025] The carbon-based bionic shell integrates a carbon-based airflow sensing module, which is used to capture airflow direction, wind force and turbulence characteristics in real time, and convert analog signals into digital feature signals;

[0026] The silicon-based environmental perception module consists of a lidar, a camera, and an ultrasonic sensor, used to collect obstacle location, obstacle movement status, and airspace terrain information, and convert analog signals into digital signals;

[0027] The RISC-V+FPGA dual pipelined processing unit adopts a vertical orthogonal architecture of RISC-V instruction pipeline and spatial sensing signal data pipeline. Its general-purpose registers and fluid / space data operation cache are fused to form a symbiotic register array, which is used to perform multi-source fusion of carbon-based airflow sensing features and silicon-based environmental sensing features to extract the core obstacle avoidance features composed of obstacle location, airflow wind force and UAV's own state.

[0028] The obstacle avoidance decision unit is equipped with a 3×3 grid neighborhood obstacle avoidance algorithm. It takes the core obstacle avoidance features as input, generates the optimal avoidance direction for a single UAV, and receives the cooperative scheduling instructions issued by the cooperative scheduling unit to adjust the obstacle avoidance path.

[0029] The flight control unit receives control commands output by the obstacle avoidance decision unit, drives the UAV power execution unit to complete flight attitude and path control, and collects flight status data in real time and feeds it back to the RISC-V+FPGA dual pipeline processing unit.

[0030] The array communication module enables bidirectional wireless communication between each UAV obstacle avoidance unit and the array collaborative control unit.

[0031] The collaborative scheduling unit, based on the status and environmental data transmitted by each UAV and combined with global path planning information, performs airspace resource allocation, obstacle avoidance path coordination, and task scheduling for the UAV array.

[0032] The global path planning unit receives real-time airspace environmental data and flight status data of each UAV, and generates and dynamically updates the global optimal flight path of the UAV array.

[0033] Specifically, Figure 1 A schematic diagram of the single UAV obstacle avoidance unit module connection is shown, in which the output terminals of the carbon-based biomimetic shell (carbon-based airflow sensing module) and the silicon-based environmental sensing module are both coupled to the input terminal of the RISC-V+FPGA dual pipelined processing unit;

[0034] The output of the RISC-V+FPGA dual pipelined processing unit is coupled to the input of the obstacle avoidance decision unit.

[0035] Obstacle avoidance decision unit bidirectional coupled array collaborative control unit;

[0036] The output of the obstacle avoidance decision unit is coupled to the input of the flight control unit;

[0037] The flight control unit output is coupled to the UAV power actuator;

[0038] Specifically, Figure 2 A schematic diagram of the array cooperative control unit module connection is shown. The array communication module enables bidirectional wireless communication between each UAV obstacle avoidance unit and the cooperative scheduling unit.

[0039] The input end of the collaborative scheduling unit is coupled to the global path planning unit, and the output end is coupled to the obstacle avoidance decision-making unit of each UAV.

[0040] The global path planning unit receives real-time global environment and UAV status information transmitted by the array communication module.

[0041] Specifically, the RISC-V+FPGA dual-pipeline processing unit is the core of the system's hardware processing. It adopts a vertically orthogonal architecture of RISC-V instruction pipeline + spatial sensing signal data pipeline, deeply integrating the RISC-V core general-purpose registers with the fluid / spatial data operation cache into a symbiotic register array, eliminating complex bus scheduling and achieving interference-free and efficient collaboration between data and instructions. This unit completes multi-source fusion of carbon-based airflow perception features and silicon-based environmental perception features, extracts core obstacle avoidance features (obstacle position + airflow force + UAV's own state), and transmits them to the obstacle avoidance decision unit. It supports flexible deployment of RISC-V single-core / multi-core, adapting to the different computing power requirements of single UAVs / array UAVs, and adopts a lightweight architecture design, occupying less FPGA logic resources, achieving a balance between computing power and power consumption.

[0042] Preferred, see Figure 4 The RISC-V+FPGA dual-pipeline processing unit includes the following modules:

[0043] A timing control module is configured to include a timing controller and corresponding registers, wherein the registers randomly store pixels of an image, and the pixels of the image include normal pixels and abnormal pixels;

[0044] The motion control module is configured to include a controller for controlling the coordinates of a moving target and corresponding registers;

[0045] A soft-core processing module, which includes at least an arithmetic index unit, is configured to provide all or part of the "write mode" state of the general-purpose registers to the data pipeline when the general-purpose registers inside the processor open the "read-only mode" state to the instruction pipeline, so that the instruction pipeline and the line-by-line scanning data pipeline interact with each other but do not interfere with each other.

[0046] The soft-core processing module is a self-developed soft-core based on the RISC-V basic instruction set.

[0047] The interaction bus between this module and the instruction storage unit initial_mem is as follows:

[0048] The address bus for 32-bit instructions is addr [2:0].

[0049] The 32-bit instruction data bus is rdata[31 : 0].

[0050] Other key input / output ports are as follows:

[0051] Clock and reset: .clk (cor_clk), rst_n

[0052] The first 3×3 register window shared with the Line_buffer module: pix_flat[8 : 0]

[0053] The second 3×3 register window shared with the Line_buffer module: mot_flat[8 : 0]

[0054] Following the rising edge of mot_clk, clear will clear the cells in the third register window that need to be cleared to 0.

[0055] This soft-core processing module has a four-stage pipeline. They are:

[0056] Instruction Fetch

[0057] Decode

[0058] Execution

[0059] Write Back

[0060] Normally, when a soft-core processing module needs to read or write external data, it calls the Load or Store instruction and inserts a memory access cycle (MEM cycle) to pause the four pipelines mentioned above. However, since this scheme adopts a "coexisting register architecture," all data interactions are "quasi-internal data" interactions within the "coexisting registers," which do not involve accessing "external memory." Therefore, the Load or Store instruction is not used, and there is no pipeline pause issue.

[0061] The data stream caching module, configured as a timing bridge between the timing control module and the soft-core processing module, is used to cache 3×3 data points adjacent to the current coordinates scanned line by line by the timing control module. This cache is used to detect whether the coordinates of the moving target and pixel anomaly points exist within the neighborhood formed by the 3×3 data points. The importance of the data stream caching module lies in its capture of 18 general-purpose registers in the soft-core processing module. It fully enjoys the privileges granted to it by the soft-core processing module: the soft-core processing module unreservedly transfers the "write mode" of these 18 general-purpose registers to the entire data stream in the timing control module. The cached 3×3 windows (see...) Figure 5 The data is written in real-time to the aforementioned 18 general-purpose registers in the soft-core processing module, thus cleverly achieving the following: The data pipeline of the timing control module scans line by line and is perpendicular to the instruction pipeline in the soft-core processing module—the soft-core processing module can achieve hardware acceleration of various algorithms by modifying instructions through software scheduling. Therefore, the "symbiotic mode" between the service flow register and the space detection window buffer register inside the soft-core processing module—the service flow data flow interacts but does not interfere with each other's processes.

[0062] Specifically, the self-growing carbon-based biomimetic shell (including a carbon-based airflow sensing module and a carbon-based core) serves as the fuselage and biomimetic sensing core of the drone. It is made of carbon-based biomimetic materials that can participate in natural biological cycles and have self-growing characteristics, replacing the traditional silicon-based rigid fuselage. It can naturally degrade after disposal, posing no environmental pollution risks. It also features lightweight and biomimetic deformation characteristics, and can simulate the streamlined structure and adaptive deformation capability of a bird's body, improving the aerodynamic efficiency of the drone's flight. The carbon-based airflow sensing module is the integrated sensing part of the carbon-based shell, which is distributed and embedded in the biomimetic parts such as the wings and fuselage of the carbon-based shell. It simulates the airflow sensing mechanism of birds, and captures fluid environment signals such as airflow direction, wind force, and turbulence characteristics in real time during the drone's flight. It converts analog signals into digital feature signals and transmits them to the RISC-V+FPGA dual pipeline processing unit, where they are fused with silicon-based environmental sensing signals to achieve sensory collaboration between the carbon-based shell and the silicon-based brain.

[0063] Preferably, the carbon-based biomimetic shell is made of a cellulose-chitosan-graphene ternary composite hydrogel material, formed by freeze-drying and directional stretching processes, with a thickness of 0.8mm–1.2mm and a density of 0.35g / cm³. It possesses autonomous hygroscopic expansion growth characteristics (volume growth ≤8% within 72 hours), an elongation at break of 120%, a Young's modulus of 15–25MPa, and is completely biodegradable (degradation rate ≥92% after 90 days of soil burial). The carbon-based airflow sensing module uses a microstructure array sensor with a flexible piezoresistive film, with multiple sensing units embedded in the leading edge of the wing, the side ribs of the fuselage, and the root of the tail fin according to a biomimetic distribution rule. Each unit is connected to a flexible PCB (with polyimide substrate) via silver paste conductive ink printing, and then the analog-to-digital conversion is completed by a miniaturized analog-to-digital converter chip, outputting digital signals to the FPGA via the SPI interface; in the silicon-based environmental perception module, the lidar is installed at the center of the top of the nose and is directly connected to the FPGA's JTAG / SPI interface via an M12 connector; the camera with a fixed-focus lens is installed at the center of the belly of the aircraft, and the image data is connected to the FPGA image processing subsystem via an interface; multiple sets of ultrasonic sensors are set up, facing the nose, stern, port side, and starboard side respectively, and are connected to the RISC-V core timer module via GPIO interrupt pins.

[0064] Preferably, the silicon-based environmental perception module consists of a lidar, a camera, and an ultrasonic sensor. It collects spatial environmental signals such as obstacle positions, obstacle movement states, and airspace terrain in real time in the UAV's flight airspace. After converting the analog signals into digital signals, the signals are transmitted to a RISC-V+FPGA dual pipeline processing unit for multi-source feature fusion with carbon-based airflow perception signals, providing comprehensive and accurate environmental data for obstacle avoidance decisions.

[0065] Preferably, the obstacle avoidance decision unit is equipped with a 3×3 grid neighborhood obstacle avoidance algorithm. It takes the core obstacle avoidance features output by the dual pipeline processing unit as input, captures the obstacle position and the real-time coordinates of the UAV through the cache module, performs logical operations through the RISC-V instruction pipeline, quickly judges the collision risk and generates the optimal avoidance direction for a single UAV; at the same time, it receives the cooperative scheduling instructions from the array cooperative control unit, combines global path planning information, and adjusts the obstacle avoidance path of a single UAV to avoid path conflicts among multiple UAVs in the array; it supports multi-directional obstacle avoidance and multi-obstacle recognition, and is suitable for complex airspace obstacle avoidance scenarios.

[0066] Preferably, the flight control unit receives control commands such as obstacle avoidance direction and flight speed output by the obstacle avoidance decision unit, converts the commands into drive signals for the UAV's power actuator, and precisely controls the UAV's flight attitude and flight path to achieve collision-free autonomous flight; at the same time, it collects the UAV's flight status data (position, speed, attitude) in real time and feeds it back to the RISC-V+FPGA dual pipeline processing unit to form a real-time closed-loop adjustment of the flight status.

[0067] Preferably, the array communication module is the wireless communication core of the UAV array, enabling low-latency and high-reliability data interaction between each UAV obstacle avoidance unit and the array collaborative control unit. It transmits in real time the flight status, obstacle avoidance decisions, airspace environment perception data of each UAV, as well as the global scheduling commands of the array collaborative control unit, ensuring information synchronization of the UAV array.

[0068] Preferably, the collaborative scheduling unit is the core scheduling module for obstacle avoidance of the UAV array. Based on the status and environmental data transmitted by each UAV and combined with global path planning information, it performs airspace resource allocation, obstacle avoidance path coordination, and task scheduling for the UAV array. This avoids airspace path conflicts among multiple UAVs, realizes conflict-free collaborative obstacle avoidance of the UAV array, and improves the overall operational efficiency of the array. The scheduling strategy can be flexibly adjusted according to the size of the UAV array.

[0069] Preferably, the global path planning unit receives real-time airspace environment data and flight status data of each UAV transmitted by the array communication module, performs global optimal path planning for the UAV array, provides global path reference for the collaborative scheduling unit, and dynamically adjusts the global path according to real-time environmental changes to ensure the safety and efficiency of the overall flight of the array.

[0070] Example 2:

[0071] See this application Figure 3 This paper demonstrates a RISC-V-based obstacle avoidance control method for unmanned aerial vehicle (UAV) arrays, which specifically includes the following steps:

[0072] Step 1: Carbon-based-silicon-based multi-source biomimetic sensing: The carbon-based airflow sensing module, carried by the carbon-based biomimetic shell integrated into the drone body, captures airflow / wind fluid characteristics in real time, while the silicon-based environmental sensing module collects spatial characteristics of airspace obstacles / terrain in real time. Both types of characteristics are converted into digital signals and transmitted to the RISC-V+FPGA dual pipeline processing unit.

[0073] Step 2: Dual-pipeline high-speed fusion processing: The dual-pipeline processing unit completes the multi-source fusion of carbon-based and silicon-based features through a symbiotic register array and a vertically orthogonal instruction / data pipeline, extracts the core features of obstacle avoidance, and integrates the UAV's own flight status data, which is then transmitted to the obstacle avoidance decision unit;

[0074] Step 3: Initial obstacle avoidance decision for a single UAV: ​​The obstacle avoidance decision unit uses a 3×3 grid neighborhood obstacle avoidance algorithm to perform logical operations on the core obstacle avoidance features, judge the collision risk, and generate the initial optimal avoidance direction for a single UAV.

[0075] Step 4: Array Global Information Synchronization: The array communication module transmits the flight status, initial obstacle avoidance decisions, and airspace environment data of each UAV to the global path planning unit of the array collaborative control unit in real time;

[0076] Step 5: Global Path Planning: The global path planning unit combines the global environment and array status data to generate the globally optimal flight path for the UAV array and transmits it to the collaborative scheduling unit.

[0077] Step 6: Array Cooperative Obstacle Avoidance Scheduling: The cooperative scheduling unit adjusts the initial obstacle avoidance decisions of each UAV based on the global path planning information, generates conflict-free array cooperative obstacle avoidance commands, and transmits them to the obstacle avoidance decision units of each UAV through the array communication module.

[0078] Step 7: Final confirmation of obstacle avoidance decision: Each UAV obstacle avoidance decision unit, in conjunction with the array-coordinated obstacle avoidance command, adjusts and confirms the final obstacle avoidance direction and flight control command, and transmits them to the flight control unit;

[0079] Step 8: Flight control execution and status feedback: The flight control unit converts control commands into power drive signals to control the UAV to perform obstacle avoidance actions; at the same time, it collects the UAV's flight status in real time and feeds it back to the dual pipeline processing unit to achieve full-link closed-loop regulation. If environmental / status changes are detected, it returns to step 2 to re-process features and make obstacle avoidance decisions.

[0080] A computer device includes a RISC-V+FPGA dual-pipeline processing unit and a memory, wherein the memory stores a computer program, and the dual-pipeline processing unit executes the computer program to implement the steps of the above-described RISC-V-based UAV array obstacle avoidance control method.

[0081] A computer storage device storing a computer program, which, when executed by a computer, implements the steps of the aforementioned RISC-V-based UAV array obstacle avoidance control method.

[0082] Example 3:

[0083] A RISC-V-based UAV array obstacle avoidance system includes a single UAV obstacle avoidance unit and an array cooperative control unit. The single UAV obstacle avoidance unit comprises a carbon-based biomimetic shell, a silicon-based environmental perception module, a RISC-V+FPGA dual-pipeline processing unit, an obstacle avoidance decision unit, and a flight control unit. The array cooperative control unit includes an array communication module, a cooperative scheduling unit, and a global path planning unit. The carbon-based biomimetic shell integrates a carbon-based airflow sensing module for real-time capture of airflow direction, wind speed, and turbulence characteristics, converting analog signals into digital characteristic signals. The silicon-based environmental perception module consists of a lidar, a camera, and an ultrasonic sensor, used to collect obstacle location, obstacle motion state, and airspace terrain information, converting analog signals into digital signals. The RISC-V+FPGA dual-pipeline processing unit adopts a vertically orthogonal architecture of the RISC-V instruction pipeline and the spatial sensing signal data pipeline. Its general-purpose registers and fluid / space data operation caches are fused to form a symbiotic register array for processing carbon-based airflow sensing characteristics. Multi-source fusion with silicon-based environmental perception features extracts core obstacle avoidance features composed of obstacle location, airflow and wind force, and the UAV's own state. The obstacle avoidance decision unit is equipped with a 3×3 grid neighborhood obstacle avoidance algorithm, which uses the core obstacle avoidance features as input to generate the optimal avoidance direction for a single UAV and receives collaborative scheduling instructions from the collaborative scheduling unit to adjust the obstacle avoidance path. The flight control unit receives control instructions output by the obstacle avoidance decision unit, drives the UAV's power actuator to complete flight attitude and path control, and collects flight status data in real time to feed back to the RISC-V+FPGA dual pipelined processing unit. The array communication module realizes bidirectional wireless communication between each UAV obstacle avoidance unit and the array collaborative control unit. The collaborative scheduling unit, based on the state and environmental data transmitted by each UAV and combined with global path planning information, performs airspace resource allocation, obstacle avoidance path coordination, and task scheduling for the UAV array. The global path planning unit receives global airspace environmental data and flight status data of each UAV in real time, generates and dynamically updates the global optimal flight path of the UAV array.

[0084] Preferably, the carbon-based biomimetic shell is made of carbon-based biomimetic material that can grow autonomously and participate in the natural biological cycle, and has a lightweight, biomimetic streamlined structure and adaptive deformation capability, and can be naturally degraded after disposal.

[0085] Preferably, the carbon-based airflow sensing module is distributed and embedded in the wing and fuselage bionic parts of the carbon-based bionic shell, simulating the airflow sensing mechanism of birds, converting airflow disturbances into voltage / frequency change signals, and outputting them to the RISC-V+FPGA dual pipeline processing unit after analog-to-digital conversion.

[0086] Preferably, the RISC-V+FPGA dual-pipeline processing unit supports flexible deployment of RISC-V single-core or multi-core processors, with an FPGA logic resource utilization rate of less than 40%, and has the ability to dynamically adjust power consumption according to the load.

[0087] Preferably, the 3×3 grid obstacle avoidance algorithm caches the obstacle spatial coordinate matrix and the UAV real-time pose matrix through a dual-window mechanism, performs integer logic operations and table lookup matching in the RISC-V instruction pipeline, completes collision risk determination and avoidance direction generation, without calling floating-point operations or deep learning models.

[0088] Preferably, the array communication module operates in the 5.8GHz dedicated UAV communication frequency band, with an end-to-end communication latency of less than 1ms and a bit error rate of less than 10⁻. 6 .

[0089] Preferably, a RISC-V-based obstacle avoidance control method for unmanned aerial vehicle (UAV) arrays includes the following steps:

[0090] S1: Carbon-based-silicon-based multi-source biomimetic sensing;

[0091] S2: Dual-stream high-speed fusion processing;

[0092] S3: Initial obstacle avoidance decision for a single drone;

[0093] S4: Array global information synchronization;

[0094] S5: Array global path planning;

[0095] S6: Array cooperative obstacle avoidance scheduling;

[0096] S7: Final confirmation of obstacle avoidance decision;

[0097] S8: Flight control execution and status feedback. Among them,

[0098] In step S1, the carbon-based bionic shell captures airflow / wind fluid characteristics in real time through the carbon-based airflow sensing module, and the silicon-based environmental sensing module collects spatial characteristics of airspace obstacles / terrain in real time. Both types of characteristics are converted into digital signals and then transmitted to the RISC-V+FPGA dual pipeline processing unit.

[0099] In step S2, the dual pipeline processing unit completes the multi-source fusion of carbon-based and silicon-based features through the symbiotic register array and the vertically orthogonal instruction / data pipeline, extracts the core features of obstacle avoidance, integrates the UAV's own flight status data, and transmits it to the obstacle avoidance decision unit.

[0100] In step S3, the obstacle avoidance decision unit performs logical operations on the core obstacle avoidance features using a 3×3 grid obstacle avoidance algorithm, judges the collision risk, and generates the initial optimal avoidance direction for a single UAV.

[0101] In step S4, the array communication module transmits the flight status, initial obstacle avoidance decision, and airspace environment data of each UAV to the global path planning unit of the array cooperative control unit in real time.

[0102] In step S5, the global path planning unit combines the global environment and array status data to generate the globally optimal flight path for the UAV array and transmits it to the collaborative scheduling unit.

[0103] In step S6, the collaborative scheduling unit adjusts the initial obstacle avoidance decisions of each UAV based on the global path planning information, generates conflict-free array collaborative obstacle avoidance instructions, and transmits them to the obstacle avoidance decision units of each UAV through the array communication module.

[0104] In step S7, each UAV obstacle avoidance decision unit combines the array cooperative obstacle avoidance command to adjust and confirm the final obstacle avoidance direction and flight control command, and transmits them to the flight control unit.

[0105] In step S8, the flight control unit converts control commands into power drive signals to control the UAV to perform obstacle avoidance actions; at the same time, it collects the UAV's flight status in real time and feeds it back to the dual pipeline processing unit to form a closed-loop regulation across the entire link; if an environmental / status change is detected, it returns to step S2 to re-process features and make obstacle avoidance decisions.

[0106] Preferably, the digital feature signal output by the carbon-based airflow sensing module in step S1 includes three types of time-series feature quantities: airflow vector direction angle, local wind speed amplitude, and turbulence intensity index.

[0107] Preferably, the multi-source fusion process in step S2 adopts a weighted feature splicing method, wherein the weight coefficient of carbon-based airflow features is 0.3 to 0.4, the weight coefficient of silicon-based spatial features is 0.6 to 0.7, and the weight coefficients are dynamically configured according to the flight speed range.

[0108] A computer-readable storage device storing a computer program, which, when executed by a processor, implements one or more of steps S1-S8 of the above-described RISC-V-based UAV array obstacle avoidance control method.

[0109] A computer storage device storing a computer program, which, when executed by a computer, implements one or more of steps S1-S8 of the above-described RISC-V-based UAV array obstacle avoidance control method.

[0110] The above description is merely an embodiment of this application and is not intended to limit the scope of protection of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A RISC-V-based unmanned aerial vehicle (UAV) array obstacle avoidance system, comprising a single UAV obstacle avoidance unit and an array cooperative control unit; the single UAV obstacle avoidance unit includes at least a perception module, a RISC-V+FPGA-based dual-pipeline processing module, an obstacle avoidance decision module, and a flight control module; the array cooperative control unit includes at least an array communication module, a cooperative scheduling module, and a global path planning module; characterized in that, The sensing module includes a carbon-based airflow sensing module integrated into the carbon-based bionic shell of the UAV and a separately set silicon-based environmental sensing module. The two modules simultaneously collect physical signals characterizing fluid disturbance characteristics: airflow vector direction angle, wind speed amplitude and turbulence intensity index, as well as physical signals characterizing the distribution of spatial obstacles: position, motion state and terrain information, and convert one or more of the physical signals into time-aligned and quantized consistent digital feature signals. The dual-pipeline processing module adopts a hardware architecture in which the RISC-V instruction pipeline and the sensor data pipeline are perpendicular and orthogonal. Its core is a symbiotic register array, which integrates RISC-V general-purpose register resources and fluid / space data operation cache at the physical level. It supports single-cycle access on the instruction side and concurrent access on the data side. It is used to receive and fuse digital feature signals from the sensing module and extract core obstacle avoidance features including obstacle spatial distribution, local airflow disturbances and the UAV's own state.

2. The RISC-V-based UAV array obstacle avoidance system as described in claim 1, characterized in that, The obstacle avoidance decision module is coupled to the output of the dual pipeline processing module and embeds a 3×3 grid obstacle avoidance algorithm based on the neighborhood topology. Through table lookup matching and integer logic operations, it generates the initial avoidance direction of a single UAV based on the core obstacle avoidance features and responds to the collaborative scheduling instructions from the collaborative scheduling module to adjust the final obstacle avoidance path.

3. The RISC-V-based UAV array obstacle avoidance system as described in claim 1, characterized in that, The flight control module is coupled to the output of the obstacle avoidance decision module, converts control commands into drive signals for the power actuator, and collects flight status data in real time and feeds it back to the symbiotic register array to form a closed-loop regulation path.

4. The RISC-V-based UAV array obstacle avoidance system as described in claim 1, characterized in that, The array communication module establishes a low-latency, high-reliability wireless communication link between each individual UAV obstacle avoidance unit and the array collaborative control unit, supporting global state synchronization and collaborative command distribution.

5. The RISC-V-based UAV array obstacle avoidance system as described in claim 1, characterized in that, The carbon-based airflow sensing module is a flexible piezoresistive sensor array, which is distributed and embedded in the leading edge of the wing, the side ribs of the fuselage, and the root of the tail fin of the carbon-based bionic shell. Each sensing unit converts the mechanical deformation caused by airflow disturbance into resistance or voltage change signals, and outputs three types of digital characteristic signals after analog-to-digital conversion: airflow vector direction angle, local wind speed amplitude, and turbulence intensity index.

6. The RISC-V-based UAV array obstacle avoidance system as described in claim 1, characterized in that, In the dual pipelined processing module, the FPGA is configured with a power dynamic adjustment unit; the power dynamic adjustment unit monitors the power supply voltage ripple in real time through the on-chip XADC module. When the peak-to-peak value of the ripple is lower than a preset threshold within N consecutive sampling cycles, it automatically reduces the data pipeline operating frequency and puts the RISC-V core into a low-power waiting mode, where N is an integer greater than or equal to 5. The 3×3 grid obstacle avoidance algorithm uses a dual-window mechanism to cache the obstacle spatial coordinate matrix and the UAV real-time pose matrix respectively. In the RISC-V instruction pipeline, it only performs integer addition and subtraction, displacement and table lookup matching operations to complete the collision risk judgment and avoidance direction generation. It does not call the floating-point arithmetic unit or load or run the deep learning model throughout the process.

7. A RISC-V based UAV array obstacle avoidance control method, applied to the UAV array obstacle avoidance system according to any one of claims 1-6, characterized in that, Includes one or more of the following steps: S1: Carbon-based-silicon-based multi-source biomimetic sensing; S2: Dual-pipeline high-speed fusion processing; S3: Initial obstacle avoidance decision for a single UAV; S4: Array global information synchronization; S5: Array global path planning; S6: Array collaborative obstacle avoidance scheduling; S7: Final confirmation of obstacle avoidance decision.

8. The obstacle avoidance control method for UAV arrays based on RISC-V as described in claim 7, characterized in that, The carbon-based airflow sensing module, which is integrated into the carbon-based bionic shell of the drone, captures airflow / wind fluid characteristics in real time, and the silicon-based environmental sensing module collects spatial characteristics of airspace obstacles / terrain in real time. Both types of characteristics are converted into digital signals and transmitted to the dual pipeline processing unit. The dual pipeline processing unit completes the multi-source fusion of carbon-based and silicon-based features through a symbiotic register array and a vertically orthogonal instruction / data pipeline, extracts the core features of obstacle avoidance, integrates the UAV's own flight status data, and transmits it to the obstacle avoidance decision unit. The obstacle avoidance decision unit uses the above-mentioned 3×3 grid obstacle avoidance algorithm to perform logical operations on the core obstacle avoidance features, judge the collision risk, and generate the initial optimal avoidance direction for a single UAV. The array communication module transmits the flight status, initial obstacle avoidance decisions, and airspace environment data of each UAV to the global path planning unit of the array cooperative control unit in real time. The global path planning unit combines global environment and array status data to generate the globally optimal flight path for the UAV array and transmits it to the collaborative scheduling unit. Based on global path planning information, the collaborative scheduling unit coordinates and adjusts the initial obstacle avoidance decisions of each UAV, generates conflict-free array collaborative obstacle avoidance commands, and transmits them to the obstacle avoidance decision units of each UAV through the array communication module. Each of the aforementioned UAV obstacle avoidance decision units, in conjunction with the array-coordinated obstacle avoidance command, adjusts and confirms the final obstacle avoidance direction and flight control command, and transmits them to the flight control unit; The flight control unit converts control commands into power drive signals to control the UAV to perform obstacle avoidance actions; at the same time, it collects the UAV's flight status in real time and feeds it back to the dual pipeline processing unit to form a closed-loop regulation across the entire link; if an environmental / status change is detected, it returns to the dual pipeline high-speed fusion processing step in step S2 to re-process features and make obstacle avoidance decisions.

9. A computer device, characterized in that, The system includes a dual-pipeline processing unit as described in claim 1 and a memory, wherein the memory stores a computer program, and the dual-pipeline processing unit executes the computer program to implement the steps of the RISC-V-based UAV array obstacle avoidance control method as described in claim 7 or 8.

10. A computer storage device storing a computer program thereon, characterized in that, When the computer program is executed by a computer, it implements the steps of the RISC-V-based obstacle avoidance control method for unmanned aerial vehicle arrays as described in claim 7 or 8.

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