A non-isolated double-state voltage regulator control method, device and system

Abstract

The present application relates to switching power supply and DC voltage stabilizing power supply technical field, particularly to a kind of non-isolated double-state voltage stabilizing power supply control method, device and system.The device is sampled output voltage signal, after by digital discrete level transmission, by double-state comparison control unit based on preset upper and lower limit threshold value is completed discrimination, output low gear instruction, high gear instruction or gear keep instruction, drive gear selectable drive unit corresponding implementation lower speed energy conversion, higher speed energy conversion or maintain current speed energy conversion, realize output voltage stabilization.The present application overall adopts digital control architecture, without error amplifier, loop compensation network, completely discard traditional analog feedback loop, from root avoid loop temperature drift, phase lag, loop oscillation and other defects, with circuit extremely simple, response fast, strong anti-interference, long-term reliability high characteristics.

Description

Technical Field

[0001] This invention relates to the fields of switching power supplies and DC regulated power supply technology, and in particular to a non-isolated dual two-state regulated power supply control method, device and system. Background Technology

[0002] This invention is adapted to non-isolated DC / DC topologies and falls under the categories of power electronic conversion, analog hardware closed-loop voltage regulation, and chipless pure hardware power control technology. It is applicable to various non-isolated power supply design scenarios for industrial power supply, consumer electronics, lighting drivers, and DC regulated loads. In non-isolated DC / DC converters, such as buck, boost, or buck-boost topologies, the main circuit consisting of power switches, energy storage inductors, and filter capacitors lacks a transformer to provide electrical isolation from the control circuit; the input, output, and ground terminals are electrically directly connected. This structure allows the high amplitude current and voltage change rates generated during high-frequency switching of the power switches to be conducted to the error amplification and modulation circuits with almost no attenuation through common ground impedance and parasitic coupling paths, reducing the accuracy and noise immunity of the control loop. Against this backdrop, current mainstream pulse width modulation (PWM) control methods require the integration of an oscillator, error amplifier, internal reference source, and a loop compensation network composed of resistors and capacitors to obtain a stable output voltage. In non-isolated topologies, high-frequency ringing and ground bounce noise from switching nodes can easily be injected into the compensation network via unisolated feedback paths, causing insufficient loop phase margin or even oscillation. This forces designers to adopt complex compensation structures and increase the number of external components, thereby increasing circuit complexity and cost. Furthermore, under light-load conditions where the load current decreases and the inductor current enters discontinuous mode, the PWM method still operates at a fixed switching frequency, significantly increasing the proportion of drive and switching losses in the total power consumption and reducing light-load efficiency.

[0003] Specifically, in the field of non-isolated DC / DC regulated power supplies, pulse width modulation (PWM) control is the most commonly used control method. PWM control achieves output voltage stability by fixing the switching frequency and adjusting the pulse width. Its architecture typically includes an oscillator, an error amplifier, an internal reference voltage source, and a loop compensation network composed of resistors and capacitors, making the circuit complex and costly.

[0004] To address the issue of excessive switching losses in PWM control under light load conditions, pulse frequency modulation (PFM) technology has been widely adopted. However, the switching frequency of PFM control fluctuates with load changes, resulting in a dispersed spectrum without a fixed peak value. Electromagnetic interference energy is distributed over a wide frequency band, and the output ripple voltage in PFM mode is typically higher than that in PWM mode. Based on these issues, this paper proposes a PWM-PFM dual-mode switching scheme: PWM mode is used under heavy load to ensure stability and low ripple, while PFM mode is automatically switched to reduce power consumption under light load. However, this scheme still requires a mode switching threshold voltage detection circuit, suffers from ripple fluctuations during mode switching, and has more complex control logic, resulting in higher chip costs than single-mode solutions.

[0005] Existing non-isolated DC / DC voltage regulation solutions generally rely on operational amplifiers, error feedback loops, and RC compensation networks, while also using MCUs or PWM modulation chips to achieve voltage regulation. The circuit structure is complex, susceptible to temperature drift and device parameter dispersion, has a slow response, and poor long-term stability.

[0006] In summary, the PWM control, PFM control, and PWM-PFM dual-mode control schemes commonly used in traditional non-isolated DC / DC regulated power supplies all have varying degrees of shortcomings in terms of circuit complexity, dynamic response speed, light load efficiency, EMI performance, control accuracy, and operational stability. These are technical problems that urgently need to be solved in the field of DC / DC regulated power supplies. Summary of the Invention

[0007] This invention aims to provide a non-isolated dual-state regulated power supply control method, device, and system. It achieves closed-loop voltage regulation control by relying on a digital voltage signal transmission link and a dual-threshold comparison and discrimination mechanism. The overall architecture does not rely on error amplifiers, loop compensation networks, or continuous analog feedback loops. It can be directly implemented through pure hardware circuits or adapted to digital chips for threshold setting and drive control. It eliminates the need for complex software algorithms, traditional PWM modulation circuits, and oscillation clocks, simplifying the overall circuitry from the underlying architecture. Simultaneously, it significantly improves voltage response speed, output stability, and long-term operational reliability, thus solving the technical problems of traditional non-isolated DC / DC regulated power supplies' commonly used clock-driven PWM control, PFM control, and PWM-PFM dual-mode control schemes in terms of circuit complexity, dynamic response speed, light-load efficiency, EMI performance, control accuracy, and operational stability.

[0008] To achieve the above objectives, the first aspect of the present invention provides a non-isolated dual-two-state regulated power supply control method, comprising the following steps: A non-isolated power conversion unit is used to receive a DC input voltage and convert the DC input voltage into a DC output voltage. The DC output voltage is sampled by a voltage signal sampling unit and processed into a sampled voltage signal. The sampled voltage signal is transmitted to the dual-state comparison control unit in a digital discrete level manner through a digital voltage signal transmission link; The dual-state comparison control unit compares the sampled voltage signal with a preset upper threshold voltage and a preset lower threshold voltage respectively. Then, when the sampled voltage signal is greater than or equal to the upper threshold voltage, it outputs a low gear command; when the sampled voltage signal is less than or equal to the lower threshold voltage, it outputs a high gear command; and when the sampled voltage signal is less than the upper threshold voltage and greater than the lower threshold voltage, it outputs a gear hold command. The gear selectable drive unit can be configured to either a fixed duty cycle mode or a fixed frequency mode. In the fixed duty cycle mode, the duty cycle is kept constant, and the drive frequency increases when the high gear command is received and decreases when the low gear command is received. In the fixed frequency mode, the frequency is kept constant, and the duty cycle increases when the high gear command is received and decreases when the low gear command is received. The selectable drive unit adjusts the energy transmission rate according to the received gear command. When receiving the high gear command, it speeds up energy transmission; when receiving the low gear command, it slows down energy transmission; and when receiving the gear hold command, it maintains the current working state, so that the DC output voltage of the non-isolated power conversion unit is stabilized within a preset voltage range.

[0009] This invention achieves high-precision regulated output through dual-threshold hardware state determination and hysteresis interval state maintenance mechanism, completely abandoning the traditional analog feedback loop, and avoiding inherent defects such as loop temperature drift, phase lag, and loop oscillation from the root. It has outstanding advantages such as extremely simple architecture, fast transient response, excellent anti-interference performance, and high long-term operational reliability.

[0010] Specifically, in the aforementioned non-isolated dual-two-state digital feedback regulated power supply circuit, the sampled voltage signal is compared with preset upper and lower threshold voltages to generate three different judgment commands. When the sampled voltage signal rises to a level greater than or equal to the upper threshold voltage, a low-level command is output, indicating that the voltage at the output of the non-isolated power conversion unit has exceeded the allowable upper limit. When the sampled voltage signal falls to a level less than or equal to the lower threshold voltage, a high-level command is output, indicating that the voltage at the output of the non-isolated power conversion unit has fallen below the allowable lower limit. When the sampled voltage signal is between the two thresholds, a level-hold command is output, indicating that the voltage at the output of the non-isolated power conversion unit is within a preset range. This drives the non-isolated dual-two-state regulated power supply control device to perform corresponding driving actions. This scheme eliminates the need for error amplifiers and loop compensation networks required in traditional PWM / PFM schemes. It directly performs dual two-state digital feedback control based on the output voltage ripple boundary using a self-oscillating hysteresis comparison method, which greatly simplifies the circuit structure and the number of components. At the same time, since the control decision only depends on the comparison between the instantaneous value of the output voltage and the threshold, there are no phase delays and compensation limitations in traditional control loops, which significantly improves the response speed of feedback control.

[0011] Furthermore, by introducing a hysteresis interval through dual threshold comparison, the non-isolated power topology unit maintains the current selectable drive unit state unchanged within the hysteresis interval, thereby avoiding frequent voltage over-limit and switching caused by small voltage ripple interference when there is only a single threshold, and improving the stability of the power circuit to convert the output voltage.

[0012] A second aspect of the present invention provides a non-isolated dual-state regulated power supply control device, comprising a range-selectable drive unit, a non-isolated power conversion unit, a voltage signal sampling unit, a digital voltage signal transmission link, and a dual-state comparison control unit, wherein: The non-isolated power conversion unit is used to obtain the DC input voltage and then convert the DC input voltage into a DC output voltage; The voltage signal sampling unit is used to acquire the DC output voltage and process the DC output voltage into a sampled voltage signal. The digital voltage signal transmission link is used to transmit the sampled voltage signal to the dual-state comparison control unit in digital discrete level form; The dual-state comparison control unit is used to compare the sampled voltage signal with a preset upper threshold voltage and a preset lower threshold voltage respectively, and then output a low gear command when the sampled voltage signal is greater than or equal to the upper threshold voltage, output a high gear command when the sampled voltage signal is less than or equal to the lower threshold voltage, and output a gear hold command when the sampled voltage signal is less than the upper threshold voltage and greater than the lower threshold voltage. The selectable gear drive unit can be configured with either a fixed duty cycle mode or a fixed frequency mode. In the fixed duty cycle mode, the duty cycle is kept constant, and the drive frequency increases when the high gear command is received and decreases when the low gear command is received. In the fixed frequency mode, the frequency is kept constant, and the duty cycle increases when the high gear command is received and decreases when the low gear command is received. The selectable drive unit adjusts the energy transmission rate according to the received gear command. When receiving the high gear command, it speeds up energy transmission; when receiving the low gear command, it slows down energy transmission; and when receiving the gear hold command, it maintains the current working state, so that the DC output voltage of the non-isolated power conversion unit is stabilized within a preset voltage range, and the DC input voltage is stepped down or stepped up and regulated at the output terminal of the non-isolated power conversion unit.

[0013] Furthermore, the non-isolated power conversion unit includes an inductor, a capacitor, a freewheeling device, and / or a rectifier; the inductor, the capacitor, the freewheeling device, and / or the rectifier constitute a power conversion architecture, which converts the DC input voltage into the DC output voltage and controls the DC output voltage within a preset range based on the gear selectable drive unit.

[0014] In this implementation, the non-isolated power conversion unit is a non-isolated DC / DC power conversion unit used to realize the conversion and transfer of electrical energy from the input to the output. This unit adopts a power topology without electrical isolation, and does not include isolated drive or isolated transmission functions. It only uses non-isolated components such as inductors, capacitors, and rectifiers to form a power conversion circuit, converting the input voltage into a stable output voltage. This unit does not have primary-secondary electrical isolation and belongs to the main body of non-isolated power conversion.

[0015] Furthermore, the power conversion architecture includes a single-inductor architecture, a dual-inductor architecture, or a multi-inductor architecture, wherein: The dual-inductor architecture or the multi-inductor architecture includes a main power inductor and an auxiliary voltage regulator inductor. The main power inductor and the auxiliary voltage regulator inductor can be connected in series, in parallel, or independently in dual-path configuration. The main power inductor is used for energy transmission and power output, and the auxiliary voltage regulator inductor is used to assist in adjusting the amplitude of the DC output voltage and suppressing the output ripple of the DC output voltage, thereby converting the DC input voltage into the DC output voltage, and controlling the DC output voltage within a preset threshold range based on the drive of the selectable drive unit.

[0016] In this implementation, the aforementioned non-isolated power conversion unit can adopt a single-inductor, dual-inductor, or even multi-inductor architecture. When a single-inductor architecture is adopted, a single power inductor independently completes energy storage, energy release, and power conversion, resulting in a very simple structure suitable for low-cost, low-power voltage regulation applications.

[0017] When using a dual-inductor or even multi-inductor architecture, including a main power inductor and an auxiliary voltage regulator inductor, the main power inductor and the auxiliary voltage regulator inductor can be connected in series, in parallel, or independently in dual-path configurations. The main power inductor is responsible for the main circuit energy transmission and power output, while the auxiliary voltage regulator inductor is used to assist in adjusting the output voltage amplitude, improve the voltage regulation rate, and suppress output ripple. Through the division of labor and cooperation between the main and auxiliary inductors, high-power energy transmission in the main circuit is guaranteed, while precise voltage regulation and optimized load transient response are achieved. Compared with conventional single-inductor topologies, this results in higher voltage regulation accuracy and stronger load adaptability.

[0018] Furthermore, the structure of the voltage signal sampling unit includes at least one of a voltage divider sampling structure, a direct sampling structure, a level clamping sampling structure, or a level normalization sampling structure.

[0019] In this implementation, the voltage signal sampling unit is used to sample the output voltage value of the non-isolated power conversion unit. Through voltage division, direct sampling level conversion or normalization, a sampled voltage signal is formed that is adapted to be recognized by the subsequent dual-state comparison control unit. This unit is a pure hardware sampling structure that does not require auxiliary power supply and can quickly and stably obtain the output voltage state, providing accurate input for dual-state hardware discrimination.

[0020] Furthermore, the voltage signal sampling unit can acquire the sampling voltage using pure hardware methods such as voltage division, direct sampling, level clamping, or level normalization. This unit does not require an independent auxiliary power supply or additional power supply; it can complete sampling and level conversion solely based on the output voltage itself. The circuit structure is simple, the signal is real-time with no delay, and there is no temperature drift distortion.

[0021] Furthermore, the digital voltage signal transmission link is used to transmit the sampled voltage signal output by the voltage signal sampling unit to the dual binary comparison control unit in the form of digital discrete levels. The digital voltage signal transmission link is a non-isolated direct transmission structure, which transmits voltage information using high and low level states throughout the process. It does not rely on weak analog voltage changes, analog current changes, or analog error signals to achieve closed-loop feedback. The link only transmits valid or invalid, high or low digital state information, error calculation, and loop compensation. It avoids the risks of loop temperature drift, signal attenuation, phase lag, and loop oscillation caused by analog transmission from the bottom layer. It has the characteristics of fast response, strong anti-interference ability, and simple and reliable structure.

[0022] Furthermore, the digital voltage signal transmission link is a non-isolated direct transmission architecture, without any isolation devices. It requires no optocouplers, isolation transformers, magnetic isolation chips, or other isolation components. The sampling information output by the voltage signal sampling unit is directly transmitted through a hardware path as discrete digital high and low levels, representing a pure digital transmission method without any analog signal intervention. The core feature of this link is that it transmits digital state information corresponding to high or low levels, rather than the continuous voltage gradient signal or weak current signal found in traditional analog transmission. It reflects the relative relationship between the output voltage and a preset threshold solely through the effective or ineffective state of the digital level, without relying on minute changes in signal amplitude for feedback, thus fundamentally distinguishing it from analog feedback links.

[0023] The dual-state comparison control unit adopts a digital comparison and discrimination architecture, which does not rely on error amplifiers, continuous analog feedback loops, loop compensation networks, PWM pulse width modulation circuits, and oscillation clock circuits. The comparison structure can be directly constructed through pure hardware circuits, or it can be adapted to digital chips to realize threshold comparison and command output. No complex digital algorithms and software programming are required for real-time control. Its control decision is only based on the comparison result of the sampled voltage and the dual thresholds. There are no risks of analog loop delay, phase lag, loop cumulative temperature drift, and loop oscillation. It has outstanding advantages such as extremely fast response speed, strong anti-interference ability, simplified circuit structure, and stable and reliable operation. Furthermore, the preset upper and lower threshold voltages of the dual-state comparison control unit can be directly generated by a hardware circuit structure, which includes at least one of a resistor voltage divider structure, a Zener diode reference structure, a reference voltage diode structure, an RC charge-discharge reference structure, a resistor-Zener diode combination structure, or a resistor-capacitor-Zener diode combination structure; or they can be set and obtained by using a built-in integrated reference source of a digital chip or preset voltage parameters inside the chip, without the need for analog computing circuits, and without the need for an MCU or software algorithm to participate in the real-time threshold comparison process.

[0024] Furthermore, the dual-state comparison control unit includes a first comparator, which compares the sampled voltage signal with a preset upper threshold voltage and a preset lower threshold voltage, respectively. The first comparator outputs a low-level command when the sampled voltage signal is greater than or equal to the upper threshold voltage, outputs a high-level command when the sampled voltage signal is less than or equal to the lower threshold voltage, and outputs a hold-level command when the sampled voltage signal is less than the upper threshold voltage but greater than the lower threshold voltage. In this implementation, the dual-state comparison control unit uses the first comparator to compare the sampled voltage signal with the preset upper threshold voltage and the preset lower threshold voltage, eliminating the need for complex software algorithms in real-time judgment. The preset upper and lower voltage thresholds can be directly generated through resistor voltage dividers, Zener diode references, or combinations of passive devices, or can be set using a built-in integrated reference source in the digital chip or preset voltage parameters within the chip, without relying on analog computing circuits or continuous analog feedback loops. Specifically, this unit can use a Zener diode and a resistor to form a passive threshold reference, and work with a single comparator to achieve hierarchical discrimination of dual thresholds. Alternatively, it can use a digital chip to complete the threshold parameter configuration and comparison logic implementation. Both paths can meet the requirements of fast discrimination and stable control. Further, the dual-state comparison control unit includes a first comparator, a second comparator, and an RS flip-flop, wherein: The first comparator corresponds to the upper threshold voltage, and the second comparator corresponds to the preset lower threshold voltage; together, they perform threshold comparison on the sampled voltage signal. The RS flip-flop generates three types of control commands based on the output states of the two comparators: When the sampled voltage signal is greater than or equal to the upper threshold voltage, a low gear command is output; when the sampled voltage signal is less than or equal to the lower threshold voltage, a high gear command is output; when the sampled voltage signal is less than the upper threshold voltage but greater than the lower threshold voltage, the RS flip-flop maintains the current output state and outputs an equivalent gear hold command. In this implementation, dual comparators are used to connect to the upper and lower thresholds respectively to complete the synchronous comparison between the sampled voltage and the dual thresholds, or a dual threshold range is set through a pure resistor voltage divider network, and the level state is determined by combining a diode clamping structure.

[0025] Regardless of the implementation method used, the core is to directly complete the threshold discrimination and instruction output through a digital comparison path, without involving continuous analog signal amplification, analog calculation and loop compensation. It does not require complex digital calculation and software programming to participate in real-time control, ensuring fast response, no analog loop delay and no cumulative temperature drift in the discrimination process. At the same time, it has the characteristics of simplified circuit structure, controllable cost, strong anti-interference ability and long-term stable and reliable operation, perfectly adapting to the minimalist design requirements of non-isolated architecture.

[0026] Furthermore, the comparison threshold voltage used by the dual two-state comparison control unit in this invention is not limited to two sets of basic thresholds, namely the preset upper threshold voltage and the preset lower threshold voltage. Multiple intermediate threshold voltages arranged in a sequentially increasing or decreasing manner can also be flexibly configured. After comparing the acquired sampling voltage signal with each set of threshold voltages, it can output multi-level control commands at different levels, effectively improving the output accuracy of the control commands and thus optimizing the voltage regulation and stability accuracy of the DC voltage output by the non-isolated power conversion unit.

[0027] Furthermore, the gear selectable drive unit receives the high gear command, low gear command, or gear hold command, and executes accordingly: the high gear command implements energy conversion at a higher speed, the low gear command implements energy conversion at a lower speed, and the gear hold command maintains the current speed energy conversion. It is important to clarify that regardless of whether a higher or lower speed energy conversion is implemented, the corresponding power MOSFET drive signal is a digital drive signal with preset fixed parameters, not a continuously adjustable analog signal. The fixed parameters include at least one of a fixed duty cycle and a fixed operating frequency. The energy conversion speed is adjusted stepwise only through gear switching, without involving continuous gradual control of the analog signal. Furthermore, the gear-selectable drive unit of this invention can use either a fixed duty cycle mode or a fixed frequency mode as its drive operating mode, realizing high and low power energy conversion drive. Its flexible structural layout can adapt to different conventional DC voltage regulation application scenarios.

[0028] Furthermore, when the dual-state comparison control unit configures multiple sets of gradient threshold voltages according to the high-precision voltage regulation requirements, the range selectable drive unit synchronously matches and sets multiple output ranges. Based on the threshold voltage comparison results, a linkage is formed, and according to the multi-range control commands output by the dual-state comparison control unit, different levels of drive signals are output to realize multi-gradient range energy conversion control. By eliminating complex analog feedback loops, the precision of voltage regulation and voltage regulation accuracy are effectively improved, making it suitable for high-standard DC voltage regulation application scenarios.

[0029] Furthermore, the drive unit and the non-isolated power conversion unit constitute a buck converter hardware topology, and the selectable drive unit, in conjunction with drive control, enables the non-isolated power conversion unit to operate in buck regulation mode. Furthermore, the drive unit and the non-isolated power conversion unit constitute a boost converter hardware topology, and the selectable drive unit, in conjunction with drive control, enables the non-isolated power conversion unit to operate in boost regulation mode.

[0030] In the above implementation, the driving unit adopts a digital controlled driving architecture, receives threshold discrimination instructions output by the dual two-state comparison control unit, and correspondingly realizes the controlled conduction, controlled turn-off, and state maintenance of the controllable switching devices in the subsequent power topology. The driving unit directly receives the state instructions issued by the dual two-state comparison control unit without analog signal conversion, error calculation, and loop compensation processing. It follows the instruction on / off based on pure hardware path logic, or it can rely on digital driving circuit to realize instruction parsing and switch control, directly controlling the working state of the controllable switching devices in the subsequent power topology, without the influence of analog loop delay and temperature drift throughout the process.

[0031] A third aspect of the present invention provides a non-isolated dual-state regulated power supply control system, comprising a power supply unit, an output interface, and a non-isolated dual-state regulated power supply control device as described in any of the above embodiments, wherein: The power supply unit is used to provide DC input voltage to the non-isolated dual-state regulated power supply control device, and the output interface is used to transmit the DC output voltage of the non-isolated dual-state regulated power supply control device to an external load. Attached Figure Description

[0032] Figure 1 This is a schematic flowchart of a non-isolated dual-state regulated power supply control method provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of the structure of the non-isolated dual-state regulated power supply control device according to the first embodiment of the present invention; Figure 3 This is a schematic diagram of the structure of the non-isolated dual-state regulated power supply control device according to the first embodiment of the present invention; Figure 4 This is a schematic diagram of the gear selectable drive unit according to the first embodiment of the present invention; Figure 5 This is a schematic diagram of the structure of the dual-state comparison control unit of the first embodiment provided in this invention; Figure 6 This is a schematic diagram of the structure of the gear selectable drive unit according to the second embodiment of the present invention; Figure 7 These are schematic diagrams of the dual-state comparison control unit and part of the voltage signal sampling unit provided in the second and third embodiments of the present invention; Figure 8 This is a schematic diagram of the structure of a portion of the voltage signal sampling unit of the dual-two-state comparison control unit provided in the second and third embodiments of the present invention; Figure 9This is a schematic diagram of the structure of a portion of the voltage signal sampling unit of the dual-two-state comparison control unit provided in another second and third embodiment of the present invention; Figure 10 This is a schematic diagram of the structure of a portion of the dual-two-state comparison control unit provided in the second embodiment of the present invention; Figure 11 This is a control timing diagram of the non-isolated dual-state regulated power supply control device according to the second embodiment of the present invention; Figure 12 This is a schematic diagram of the structure of the non-isolated dual-state regulated power supply control device according to the third embodiment of the present invention; Figure 13 This is a schematic diagram of the structure of a partial dual-state comparison control unit provided in the third embodiment of the present invention; Figure 14 This is a control timing diagram of the non-isolated dual-state regulated power supply control device according to the third embodiment of the present invention. Detailed Implementation

[0033] Please refer to Figure 1 The first aspect of this invention provides a non-isolated dual-two-state regulated power supply control method, comprising the following steps: S1. A DC input voltage is connected through a non-isolated power conversion unit and the DC input voltage is converted into a DC output voltage; S2. The DC output voltage is sampled by the voltage signal sampling unit, and the DC output voltage is processed into a sampled voltage signal; S3. The sampled voltage signal is transmitted to the dual-state comparison control unit in a digital discrete level manner through a digital voltage signal transmission link; S4. The sampling voltage signal is compared with a preset upper threshold voltage and a preset lower threshold voltage by a dual two-state comparison control unit. Then, when the sampling voltage signal is greater than or equal to the upper threshold voltage, a low gear command is output. When the sampling voltage signal is less than or equal to the lower threshold voltage, a high gear command is output. When the sampling voltage signal is less than the upper threshold voltage and greater than the lower threshold voltage, a gear hold command is output.

[0034] S5. Selectively configure a fixed duty cycle mode or a fixed frequency mode through the gear selectable drive unit. The fixed duty cycle mode maintains a constant duty cycle, and the drive frequency increases when receiving the high gear command and decreases when receiving the low gear command. The fixed frequency mode maintains a constant frequency, and the drive duty cycle increases when receiving the high gear command and decreases when receiving the low gear command. S6. The selectable drive unit adjusts the energy transmission rate according to the received gear command. When receiving the high gear command, it speeds up the energy transmission; when receiving the low gear command, it slows down the energy transmission; and when receiving the gear hold command, it maintains the current working state, so that the DC output voltage of the non-isolated power conversion unit is stabilized within the preset voltage range.

[0035] This invention achieves high-precision regulated output through a dual-threshold hardware state determination and hysteresis interval state maintenance mechanism, completely abandoning the traditional analog feedback loop. It avoids inherent defects such as temperature drift, device aging, phase lag, and loop oscillation from the root, and has outstanding advantages such as extremely simple architecture, fast transient response, strong temperature drift suppression capability, excellent anti-interference performance, and high long-term operational reliability.

[0036] Specifically, in the aforementioned non-isolated dual-two-state digital feedback regulated power supply circuit, the sampled voltage signal is compared with preset upper and lower threshold voltages to generate three different judgment commands. When the sampled voltage signal rises to a level greater than or equal to the upper threshold voltage, a low-level command is output, indicating that the voltage at the output of the non-isolated power conversion unit has exceeded the allowable upper limit; when the sampled voltage signal falls to a level less than or equal to the lower threshold voltage, a high-level command is output, indicating that the voltage at the output of the non-isolated power conversion unit has fallen below the allowable lower limit; when the sampled voltage signal is between the two thresholds, a level-hold command is output, indicating that the voltage at the output of the non-isolated power conversion unit is within a preset range. This drives the non-isolated dual-two-state regulated power supply control device to perform corresponding driving actions. This scheme eliminates the need for error amplifiers and loop compensation networks required in traditional PWM / PFM schemes. It directly performs dual two-state digital feedback control based on the output voltage ripple boundary using a self-oscillating hysteresis comparison method, which greatly simplifies the circuit structure and the number of components. At the same time, since the control decision only depends on the comparison between the instantaneous value of the output voltage and the threshold, there are no phase delays and compensation limitations in traditional control loops, which significantly improves the response speed of feedback control.

[0037] Furthermore, by introducing a hysteresis interval through dual threshold comparison, the non-isolated power topology unit maintains the current selectable drive unit state unchanged within the hysteresis interval, thereby avoiding frequent voltage over-limit and switching caused by small voltage ripple interference when there is only a single threshold, and improving the stability of the power circuit to convert the output voltage.

[0038] Please refer to Figure 2 The second aspect of the present invention provides a non-isolated dual-state regulated power supply control device, comprising a range-selectable drive unit 100, a non-isolated power conversion unit 200, a voltage signal sampling unit 300, a digital voltage signal transmission link 400, and a dual-state comparison control unit 500, wherein: The non-isolated power conversion unit 200 is used to obtain the DC input voltage Vin, and then convert the DC input voltage Vin into a DC output voltage Vout; The voltage signal sampling unit 300 is used to acquire the DC output voltage Vout and process the DC output voltage Vout into a sampled voltage signal Vfb. The digital voltage signal transmission link 400 is used to transmit the sampled voltage signal Vfb to the dual-state comparison control unit 500 in the form of digital discrete levels; The dual-state comparison control unit 500 is used to compare the sampled voltage signal Vfb with a preset upper threshold voltage Vth_H and a preset lower threshold voltage Vth_L respectively, and then outputs a low gear command when the sampled voltage signal Vfb is greater than or equal to the upper threshold voltage Vth_H, outputs a high gear command when the sampled voltage signal Vfb is less than or equal to the lower threshold voltage Vth_L, and outputs a gear hold command when the sampled voltage signal Vfb is less than the upper threshold voltage Vth_H and greater than the lower threshold voltage Vth_L. The gear selectable drive unit 100 is configured with one of two gear modes: The first type is the fixed duty cycle mode: the duty cycle is constant, with higher duty cycles corresponding to higher operating frequencies and lower duty cycles corresponding to lower operating frequencies. The second type is the fixed frequency mode: the frequency is constant, with higher gears corresponding to higher drive duty cycles and lower gears corresponding to lower drive duty cycles; The selectable drive unit 100 receives the high gear command, low gear command, or gear hold command, and executes accordingly: the high gear performs energy conversion at a higher speed, the low gear performs energy conversion at a lower speed, and the gear hold command maintains the current speed of energy conversion; and it also performs buck or boost regulated output of the DC input voltage at the output of the non-isolated power conversion unit.

[0039] The non-isolated power conversion unit 200 is also used to control the DC output voltage Vout within a preset range based on the gear drive action of the gear selectable drive unit 100.

[0040] Furthermore, the non-isolated power conversion unit 200 includes an inductor, a capacitor, a freewheeling device, and / or a rectifier; the inductor, the capacitor, the freewheeling device, and / or the rectifier constitute a power conversion architecture, which converts the DC input voltage Vin into the DC output voltage Vout, and controls the DC output voltage Vout within a preset range based on the gear selectable drive unit 100.

[0041] In this implementation, the non-isolated power conversion unit 200 is a non-isolated DC / DC power conversion unit used to realize the conversion and transmission of electrical energy from the input end to the output end. This unit adopts a power topology without electrical isolation, and does not include isolated drive or isolated transmission functions. It only uses non-isolated components such as inductors, capacitors, and rectifiers to form a power conversion circuit, converting the input voltage into a stable output voltage. This unit does not have primary-secondary electrical isolation and belongs to the main body of non-isolated power conversion.

[0042] Furthermore, the power conversion architecture includes a single-inductor architecture, a dual-inductor architecture, or a multi-inductor architecture, wherein: The dual-inductor architecture or the multi-inductor architecture includes a main power inductor and an auxiliary voltage regulator inductor. The main power inductor and the auxiliary voltage regulator inductor can be connected in series, in parallel, or independently in dual-path configuration. The main power inductor is used for energy transmission and power output, and the auxiliary voltage regulator inductor is used to assist in adjusting the amplitude of the DC output voltage Vout and suppress the output ripple of the DC output voltage Vout, thereby converting the DC input voltage Vin into the DC output voltage Vout, and controlling the DC output voltage Vout within a preset threshold range based on the turn-off energy release action, the turn-on energy storage action and the hysteresis holding action.

[0043] In this implementation, the aforementioned non-isolated power conversion unit can adopt a single-inductor, dual-inductor, or even multi-inductor architecture. When a single-inductor architecture is adopted, a single power inductor independently completes energy storage, energy release, and power conversion, resulting in a very simple structure suitable for low-cost, low-power voltage regulation applications.

[0044] When using a dual-inductor or even multi-inductor architecture, including a main power inductor and an auxiliary voltage regulator inductor, the main power inductor and the auxiliary voltage regulator inductor can be connected in series, in parallel, or independently in dual-path configurations. The main power inductor is responsible for the main circuit energy transmission and power output, while the auxiliary voltage regulator inductor is used to assist in adjusting the output voltage amplitude, improve the voltage regulation rate, and suppress output ripple. Through the division of labor and cooperation between the main and auxiliary inductors, high-power energy transmission in the main circuit is guaranteed, while precise voltage regulation and optimized load transient response are achieved. Compared with conventional single-inductor topologies, this results in higher voltage regulation accuracy and stronger load adaptability.

[0045] Furthermore, the structure of the voltage signal sampling unit 300 includes one of the following: a voltage divider sampling structure, a direct sampling structure, a level clamping sampling structure, or a level normalization sampling structure.

[0046] In this implementation, the voltage signal sampling unit 300 is used to sample the output voltage value of the non-isolated power conversion unit. Through voltage division, direct sampling level conversion or normalization, a sampled voltage signal Vfb is formed that is adapted to be recognized by the subsequent dual-state comparison control unit 500. This unit is a pure hardware sampling structure that does not require auxiliary power supply and can quickly and stably obtain the output voltage state, providing accurate input for dual-state hardware discrimination.

[0047] Furthermore, the voltage signal sampling unit 300 can acquire the sampling voltage using pure hardware methods such as voltage division, direct sampling, level clamping, or level normalization. This unit does not require an independent auxiliary power supply or additional power supply; it can complete sampling and level conversion solely based on the output voltage itself. The circuit structure is simple, the signal is real-time with no delay, and there is no temperature drift distortion.

[0048] Furthermore, the digital voltage signal transmission link 400 is used to transmit the sampled voltage signal Vfb output by the voltage signal sampling unit 300 to the dual binary comparison control unit 500 in the form of digital discrete levels. The digital voltage signal transmission link 400 is a non-isolated direct transmission structure, which transmits voltage information using high and low level states throughout the process. It does not rely on weak analog voltage changes, analog current changes, or analog error signals to achieve closed-loop feedback. The link only transmits valid or invalid, high or low digital state information, error calculation, and loop compensation. It avoids the risks of loop temperature drift, signal attenuation, phase lag, and loop oscillation caused by analog transmission from the bottom layer. It has the characteristics of fast response, strong anti-interference ability, and simple and reliable structure.

[0049] Furthermore, the digital voltage signal transmission link 400 is a non-isolated direct transmission architecture, without any isolation devices. It requires no optocouplers, isolation transformers, magnetic isolation chips, or other isolation components. It directly transmits the sampling information output by the voltage signal sampling unit 300 as discrete digital high and low levels through a hardware path, representing a pure digital transmission method without any analog signal intervention. The core feature of this link is that it transmits digital state information corresponding to high or low levels, rather than the continuous voltage gradient signal or weak current signal found in traditional analog transmission. It reflects the relative relationship between the output voltage and a preset threshold solely through the effective or ineffective state of the digital level, without relying on minute changes in signal amplitude for feedback, thus fundamentally different from analog feedback links.

[0050] The dual-state comparison control unit adopts a digital comparison and discrimination architecture, which does not rely on error amplifiers, continuous analog feedback loops, loop compensation networks, PWM pulse width modulation circuits, and oscillation clock circuits. The comparison structure can be directly constructed through pure hardware circuits, or it can be adapted to digital chips to realize threshold comparison and command output. No complex digital algorithms and software programming are required for real-time control. Its control decision is only based on the comparison result of the sampled voltage and the dual thresholds. There are no risks of analog loop delay, phase lag, loop cumulative temperature drift, and loop oscillation. It has outstanding advantages such as extremely fast response speed, strong anti-interference ability, simplified circuit structure, and stable and reliable operation.

[0051] Furthermore, the preset upper and lower threshold voltages of the dual-state comparison control unit can be directly generated by a hardware circuit structure, which includes at least one of a resistor voltage divider structure, a Zener diode reference structure, a reference voltage diode structure, an RC charge-discharge reference structure, a resistor-Zener diode combination structure, or a resistor-capacitor-Zener diode combination structure; or they can be set and obtained by using a built-in integrated reference source of a digital chip or preset voltage parameters inside the chip, without the need for analog computing circuits, and without the need for an MCU or software algorithm to participate in the real-time threshold comparison process.

[0052] Furthermore, the dual-state comparison control unit 500 includes a first comparator, which is used to compare the sampled voltage signal Vfb with a preset upper threshold voltage Vth_H and a preset lower threshold voltage Vth_L, respectively. The first comparator outputs a low-gear command when the sampled voltage signal Vfb is greater than or equal to the upper threshold voltage Vth_H, outputs a high-gear command when the sampled voltage signal Vfb is less than or equal to the lower threshold voltage Vth_L, and outputs a gear-holding command when the sampled voltage signal Vfb is less than the upper threshold voltage Vth_H and greater than the lower threshold voltage Vth_L.

[0053] In this implementation, the dual-state comparison control unit 500 uses a first comparator to compare the sampled voltage signal Vfb with a preset upper threshold voltage Vth_H and a preset lower threshold voltage Vth_L, respectively, without the need for complex software algorithms for real-time discrimination. The preset upper and lower threshold voltages Vth_H and Vth_L can be directly generated through resistor voltage dividers, Zener diode references, or combinations of passive components. Alternatively, they can be set using an integrated reference source built into the digital chip and preset voltage parameters within the chip, without relying on analog computing circuits or continuous analog feedback loops. Specifically, this unit can use a Zener diode and resistors to form a passive threshold reference, combined with a single comparator to achieve hierarchical discrimination of dual thresholds. Alternatively, threshold parameter configuration and comparison logic can be implemented based on a digital chip. Both paths can meet the requirements of rapid discrimination and stable control.

[0054] Please refer to Figure 3 and Figure 4 The first embodiment of the present invention provides a non-isolated dual-state regulated power supply control device, wherein the selectable drive unit 100 includes a first MOSFET Q1, a second MOSFET Qa, and a third MOSFET Qb, a timer (preferred model 555 timer), a sixth resistor Ra, a seventh resistor Rb, and an eighth resistor Rc, a first capacitor C, and a second capacitor Cq1. In this embodiment, the first MOSFET Q1 is a PMOS transistor; the non-isolated power conversion unit 200 includes a first inductor L1, a freewheeling diode D1, and an output capacitor COUT, wherein the first inductor L1 is a main power inductor; the voltage signal sampling unit 300 includes a first resistor R1 and a second resistor R2; wherein: The drain of the first MOSFET Q1 receives the DC input voltage Vin, the source of the first MOSFET Q1 is electrically connected to the first terminal of the first inductor L1, and the gate of the first MOSFET Q1 receives the instruction from the dual two-state comparison control unit 500. The first terminal of the freewheeling diode D1 is electrically connected to the first terminal of the first inductor L1, and the second terminal of the freewheeling diode D1 is grounded to GND. The second terminal of the first inductor L1 is electrically connected to the first terminal of the output capacitor COUT. The second terminal of the output capacitor COUT is grounded to GND. The second terminal of the first inductor L1 and the first terminal of the output capacitor COUT output a DC output voltage Vout. The first end of the first resistor R1 is electrically connected to the second end of the first inductor L1, the second end of the first resistor R1 is electrically connected to the first end of the second resistor R2, the second end of the second resistor R2 is grounded to GND, and the second end of the first resistor R1 and the first end of the second resistor R2 process the DC output voltage Vout into a sampled voltage signal Vfb for output.

[0055] The sampled voltage signal Vfb is transmitted to the dual-state comparison control unit 500 through the digital voltage signal transmission link 400.

[0056] For further information, please continue to refer to [link / reference]. Figure 5 , Figure 5 yes Figure 3 and Figure 4A schematic diagram of the dual two-state comparison control unit 500 is shown in this embodiment. The dual two-state comparison control unit 500 includes a first comparator, a third resistor R3, a fourth resistor R4, and a fifth resistor R5. The non-inverting input of the first comparator receives a sampled voltage signal Vfb. The first terminal of the third resistor R3 receives a reference voltage, and the second terminal of the third resistor R3 is electrically connected to the first terminal of the fourth resistor R4, with the second terminal of the fourth resistor R4 grounded (GND). The second terminal of the third resistor R3 provides a threshold voltage to the inverting input of the first comparator. The output terminal of the first comparator is electrically connected to the inverting input of the first comparator through the fifth resistor R5, and is also electrically connected to the gate of the first MOS transistor Q1. When the output terminal of the first comparator is low, the inverting input of the first comparator receives a lower threshold voltage Vth_L; when the output terminal of the first comparator is high, the inverting input of the first comparator receives an upper threshold voltage Vth_H. Based on the above circuit structure, the first comparator compares the sampled voltage signal Vfb with a preset upper threshold voltage Vth_H and a preset lower threshold voltage Vth_L, respectively. Then, when the sampled voltage signal Vfb is greater than or equal to the upper threshold voltage Vth_H, it outputs a low gear command; when the sampled voltage signal Vfb is less than or equal to the lower threshold voltage Vth_L, it outputs a high gear command; and when the sampled voltage signal Vfb is less than the upper threshold voltage Vth_H and greater than the lower threshold voltage Vth_L, it outputs a gear hold command.

[0057] Furthermore, in another embodiment, the dual-state comparison control unit 500 includes a first comparator, a second comparator, and an RS flip-flop, wherein: The first comparator and the second comparator are used to compare the sampled voltage signal Vfb with a preset upper threshold voltage Vth_H and a preset lower threshold voltage Vth_L, respectively. Then, when the sampled voltage signal Vfb is greater than or equal to the upper threshold voltage Vth_H, the first digital signal is output; when the sampled voltage signal Vfb is less than or equal to the lower threshold voltage Vth_L, the second digital signal is output; and when the sampled voltage signal Vfb is less than the upper threshold voltage Vth_H and greater than the lower threshold voltage Vth_L, the third digital signal is output. The RS trigger is used to output a low gear command when receiving the first digital signal, a high gear command when receiving the second digital signal, and a gear hold command when receiving the third digital signal.

[0058] In this implementation, dual comparators are used to connect to the upper and lower thresholds respectively to complete the synchronous comparison between the sampled voltage and the dual thresholds, or a dual threshold range is set through a pure resistor voltage divider network, and the level state is determined by combining a diode clamping structure.

[0059] Regardless of the hardware combination used, the core is to directly construct the comparison structure through pure hardware circuits. It can also be adapted to digital chips to realize threshold comparison and instruction output, without the need for complex digital algorithms and software programming to participate in real-time control. Its control decision is only based on the comparison result of the sampled voltage and the dual thresholds. There are no risks of analog loop delay, phase lag, loop cumulative temperature drift and loop oscillation. It has outstanding advantages such as extremely fast response speed, strong anti-interference ability, simplified circuit structure and stable and reliable operation.

[0060] In the non-isolated dual-state regulated power supply control device provided in the first embodiment above, specific parameter configurations can be made for commonly used 5V DC power supply scenarios. (Refer to...) Figure 3 and Figure 4The output voltage is set to the nominal value of 5V, with a preset allowable fluctuation range of 4.9V to 5.1V. The first resistor R1 and the second resistor R2 in the voltage signal sampling unit 300 are both configured to 10kΩ, forming a 1:1 voltage sampling structure, so that when the DC output voltage Vout is 5V, the sampled voltage signal Vfb is 2.5V. The third resistor R3 and the fourth resistor R4 in the dual two-state comparison control unit 500 are also 10kΩ, connected in series between the 5V reference voltage and ground, providing a 2.5V center reference level to the inverting input of the first comparator. The output of the first comparator is fed back to this inverting input through a fifth resistor R5 with a value of 1MΩ, introducing a negative feedback hysteresis loop. When the comparator outputs a low level, the current injected through R5 pulls down the inverting input, resulting in an equivalent lower threshold voltage Vth_L of approximately 2.45V, corresponding to a lower threshold voltage of 4.9V at the output. When the comparator outputs a high level, the inverting input is pulled up, resulting in an equivalent upper threshold voltage Vth_H of approximately 2.55V, corresponding to an upper threshold voltage of 5.1V at the output. Therefore, when Vout rises above 5.1V and Vfb is greater than or equal to Vth_H, the first comparator flips and outputs a high level, turning on MOSFET Qa and turning off MOSFET Qb. The seventh resistor Rb and the first capacitor C generate a low-level frequency signal to control the first MOSFET Q1 to turn off and on, and the circuit enters the energy release stage. When Vout drops below 4.9V and Vfb is less than or equal to Vth_L, the comparator outputs a low level, turning off MOSFET Qa and turning on MOSFET Qb. The eighth resistor Rc and the first capacitor C generate a high-level frequency signal to control Q1 to turn off and on, and the circuit enters the energy storage stage. When Vout is between 4.9V and 5.1V, the comparator maintains its original output state and the corresponding level remains active, thus reliably constraining the output voltage within the preset threshold range and completely avoiding switching jitter at the unidirectional threshold boundary.

[0061] Furthermore, the drive unit 100 and the non-isolated power conversion unit 200 constitute a buck-type hardware topology.

[0062] Specifically, please refer to the Buck-type hardware topology architecture. Figure 6 Furthermore, the driving unit 100 includes a first MOSFET Q1, a second MOSFET Qa, and a third MOSFET Qb, a timer (preferably a 555 timer), a sixth resistor Ra, a seventh resistor Rb, and an eighth resistor Rc, a first capacitor C, a second capacitor Cq1, and a fourth NMOS transistor Q2. The non-isolated power conversion unit 200 includes an input capacitor, a first inductor L1, and an output capacitor COUT, wherein: One end of the input capacitor serves as the input terminal of the non-isolated dual-state regulated power supply control device, used to receive the DC input voltage Vin, and the other end of the input capacitor is grounded to GND. The first MOSFET Q1 is a PMOS transistor. The source of the first MOSFET Q1 serves as the input terminal of the non-isolated dual-state regulated power supply control device, used to receive the DC input voltage Vin. The drain of the first MOSFET Q1 is electrically connected to the first terminal of the first inductor L1. The gate of the first MOSFET Q1 is controlled by the dual-state comparison control unit 500. The source of the fourth NMOS transistor Q2 is grounded to GND, the drain of the fourth NMOS transistor Q2 is electrically connected to the first terminal of the first inductor L1, and the gate of the fourth NMOS transistor Q2 is controlled by the dual-state comparison control unit 500. The second end of the first inductor L1 serves as the output end of the non-isolated dual-state regulated power supply control device, used to receive the DC output voltage Vout. One end of the output capacitor COUT serves as the output terminal of the non-isolated dual-state regulated power supply control device, used to receive the DC output voltage Vout, and the other end of the output capacitor COUT is grounded to GND.

[0063] In this implementation, the non-isolated power conversion unit 200 adopts a synchronous buck converter structure, with the first MOS transistor Q1 as the main switch and the fourth NMOS transistor Q2 as the synchronous rectifier, forming a complete Buck converter circuit in conjunction with the input capacitor, the first inductor L1 and the output capacitor COUT. When the sampled voltage signal Vfb is greater than or equal to the upper threshold voltage Vth_H, the dual-state comparator control unit 500 receives the first digital signal and outputs a low-level signal. The second MOSFET Qa is turned on, and the third MOSFET Qb is turned off. The seventh resistor Rb and the first capacitor C generate a low-level frequency signal to control the turning off and on of the first MOSFET Q1 and the fourth NMOS transistor Q2. The first inductor L1 freewheels through the synchronous rectified NMOS transistor and releases the stored energy to the load and the output capacitor COUT. When the sampled voltage signal Vfb is less than or equal to the lower threshold voltage Vth_L, the dual-state comparator control unit 500 receives the second digital signal and outputs a high-level signal. The second MOSFET Qa is turned off, and the third MOSFET Qb is turned on. The eighth resistor Rc and the first capacitor C generate a high-level frequency signal to control the turning on and off of the first MOSFET Q1 and the fourth NMOS transistor Q2. The input energy is delivered to the output capacitor COUT and the load through the first inductor L1, and the current in the first inductor L1 increases to store energy. This synchronous rectification architecture can effectively reduce the conduction loss in the freewheeling stage. Combined with the aforementioned dual-state comparison control unit 500 and the dual-threshold feedback control mechanism of the dual-state comparison control unit 500, it can maintain high DC conversion efficiency under both light and heavy load conditions. Moreover, the control and drive logic is simple and can achieve complementary drive without additional control signals or clock crystals.

[0064] Please refer to Figure 7 and Figure 8 Furthermore, the voltage signal sampling unit 300 includes a first resistor R1, a second resistor R2, a first Zener diode ZD1, a second Zener diode ZD2, a first Zener resistor Rz1, and a second Zener resistor Rz2, wherein: The first end of the first resistor R1 is used to acquire the output of the non-isolated dual-state regulated power supply control device and to receive the sampled voltage signal Vfb of the DC output voltage Vout. The second end of the first resistor R1 is used to feed the sampled voltage signal Vfb back to the dual-state comparator circuit. One end of the second resistor R2 is electrically connected to the second end of the first resistor R1, and the other end of the second resistor R2 is grounded to GND. The first terminal of the first voltage regulator resistor Rz1 is electrically connected to the first terminal of the first resistor R1; The anode of the first Zener diode ZD1 is connected to GND, the cathode of the first Zener diode ZD1 is electrically connected to the second terminal of the first Zener resistor Rz1, and the cathode of the first Zener diode ZD1 is used to generate the upper threshold voltage Vth_H. The first terminal of the second voltage regulator resistor Rz2 is electrically connected to the first terminal of the first resistor R1; The anode of the second Zener diode ZD2 is connected to GND, and the cathode of the second Zener diode ZD2 is electrically connected to the second terminal of the second Zener resistor Rz2. The cathode of the second Zener diode ZD2 is used to generate the lower threshold voltage Vth_L.

[0065] In this implementation, the voltage signal sampling unit 300 uses a voltage divider network formed by a first resistor R1 and a second resistor R2 to transmit the sampled voltage signal Vfb to the dual two-state comparison control unit 500 via proportional feedback. Furthermore, this implementation utilizes a first Zener diode ZD1 and its peripheral first Zener resistor Rz1. After the sampled voltage signal Vfb is introduced through the first output resistor Rout1, a stable and independent upper threshold voltage Vth_H is generated at the cathode of the first Zener diode ZD1 based on the reference voltage of the Zener diode and the voltage division relationship of the resistor. Similarly, the lower threshold voltage Vth_L is generated by the lower limit branch formed by the second Zener diode ZD2 and the second Zener resistor Rz2. These upper and lower threshold voltages Vth_L are determined by the reference voltage and resistance ratio of the Zener diodes, eliminating the need for an external reference source and being independent of input voltage fluctuations. This allows for the long-term output of a stable threshold voltage, thus providing stable voltage boundaries for the dual two-state comparison and hysteresis control.

[0066] Please refer to Figure 7 and reference Figure 9In another possible embodiment, the voltage signal sampling unit 300 includes a first resistor R1, a second resistor R2, a first output resistor Rout1, a reference voltage source U1, a first voltage regulator Rz1, a second voltage regulator Rz2, and a third voltage regulator, wherein: The first end of the first resistor R1 is used to acquire the output of the non-isolated dual-state regulated power supply control device and to receive the sampled voltage signal Vfb of the DC output voltage Vout. The second end of the first resistor R1 is used to feed the sampled voltage signal Vfb back to the dual-state comparator circuit. One end of the second resistor R2 is electrically connected to the second end of the first resistor R1, and the other end of the second resistor R2 is grounded to GND. The first terminal of the first output resistor Rout1 is electrically connected to the first terminal of the first resistor R1, the second terminal of the first output resistor Rout1 is electrically connected to the first terminal of the first voltage regulator Rz1, the second terminal of the first voltage regulator Rz1 is electrically connected to the first terminal of the second voltage regulator Rz2, the second terminal of the second voltage regulator Rz2 is electrically connected to the first terminal of the third voltage regulator Rz3, and the second terminal of the third voltage regulator Rz3 is grounded to GND. The anode of the reference voltage source U1 is electrically connected to the second terminal of the third voltage regulator Rz3, the reference terminal of the reference voltage source U1 is electrically connected to the first terminal of the first voltage regulator Rz1, and the cathode of the reference voltage source U1 is electrically connected to the second terminal of the first output resistor Rout1. The second terminal of the first voltage regulator Rz1 is used to generate the upper threshold voltage Vth_H, and the second terminal of the second voltage regulator Rz2 is used to generate the lower threshold voltage Vth_L.

[0067] Please refer to Figure 7 Furthermore, the dual-state comparison control unit 500 includes a first comparator and a second comparator, wherein: The non-inverting input of the first comparator is used to receive the sampled voltage signal Vfb, and the inverting input of the first comparator is used to receive the upper threshold voltage Vth_H; The non-inverting input of the second comparator is used to receive the lower threshold voltage Vth_L, and the inverting input of the second comparator is used to receive the sampled voltage signal Vfb; The output terminals Control_1 of the first comparator and Control_2 of the second comparator are used to jointly output the low gear command, the high gear command, or the gear hold command.

[0068] Preferably, the first comparator and the second comparator can be of model LMV7219.

[0069] In this implementation, the dual-state comparison control unit 500 consists of a first comparator and a second comparator, which respectively undertake the comparison tasks of the sampled voltage signal Vfb with the upper threshold voltage Vth_H and the lower threshold voltage Vth_L. The non-inverting input of the first comparator is connected to the sampled voltage signal Vfb, and the inverting input is connected to the upper threshold voltage Vth_H. When the sampled voltage signal Vfb is greater than or equal to the upper threshold voltage Vth_H, its output level flips to a high level. The non-inverting input of the second comparator is connected to the lower threshold voltage Vth_L, and the inverting input is connected to the sampled voltage signal Vfb. When the sampled voltage signal Vfb is less than or equal to the lower threshold voltage Vth_L, its output level flips to a high level. The outputs of the two comparators together form three logic combinations: a high output from the first comparator and a low output from the second comparator correspond to a low gear command; a low output from the first comparator and a high output from the second comparator correspond to a high gear command; and a low output from the first comparator and a low output from the second comparator correspond to a gear hold command. This dual comparator structure eliminates the need for complex analog circuitry or additional decoding logic using window comparators. It achieves clear three-state output decisions with just two general-purpose comparators, resulting in low circuit cost, short response delay, and inherent hysteresis characteristics to prevent oscillations at the output boundaries.

[0070] Please refer to Figure 10 Furthermore, the dual-state comparison control unit 500 includes an RS flip-flop, the reset terminal R and the set terminal S of the RS flip-flop being used to receive the low gear command, the high gear command, or the gear hold command, and the inverting output terminal of the RS flip-flop... It is electrically connected to the gate of the first MOS transistor Q1 and the gate of the fourth NMOS transistor Q2.

[0071] Please refer to Figure 11 In this implementation, the dual-state comparison control unit 500 is composed of an RS flip-flop. Its reset terminal R and set terminal S are used to receive low-level and high-level commands generated by the dual-state comparison control unit 500, respectively. When the sampled voltage signal Vfb is greater than or equal to the upper voltage threshold, a low-level command is generated, causing the reset terminal R to receive a high-level signal output from the first comparator output terminal Control_1, and the set terminal S to receive a low-level signal output from the second comparator output terminal Control_2, thus resetting the RS flip-flop and inverting the output terminal. The voltage level is set to high, which simultaneously acts on the selectable drive unit 100, turning on MOSFET Qa and turning off MOSFET Qb. The seventh resistor Rb and the first capacitor C generate a low-level frequency signal to control the first MOSFET Q1 to turn off and the fourth NMOS transistor Q2 to turn on, thereby controlling the shutdown and energy storage of the non-isolated power conversion unit 200 and the release of energy from the first inductor L1. When the sampled voltage signal Vfb is less than or equal to the lower threshold voltage Vth_L, a high-level command is generated, causing the reset terminal R to receive a low-level signal from the first comparator output terminal Control_1, and the set terminal S to receive a high-level signal from the second comparator output terminal Control_2, setting the RS flip-flop and inverting the output terminal. When the voltage level drops to low, it acts on the selectable drive unit 100, turning off MOSFET Qa and turning on MOSFET Qb. The eighth resistor Rc and the first capacitor C generate a high-level frequency signal to control the first MOSFET Q1 to turn on and the fourth NMOS transistor Q2 to turn off, entering the conduction and energy storage stage. When the sampled voltage signal Vfb is between the upper threshold voltage Vth_H and the lower threshold voltage Vth_L, both inputs of the RS flip-flop are low, its output state is maintained, and the power topology unit enters the hysteresis region, maintaining the previous switching state, that is, maintaining the current switching state.

[0072] Furthermore, the drive unit 100 and the non-isolated power conversion unit 200 constitute a boost-type hardware topology.

[0073] Specifically, please refer to the Boost-type hardware topology architecture. Figure 12 The non-isolated power conversion unit 200 includes a second inductor L2, a rectifier diode D2, and an output capacitor COUT. The selectable drive unit 100 is an NMOS transistor. One end of the second inductor L2 serves as the input terminal of the non-isolated dual-state regulated power supply control device, used to receive the DC input voltage Vin. The other end of the second inductor L2 is electrically connected to the anode of the rectifier diode D2. The cathode of the rectifier diode D2 serves as the output terminal of the non-isolated dual-state regulated power supply control device, used to receive the DC output voltage Vout. The output terminal of the selectable drive unit 100 is electrically connected to the anode of the rectifier diode D2, and the control terminal of the selectable drive unit 100 is controlled by the dual two-state comparison control unit 500. One end of the output capacitor COUT serves as the output terminal of the non-isolated dual-state regulated power supply control device, used to receive the DC output voltage Vout, and the other end of the output capacitor COUT is grounded to GND.

[0074] In this implementation, another circuit configuration for the non-isolated power conversion unit 200 is provided. The non-isolated power conversion unit 200 is configured as a Boost topology with a boost converter structure. When the dual two-state comparator control unit 500 outputs a low-level command, and the selectable drive unit 100 generates a low-level frequency control signal based on the command from the dual two-state comparator control unit 500, the inductor current flows through the rectifier diode D2 to the output capacitor COUT and the load. The voltage induced on the inductor is superimposed on the input voltage and released to the output terminal, making the sampled voltage signal Vfb higher than the input voltage. When the dual two-state comparator control unit 500 outputs a high-level command, and the selectable drive unit 100 generates a low-level frequency control signal, the inductor current increases linearly and stores energy in the form of a magnetic field. This boost topology, in conjunction with the first and second comparators of the dual two-state comparator control unit 500 described in the previous embodiment, can also achieve clock-hysteresis-free regulation. The sampled voltage signal Vfb is precisely constrained within a window defined by an upper and lower threshold, making it suitable for applications with low input voltage and requiring boost output. Furthermore, the circuit structure is simple and the number of components is small.

[0075] Please refer to Figure 12 and Figure 13 Furthermore, the dual-state comparison control unit 500 includes an RS flip-flop, the reset terminal R and the set terminal S of the RS flip-flop are used to receive the low gear command, the high gear command, or the gear hold command, and the output terminal Q of the RS flip-flop is electrically connected to the gate of the optional drive unit 100, which is an NMOS transistor. In the figure, this port is labeled Q3_gate.

[0076] It should also be noted that, in this embodiment of the boost topology non-isolated dual-state regulated power supply control device, the voltage signal sampling unit 300 and the dual-state comparison control unit 500 can adopt the above-described... Figure 6 and Figure 7 The circuit structure shown, or the circuit structure described above, is as follows: Figure 6 and Figure 8 The circuit structure shown is shown.

[0077] Please refer to Figure 14In this implementation, the dual-state comparator control unit 500 is still implemented by an RS flip-flop. Its reset terminal R and set terminal S are respectively connected to the first comparator output terminal Control_1 and the second comparator output terminal Control_2 of the dual-state comparator control unit 500 described in the previous embodiment. Its output terminal Q is directly connected to the gate of the optional driving unit 100, which acts as an NMOS transistor in the boost topology. When the sampled voltage signal Vfb is greater than or equal to the upper limit voltage threshold, a low-level command is generated, causing the reset terminal R to receive a high-level signal from the first comparator output terminal Control_1, and the set terminal S to receive a low-level signal from the second comparator output terminal Control_2. The reset signal causes the RS flip-flop to output a low level, and the optional driving unit 100 generates a low-level frequency signal to control the optional driving unit 100, which acts as an NMOS transistor, to turn on and off. The second inductor L2 releases energy and supplies power to the output terminal through the rectifier diode D2. When the sampled voltage signal Vfb is less than or equal to the lower threshold voltage Vth_L, a high-level command is generated, causing the reset terminal R to receive a low-level signal from the first comparator output terminal Control_1, and the set terminal S to receive a high-level signal from the second comparator output terminal Control_2. The set signal causes the RS flip-flop to output a high level, and the selectable drive unit 100 generates a high-level frequency signal to control the selectable drive unit 100, which acts as an NMOS transistor, to turn on and off, while the second inductor L2 stores energy. When the sampled voltage signal Vfb is between the upper threshold voltage Vth_H and the lower threshold voltage Vth_L, both input terminals of the RS flip-flop are at a low level, its output state is maintained, the power topology unit enters the hysteresis interval, maintaining the previous switching state, that is, maintaining the current gear state.

[0078] In the above implementation, the optional drive unit 100 adopts a pure hardware controlled switch path architecture, receives the threshold discrimination command output by the dual two-state comparison control unit 500, and correspondingly realizes the high-level, low-level and hysteresis interval of the controllable switching device in the subsequent power topology. The optional drive unit 100 directly receives status commands from the dual binary comparison control unit 500, and relies on pure hardware path logic to follow the on / off state of the commands, directly controlling the working state of the controllable switching devices in the subsequent power topology.

[0079] When the dual-state comparison control unit 500 determines that the voltage is lower than or equal to the preset lower threshold based on the sampled voltage signal Vfb and issues a high-level command, the selectable drive unit 100 outputs a high-level frequency signal to turn the controllable switching device on and off, using the high-level command as inductor energy storage. When the dual-state comparison control unit 500 determines that the voltage signal Vfb is higher than or equal to the preset upper limit threshold and issues a low-level command, the selectable drive unit 100 outputs a low-level frequency signal to reliably turn on and off the controllable switching device, and delivers energy to the inductor with the low-level command. When the sampled voltage signal Vfb falls within the hysteresis interval formed by the upper and lower thresholds, the dual two-state comparison control unit 500 maintains the original command unchanged, and the selectable drive unit 100 maintains the current gear state accordingly, locking the existing switch working state, avoiding frequent switching of the device caused by minor voltage disturbances, effectively suppressing switch bounce and reducing additional switching losses.

[0080] This unit uses pure hardware circuitry to directly construct the comparison structure, and can also be adapted to digital chips to realize threshold comparison and command output. It does not require complex digital algorithms and software programming to participate in real-time control. Its control decision is only based on the comparison result of the sampled voltage and the dual thresholds. It can be adapted to various non-isolated power topologies such as buck and boost, and has strong versatility and high working stability.

[0081] A third aspect of the present invention provides a non-isolated dual-state regulated power supply control system, comprising a power supply unit, an output interface, and a non-isolated dual-state regulated power supply control device as described in any of the above embodiments, wherein: The power supply unit is used to provide a DC input voltage Vin to the non-isolated dual-state regulated power supply control device, and the output interface is used to transmit the DC output voltage Vout of the non-isolated dual-state regulated power supply control device to an external load.

Claims

1. A control method for a non-isolated dual-state regulated power supply, characterized in that, include: A non-isolated power conversion unit is used to receive a DC input voltage and convert the DC input voltage into a DC output voltage. The DC output voltage is sampled by a voltage signal sampling unit and processed into a sampled voltage signal. The sampled voltage signal is transmitted to the dual-state comparison control unit in a digital discrete level manner through a digital voltage signal transmission link; The dual-state comparison control unit compares the sampled voltage signal with a preset upper threshold voltage and a preset lower threshold voltage respectively. Then, when the sampled voltage signal is greater than or equal to the upper threshold voltage, it outputs a low gear command; when the sampled voltage signal is less than or equal to the lower threshold voltage, it outputs a high gear command; and when the sampled voltage signal is less than the upper threshold voltage and greater than the lower threshold voltage, it outputs a gear hold command. The gear selectable drive unit can be configured to either a fixed duty cycle mode or a fixed frequency mode. In the fixed duty cycle mode, the duty cycle is kept constant, and the drive frequency increases when the high gear command is received and decreases when the low gear command is received. In the fixed frequency mode, the frequency is kept constant, and the duty cycle increases when the high gear command is received and decreases when the low gear command is received. The selectable drive unit adjusts the energy transmission rate according to the received gear command. When receiving the high gear command, it speeds up energy transmission; when receiving the low gear command, it slows down energy transmission; and when receiving the gear hold command, it maintains the current working state, so that the DC output voltage of the non-isolated power conversion unit is stabilized within a preset voltage range.

2. A non-isolated dual-state regulated power supply control device, characterized in that, It includes a selectable drive unit, a non-isolated power conversion unit, a voltage signal sampling unit, a digital voltage signal transmission link, and a dual-state comparison control unit, wherein: The non-isolated power conversion unit is used to obtain the DC input voltage and then convert the DC input voltage into a DC output voltage; The voltage signal sampling unit is used to acquire the DC output voltage and process the DC output voltage into a sampled voltage signal. The digital voltage signal transmission link is used to transmit the sampled voltage signal to the dual-state comparison control unit in digital discrete level form; The dual-state comparison control unit is used to compare the sampled voltage signal with a preset upper threshold voltage and a preset lower threshold voltage respectively, and then output a low gear command when the sampled voltage signal is greater than or equal to the upper threshold voltage, output a high gear command when the sampled voltage signal is less than or equal to the lower threshold voltage, and output a gear hold command when the sampled voltage signal is less than the upper threshold voltage and greater than the lower threshold voltage. The selectable gear drive unit can be configured with either a fixed duty cycle mode or a fixed frequency mode. In the fixed duty cycle mode, the duty cycle is kept constant, and the drive frequency increases when the high gear command is received and decreases when the low gear command is received. In the fixed frequency mode, the frequency is kept constant, and the duty cycle increases when the high gear command is received and decreases when the low gear command is received. The selectable drive unit adjusts the energy transmission rate according to the received gear command. When receiving the high gear command, it speeds up energy transmission; when receiving the low gear command, it slows down energy transmission; and when receiving the gear hold command, it maintains the current working state, so that the DC output voltage of the non-isolated power conversion unit is stabilized within a preset voltage range, and the DC input voltage is stepped down or stepped up and regulated at the output terminal of the non-isolated power conversion unit.

3. The non-isolated dual-state regulated power supply control device according to claim 2, characterized in that, The non-isolated power conversion unit includes an inductor, a freewheeling device, and / or a rectifier; the inductor, the freewheeling device, and / or the rectifier constitute a power conversion architecture, which converts the DC input voltage into the DC output voltage and controls the DC output voltage within a preset range based on the drive of the selectable drive unit.

4. The non-isolated dual two-state regulated power supply control device according to claim 3, characterized in that, The power conversion architecture includes a single-inductor architecture, a dual-inductor architecture, or a multi-inductor architecture, wherein: The dual-inductor architecture or the multi-inductor architecture includes a main power inductor and an auxiliary voltage regulator inductor. The main power inductor and the auxiliary voltage regulator inductor can be connected in series, in parallel, or independently in dual-path configuration. The main power inductor is used for energy transmission and power output, and the auxiliary voltage regulator inductor is used to assist in adjusting the amplitude of the DC output voltage and suppressing the output ripple of the DC output voltage, thereby converting the DC input voltage into the DC output voltage, and controlling the DC output voltage within a preset range based on the drive of the selectable drive unit.

5. A non-isolated dual-state regulated power supply control device according to claim 2, characterized in that, The structure of the voltage signal sampling unit includes at least one of the following: voltage divider sampling structure, direct sampling structure, level clamping sampling structure, or level normalization sampling structure.

6. A non-isolated dual-state regulated power supply control device according to claim 2, characterized in that, The dual-state comparison control unit includes a first comparator, which is used to compare the sampled voltage signal with a preset upper threshold voltage and a preset lower threshold voltage, respectively. Then, when the sampled voltage signal is greater than or equal to the upper threshold voltage, it outputs a low gear command; when the sampled voltage signal is less than or equal to the lower threshold voltage, it outputs a high gear command; and when the sampled voltage signal is less than the upper threshold voltage and greater than the lower threshold voltage, it outputs a gear hold command.

7. A non-isolated dual-state regulated power supply control device according to claim 2, characterized in that, The dual-state comparison control unit includes a first comparator, a second comparator, and an RS flip-flop, wherein: The first comparator and the second comparator are used to compare the sampled voltage signal with a preset upper threshold voltage and a preset lower threshold voltage, respectively, and then output a first digital signal when the sampled voltage signal is greater than or equal to the upper threshold voltage, output a second digital signal when the sampled voltage signal is less than or equal to the lower threshold voltage, and output a third digital signal when the sampled voltage signal is less than the upper threshold voltage and greater than the lower threshold voltage. The RS trigger is used to output a low gear command when receiving the first digital signal, output a high gear command when receiving the second digital signal, and maintain the current output state and output an equivalent gear hold command when receiving the third digital signal.

8. A non-isolated dual-state regulated power supply control device according to any one of claims 2, 6, or 7, characterized in that, The comparison threshold voltage of the dual-state comparison control unit is not limited to two preset upper threshold voltages and preset lower threshold voltages, but can also be configured with multiple intermediate threshold voltages that increase or decrease sequentially. The dual-state comparison control unit compares the sampled voltage signal with the plurality of intermediate threshold voltages respectively, and then outputs a variety of gear control commands to the gear selectable drive unit to improve the accuracy of the command output of the dual-state comparison control unit, thereby optimizing the DC output voltage stability accuracy of the non-isolated power conversion unit.

9. A non-isolated dual-state regulated power supply control device according to claim 2, characterized in that, The selectable drive unit and the non-isolated power conversion unit constitute a buck-type hardware topology. The selectable drive unit, in conjunction with the drive control of the dual two-state comparison control unit, enables the non-isolated power conversion unit to operate in buck-regulated mode.

10. A non-isolated dual-state regulated power supply control device according to claim 2, characterized in that, The selectable drive unit and the non-isolated power conversion unit constitute a boost-type hardware topology. The selectable drive unit, in conjunction with the drive control of the dual binary comparator control unit, enables the non-isolated power conversion unit to operate in boost regulation mode.

11. A non-isolated dual-state regulated power supply control device according to claim 2, characterized in that, The preset upper threshold voltage and preset lower threshold voltage of the dual two-state comparison control unit can be generated by a hardware circuit structure, which includes at least one of a resistor voltage divider structure, a Zener diode reference structure, a reference voltage diode structure, an RC charge-discharge reference structure, a resistor-Zener diode combination structure, or a resistor-capacitor-Zener diode combination structure. The preset upper threshold voltage and preset lower threshold voltage of the dual two-state comparison control unit can be set and obtained by using the built-in integrated reference source of the digital chip and the preset voltage parameters inside the chip.

12. A non-isolated dual-state regulated power supply control device according to claim 8, characterized in that, When the dual-state comparison control unit compares the sampled voltage signal with the plurality of intermediate threshold voltages respectively, and then outputs a variety of gear control commands to the gear selectable drive unit, the gear selectable drive unit synchronously matches each of the gear control commands to set multiple output gears, and outputs different levels of output gears according to the various gear control commands, thereby realizing multi-gradient gear-type energy conversion control.

13. A non-isolated dual two-state regulated power supply control system, characterized in that, Includes a power supply unit, an output interface, and a non-isolated dual-state regulated power supply control device as described in any one of claims 2 to 12, wherein: The power supply unit is used to provide DC input voltage to the non-isolated dual-state regulated power supply control device, and the output interface is used to transmit the DC output voltage of the non-isolated dual-state regulated power supply control device to an external load.

Images