A clock calibration method and apparatus, an electronic device, and a medium

Abstract

The application discloses a clock calibration method and device, electronic equipment and medium, and belongs to the technical field of data processing. The method comprises the following steps: in response to a triggered clock automatic calibration event, simultaneously starting a first clock and a second clock to count; wherein the first clock is used as a reference clock source, the second clock is used as a to-be-calibrated clock source of a real-time clock, the frequency of the first clock is greater than the frequency of the second clock; when the count value of the second clock reaches a preset first count threshold, the first clock and the second clock are simultaneously stopped from counting, and the count value of the first clock at the time of stopping counting is recorded; the actual frequency value of the second clock is calculated according to the count value, the frequency information of the first clock and the first count threshold; the frequency deviation value is determined according to the difference between the actual frequency value and an ideal frequency value; and the real-time clock is calibrated based on the frequency deviation value. The traditional calibration link is simplified, the calibration is completed by a hardware closed loop, software participation is not needed, and automatic calibration is realized.

Description

Technical Field

[0001] This application belongs to the field of data processing technology, specifically relating to a clock calibration method, apparatus, electronic device, and medium. Background Technology

[0002] Current clock calibration solutions achieve accuracy calibration through software or a combination of hardware and software. Because software is involved in the calibration process, true automation is not possible. Therefore, it is difficult to meet the requirements of balancing power consumption and real-time performance. Summary of the Invention

[0003] The purpose of this application is to provide a clock calibration method, apparatus, electronic device, and medium that can solve the technical problem that clocks cannot be automatically calibrated.

[0004] To solve the above-mentioned technical problems, this application is implemented as follows: In a first aspect, embodiments of this application provide a clock calibration method, the method comprising: In response to a triggered automatic clock calibration event, both a first clock and a second clock are started to count; wherein, the first clock serves as a reference clock source, and the second clock serves as the real-time clock to be calibrated, and the accuracy of the first clock is greater than that of the second clock. When the count value of the second clock reaches the preset first count threshold, control the first clock and the second clock to stop counting simultaneously, and record the count value when the first clock stops counting; The actual frequency value of the second clock is calculated based on the count value, the frequency information of the first clock, and the first count threshold. The frequency deviation value is determined based on the difference between the actual frequency value and the ideal frequency value; The real-time clock is calibrated based on the frequency deviation value.

[0005] Optionally, calculating the actual frequency value of the second clock based on the count value, the frequency information of the first clock, and the first count threshold includes: The first product is obtained by multiplying the frequency information of the first clock by the first counting threshold. Dividing the first product by the count value yields the actual frequency value of the second clock.

[0006] Optionally, calibrating the real-time clock based on the frequency deviation value includes: Obtain the frequency division coefficient of the real-time clock; The calibration pulse insertion amount or calibration pulse reduction amount is obtained based on the frequency deviation value and the frequency division coefficient. The calibration pulse insertion amount or calibration pulse reduction amount is written into the second period calibration register of the real-time clock to compensate for the second timing accuracy of the real-time clock.

[0007] Optionally, obtaining the calibration pulse insertion amount or calibration pulse reduction amount based on the frequency deviation value and the frequency division coefficient includes: The actual frequency value is generated based on the frequency deviation value and the frequency division coefficient; If the actual frequency value is greater than the ideal frequency value, divide the frequency deviation value by the frequency division coefficient to obtain the calibration pulse insertion amount; If the actual frequency value is less than or equal to the ideal frequency value, the frequency deviation value is divided by the frequency division coefficient to obtain the calibration pulse reduction amount.

[0008] Optionally, the step of simultaneously starting the first clock and the second clock to count in response to a triggered automatic clock calibration event includes: Obtain the real-time temperature of the second clock; When the chip enters STOP mode, it is determined whether the real-time temperature triggers an automatic clock calibration event. When the real-time temperature triggers an automatic clock calibration event, in response to the triggered automatic clock calibration event, the first clock and the second clock are started to count simultaneously.

[0009] Optionally, determining whether the real-time temperature triggers an automatic clock calibration event includes: Obtain the correspondence between temperature changes and the accuracy changes of the real-time clock; The target temperature change within a preset time period is determined based on the real-time temperature. The target accuracy change of the real-time clock is determined based on the target temperature change and the corresponding relationship. The automatic clock calibration event is triggered based on the change in the target accuracy.

[0010] Optionally, the step of simultaneously starting the first clock and the second clock to count in response to a triggered automatic clock calibration event includes: When the chip enters STOP mode, it triggers an automatic clock calibration event at preset time intervals. In response to a triggered automatic clock calibration event, both the first and second clocks are started for counting.

[0011] Secondly, embodiments of this application provide a clock calibration device, the method comprising: An automatic calibration trigger module is used to respond to a triggered automatic clock calibration event and simultaneously start a first clock and a second clock to count; wherein, the first clock serves as a reference clock source, the second clock serves as the real-time clock to be calibrated, and the accuracy of the first clock is greater than that of the second clock; The count value determination module is used to control the first clock and the second clock to stop counting simultaneously when the count value of the second clock reaches a preset first count threshold, and to record the count value when the first clock stops counting; The actual frequency value calculation module is used to calculate the actual frequency value of the second clock based on the count value, the frequency information of the first clock, and the first count threshold. The frequency deviation value determination module is used to determine the frequency deviation value based on the difference between the actual frequency value and the ideal frequency value. A clock calibration module is used to calibrate the real-time clock based on the frequency deviation value.

[0012] Thirdly, embodiments of this application provide an electronic device including a processor, a memory, and a program or instructions stored in the memory and executable on the processor, wherein the program or instructions, when executed by the processor, implement the steps of the method described in the first aspect.

[0013] Fourthly, embodiments of this application provide a readable storage medium on which a program or instructions are stored, which, when executed by a processor, implement the steps of the method described in the first aspect.

[0014] Fifthly, embodiments of this application provide a chip, the chip including a processor and a communication interface, the communication interface being coupled to the processor, the processor being used to run programs or instructions to implement the method as described in the first aspect.

[0015] In this embodiment, the system can respond to a triggered automatic clock calibration event by simultaneously starting a first clock and a second clock to count; then, when the count value of the second clock reaches a preset first counting threshold, the system controls the first clock and the second clock to stop counting simultaneously, and records the count value when the first clock stops counting; based on the count value, the frequency information of the first clock, and the first counting threshold, the system calculates the actual frequency value of the second clock; based on the difference between the actual frequency value and the ideal frequency value, the system determines the frequency deviation value; and calibrates the real-time clock based on the frequency deviation value. This method can perform clock calibration by combining a high-precision clock and a low-precision clock, simplifying the traditional calibration chain. The entire calibration process is completed in a hardware closed loop without software intervention, achieving true automated calibration. Attached Figure Description

[0016] Figure 1 This is a flowchart illustrating the steps of a clock calibration method according to an embodiment of this application; Figure 2 This is a flowchart illustrating the steps of another clock calibration method in an embodiment of this application; Figure 3 This is a schematic diagram of the structure of a clock calibration device according to an embodiment of this application; Figure 4 This is a schematic diagram of the structure of an electronic device according to an embodiment of this application. Detailed Implementation

[0017] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0018] The terms "first," "second," etc., used in the specification and claims of this application are used to distinguish similar objects and not to describe a specific order or sequence. It should be understood that such use of data can be interchanged where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein. Furthermore, in the specification and claims, "and / or" indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.

[0019] The clock calibration method provided in this application will be described in detail below with reference to the accompanying drawings, through specific embodiments and application scenarios.

[0020] like Figure 1 The diagram shown is a flowchart illustrating the steps of a clock calibration method according to an embodiment of this application. The specific steps are as follows: Step S101: In response to the triggered automatic clock calibration event, both the first clock and the second clock are started to count. Wherein, the first clock serves as a reference clock source, specifically the second clock serves as the real-time clock to be calibrated, and the accuracy of the first clock is greater than that of the second clock; The clock calibration system described in this application may include a clock calibration module. The clock calibration module may integrate two counters (such as a 32-bit counter). The clock source for one counter is a precise clock, and the frequency corresponding to the high-speed internal resistor-capacitor oscillator (HIRC) can be 8MHz, which is the first clock. The clock source for the other counter is a low-speed internal resistor-capacitor oscillator (LIRC), and the ideal frequency in this scheme is 32.768kHz, which is the second clock.

[0021] The system can pre-set an automatic clock calibration event. When the system detects an automatic clock calibration event in the current state, it can trigger clock calibration and simultaneously start the first and second clocks for counting.

[0022] In one embodiment of this application, an automatic clock calibration event can be set based on the relationship between temperature and clock accuracy. The specific process is as follows: obtain the real-time temperature of the second clock; when the chip enters STOP mode, determine whether the real-time temperature triggers an automatic clock calibration event; when it is determined that the real-time temperature triggers an automatic clock calibration event, in response to the triggered automatic clock calibration event, start the first clock and the second clock to count simultaneously.

[0023] In practical applications, a system used for clock calibration may include a temperature detection trigger module. The temperature detection trigger module is equipped with a temperature sensor that can detect the real-time temperature of the current environment. Specifically, the temperature sensor detection voltage Vtemp is the detection output object. The temperature sensor acquisition voltage module collects the current chip temperature and converts it into a voltage output, which serves as the reference input for the digital-to-analog converter (DAC).

[0024] The hardware circuitry of the temperature sensing module is located near the LIRC module to more accurately monitor the real-time temperature changes of the LIRC. Given that the accuracy of the LIRC changes with temperature in a unique, step-by-step linear curve, this embodiment will set the constant accuracy rate of change Rd of the LIRC and the CheckNum temperature zone levels based on this curve.

[0025] In one embodiment of this application, determining whether the real-time temperature triggers an automatic clock calibration event includes: obtaining the correspondence between temperature changes and the accuracy changes of the real-time clock; determining a target temperature change within a preset time based on the real-time temperature; determining the target accuracy change in real time based on the target temperature change and the correspondence; and determining whether an automatic clock calibration event is triggered based on the target accuracy change.

[0026] By detecting the temperature, the temperature change of the real-time clock can be determined. Then, based on the correspondence between temperature change and accuracy change, the accuracy change of the real-time clock can be determined. Based on the accuracy change, it can be determined whether the real-time clock needs to be calibrated.

[0027] The following provides an exemplary description of the embodiments of this application in specific scenarios: In this embodiment, the system chip's temperature detection range is -20℃ to 85℃, with an accuracy variation range of less than 3.2%. The LIRC's constant accuracy variation rate Rd is 0.2%, which, based on a LIRC of 32.768 kHz, is 65. The temperature zone number CheckNum is less than or equal to (3.2 / 0.2)*2 = 32, which are the default values ​​for this series of chips. The Rd and CheckNum parameters can be modified by software through registers. The maximum number of CheckNum levels is determined based on the hardware circuit design. Considering factors such as chip area and cost, the maximum CheckNum level in this case can be set to 32. (Note: Different types of chips, due to their hardware circuitry, layout, and different wafer materials, will exhibit different LIRC accuracy characteristic curves as a function of temperature. The division of Rd and CheckNum can be set according to the actual situation.) Within the temperature range of -20℃ to 85℃, the highest point (32798Hz) and lowest point (31857Hz) of the LIRC frequency are found based on the characteristic curve. These are then divided into 16 equal-precision intervals, with CheckNum=25. See Table 1 for the temperature / voltage table corresponding to equal-precision changes. (It can be divided into any number of equal intervals <= 32; equal division is an approximate concept and not strictly defined. The module actually compares the voltage values ​​converted at each temperature point.) Then, the conversion voltage values ​​corresponding to the temperature at each equal division point are written into the register in descending order. The order from largest to smallest is: 3.58, 3.55, 3.54, 3.51......2.53.

[0028] Note: The temperature variation range here is represented by voltage, which is monitored by the temperature-sensing voltage comparison module and output as voltage. At -20°C, the output is approximately 2.53 V, i.e., Vtemp = 2.53 V; at +85°C, the output is approximately 3.58 V, i.e., Vtemp = 3.58V. This value will be uniformly entered before the chip leaves the factory.

[0029] One equal-precision variation range corresponds to one or two temperature zones (temperature variation ranges), which is referred to as a stage. CheckNum=25, there are a total of 25 stages, covering a full temperature range of -20℃ to 85℃ with a 3.2% accuracy variation range.

[0030] In this embodiment, the detection levels and temperature ranges can be divided according to the characteristic curve of LIRC accuracy changing with temperature, based on a settable constant accuracy change Rd. Therefore, it can be deduced that the change in LIRC accuracy can be known from the temperature change. Once the temperature range changes, that is, the change in the accuracy of the real-time clock reaches the set value, the hardware immediately generates an interrupt to trigger the automatic calibration mechanism of the RTC module.

[0031] DAC_VAL is a 10-bit digital-to-analog encoded value corresponding to a preset voltage, which is used as the input to the DAC; VREF is the reference voltage (800mV), output by the CPU's internal PMU.

[0032] Therefore, the output of the DAC can be expressed as K*VCC. (Note: K = DAC_VAL / 1024) This module will check the ChechNu (32) stages in sequence.

[0033] (Note: ChechNum is the actual number of stages. It is set based on the characteristic curve of LIRC accuracy changing with temperature, and other factors such as the magnitude of the preset constant accuracy change rate.)

[0034] DAC_VAL settings for 32 stages: Phase 0 (3.58V detection): Set DAC_VAL = (VREF * 1024) / 3580. If Vtemp >= 3.58V, the ACMP output is 1.

[0035] Phase 1 (3.55V detection): Set DAC_VAL = (VREF*1024) / 3550. If Vtemp >= 3.55V, then the ACMP output is 1.

[0036] Phase 2 (3.54V detection): Set DAC_VAL = (VREF * 1024) / 3540. If Vtemp >= 3.54V, then the ACMP output is 1.

[0037] Phase 3 (3.51V detection): Set DAC_VAL = (VREF * 1024) / 3510. If Vtemp >= 3.51V, the ACMP output is 1.

[0038] ... Stage 24 (2.53V detection): Set DAC_VAL = (VREF * 1024) / 2530. If Vtemp >= 2.53V, then the ACMP output is 1.

[0039] In stages 25-31, the DAC_VAL value is the same as in stage 24.

[0040] During operation, the module sequentially checks stages 0 to 31, a total of 32 stages. The ACMP logic then determines the range of Vtemp based on the following table. The orange numbers represent the output of the analog comparator, BV_AC_SAM. Based on the output of BV_AC_SAM, the current temperature can be determined, and thus the change in LIRC accuracy can be assessed.

[0041] Table 1 Temperature Sensing Voltage Detection Table

[0042] (Note: In the above, bits 6 to 0 are always 1, and the effective comparison starts from bit 7.) This feature module supports low-power applications.

[0043] The "Record and post-processing" section includes a digital filter, a counter, a 5-bit configuration register, and more.

[0044] A digital filter is used to check and post-process the temperature sensing voltage detection results; a 5-bit configuration register is dedicated to setting the filter window width (BV_FILTER_THR), which is applied to the digital filter to filter out temperature sensing voltage fluctuations; a counter is used to record the number of consecutive identical detection results, Cnt. Once the latest result differs from the old result, it indicates that the change in accuracy caused by the change in the current temperature value has exceeded or equaled a constant rate of change (Rd) value. At this point, a hardware interrupt is triggered, and the Cnt counter is reset to zero.

[0045] This hardware interrupt will trigger the RTC automatic calibration module to begin calibration. In other words, a valid temperature sensing voltage change interrupt flag will only be set when the number of consecutive identical detection results (BV_AC_SAM) Cnt is greater than or equal to BV_FILTER_THR (the default is 3 times, which can be modified via software registers).

[0046] Table 2 shows the comparison between temperature and voltage corresponding to equal precision changes in the embodiments of this application.

[0047]

[0048] In Table 2, the temperature and voltage of each temperature zone correspond to different precision levels. This comparison allows for easy lookup of the corresponding precision based on temperature or voltage.

[0049] Table 3 shows the voltage sequence table corresponding to the temperature dividing point in the embodiments of this application.

[0050]

[0051] Table 3 shows 24 sets of temperature-voltage correspondences. Different temperature zones are defined for each temperature.

[0052] The embodiments described above differ from traditional solutions that directly compensate for LIRC based on temperature. Instead, they utilize temperature changes as a calibration trigger signal, initiating calibration only when there is a risk of accuracy loss, thus achieving true "on-demand calibration." Furthermore, all detection and calibration actions in these embodiments are completed in a hardware closed loop, requiring no software intervention and completely eliminating the overhead of software polling. In addition, they effectively resolve the trade-off between "accuracy" and "power consumption" in traditional timing calibration, making them specifically designed for applications requiring low power consumption and high timing accuracy.

[0053] In one embodiment of this application, the automatic clock calibration event can be a time interval wake-up event. Specifically, the simultaneous activation of the first clock and the second clock to count in response to the triggered automatic clock calibration event can include: triggering the automatic clock calibration event at a preset time interval when the chip enters STOP mode; and simultaneously activating the first clock and the second clock to count in response to the triggered automatic clock calibration event.

[0054] The chip within the system can be set to various modes. When the chip enters a specific mode, such as STOP mode, it can trigger an automatic clock calibration event at time intervals. After triggering the automatic clock calibration event, the first clock and the second clock can be started simultaneously.

[0055] Step S102: When the count value of the second clock reaches the preset first count threshold, control the first clock and the second clock to stop counting simultaneously, and record the count value when the first clock stops counting; The first counting threshold can be preset. When the count value reaches the preset first counting threshold, the first clock and the second clock are stopped at the same time, and the count value corresponding to the current first clock is recorded.

[0056] Step S103: Calculate the actual frequency value of the second clock based on the count value, the frequency information of the first clock, and the first count threshold; The first clock is a high-precision clock, and the actual frequency value of the low-precision second clock can be calculated based on the frequency information of the first clock, the first counting threshold, and the count value.

[0057] In one embodiment of this application, calculating the actual frequency value of the second clock based on the count value, the frequency information of the first clock, and the first count threshold includes: multiplying the frequency information of the first clock by the first count threshold to obtain a first product; and dividing the first product by the count value to obtain the actual frequency value of the second clock.

[0058] That is, the actual frequency value = (frequency information * first counting threshold) / count value.

[0059] Step S104: Determine the frequency deviation value based on the difference between the actual frequency value and the ideal frequency value; After obtaining the actual frequency value, the ideal frequency value can be subtracted from the actual frequency of the second clock, and the absolute value can be taken to obtain the frequency deviation value, that is, |frequency deviation value - ideal frequency value| = frequency deviation value.

[0060] Step S105: Calibrate the real-time clock based on the frequency deviation value.

[0061] After obtaining the frequency deviation value, the real-time clock can be adjusted up or down according to the frequency deviation value to achieve real-time clock calibration.

[0062] In this embodiment, the system can respond to a triggered automatic clock calibration event by simultaneously starting a first clock and a second clock to count; then, when the count value of the second clock reaches a preset first counting threshold, the system controls the first clock and the second clock to stop counting simultaneously, and records the count value when the first clock stops counting; based on the count value, the frequency information of the first clock, and the first counting threshold, the system calculates the actual frequency value of the second clock; based on the difference between the actual frequency value and the ideal frequency value, the system determines the frequency deviation value; and calibrates the real-time clock based on the frequency deviation value. This method can perform clock calibration by combining a high-precision clock and a low-precision clock, simplifying the traditional calibration chain. The entire calibration process is completed in a hardware closed loop without software intervention, achieving true automated calibration.

[0063] like Figure 2 The diagram shown is a flowchart illustrating another clock calibration method according to an embodiment of this application. The specific steps are as follows: Step S201: In response to the triggered automatic clock calibration event, both the first clock and the second clock are started to count. Wherein, the first clock is used as a reference clock source, the second clock is used as a real-time clock to be calibrated, and the accuracy of the first clock is greater than that of the second clock. The clock calibration system described in this application may include a clock calibration module. The clock calibration module may integrate two counters (such as a 32-bit counter). The clock source of one counter comes from a precise clock, and the frequency corresponding to the high-speed internal resistor-capacitor oscillator (HIRC) can be 8MHz, which is the first clock. The clock source of the other counter comes from a low-speed internal resistor-capacitor oscillator (LIRC), and the ideal frequency in this scheme is 32.768kHz, which is the second clock.

[0064] The system can pre-set an automatic clock calibration event. When the system detects an automatic clock calibration event in the current state, it can trigger clock calibration and simultaneously start the first and second clocks for counting.

[0065] In one embodiment of this application, an automatic clock calibration event can be set based on the relationship between temperature and clock accuracy. The specific process is as follows: obtain the real-time temperature of the second clock; when the chip enters STOP mode, determine whether the real-time temperature triggers an automatic clock calibration event; when it is determined that the real-time temperature triggers an automatic clock calibration event, in response to the triggered automatic clock calibration event, simultaneously start the first clock and the second clock to count.

[0066] In practical applications, a system used for clock calibration may include a temperature detection trigger module. The temperature detection trigger module is equipped with a temperature sensor that can detect the real-time temperature of the current environment. Specifically, the temperature sensor detection voltage Vtemp is the detection output object. The temperature sensor acquisition voltage module collects the current chip temperature and converts it into a voltage output, which serves as the reference input for the digital-to-analog converter (DAC).

[0067] The hardware circuitry of the temperature sensing module is located near the LIRC module to more accurately monitor the real-time temperature changes of the LIRC. Given that the accuracy of the LIRC changes with temperature in a unique, step-by-step linear curve, this embodiment will set the constant accuracy rate of change Rd of the LIRC and the CheckNum temperature zone levels based on this curve.

[0068] In one embodiment of this application, determining whether the real-time temperature triggers an automatic clock calibration event includes: obtaining the correspondence between temperature changes and the accuracy changes of the real-time clock; determining a target temperature change within a preset time based on the real-time temperature; determining the real-time target accuracy change based on the target temperature change and the correspondence; and determining whether an automatic clock calibration event is triggered based on the target accuracy change.

[0069] By detecting the temperature, the temperature change of the real-time clock can be determined. Then, based on the correspondence between temperature change and accuracy change, the accuracy change of the real-time clock can be determined. Based on the accuracy change, it can be determined whether the real-time clock needs to be calibrated.

[0070] The embodiments described above differ from traditional solutions that directly compensate for LIRC based on temperature. Instead, they utilize temperature changes as a calibration trigger signal, initiating calibration only when there is a risk of accuracy loss, thus achieving true "on-demand calibration." Furthermore, all detection and calibration actions in these embodiments are completed in a hardware closed loop, requiring no software intervention and completely eliminating the overhead of software polling. In addition, they effectively resolve the trade-off between "accuracy" and "power consumption" in traditional timing calibration, making them specifically designed for applications requiring low power consumption and high timing accuracy.

[0071] In one embodiment of this application, the automatic clock calibration event can be a time interval wake-up event. Specifically, the simultaneous activation of the first clock and the second clock to count in response to the triggered automatic clock calibration event can include: triggering the automatic clock calibration event at a preset time interval when the chip enters STOP mode; and simultaneously activating the first clock and the second clock to count in response to the triggered automatic clock calibration event.

[0072] The chip within the system can be set to various modes. When the chip enters a specific mode, such as STOP mode, it can trigger an automatic clock calibration event at time intervals. After triggering the automatic clock calibration event, the first clock and the second clock can be started simultaneously.

[0073] Step S202: When the count value of the second clock reaches the preset first count threshold, control the first clock and the second clock to stop counting simultaneously, and record the count value when the first clock stops counting; The first counting threshold can be preset. When the count value reaches the preset first counting threshold, the first clock and the second clock are stopped at the same time, and the count value corresponding to the current first clock is recorded.

[0074] Step S203: Calculate the actual frequency value of the second clock based on the count value, the frequency information of the first clock, and the first count threshold; The first clock is a high-precision clock, and the actual frequency value of the low-precision second clock can be calculated based on the frequency information of the first clock, the first counting threshold, and the count value.

[0075] In one embodiment of this application, calculating the actual frequency value of the second clock based on the count value, the frequency information of the first clock, and the first count threshold includes: multiplying the frequency information of the first clock by the first count threshold to obtain a first product; and dividing the first product by the count value to obtain the actual frequency value of the second clock.

[0076] That is, the actual frequency value = (frequency information * first counting threshold) / count value.

[0077] Step S204: Determine the frequency deviation value based on the difference between the actual frequency value and the ideal frequency value; After obtaining the actual frequency value, the ideal frequency value can be subtracted from the actual frequency of the second clock, and the absolute value can be taken to obtain the frequency deviation value, that is, |frequency deviation value - ideal frequency value| = frequency deviation value.

[0078] Step S205: Obtain the frequency division coefficient of the real-time clock; The frequency division coefficient can be set according to actual needs, and no restrictions are imposed on it in this embodiment.

[0079] After obtaining the frequency deviation value, the real-time clock can be adjusted up or down according to the frequency deviation value to achieve real-time clock calibration.

[0080] In this embodiment, clock calibration can be performed by combining a high-precision clock with a low-precision clock, simplifying the traditional calibration process. The entire calibration process is completed in a hardware closed loop without the need for software intervention, achieving true automated calibration.

[0081] Step S206: Based on the frequency deviation value and the frequency division coefficient, obtain the calibration pulse insertion amount or calibration pulse reduction amount; Specifically, the frequency deviation value can be divided by the frequency division factor to obtain the calibration pulse insertion amount or calibration pulse reduction amount.

[0082] In one embodiment of this application, obtaining the calibration pulse insertion amount or calibration pulse reduction amount based on the frequency deviation value and the frequency division coefficient includes: generating an actual frequency value according to the frequency deviation value and the frequency division coefficient; if the actual frequency value is greater than the ideal frequency value, dividing the frequency deviation value by the frequency division coefficient to obtain the calibration pulse insertion amount; if the actual frequency value is less than or equal to the ideal frequency value, dividing the frequency deviation value by the frequency division coefficient to obtain the calibration pulse reduction amount.

[0083] For example, in this embodiment of the application, the deviation value can be calculated by simultaneously using a high-precision reference clock (HIRC) and a low-speed internal clock (LIRC) to count for a period of time and comparing the results. This deviation value can then be used to calibrate the second-cycle calibration register of the RTC. The specific process is as follows: The high-speed precision clock (HIRC) and the clock source of the RTC (LIRC) start counting simultaneously.

[0084] When the LIRC count reaches L_CNT (L_CNT can be configured via a register, where L_CNT can be set to 64), both LIRC and HIRC stop counting simultaneously.

[0085] Record the HIRC count value at this time as H_CNT (theoretical value is 15625, calculation formula: 8MHZ / 32.768KHZ*64=15625).

[0086] The actual value of the current LIRC can be calculated using the formula: Lr = 8MHz * 64 / H_CNT (derived from H_CNT = (8MHz / Lr) * 64), which is: Lc, delta = |32768 - Lr|, used for calibration compensation of RTC second timing.

[0087] For example: If the value of Lr is greater than 32768, it indicates that the current LIRC frequency has increased, and the corresponding RTC frequency has increased, resulting in a shorter RTC second period. The RTC calibration register inserts delta / N RTC_CLK pulses within the RTC's second calibration period to calibrate the RTC's second timing accuracy, where N is the preset frequency division factor for the RTC. If the value of Lr is less than 32768, it indicates that the current LIRC frequency has decreased, and the corresponding RTC frequency has decreased, resulting in a longer RTC second period. The RTC calibration register inserts (i.e., reduces) delta / N RTC_CLK pulses in the negative direction to ensure the RTC's second timing accuracy, thereby achieving the overall timing accuracy requirements of the RTC.

[0088] The RTC (Automatic Clock Calibration) function can be configured to run automatically at time intervals or be automatically triggered by temperature monitoring when the chip enters STOP mode. HIRC is turned off after calibration is complete. In normal mode, this function can also be triggered by software for calibration.

[0089] Step S207: Write the calibration pulse insertion amount or calibration pulse reduction amount into the second period calibration register of the real-time clock to compensate for the second timing accuracy of the real-time clock.

[0090] In this embodiment, clock calibration can be performed by combining a high-precision clock with a low-precision clock, simplifying the traditional calibration process. The entire calibration process is completed in a hardware closed loop without the need for software intervention, achieving true automated calibration.

[0091] It should be noted that the clock calibration method provided in this application can be executed by a clock calibration device, or a control module within the clock calibration device for executing the loading clock calibration method. This application uses the method of a clock calibration device executing the loading clock calibration method as an example to illustrate the clock calibration method provided in this application.

[0092] like Figure 3 The diagram shown is a schematic representation of a clock calibration device according to an embodiment of this application. The specific structure is as follows: The automatic calibration trigger module 301 is used to respond to the triggered automatic clock calibration event and simultaneously start the first clock and the second clock to count; wherein, the first clock is used as a reference clock source, the second clock is used as the real-time clock to be calibrated clock source, and the accuracy of the first clock is greater than the accuracy of the second clock. The count value determination module 302 is used to control the first clock and the second clock to stop counting simultaneously when the count value of the second clock reaches a preset first count threshold, and to record the count value when the first clock stops counting; The actual frequency value calculation module 303 is used to calculate the actual frequency value of the second clock based on the count value, the frequency information of the first clock, and the first count threshold. The frequency deviation value determination module 304 is used to determine the frequency deviation value based on the difference between the actual frequency value and the ideal frequency value. The clock calibration module 305 is used to calibrate the real-time clock based on the frequency deviation value.

[0093] In one embodiment of this application, the actual frequency value calculation module 303 may include: The first product determination submodule is used to multiply the frequency information of the first clock by the first counting threshold to obtain the first product; The actual frequency value determination submodule is used to divide the first product by the count value to obtain the actual frequency value of the second clock.

[0094] In one embodiment of this application, the clock calibration module 305 may include: The frequency division coefficient determination submodule is used to obtain the frequency division coefficient of the real-time clock; The calibration amount determination submodule is used to obtain the calibration pulse insertion amount or calibration pulse reduction amount based on the frequency deviation value and the frequency division coefficient. The compensation submodule is used to write the calibration pulse insertion amount or calibration pulse reduction amount into the second period calibration register of the real-time clock to compensate for the second timing accuracy of the real-time clock.

[0095] In one embodiment of this application, the compensation submodule may include: An actual frequency value determination unit is used to generate an actual frequency value based on the frequency deviation value and the frequency division coefficient. An insertion amount determination unit is used to divide the frequency deviation value by the frequency division coefficient to obtain the calibration pulse insertion amount if the actual frequency value is greater than the ideal frequency value. The reduction amount determination unit is used to divide the frequency deviation value by the frequency division coefficient to obtain the calibration pulse reduction amount if the actual frequency value is less than or equal to the ideal frequency value.

[0096] In one embodiment of this application, the automatic calibration trigger module 301 may include: The real-time temperature determination submodule is used to obtain the real-time temperature of the second clock. The automatic calibration event trigger judgment submodule is used to determine whether the real-time temperature triggers an automatic clock calibration event when the chip enters STOP mode. The trigger submodule is used to respond to the triggered clock automatic calibration event when the real-time temperature triggers the clock automatic calibration event, and simultaneously start the first clock and the second clock to count.

[0097] In one embodiment of this application, the automatic calibration event triggering judgment submodule includes: The correspondence acquisition unit is used to acquire the correspondence between temperature change and the accuracy change of the real-time clock; A target temperature change determination unit is used to determine the target temperature change within a preset time based on the real-time temperature. A target accuracy change determination unit is used to determine the target accuracy change of the real-time clock based on the target temperature change and the corresponding relationship. The automatic clock calibration event determination unit is used to determine whether to trigger an automatic clock calibration event based on the change in the target accuracy.

[0098] In one embodiment of this application, the automatic calibration trigger module 301 may include: The automatic calibration event determination submodule is used to trigger an automatic clock calibration event at a preset time interval when the chip enters STOP mode. The counting start module is used to simultaneously start the first clock and the second clock for counting in response to a triggered automatic clock calibration event.

[0099] In this embodiment, the system can respond to a triggered automatic clock calibration event by simultaneously starting a first clock and a second clock to count; then, when the count value of the second clock reaches a preset first counting threshold, the system controls the first clock and the second clock to stop counting simultaneously, and records the count value when the first clock stops counting; based on the count value, the frequency information of the first clock, and the first counting threshold, the system calculates the actual frequency value of the second clock; based on the difference between the actual frequency value and the ideal frequency value, the system determines the frequency deviation value; and calibrates the real-time clock based on the frequency deviation value. This method can perform clock calibration by combining a high-precision clock and a low-precision clock, simplifying the traditional calibration chain. The entire calibration process is completed in a hardware closed loop without software intervention, achieving true automated calibration.

[0100] The clock calibration device in this application embodiment can be a device, or it can be a component, integrated circuit, or chip in a terminal. The device can be a mobile electronic device or a non-mobile electronic device. For example, mobile electronic devices can be mobile phones, tablets, laptops, PDAs, in-vehicle electronic devices, wearable devices, ultra-mobile personal computers (UMPCs), netbooks, or personal digital assistants (PDAs), etc., while non-mobile electronic devices can be servers, network attached storage (NAS), personal computers (PCs), televisions (TVs), ATMs, or self-service machines, etc. This application embodiment does not impose specific limitations.

[0101] The clock calibration device in this application embodiment can be a device with an operating system. This operating system can be Android, iOS, or other possible operating systems; this application embodiment does not specifically limit the specific operating system used.

[0102] The clock calibration device provided in this application embodiment can achieve... Figures 1 to 2 The various processes implemented by the clock calibration device in the method embodiment will not be described again here to avoid repetition.

[0103] Optionally, this application embodiment also provides an electronic device, including a processor 1010, a memory 1009, and a program or instructions stored in the memory 1009 and executable on the processor 1010. When the program or instructions are executed by the processor 1010, they implement the various processes of the above-described clock calibration method embodiment and achieve the same technical effect. To avoid repetition, they will not be described again here.

[0104] It should be noted that the electronic devices in the embodiments of this application include the mobile electronic devices and non-mobile electronic devices described above.

[0105] Figure 4 A schematic diagram of the hardware structure of an electronic device to implement an embodiment of this application. The electronic device 1000 includes, but is not limited to, components such as: radio frequency unit 1001, network module 1002, audio output unit 1003, input unit 1004, sensor 1005, display unit 1006, user input unit 1007, interface unit 1008, memory 1009, and processor 1010.

[0106] The memory 1009 includes applications and an operating system; the user input unit 1007 may include a touch panel 10071 and other input devices 10072; the input unit 1004 may include an image processor 10041 and a microphone 10042; and the display unit 1006 may include a display panel 10061.

[0107] Those skilled in the art will understand that the electronic device 1000 may also include a power supply (such as a battery) for supplying power to various components. The power supply may be logically connected to the processor 1010 through a power management system, thereby enabling functions such as charging, discharging, and power consumption management through the power management system. Figure 4 The electronic device structure shown does not constitute a limitation on the electronic device. The electronic device may include more or fewer components than shown, or combine certain components, or have different component arrangements, which will not be elaborated here. This application also provides a readable storage medium storing a program or instructions. When the program or instructions are executed by a processor, they implement the various processes of the above-described clock calibration method embodiments and achieve the same technical effect. To avoid repetition, they will not be described again here.

[0108] The processor is the processor in the electronic device described in the above embodiments. The readable storage medium includes computer-readable storage media, such as computer read-only memory (ROM), random access memory (RAM), magnetic disk, or optical disk.

[0109] This application embodiment also provides a chip, which includes a processor and a communication interface. The communication interface is coupled to the processor. The processor is used to run programs or instructions to implement the various processes of the above clock calibration method embodiments and can achieve the same technical effect. To avoid repetition, it will not be described again here.

[0110] It should be understood that the chip mentioned in the embodiments of this application may also be referred to as a system-on-a-chip, system chip, chip system, or system-on-a-chip, etc.

[0111] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, it should be noted that the scope of the methods and apparatuses in the embodiments of this application is not limited to performing functions in the order shown or discussed, but may also include performing functions substantially simultaneously or in the reverse order, depending on the functions involved. For example, the described methods may be performed in a different order than described, and various steps may be added, omitted, or combined. Additionally, features described with reference to certain examples may be combined in other examples.

[0112] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal (which may be a mobile phone, computer, server, air conditioner, or network device, etc.) to execute the methods described in the various embodiments of this application.

[0113] The embodiments of this application have been described above with reference to the accompanying drawings. However, this application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this application without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of this application.

Claims

1. A clock calibration method, characterized in that, The method includes: In response to a triggered automatic clock calibration event, both a first clock and a second clock are started to count; wherein, the first clock serves as a reference clock source, and the second clock serves as the real-time clock to be calibrated, and the accuracy of the first clock is greater than that of the second clock. When the count value of the second clock reaches the preset first count threshold, control the first clock and the second clock to stop counting simultaneously, and record the count value when the first clock stops counting; The actual frequency value of the second clock is calculated based on the count value, the frequency information of the first clock, and the first count threshold. The frequency deviation value is determined based on the difference between the actual frequency value and the ideal frequency value; The real-time clock is calibrated based on the frequency deviation value.

2. The method according to claim 1, characterized in that, The step of calculating the actual frequency value of the second clock based on the count value, the frequency information of the first clock, and the first count threshold includes: The first product is obtained by multiplying the frequency information of the first clock by the first counting threshold. Dividing the first product by the count value yields the actual frequency value of the second clock.

3. The method according to claim 1, characterized in that, The calibration of the real-time clock based on the frequency deviation value includes: Obtain the frequency division coefficient of the real-time clock; The calibration pulse insertion amount or calibration pulse reduction amount is obtained based on the frequency deviation value and the frequency division coefficient. The calibration pulse insertion amount or calibration pulse reduction amount is written into the second period calibration register of the real-time clock to compensate for the second timing accuracy of the real-time clock.

4. The method according to claim 3, characterized in that, The step of obtaining the calibration pulse insertion amount or calibration pulse reduction amount based on the frequency deviation value and the frequency division coefficient includes: The actual frequency value is generated based on the frequency deviation value and the frequency division coefficient; If the actual frequency value is greater than the ideal frequency value, the frequency deviation value is divided by the frequency division coefficient to obtain the calibration pulse insertion amount; If the actual frequency value is less than or equal to the ideal frequency value, the frequency deviation value is divided by the frequency division coefficient to obtain the calibration pulse reduction amount.

5. The method according to claim 1, characterized in that, The method of simultaneously starting the first clock and the second clock for counting in response to a triggered automatic clock calibration event includes: Obtain the real-time temperature of the second clock; When the chip enters the preset mode, it is determined whether the real-time temperature triggers an automatic clock calibration event; When the real-time temperature triggers an automatic clock calibration event, in response to the triggered automatic clock calibration event, the first clock and the second clock are started to count simultaneously.

6. The method according to claim 5, characterized in that, The step of determining whether the real-time temperature triggers an automatic clock calibration event includes: Obtain the correspondence between temperature changes and the accuracy changes of the real-time clock; The target temperature change within a preset time period is determined based on the real-time temperature. The target accuracy change of the real-time clock is determined based on the target temperature change and the corresponding relationship. The automatic clock calibration event is triggered based on the change in the target accuracy.

7. The method according to claim 1, characterized in that, The method of simultaneously starting the first clock and the second clock for counting in response to a triggered automatic clock calibration event includes: When the chip enters a preset mode, it triggers an automatic clock calibration event at preset time intervals. In response to a triggered automatic clock calibration event, both the first and second clocks are started for counting.

8. A clock calibration device, characterized in that, The device includes: An automatic calibration trigger module is used to respond to a triggered automatic clock calibration event and simultaneously start a first clock and a second clock to count; wherein, the first clock serves as a reference clock source, the second clock serves as the real-time clock to be calibrated, and the accuracy of the first clock is greater than that of the second clock; The count value determination module is used to control the first clock and the second clock to stop counting simultaneously when the count value of the second clock reaches a preset first count threshold, and to record the count value when the first clock stops counting; The actual frequency value calculation module is used to calculate the actual frequency value of the second clock based on the count value, the frequency information of the first clock, and the first count threshold. The frequency deviation value determination module is used to determine the frequency deviation value based on the difference between the actual frequency value and the ideal frequency value. A clock calibration module is used to calibrate the real-time clock based on the frequency deviation value.

9. An electronic device, characterized in that, It includes a processor, a memory, and a program or instructions stored in the memory and executable on the processor, wherein the program or instructions, when executed by the processor, implement the steps of the clock calibration method as described in any one of claims 1 to 7.

10. A readable storage medium, characterized in that, The readable storage medium stores a program or instructions that, when executed by a processor, implement the steps of the clock calibration method as described in any one of claims 1 to 7.

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