Single-line communication circuit capable of performing level conversion

Abstract

The utility model discloses a single-wire communication circuit capable of performing level conversion, which comprises a first CPU (central processing unit) and a second CPU, and a first circuit module and a second circuit module are correspondingly arranged in the first CPU and the second CPU; the first circuit module comprises a first sending module and a first receiving module, the first sending module and the first receiving module are connected in parallel, the second circuit module comprises a second sending module and a second receiving module, and the second sending module and the second receiving module are connected in parallel; at least the first sending module and the second sending module are provided with level conversion units; a parallel main line of the first sending module and the first receiving module and a parallel main line of the second sending module and the second receiving module are respectively connected with an external single-line communication port FRB; when the first sending module communicates with the second receiving module, and when the second sending module communicates with the first receiving module, level conversion can be carried out on communication signals.

Description

Technical Field

[0001] The utility model relates to the technical field of communication, in particular to a single-line communication circuit capable of performing level conversion. Background Art

[0002] The traditional two-wire and three-wire communication methods have complex wiring methods between devices and high costs, making single-wire communication methods more and more mainstream. Many existing external devices are single-wire communication. When used, the CPU port directly connects to the external device with a single wire to read and store the corresponding data. However, when the existing single-wire communication circuit is used, it is affected by factors such as communication signal compatibility, resulting in a more complex communication method and difficult to ensure communication quality.

[0003] Therefore, it is necessary to provide a single-wire communication circuit capable of performing level conversion to solve the problems mentioned in the above background technology. Utility Model Content

[0004] To achieve the above object, the utility model provides the following technical solution: a single-line communication circuit capable of level conversion, comprising a first CPU and a second CPU, wherein the first CPU and the second CPU are provided with a first circuit module and a second circuit module respectively;

[0005] The first circuit module includes a first sending module and a first receiving module, the first sending module and the first receiving module are connected in parallel, and the second circuit module includes a second sending module and a second receiving module, the second sending module and the second receiving module are connected in parallel;

[0006] At least the first sending module and the second sending module are provided with a level conversion unit;

[0007] The parallel main line of the first sending module and the first receiving module and the parallel main line of the second sending module and the second receiving module are respectively connected to the external single-line communication port FRB for two-line to single-line bidirectional communication;

[0008] When the first sending module communicates with the second receiving module and when the second sending module communicates with the first receiving module, the communication signal can be level-converted without changing the state of the communication wave.

[0009] As a preferred technical solution of the utility model, the first sending module and the second sending module each include a first resistor and a first level conversion unit connected in series in sequence, and the first resistor is connected to the transmitting port of the first CPU / second CPU, and the first level conversion unit is connected to the VCC port of the first CPU / second CPU;

[0010] The connection end of the first level conversion unit and the VCC port of the first CPU / second CPU is also connected to the second receiving module / first receiving module.

[0011] As a preferred technical solution of the present utility model, a second resistor is connected between the first level conversion unit and the VCC port of the first CUP / second CPU, and the connection end of the first level conversion unit and the second receiving module / first receiving module is located between the first level conversion unit and the second resistor.

[0012] As a preferred technical solution of the utility model, in the first sending module and the second sending module, the first resistor is independently selected from the same or different resistors;

[0013] The second resistors are independently selected from the same or different resistors;

[0014] The first level conversion units are identical level conversion devices.

[0015] As a preferred technical solution of the utility model, the first receiving module and the second receiving module each include a third resistor and a second level conversion unit connected in series in sequence, and the second level conversion unit is connected to the receiving port of the first CUP / second CPU and the VCC port;

[0016] An input end of the third resistor is connected to the first sending module / the second sending module;

[0017] The external single-line communication port FRB is connected between the third resistor and the connection end of the first sending module / the second sending module.

[0018] As a preferred technical solution of the present utility model, a fourth resistor is connected between the second level conversion unit and the VCC port of the first CUP / second CPU, and the connection end of the fourth resistor and the second level conversion unit is connected to the receiving port of the first CUP / second CPU.

[0019] As a preferred technical solution of the utility model, in the first receiving module and the second receiving module, the third resistor is independently selected from the same or different resistors;

[0020] The fourth resistor is independently selected from the same or different resistors;

[0021] The second level conversion unit is a same level conversion device.

[0022] As a preferred technical solution of the present utility model, the level conversion unit is selected from a triode or a MOS tube.

[0023] As a preferred technical solution of the present utility model, the level conversion units are all grounded.

[0024] Compared with the prior art, the utility model provides a single-line communication circuit capable of level conversion, which has the following beneficial effects:

[0025] 1. A sending module and a receiving module are respectively arranged in the first circuit module and the second circuit module, and two-line to single-line bidirectional communication is realized through the external single-line communication port FRB connection;

[0026] 2. The circuit has level conversion function, the communication method is simple and the communication quality is reliable;

[0027] 3. The circuit structure is simple, fewer components are used, and the cost is lower. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 It is a schematic diagram of a single-line communication circuit structure capable of level conversion;

[0029] In the figure: 10, a first circuit module; 20, a second circuit module; 30, a first sending module; 40, a first receiving module; 50, a second sending module; 60, a second receiving module. DETAILED DESCRIPTION

[0030] See also Figure 1 The utility model provides a single-line communication circuit capable of level conversion, comprising:

[0031] A first CPU and a second CPU, wherein the first CPU and the second CPU are provided with a first circuit module 10 and a second circuit module 20 respectively;

[0032] The first circuit module 10 includes a first sending module 30 and a first receiving module 40, the first sending module 30 and the first receiving module 40 are connected in parallel, the second circuit module 20 includes a second sending module 50 and a second receiving module 60, the second sending module 50 and the second receiving module 60 are connected in parallel;

[0033] At least the first sending module 30 and the second sending module 50 are provided with a level conversion unit;

[0034] The parallel main lines of the first sending module 30 and the first receiving module 40 and the parallel main lines of the second sending module 50 and the second receiving module 60 are respectively connected to the external single-line communication port FRB for two-line to single-line bidirectional communication;

[0035] When the first sending module 30 and the second receiving module 60 communicate, and when the second sending module 50 and the first receiving module 40 communicate, the communication signal can be level-converted without changing the state of the communication wave.

[0036] In this embodiment, the first sending module 30 and the second sending module 50 each include a first resistor and a first level conversion unit connected in series in sequence, and the first resistor is connected to the transmitting port of the first CPU / second CPU, and the first level conversion unit is connected to the VCC port of the first CPU / second CPU;

[0037] The connection end of the first level conversion unit and the VCC port of the first CPU / second CPU is also connected to the second receiving module 60 / first receiving module 40.

[0038] In this embodiment, a second resistor is connected between the first level conversion unit and the VCC port of the first CUP / second CPU, and the connection end between the first level conversion unit and the second receiving module 60 / first receiving module 40 is located between the first level conversion unit and the second resistor.

[0039] In this embodiment, in the first sending module 30 and the second sending module 50, the first resistor is independently selected from the same or different resistors;

[0040] The second resistors are independently selected from the same or different resistors;

[0041] The first level conversion units are identical level conversion devices.

[0042] In this embodiment, the first receiving module 40 and the second receiving module 60 both include a third resistor and a second level conversion unit connected in series, and the second level conversion unit is connected to the receiving port of the first CPU / second CPU and the VCC port;

[0043] The input end of the third resistor is connected to the first sending module 30 / the second sending module 50;

[0044] The external single-line communication port FRB is connected between the third resistor and the connection end of the first sending module 30 / the second sending module 50 .

[0045] In this embodiment, a fourth resistor is connected between the second level conversion unit and the VCC port of the first CUP / second CPU, and the connection end between the fourth resistor and the second level conversion unit is connected to the receiving port of the first CUP / second CPU.

[0046] In this embodiment, in the first receiving module 40 and the second receiving module 60, the third resistor is independently selected from the same or different resistors;

[0047] The fourth resistor is independently selected from the same or different resistors;

[0048] The second level conversion unit is a same level conversion device.

[0049] In this embodiment, the level conversion unit is selected from a triode or a MOSFET.

[0050] In this embodiment, the level conversion units are all grounded.

[0051] In the specific implementation, take the MOS tube as the level conversion unit as an example:

[0052] In the first sending module 30 / the second sending module 50, the sending port of the first CUP / the second CPU is connected in series with the input end of the first resistor, the input end of the first resistor is connected to the gate of the MOS tube, the drain of the MOS tube is connected to the second resistor, the other end of the second resistor is connected to the VCC port of the first CUP / the second CPU, the connecting end of the second resistor and the MOS tube is connected to the first receiving module 40 / the second receiving module 60, and the source of the MOS tube is grounded.

[0053] In the first receiving module 40 / the second receiving module 60, the input end of the third resistor is connected to the first sending module 30 / the second sending module 50, the output end of the third resistor is connected to the gate of the MOS tube, the drain of the MOS tube is connected in series with the fourth resistor, the other end of the fourth resistor is connected to the VCC port of the first CUP / the second CPU, the connecting end of the MOS tube and the fourth resistor is connected to the receiving port of the first CUP / the second CPU, the source of the MOS tube is grounded, and the external single-line communication port FRB is connected between the connecting end of the third resistor and the first sending module 30 / the second sending module 50.

[0054] Among them, the operation path of the first CUP sending communication: the first CUP sends a communication command to the external device through the sending port, the communication signal passes through the MOS tube of the first sending module 30 and the MOS tube of the second receiving module 60 to convert the signal level, and is received by the receiving port of the second CPU without changing the communication waveform. The MOS tube of the first sending module 30 and the MOS tube of the second receiving module 60 work together to convert the level and synchronize the communication signal. At the same time, the external device can also receive its communication information through the FRB port single-line communication; the operation path of the second CPU sending communication is similar to the operation path of the first CUP sending communication, and will not be repeated.

[0055] What is described above is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes within the technical scope disclosed by the present invention according to the technical scheme and the utility model concept of the present invention, which should be covered by the protection scope of the present invention.

Claims

1. A single-line communication circuit capable of level conversion, characterized in that: It comprises a first CPU and a second CPU, wherein the first CPU and the second CPU are provided with a first circuit module (10) and a second circuit module (20) respectively; The first circuit module (10) comprises a first sending module (30) and a first receiving module (40), the first sending module (30) and the first receiving module (40) being connected in parallel, and the second circuit module (20) comprises a second sending module (50) and a second receiving module (60), the second sending module (50) and the second receiving module (60) being connected in parallel; At least the first sending module (30) and the second sending module (50) are provided with a level conversion unit; The parallel main line of the first sending module (30) and the first receiving module (40) and the parallel main line of the second sending module (50) and the second receiving module (60) are respectively connected to the external single-line communication port FRB for two-line to single-line bidirectional communication; When the first sending module (30) and the second receiving module (60) communicate, and when the second sending module (50) and the first receiving module (40) communicate, the communication signal can be level-converted without changing the state of the communication wave.

2. A single-wire communication circuit capable of level conversion according to claim 1, characterized in that: The first sending module (30) and the second sending module (50) each comprise a first resistor and a first level conversion unit connected in series in sequence, wherein the first resistor is connected to the transmitting port of the first CPU / second CPU, and the first level conversion unit is connected to the VCC port of the first CPU / second CPU; The connection end of the first level conversion unit and the VCC port of the first CPU / second CPU is also connected to the second receiving module (60) / first receiving module (40).

3. A single-wire communication circuit capable of level conversion according to claim 2, characterized in that: A second resistor is connected between the first level conversion unit and the VCC port of the first CUP / second CPU, and a connection end between the first level conversion unit and the second receiving module (60) / first receiving module (40) is located between the first level conversion unit and the second resistor.

4. The single-wire communication circuit capable of level conversion according to claim 3, characterized in that: In the first sending module (30) and the second sending module (50), the first resistor is independently selected from the same or different resistors; The second resistors are independently selected from the same or different resistors; The first level conversion units are identical level conversion devices.

5. The single-wire communication circuit capable of level conversion according to claim 1, characterized in that: The first receiving module (40) and the second receiving module (60) both comprise a third resistor and a second level conversion unit connected in series in sequence, and the second level conversion unit is connected to the receiving port and the VCC port of the first CPU / second CPU; The third resistor is connected to the first sending module (30) / the second sending module (50); The external single-line communication port FRB is connected between the third resistor and the connection end of the first sending module (30) / the second sending module (50).

6. A single-wire communication circuit capable of level conversion according to claim 5, characterized in that: A fourth resistor is connected between the second level conversion unit and the VCC port of the first CPU / second CPU, and a connection end between the fourth resistor and the second level conversion unit is connected to a receiving port of the first CPU / second CPU.

7. A single-wire communication circuit capable of level conversion according to claim 6, characterized in that: In the first receiving module (40) and the second receiving module (60), the third resistor is independently selected from the same or different resistors; The fourth resistor is independently selected from the same or different resistors; The second level conversion unit is a same level conversion device.

8. The single-wire communication circuit capable of level conversion according to claim 1, characterized in that: The level conversion unit is selected from a triode or a MOS tube.

9. The single-wire communication circuit capable of level conversion according to claim 1, characterized in that: The level conversion units are all grounded.

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