Electrical parameter measuring circuit

Abstract

The utility model provides an electrical parameter measuring circuit, an electrical parameter measuring unit comprises a plurality of signal driving ends and a plurality of voltage output ends, each signal driving end corresponds to one voltage output end, and the measuring signal output end of each analog switch is correspondingly connected with one signal driving end; each sampling output end of the multiplexer is connected with the input end of the signal conditioning unit, and the voltage input end corresponding to the sampling output end is connected with one voltage output end in the electrical parameter measuring unit; the input end of the analog-to-digital conversion unit is connected with the output end of the signal conditioning unit, and the output end of the analog-to-digital conversion unit is connected with the input end of the main controller. In the scheme, a discrete scheme is replaced by the chip for measuring the electrical parameters, a single chip realizes the functions of voltage and current conversion and amplification, digital-to-analog conversion, clamping, calibration and the like, and an external analog switch circuit is matched to realize single-board multi-channel test, so that the reliability of chip test is improved, and the test efficiency is improved. And the board occupation area is reduced.

Description

Technical Field

[0001] The utility model relates to the field of electronic technology, in particular to an electrical parameter measuring circuit. Background Art

[0002] The semiconductor chip manufacturing process includes chip design, wafer fabrication, chip packaging, and post-chip testing. Testing typically plays a crucial role in the entire chip production process. In the semiconductor chip testing process, DC testing begins. This testing includes tests for O / S, leakage, and other items. Only after passing the DC testing will chip manufacturers proceed to AC testing and functional testing. The chip testing equipment used in DC testing, referred to as an ATE or tester, is a high-precision measurement device. It can be categorized by test target, including SOC, memory, and analog. Storage-class testers include functional modules such as the DPS module, PE module, PMU module, and TMU module.

[0003] In the existing technology, the PMU module design scheme is built using discrete devices, specifically a large number of high-precision operational amplifiers and digital-to-analog conversion chips and some high-precision sampling resistors. The disadvantage of this scheme is that it is easily affected by the noise of surrounding devices and its own temperature drift, and its accuracy and stability are poor, resulting in reduced reliability of chip testing. In addition, the use of discrete devices to build the system occupies too large a board area and limits the number of channels, resulting in high cost of the tester and reduced market competitiveness. Utility Model Content

[0004] In view of this, an embodiment of the present invention provides an electrical parameter measurement circuit to achieve the purpose of improving chip testing reliability and reducing board area.

[0005] To achieve the above objectives, the present invention provides the following technical solutions:

[0006] The present invention discloses an electrical parameter measurement circuit, which includes: a plurality of analog switches, an electrical parameter measurement unit, a multiplexer, a signal conditioning unit, an analog-to-digital conversion unit, and a main controller;

[0007] The main controller includes a plurality of control signal output terminals, and each of the analog switch, the electrical parameter measurement unit, the multiplexer, and the analog-to-digital conversion unit is connected to a corresponding control signal output terminal;

[0008] The electrical parameter measurement unit includes a plurality of signal driving terminals and a plurality of voltage output terminals, each of the signal driving terminals corresponds to one of the voltage output terminals, each of the analog switches includes a plurality of measuring terminals, each of the measuring terminals is connected to a chip to be tested, and the measurement signal output terminal of each analog switch is connected to a corresponding signal driving terminal; the analog switch is used to switch the chips to be tested connected to the electrical parameter measurement unit one by one in response to the switch control signal output by the main controller;

[0009] The multiplexer includes a plurality of sampling channels, each of which is composed of a voltage input terminal and a sampling output terminal, each of which is connected to the input terminal of the signal conditioning unit, and the voltage input terminal of each sampling channel is correspondingly connected to one of the voltage output terminals of the electrical parameter measurement unit; the multiplexer is used to control the connection of each sampling channel in response to a sampling control signal from the main controller, receive the output voltage of the electrical parameter measurement unit, generate a sampling signal based on the output voltage, and input the sampling signal into the signal conditioning unit;

[0010] The input end of the analog-to-digital conversion unit is connected to the output end of the signal conditioning unit, and the output end of the analog-to-digital conversion unit is connected to the input end of the main controller. The analog-to-digital conversion unit is used to convert the sampling signal into a digital signal in response to the conversion control signal of the main controller, and transmit the digital signal to the main controller, so that the main controller performs data processing based on the digital signal to obtain measurement data.

[0011] Preferably, the analog switch comprises: an ADG1411 chip, a first capacitor and a second capacitor;

[0012] Each measurement signal output pin in the ADG1411 chip is connected to form a measurement signal output terminal;

[0013] Each switch control signal input pin in the ADG1411 chip is connected to the corresponding control signal output terminal in the main controller;

[0014] Each measurement pin of the ADG1411 chip is connected to one of the chips to be tested;

[0015] The VDD pin of the ADG1411 chip is connected to a positive 15V power supply and one end of the first capacitor, respectively, and the other end of the first capacitor is connected to an analog ground;

[0016] The VSS pin in the ADG1411 chip is connected to a positive 15V power supply and one end of the second capacitor, respectively, and the other end of the second capacitor is connected to an analog ground.

[0017] Preferably, the electrical parameter measurement unit includes: an AD5522 chip including four measurement channels, a peripheral circuit for each of the measurement channels, a first pull-up resistor, a second pull-up resistor, and a third pull-up resistor; the AD5522 chip includes a plurality of control pins, each of the control pins correspondingly connected to a control signal output terminal in the main controller;

[0018] The BUSY pin of the AD5522 chip is connected to one end of the first pull-up resistor, and the other end of the first pull-up resistor is connected to a positive 3.3V power supply;

[0019] The TMPALM pin of the AD5522 chip is connected to one end of the second pull-up resistor, the CGALM pin of the AD5522 chip is connected to one end of the third pull-up resistor, the other ends of the second pull-up resistor and the third pull-up resistor are connected to form a common end, and the common end is connected to a positive 3.3V power supply;

[0020] Each of the peripheral circuits has the same structure, and includes: a measuring resistor, an RC circuit, a compensation capacitor, a first decoupling circuit, a second decoupling circuit, and a filter capacitor;

[0021] The EXTFOH pin of the measurement channel is connected to the first end of the measurement resistor, and the first end of the measurement resistor is connected to the EXTMEASIH pin of the measurement channel;

[0022] The second end of the measurement resistor is connected to the EXTMEASIL pin and FOH pin of the measurement channel, one end of the RC circuit, and one end of the compensation capacitor. The other end of the RC circuit is connected to the MEASVH pin of the measurement channel. The other end of the compensation capacitor is connected to the CFF pin of the measurement channel. The second end of the measurement resistor serves as a signal driving end and is correspondingly connected to a measurement signal output end of the analog switch.

[0023] The AVSS pin of the measurement channel is respectively connected to one end of the first decoupling circuit and a negative 15V power supply, and the other end of the first decoupling circuit is connected to the analog ground;

[0024] The AVDD pin of the measurement channel is connected to one end of the second decoupling circuit, and the other end of the second decoupling circuit is connected to a positive 15V power supply;

[0025] The CCOMP pin of the measurement channel is connected to one end of the filter capacitor, and the other end of the filter capacitor is connected to the analog ground;

[0026] The MESOUT pin of the measurement channel serves as a voltage output terminal, and is correspondingly connected to a voltage input terminal of one of the sampling channels in the multiplexer.

[0027] Preferably, the RC circuit comprises: a first resistor and a third capacitor;

[0028] The second end of the measuring resistor is connected to one end of the first resistor and the third capacitor respectively, and the common end formed by the other ends of the first resistor and the third capacitor is connected to the MEASVH pin of the measuring channel.

[0029] Preferably, the resistance value of the measuring resistor includes: 40Ω; the resistance value of the first pull-up resistor includes: 10kΩ; the resistance values ​​of the second pull-up resistor and the third pull-up resistor include: 3.3kΩ.

[0030] Preferably, the multiplexer includes: an ADG411 chip, a fourth capacitor, a fifth capacitor and a sixth capacitor;

[0031] The ADG411 chip includes a plurality of voltage input pins and sampling output pins corresponding to each of the voltage input pins, and each of the voltage input pins and the corresponding voltage output pin constitute a sampling channel;

[0032] Each of the sampling output pins is connected to the input terminal of the signal conditioning unit, and the voltage input terminal corresponding to the sampling output pin is connected to one of the voltage output terminals of the electrical parameter measurement unit;

[0033] A common terminal formed by connecting each sampling control signal input pin in the ADG411 chip to a corresponding control signal output terminal in the main controller;

[0034] The VDD pin of the ADG411 chip is connected to a positive 15V power supply and one end of the fourth capacitor, respectively, and the other end of the fourth capacitor is connected to an analog ground;

[0035] The VL pin of the ADG411 chip is connected to a positive 5V power supply and one end of the fifth capacitor respectively, and the other end of the fifth capacitor is connected to an analog ground;

[0036] The VSS pin in the ADG411 chip is connected to a negative 15V power supply and one end of the sixth capacitor, respectively, and the other end of the sixth capacitor is connected to an analog ground.

[0037] Preferably, the signal conditioning unit includes a plurality of signal conditioning circuits;

[0038] The input end of each of the signal conditioning circuits is correspondingly connected to one of the sampling output ends, and the output end of each of the signal conditioning circuits is connected to the input end of the analog-to-digital conversion unit.

[0039] Preferably, the signal conditioning circuit includes: an operational amplifier, a second resistor, a third resistor and a seventh capacitor;

[0040] The non-inverting input pin of the operational amplifier is connected to a corresponding sampling output terminal, and the inverting input pin is connected to the output pin;

[0041] The output pin is connected to one end of the second resistor, and the other end of the second resistor is respectively connected to one end of the seventh capacitor and the input end of the analog-to-digital conversion unit;

[0042] The other end of the seventh capacitor is connected to one end of the third resistor, and the other end of the third resistor is connected to the analog ground.

[0043] Preferably, the analog-to-digital conversion unit includes: an ADS8686S chip;

[0044] Each of the input pins of the ADS8686S chip is connected to an output end of the signal conditioning circuit;

[0045] The SPI interface in the ADS8686S chip is connected to the input end of the main controller;

[0046] The SCLK pin and CS pin in the ADS8686S chip are connected to the corresponding control signal output terminals in the main controller.

[0047] Preferably, the main controller includes: an XC7Z015 chip;

[0048] The XC7Z015 chip includes a plurality of control signal output terminals obtained by programming programmable IO interfaces and an input terminal for receiving the digital signal.

[0049] Based on the above-mentioned embodiment of the present invention, an electrical parameter measurement circuit is provided. The electrical parameter measurement unit includes multiple signal driving terminals and multiple voltage output terminals, each signal driving terminal corresponds to a voltage output terminal, and the measurement signal output terminal of each analog switch is connected to a corresponding signal driving terminal; each sampling output terminal of the multiplexer is connected to the input terminal of the signal conditioning unit, and the voltage input terminal corresponding to the sampling output terminal is connected to a voltage output terminal in the electrical parameter measurement unit; the input terminal of the analog-to-digital conversion unit is connected to the output terminal of the signal conditioning unit, and the output terminal of the analog-to-digital conversion unit is connected to the input terminal of the main controller. In this solution, the chip used for electrical parameter measurement replaces the discrete solution, and the single chip realizes the conversion and amplification functions of voltage and current, digital-to-analog conversion, clamping and calibration, etc., and cooperates with the external analog switch circuit to realize single-board multi-channel testing, so as to improve the reliability of chip testing and reduce the board area. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are merely embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0051] Figure 1 A circuit diagram of an electrical parameter measurement circuit disclosed in the present utility model;

[0052] Figure 2 A circuit diagram of an electrical parameter measurement unit disclosed in an embodiment of the present utility model;

[0053] Figure 3 A circuit diagram of an analog switch disclosed in an embodiment of the present utility model;

[0054] Figure 4 A circuit diagram of a multiplexer disclosed in an embodiment of the present utility model;

[0055] Figure 5 A circuit diagram of a signal conditioning unit disclosed in an embodiment of the present utility model;

[0056] Figure 6 A circuit diagram of an analog-to-digital conversion unit disclosed in an embodiment of the present utility model;

[0057] Figure 7 This is a pin diagram of the main controller disclosed in an embodiment of the present utility model. DETAILED DESCRIPTION

[0058] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0059] In this application, the terms "comprises," "comprising," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus that includes a list of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not preclude the presence of additional identical elements in the process, method, article, or apparatus that includes the element.

[0060] First, the terms used in this application are explained as shown in the following table:

[0061] the term Notes DC DC AC comminicate O / S Break / Open leakage Leakage current ATE Automated testing equipment SOC System on Chip memory memory chips DPS Device power supply PE Pin electrical characteristics PMU Electrical parameter measurement unit TMU Timing Measurement Unit

[0062] As can be seen from the background technology, in the existing technology, discrete devices are used to build the PMU module design scheme, specifically a large number of high-precision operational amplifiers and digital-to-analog conversion chips and some high-precision sampling resistors. The disadvantage of this scheme is that it is easily affected by the noise of peripheral devices and its own temperature drift, and the accuracy and stability are poor, resulting in reduced reliability of chip testing. In addition, the board area occupied by discrete devices is too large, and the number of channels is limited, resulting in high cost of the test machine and reduced market competitiveness.

[0063] Therefore, the present invention discloses an electrical parameter measurement circuit to solve the problems of reduced chip test reliability and large board area in the prior art.

[0064] like Figure 1 FIG. 1 is a circuit diagram of an electrical parameter measurement circuit disclosed in the present invention. The electrical parameter measurement circuit includes:

[0065] A plurality of analog switches 100 , an electrical parameter measurement unit 200 , a multiplexer 300 , a signal conditioning unit 400 , an analog-to-digital conversion unit 500 and a main controller 600 .

[0066] The main controller 600 includes a plurality of control signal output terminals. Each of the analog switch 100 , the electrical parameter measurement unit 200 , the multiplexer 300 and the analog-to-digital conversion unit 500 is connected to a corresponding control signal output terminal.

[0067] It should be noted that each control signal output terminal outputs a different control signal to respectively control the operation status of each analog switch 100 , electrical parameter measurement unit 200 , multiplexer 300 and analog-to-digital conversion unit 500 .

[0068] The electrical parameter measurement unit 200 includes multiple signal driving terminals and multiple voltage output terminals, each signal driving terminal corresponds to a voltage output terminal, each analog switch 100 includes multiple measurement terminals, each measurement terminal is connected to a chip to be tested, and the measurement signal output terminal of each analog switch 100 is correspondingly connected to a signal driving terminal.

[0069] It should be noted that the electrical parameter measurement unit 200 includes a chip for electrical parameter measurement, and the single chip realizes the functions of voltage and current conversion and amplification, digital-to-analog conversion, clamping, and calibration.

[0070] The analog switch 100 is used to switch the chips to be tested connected to the electrical parameter measurement unit one by one in response to the switch control signal output by the main controller 600 .

[0071] The multiplexer 300 includes multiple sampling channels, each of which consists of a voltage input terminal and a sampling output terminal. Each sampling output terminal is connected to the input terminal of the signal conditioning unit 400. The voltage input terminal of each sampling channel is correspondingly connected to a voltage output terminal in the electrical parameter measurement unit 200.

[0072] The multiplexer 300 is used to control the connection of each sampling channel in response to the sampling control signal of the main controller 600, receive the output voltage of the electrical parameter measurement unit 200, generate a sampling signal based on the output voltage, and input the sampling signal into the signal conditioning unit 400.

[0073] An input end of the analog-to-digital conversion unit 500 is connected to an output end of the signal conditioning unit 400 , and an output end of the analog-to-digital conversion unit 500 is connected to an input end of the main controller 600 .

[0074] The analog-to-digital conversion unit 500 is used to convert the sampling signal into a digital signal in response to the conversion control signal of the main controller 600, and transmit the digital signal to the main controller 600, so that the main controller 600 performs data processing based on the digital signal to obtain measurement data.

[0075] Based on the electrical parameter measurement circuit disclosed in the above-mentioned embodiment of the present invention, in this solution, a chip for electrical parameter measurement replaces a discrete solution. A single chip implements voltage and current conversion and amplification functions, digital-to-analog conversion, clamping, and calibration functions. In conjunction with an external analog switching circuit, single-board multi-channel testing is achieved to achieve the purpose of improving the reliability of chip testing and reducing the board area.

[0076] like Figure 2 , which is a circuit diagram of an electrical parameter measurement unit disclosed in an embodiment of the present invention, the electrical parameter measurement unit 200 includes: an AD5522 chip U1 including four measurement channels, peripheral circuits for each measurement channel, a first pull-up resistor R19, a second pull-up resistor R17, and a third pull-up resistor R18.

[0077] It should be noted that the electrical parameter measurement unit uses the AD5522 chip U1. The AD5522 chip U1 integrates powerful functions such as digital-to-analog conversion circuit (DAC), voltage detection amplifier circuit, current detection amplifier circuit, serial interface (SPI / LVDS) circuit, etc. It has single-chip voltage drive, current drive, voltage signal conversion, and current conversion functions, which can effectively meet the DC parameter (DC) measurement and chip leakage current (leakage) detection of storage testers. The DAC has 16-bit resolution, and the voltage and current settings can reach microvolt and nanoampere levels, which can fully support most chip testing needs on the market.

[0078] The four voltage and current output pins with the same function in the AD5522 chip U1, namely the four FOH pins, have a maximum current output of 80mA, a voltage range of ±10V output, a voltage setting accuracy of 366uV (microvolts), and a current accuracy of 6.25nA (nanoamperes). In addition, the AD5522 chip U1 has its own four-channel voltage and current conversion amplifier circuit output.

[0079] The AD5522 chip U1 includes multiple control pins, each of which is connected to a control signal output terminal in a main controller.

[0080] The BUSY pin of the AD5522 chip U1 is connected to one end of the first pull-up resistor R19, and the other end of the first pull-up resistor R19 is connected to the positive 3.3V power supply so that the SPI interface can work normally.

[0081] The TMPALM pin of the AD5522 chip U1 is connected to one end of the second pull-up resistor R17, and the CGALM pin of the AD5522 chip U1 is connected to one end of the third pull-up resistor R18. The other ends of the second pull-up resistor R17 and the third pull-up resistor R18 are connected to form a common end, and the common end is connected to the positive 3.3V power supply to ensure that the temperature alarm and clamp alarm can work effectively.

[0082] The resistance of the first pull-up resistor R19 is 10 kΩ; the resistance of the second pull-up resistor R17 and the third pull-up resistor R18 are 3.3 kΩ.

[0083] The AD5522 chip U1 includes: measurement channels 0 to 3. The peripheral circuits corresponding to each measurement channel contain the same devices, namely: measurement resistor, RC circuit, compensation capacitor, first decoupling circuit, second decoupling circuit, filter capacitor, and the connection relationship between each device is the same.

[0084] The resistance of the measuring resistor is 10 kΩ, the value of the compensation capacitor is 220 pF, and the value of the filter capacitor is 100 pF.

[0085] Taking measurement channel 1 in the AD5522 chip U1 as an example, measurement channel 1 consists of the EXTFOH1 pin, EXTMEASIH1 pin, EXTMEASIL1 pin, FOH1 pin, MEASVH1 pin, CFF1 pin, AVSS pin, AVDD pin, CCOMP1 pin, and MESOUT1 pin.

[0086] The AD5522 chip U1 includes four AVDD pins and four AVSS pins. Each AVDD pin corresponds to one of the measurement channels, and each AVSS pin corresponds to one of the measurement channels.

[0087] The peripheral circuit corresponding to the measurement channel 1 includes: a measurement resistor R1, an RC circuit, a compensation capacitor C3, a first decoupling circuit, a second decoupling circuit, and a filter capacitor C4.

[0088] The EXTFOH1 pin of measurement channel 1 is connected to the first end of the measurement resistor R1 to implement the external current input sampling function.

[0089] The EXTMEASIH1 pin of measurement channel 1 is connected to the first end of measurement resistor R1. The second end of measurement resistor 1 is connected to the EXTMEASIL1 pin of measurement channel 1, the FOH1 pin, one end of the RC circuit, and one end of compensation capacitor C3. The other end of the RC circuit is connected to the MEASVH1 pin of measurement channel 1 as the frequency selection filter input to ensure the input of the voltage detection amplifier circuit is valid and stable.

[0090] It should be noted that the EXTMEASIH1 and EXTMEASIL1 pins are respectively connected to the two ends of the measuring resistor 1 and serve as current detection input signals.

[0091] The other end of the compensation capacitor C3 is connected to the CFF1 pin of the measurement channel 1 . The second end of the measurement resistor R1 serves as a signal driving end and is correspondingly connected to a measurement signal output end of the analog switch 100 .

[0092] The AVSS pin of measurement channel 1 is respectively connected to one end of the first decoupling circuit and the negative 15V power supply, and the other end of the first decoupling circuit is connected to the analog ground. The first decoupling circuit is composed of a first decoupling capacitor with a capacitance of 0.1uF and a second decoupling capacitor with a capacitance of 10uF. The AVSS pin is respectively connected to the negative 15V power supply, one end of the first decoupling capacitor, and one end of the second decoupling capacitor. The other ends of the first decoupling capacitor and the second decoupling capacitor are connected to the analog ground.

[0093] The AVDD pin of measurement channel 1 is connected to one end of the second decoupling circuit, and the other end of the second decoupling circuit is connected to the positive 15V power supply. The second decoupling circuit consists of a third decoupling capacitor with a capacitance of 0.1uF and a fourth decoupling capacitor with a capacitance of 10uF. The AVDD pin is connected to the positive 15V power supply, one end of the third decoupling capacitor, and one end of the fourth decoupling capacitor, respectively. The other ends of the third and fourth decoupling capacitors are connected to the analog ground.

[0094] The CCOMP1 pin of measurement channel 1 is connected to one end of filter capacitor C4, and the other end of filter capacitor C4 is connected to the analog ground.

[0095] The MESOUT1 pin of the measurement channel 1 serves as a voltage output terminal, and is correspondingly connected to a voltage input terminal of a sampling channel in the multiplexer 300 .

[0096] The RC circuit includes: a first resistor R8 and a third capacitor C5.

[0097] The second end of the measuring resistor R1 is connected to the first resistor R8 and one end of the third capacitor C5 respectively. The other ends of the first resistor R8 and the third capacitor C5 are connected to form a common end connected to the MEASVH1 pin of the measuring channel 1.

[0098] In the embodiment of the present invention, by using the AD5522 chip to replace the discrete solution, a single chip realizes the voltage and current conversion and amplification functions, digital-to-analog conversion, clamping and calibration functions, and cooperates with an external analog switching circuit to realize single-board multi-channel testing, so as to improve the reliability of chip testing and reduce the board area.

[0099] like Figure 3 , which is a circuit diagram of an analog switch disclosed in an embodiment of the present invention, the analog switch 100 includes: an ADG1411 chip U2, a first capacitor C54 and a second capacitor C55.

[0100] The ADG1411 chip U2 is specifically: ADG1411YCPZ-REEL chip.

[0101] The various measurement signal output pins in the ADG1411 chip U2 are connected to form a measurement signal output terminal.

[0102] Among them, pins 5, 8, 13 and 16 in the ADG1411 chip U2 are measurement signal output pins.

[0103] Each switch control signal input pin in the ADG1411 chip U2 is connected to a corresponding control signal output terminal in the main controller 600 .

[0104] Among them, pins 6, 7, 14 and 15 in the ADG1411 chip U2 are switch control signal input pins.

[0105] Each measurement pin in the ADG1411 chip U2 is connected to a chip under test.

[0106] Among them, pins 1, 4, 9 and 12 in the ADG1411 chip U2 are measurement pins.

[0107] The VDD pin in the ADG1411 chip U2 is connected to a positive 15V power supply and one end of the first capacitor C54, respectively. The other end of the first capacitor is connected to the analog ground.

[0108] The VSS pin in the ADG1411 chip U2 is connected to a positive 15V power supply and one end of the second capacitor C55, respectively. The other end of the second capacitor is connected to the analog ground.

[0109] In an embodiment of the present invention, each measurement signal output pin of the ADG1411 chip U2 is connected to an EXTFOH pin of the above-mentioned AD5522 chip. Since the AD5522 chip itself only has four measurement channels, once there are more than four chips to be tested, an analog switch 100 is required to switch the alternate measurement. Each analog switch 100 is connected to four chips to be tested. By controlling the high and low levels of the signal input pins of each switch, the DUT is connected to the EXTFOH pin of the AD5522 chip in an orderly manner. In this way, the number of chips to be tested simultaneously can be increased by adding analog switches, and the chips to be tested can be tested in batches in sequence according to the switching of the analog switches.

[0110] like Figure 4 , which is a circuit diagram of a multiplexer disclosed in an embodiment of the present invention, the multiplexer 300 includes: an ADG411 chip U3, a fourth capacitor C33, a fifth capacitor C34 and a sixth capacitor C32.

[0111] Among them, the ADG411 chip U3 is specifically: ADG411BRUZ-REEL chip.

[0112] The ADG411 chip U3 includes multiple voltage input pins and sampling output pins corresponding to each voltage input pin. Each voltage input pin and the corresponding voltage output pin constitute a sampling channel.

[0113] Each sampling output pin is connected to the input end of the signal conditioning unit, and the voltage input end corresponding to the sampling output pin is connected to a voltage output end of the electrical parameter measurement unit.

[0114] The common end formed by connecting the sampling control signal input pins in the ADG411 chip U3 is connected to the corresponding control signal output end in the main controller.

[0115] Among them, pin 1, pin 8, pin 9 and pin 16 are sampling control signal input pins.

[0116] The VDD pin in the ADG411 chip U3 is connected to a positive 15V power supply and one end of a fourth capacitor C33 , respectively. The other end of the fourth capacitor C33 is connected to an analog ground.

[0117] The VL pin in the ADG411 chip U3 is connected to a positive 5V power supply and one end of a fifth capacitor C34 , respectively. The other end of the fifth capacitor C34 is connected to an analog ground.

[0118] The VSS pin in the ADG411 chip U3 is connected to a negative 15V power supply and one end of the sixth capacitor C32 , respectively. The other end of the sixth capacitor C32 is connected to the analog ground.

[0119] In the embodiment of the present invention, the high and low levels of pins 1, 8, 9, and 16 are used to simultaneously control the on and off of the sampling channel, receive the output signal of the voltage or current sampling amplifier from the electrical parameter measurement unit, and supply it to the analog-to-digital conversion unit 500 as the sampling input signal, effectively realizing a closed loop of signal output and sampling.

[0120] like Figure 5 , which is a circuit diagram of a signal conditioning unit disclosed in an embodiment of the present invention, the signal conditioning unit 400 includes: a signal conditioning circuit 401 .

[0121] The input end of each signal conditioning circuit 401 is connected to a corresponding sampling output end of the multiplexer 300 , and the output end of each signal conditioning circuit 401 is connected to the input end of the analog-to-digital conversion unit 500 .

[0122] The signal conditioning circuit 401 includes an operational amplifier 4011 , a second resistor, a third resistor, and a seventh capacitor.

[0123] Preferably, the operational amplifier 4011 includes: an NJMOP2277 operational amplifier.

[0124] The non-inverting input pin of the operational amplifier 4011 is connected to a corresponding sampling output terminal, and the inverting input pin is connected to the output pin.

[0125] The output pin is connected to one end of the second resistor, and the other end of the second resistor is respectively connected to one end of the seventh capacitor and the input end of the analog-to-digital conversion unit.

[0126] The other end of the seventh capacitor is connected to one end of the third resistor, and the other end of the third resistor is connected to the analog ground.

[0127] Preferably, the resistance of the second resistor and the third resistor is 2 kΩ; the capacitance of the seventh capacitor is 100 nF.

[0128] It should be noted that Figure 5 Four signal conditioning circuits 401 are listed. The second resistors in each signal conditioning circuit 401 correspond to resistors R9, R11, R14, and R14 respectively; the third resistors in each signal conditioning circuit 401 correspond to resistors R10, R12, R13, and R15 respectively; and the seventh capacitors in each signal conditioning circuit 401 correspond to capacitors C21, C22, C23, and C24 respectively.

[0129] Preferably, the signal conditioning circuit 401 includes: a power supply circuit of the operational amplifier 4011, and the power supply circuit includes: an eighth capacitor and a ninth capacitor.

[0130] The positive power supply pin of the operational amplifier 4011 is respectively connected to one end of the eighth capacitor and the positive 15V power supply, and the other end of the eighth capacitor is connected to the analog ground; the negative power supply pin of the operational amplifier 4011 is respectively connected to one end of the ninth capacitor and the auxiliary 15V power supply, and the other end of the ninth capacitor is connected to the analog ground.

[0131] Preferably, the capacitance of the eighth capacitor and the ninth capacitor is 0.1 nF.

[0132] In the embodiment of the present invention, the signal conditioning unit 400 has four inputs, each of which comes from the MESOUT pin of the AD5522 and is connected to the input of each operational amplifier through the multiplexer 300. The input is then followed to the analog-to-digital conversion unit 500 through the NJMOP2277 high-precision operational amplifier. A 2kΩ resistor and a 100nF filter capacitor are connected in series at the output of the operational amplifier to send a stable voltage signal to the analog-to-digital conversion unit 500 to complete the sampling work.

[0133] Based on the above-mentioned multiplexer 400, as Figure 6 , which is a circuit diagram of an analog-to-digital conversion unit disclosed in an embodiment of the present utility model, the analog-to-digital conversion unit 500 includes: an ADS8686S chip U4.

[0134] Each input pin in the ADS8686S chip U4 is connected to the output end of a corresponding signal conditioning circuit 401; the SPI interface in the ADS8686S chip U4 is connected to the input end of the main controller 600; the SCLK pin and CS pin in the ADS8686S chip U4 are connected to the corresponding control signal output ends in the main controller 600.

[0135] It should be noted that the ADS8686S chip U4 is a 16-channel, 16-bit successive approximation analog-to-digital converter (ADC). It includes input clamps, 1MΩ input impedance, independent programmable gain amplifiers, programmable second-order low-pass filters, and ADC input drivers. It supports SPI serial interfaces and 16-bit or 8-bit parallel interfaces, allowing for flexible adaptation to various host controllers.

[0136] In an embodiment of the present utility model, the MESOUT signal from the AD5522 chip U1 is connected to the four input channels AIN_0A, AIN_1A, AIN_2A, and AIN_3A of the ADS8686S chip U4 after passing through the multiplexer 300 and the signal conditioning unit 400, and serves as the input sampling signal of the ADS8686S chip U4. After the software takes effect on the register configuration of the ADS8686S chip U4, it can output a digital value of 0-65535 corresponding to ±10V, and send the digital value to the main controller 600 through the SPI interface, realizing the closed-loop sampling of the electrical parameter measurement unit 200 by the analog-to-digital conversion unit 500, thereby achieving the purpose of accurate measurement.

[0137] like Figure 7 , which is a pin diagram of the main controller disclosed in an embodiment of the present utility model, the main controller includes: XC7Z015 chip U5.

[0138] The XC7Z015 chip U5 includes a plurality of control signal output terminals obtained by programming programmable IO interfaces and input terminals for receiving digital signals.

[0139] It should be noted that the XC7Z015 chip U5 is a Xilinx Zynq7000 series FPGA chip. The XC7Z015 chip U5 integrates a feature-rich dual-core ARM Cortex-A9 processor with a maximum main frequency of 767MHz. The XC7Z015 chip U5 has up to 148 programmable IO ports.

[0140] The XC7Z015 chip U5 is directly digitally connected to the analog-to-digital conversion unit 500, inputs and outputs data through ADC_DB10 and ADC_DB12, reads the DC value measured by the electrical parameter measurement unit 200, and converts it into a digital value through the electrical parameter measurement unit 200. The XC7Z015 chip U5 processes the data and generates corresponding test data, which is then sent to the host computer through pins E7 and D7. The remaining pins of the XC7Z015 chip U5 are used to initialize and perform basic configuration of the pins of the AD5522 chip U1 in the electrical parameter measurement unit 200.

[0141] Each embodiment in this specification is described in a progressive manner. The same or similar parts between the embodiments can be referred to each other. Each embodiment focuses on the differences from other embodiments. In particular, for system or system embodiments, since they are basically similar to method embodiments, the description is relatively simple. For relevant parts, refer to the partial description of the method embodiment. The system and system embodiments described above are merely schematic, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment. A person of ordinary skill in the art can understand and implement it without expending creative work.

[0142] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the components and steps of each example according to their functions. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0143] The above description of the disclosed embodiments will enable one skilled in the art to implement or use the present invention. Various modifications to these embodiments will be readily apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not limited to the embodiments shown herein but is intended to conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An electrical parameter measurement circuit, characterized in that: The circuit includes: a plurality of analog switches, an electrical parameter measurement unit, a multiplexer, a signal conditioning unit, an analog-to-digital conversion unit and a main controller; The main controller includes a plurality of control signal output terminals, and each of the analog switch, the electrical parameter measurement unit, the multiplexer, and the analog-to-digital conversion unit is connected to a corresponding control signal output terminal; The electrical parameter measurement unit includes a plurality of signal driving terminals and a plurality of voltage output terminals, each of the signal driving terminals corresponds to one of the voltage output terminals, each of the analog switches includes a plurality of measuring terminals, each of the measuring terminals is connected to a chip to be tested, and the measurement signal output terminal of each analog switch is connected to a corresponding signal driving terminal; the analog switch is used to switch the chips to be tested connected to the electrical parameter measurement unit one by one in response to the switch control signal output by the main controller; The multiplexer includes a plurality of sampling channels, each of which is composed of a voltage input terminal and a sampling output terminal, each of which is connected to the input terminal of the signal conditioning unit, and the voltage input terminal of each sampling channel is correspondingly connected to one of the voltage output terminals of the electrical parameter measurement unit; the multiplexer is used to control the connection of each sampling channel in response to a sampling control signal from the main controller, receive the output voltage of the electrical parameter measurement unit, generate a sampling signal based on the output voltage, and input the sampling signal into the signal conditioning unit; The input end of the analog-to-digital conversion unit is connected to the output end of the signal conditioning unit, and the output end of the analog-to-digital conversion unit is connected to the input end of the main controller. The analog-to-digital conversion unit is used to convert the sampling signal into a digital signal in response to the conversion control signal of the main controller, and transmit the digital signal to the main controller, so that the main controller performs data processing based on the digital signal to obtain measurement data.

2. The circuit according to claim 1, wherein: The analog switch includes: an ADG1411 chip, a first capacitor and a second capacitor; Each measurement signal output pin in the ADG1411 chip is connected to form a measurement signal output terminal; Each switch control signal input pin in the ADG1411 chip is connected to the corresponding control signal output terminal in the main controller; Each measurement pin of the ADG1411 chip is connected to one of the chips to be tested; The VDD pin of the ADG1411 chip is connected to a positive 15V power supply and one end of the first capacitor, respectively, and the other end of the first capacitor is connected to an analog ground; The VSS pin in the ADG1411 chip is connected to a positive 15V power supply and one end of the second capacitor, respectively, and the other end of the second capacitor is connected to an analog ground.

3. The circuit according to claim 1, wherein: The electrical parameter measurement unit includes: an AD5522 chip including four measurement channels, peripheral circuits for each measurement channel, a first pull-up resistor, a second pull-up resistor, and a third pull-up resistor; the AD5522 chip includes a plurality of control pins, each of which is connected to a control signal output terminal in the main controller; The BUSY pin of the AD5522 chip is connected to one end of the first pull-up resistor, and the other end of the first pull-up resistor is connected to a positive 3.3V power supply; The TMPALM pin of the AD5522 chip is connected to one end of the second pull-up resistor, the CGALM pin of the AD5522 chip is connected to one end of the third pull-up resistor, the other ends of the second pull-up resistor and the third pull-up resistor are connected to form a common end, and the common end is connected to a positive 3.3V power supply; Each of the peripheral circuits has the same structure, and includes: a measuring resistor, an RC circuit, a compensation capacitor, a first decoupling circuit, a second decoupling circuit, and a filter capacitor; The EXTFOH pin of the measurement channel is connected to the first end of the measurement resistor, and the first end of the measurement resistor is connected to the EXTMEASIH pin of the measurement channel; The second end of the measurement resistor is connected to the EXTMEASIL pin and FOH pin of the measurement channel, one end of the RC circuit, and one end of the compensation capacitor. The other end of the RC circuit is connected to the MEASVH pin of the measurement channel. The other end of the compensation capacitor is connected to the CFF pin of the measurement channel. The second end of the measurement resistor serves as a signal driving end and is correspondingly connected to a measurement signal output end of the analog switch. The AVSS pin of the measurement channel is respectively connected to one end of the first decoupling circuit and a negative 15V power supply, and the other end of the first decoupling circuit is connected to the analog ground; The AVDD pin of the measurement channel is connected to one end of the second decoupling circuit, and the other end of the second decoupling circuit is connected to a positive 15V power supply; The CCOMP pin of the measurement channel is connected to one end of the filter capacitor, and the other end of the filter capacitor is connected to the analog ground; The MESOUT pin of the measurement channel serves as a voltage output terminal, and is correspondingly connected to a voltage input terminal of one of the sampling channels in the multiplexer.

4. The circuit according to claim 3, characterized in that The RC circuit includes: a first resistor and a third capacitor; The second end of the measuring resistor is connected to one end of the first resistor and the third capacitor respectively, and the common end formed by the other ends of the first resistor and the third capacitor is connected to the MEASVH pin of the measuring channel.

5. The circuit according to claim 3, characterized in that The resistance value of the measuring resistor includes: 40Ω; the resistance value of the first pull-up resistor includes: 10kΩ; the resistance values ​​of the second pull-up resistor and the third pull-up resistor include: 3.3kΩ.

6. The circuit according to claim 1, wherein: The multiplexer includes: an ADG411 chip, a fourth capacitor, a fifth capacitor and a sixth capacitor; The ADG411 chip includes a plurality of voltage input pins and sampling output pins corresponding to each of the voltage input pins, and each of the voltage input pins and the corresponding voltage output pin constitute a sampling channel; Each of the sampling output pins is connected to the input terminal of the signal conditioning unit, and the voltage input terminal corresponding to the sampling output pin is connected to one of the voltage output terminals of the electrical parameter measurement unit; A common terminal formed by connecting each sampling control signal input pin in the ADG411 chip to a corresponding control signal output terminal in the main controller; The VDD pin of the ADG411 chip is connected to a positive 15V power supply and one end of the fourth capacitor, respectively, and the other end of the fourth capacitor is connected to an analog ground; The VL pin of the ADG411 chip is connected to a positive 5V power supply and one end of the fifth capacitor respectively, and the other end of the fifth capacitor is connected to an analog ground; The VSS pin in the ADG411 chip is connected to a negative 15V power supply and one end of the sixth capacitor, respectively, and the other end of the sixth capacitor is connected to an analog ground.

7. The circuit according to claim 1, wherein: The signal conditioning unit includes a plurality of signal conditioning circuits; The input end of each of the signal conditioning circuits is correspondingly connected to one of the sampling output ends, and the output end of each of the signal conditioning circuits is connected to the input end of the analog-to-digital conversion unit.

8. The circuit according to claim 7, characterized in that The signal conditioning circuit includes: an operational amplifier, a second resistor, a third resistor and a seventh capacitor; The non-inverting input pin of the operational amplifier is connected to a corresponding sampling output terminal, and the inverting input pin is connected to the output pin; The output pin is connected to one end of the second resistor, and the other end of the second resistor is respectively connected to one end of the seventh capacitor and the input end of the analog-to-digital conversion unit; The other end of the seventh capacitor is connected to one end of the third resistor, and the other end of the third resistor is connected to the analog ground.

9. The circuit according to claim 7, characterized in that The analog-to-digital conversion unit includes: an ADS8686S chip; Each input pin of the ADS8686S chip is correspondingly connected to an output end of the signal conditioning circuit; The SPI interface in the ADS8686S chip is connected to the input end of the main controller; The SCLK pin and CS pin in the ADS8686S chip are connected to the corresponding control signal output terminals in the main controller.

10. The circuit according to claim 1, wherein: The main controller includes: XC7Z015 chip; The XC7Z015 chip includes a plurality of control signal output terminals obtained by programming programmable IO interfaces and an input terminal for receiving the digital signal.

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