ELECTRONIC CIRCUIT MODULE

Abstract

An electronic circuit module (10) is designed for mounting on a mainboard (91) which includes a power supply. The electronic circuit module (10) comprises: a photoelectric conversion unit (40) that performs a conversion between an optical signal and an electrical signal; a processor unit (20) that performs a calculation using the electrical signal; an electrical power conversion unit (50) that converts electrical power from the electrical power supply and delivers it to the photoelectric conversion unit (40) and the processor unit (20); and a component substrate (60) on which the photoelectric conversion unit (40), the processor unit (20), and the electrical power conversion unit (50) are mounted.The photoelectric conversion unit (40), the processor unit (20) and the electrical power conversion unit (50) are connected only by a conductor structure formed on the component substrate (60).

Description

Electronic Circuit Module

[0001] The present invention relates to an electronic circuit module including a photoelectric conversion unit that converts optical signals and electrical signals, a processor unit, and a power conversion unit.

[0002] Patent Document 1 describes a circuit unit including an optical package element, a processor element, an electronic device, an electronic circuit element, and an interposer. The optical package element and the processor element are connected via the electronic device and the electronic circuit element in the interposer.

[0003] US Patent Application Publication No. 2021 / 0091056

[0004] However, in the conventional device as disclosed in Patent Document 1, the information transmission efficiency and power supply efficiency may be insufficient.

[0005] SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide an electronic circuit module that can achieve high information transmission efficiency and high power supply efficiency.

[0006] An electronic circuit module according to an embodiment of the present invention is an electronic circuit module mounted on a motherboard equipped with a power supply source. The electronic circuit module includes a photoelectric conversion unit that converts optical signals to electrical signals, a processor unit that performs arithmetic processing using the electrical signals, a power conversion unit that converts power from the power supply source and supplies it to the photoelectric conversion unit and the processor unit, and a package substrate on which the photoelectric conversion unit, processor unit, and power conversion unit are mounted. The photoelectric conversion unit, processor unit, and power conversion unit are connected only through conductor patterns formed on the package substrate.

[0007] In this configuration, the photoelectric conversion unit and the processor unit are connected only by the conductor pattern formed on the package substrate, without going through the motherboard. This improves information transmission efficiency. Also, because the photoelectric conversion unit, processor unit, and power conversion unit are connected only by the conductor pattern formed on the package substrate, without going through the motherboard, the efficiency of power supply from the power conversion unit to the photoelectric conversion unit and processor unit is improved.

[0008] According to the present invention, high information transmission efficiency and high power supply efficiency can be achieved.

[0009] FIG. 1 is a functional block diagram showing an example of the circuit configuration of an electronic circuit module according to a first embodiment. FIG. 2 is a side view showing the configuration of the electronic circuit module according to the first embodiment. FIG. 3 is a side view showing the electronic circuit module according to the first embodiment mounted on a motherboard. FIG. 4 is a side view showing the configuration of an electronic circuit module according to a second embodiment. FIG. 5 is a side view showing the configuration of an electronic circuit module according to a third embodiment. FIG. 6A is a plan view showing the configuration of an electronic circuit module according to a fourth embodiment, FIG. 6B is a side view taken along line A-A' of FIG. 6A, and FIG. 6C is a cross-sectional view taken along line B-B' of FIG. 6A. FIG. 7A is a diagram showing an example of a wiring pattern for a data communication system in an electronic circuit module according to a fourth embodiment, and FIG. 7B is a diagram showing an example of a wiring pattern for a power supply system in an electronic circuit module according to the fourth embodiment. Fig. 8A is a plan view showing the configuration of an electronic circuit module according to a fifth embodiment, Fig. 8B is a diagram showing an example of a wiring pattern for a data communication system in the electronic circuit module according to the fifth embodiment, and Fig. 8C is a diagram showing an example of a wiring pattern for a power supply system in the electronic circuit module according to the fifth embodiment. Fig. 9A is a plan view showing the configuration of an electronic circuit module according to a sixth embodiment, Fig. 9B is a diagram showing an example of a wiring pattern for a data communication system in the electronic circuit module according to the sixth embodiment, and Fig. 9C is a diagram showing an example of a wiring pattern for a power supply system in the electronic circuit module according to the sixth embodiment. Fig. 10A is a plan view showing the configuration of an electronic circuit module according to a seventh embodiment, Fig. 10B is a diagram showing an example of a wiring pattern for a data communication system in the electronic circuit module according to the seventh embodiment, and Fig. 10C is a diagram showing an example of a wiring pattern for a power supply system in the electronic circuit module according to the seventh embodiment. Figs. 11A and 11B are plan views showing the configuration of an electronic circuit module according to an eighth embodiment. FIG. 12(A) is a diagram showing an example of a wiring pattern for a data communication system in an electronic circuit module according to the eighth embodiment, and FIG. 12(B) is a diagram showing an example of a wiring pattern for a power supply system in an electronic circuit module according to the eighth embodiment.Fig. 13(A) is a plan view showing the configuration of an electronic circuit module according to a ninth embodiment, and Figs. 13(B) and 13(C) are diagrams showing different examples of the CC' cross section of Fig. 13(A). Fig. 14(A) is a diagram showing an example of a wiring pattern for a data communication system in the electronic circuit module according to the ninth embodiment, and Fig. 14(B) is a diagram showing an example of a wiring pattern for a power supply system in the electronic circuit module according to the ninth embodiment.

[0010] [First Embodiment] An electronic circuit module according to a first embodiment of the present invention will be described with reference to the drawings. Fig. 1 is a functional block diagram showing an example of the circuit configuration of the electronic circuit module according to the first embodiment. Fig. 2 is a side view showing the configuration of the electronic circuit module according to the first embodiment. Fig. 3 is a side view showing the electronic circuit module according to the first embodiment mounted on a motherboard. In Figs. 2 and 3, wiring patterns formed in the substrate are also shown by solid lines.

[0011] (Circuit Configuration of Electronic Circuit Module 10 ) As shown in FIG. 1 , the electronic circuit module 10 includes a processor unit 20 , a memory 30 , a photoelectric conversion unit 40 , and a power conversion unit 50 .

[0012] The processor unit 20 is connected to the memory 30 via an information processing bus Lpm. The processor unit 20 is connected to the photoelectric conversion unit 40 via a data transmission line Lop. The photoelectric conversion unit 40 is connected to the outside via an optical waveguide OTL.

[0013] The processor unit 20 performs predetermined arithmetic processing using the electrical signal input through the data transmission line Lop from the photoelectric conversion unit 40. At this time, the processor unit 20 performs the arithmetic processing using the memory 30 connected by the information processing bus Lpm.

[0014] The processor unit 20 outputs the calculation result as an electrical signal, which is input to the photoelectric conversion unit 40 via a data transmission line Lop.

[0015] The photoelectric conversion unit 40 converts an optical signal input from the optical waveguide OTL into an electrical signal and outputs the electrical signal to the processor unit 20 through the data transmission line Lop. The photoelectric conversion unit 40 also converts an electrical signal input from the processor unit 20 through the data transmission line Lop into an optical signal and outputs the optical signal to the outside through the optical waveguide OTL.

[0016] The power conversion unit 50 is connected to the processor unit 20 via a processor power supply line Lpwp, to the memory 30 via a memory power supply line Lpwm, and to the photoelectric conversion unit 40 via a photoelectric conversion unit power supply line Lpwo.

[0017] The power conversion unit 50 converts input power from an external power supply (a motherboard, described later) into power for the processor unit 20, the memory 30, and the photoelectric conversion unit 40, and supplies the power to these units.

[0018] In this way, by using optical signals, the information transmission speed can be increased compared to when all signals are electrical.

[0019] (Configuration of Electronic Circuit Module 10 ) As shown in FIG. 2 , the electronic circuit module 10 includes a processor unit 20 , a memory 30 , a photoelectric conversion unit 40 , a power conversion unit 50 , and a package substrate 60 .

[0020] The processor unit 20, memory 30, photoelectric conversion unit 40, and power conversion unit 50 are each mounted electronic components and include a housing of a predetermined shape and a plurality of terminal conductors. The housing has functional parts that realize the functions of each unit. The plurality of terminal conductors are arranged in a predetermined pattern on the bottom surface of the housing.

[0021] The package substrate 60 includes a first substrate 61 and a second substrate 62. The first substrate 61 and the second substrate 62 are each flat. For example, the planar area of ​​the second substrate 62 (the area as viewed in the z-axis direction in FIGS. 2 and 3 ) is smaller than the planar area of ​​the first substrate 61. The planar areas of the first substrate 61 and the second substrate 62 are also smaller than the planar area of ​​a motherboard 91 on which the electronic circuit module 10 is mounted.

[0022] The processor unit 20 , the memory 30 , and the photoelectric conversion unit 40 are mounted on the surface of the second substrate 62 .

[0023] The data transmission line Lop connecting the processor unit 20 and the photoelectric conversion unit 40 is formed solely by a conductor pattern formed on the second substrate 62. In other words, the data transmission line Lop is formed without passing through the motherboard 91 on which the electronic circuit module 10 is mounted. This allows the data transmission line Lop to be shortened, thereby reducing transmission loss and delay in the data transmission line Lop.

[0024] Similarly, the information processing bus Lpm connecting the processor unit 20 and the memory 30 is also composed solely of a conductor pattern formed on the second substrate 62, just like the data transmission line Lop. In other words, the information processing bus Lpm is configured without passing through the motherboard 91 on which the electronic circuit module 10 is mounted. This allows the information processing bus Lpm to be shortened, thereby reducing transmission loss and delay of the information processing bus Lpm.

[0025] Furthermore, the processor unit 20 and the photoelectric conversion unit 40 are preferably disposed close to each other. The distance between the processor unit 20 and the photoelectric conversion unit 40 is preferably as short as possible. For example, the processor unit 20 and the photoelectric conversion unit 40 are preferably disposed as close as possible in terms of the accuracy of pattern formation on the second substrate 62 and the mounting accuracy of the processor unit 20 and the photoelectric conversion unit 40. For example, the distance is preferably less than the length of the long side of the processor unit 20 or the photoelectric conversion unit 40, and more preferably less than half of the long side or less than the length of the short side. If the processor unit 20 or the photoelectric conversion unit 40 is square in plan view, the distance is preferably less than one side of the square, and more preferably less than half of the short side.

[0026] In this way, the physical distance between the processor unit 20 and the photoelectric conversion unit 40 is shortened, which makes it easier to shorten the data transmission line Lop.

[0027] Furthermore, the conductor pattern that constitutes the data transmission line Lop is preferably formed on the surface of the second substrate 62. This prevents the data transmission line Lop from having a portion that extends in the thickness direction of the second substrate 62, thereby reducing transmission loss and delay.

[0028] Furthermore, the data transmission line Lop preferably connects the processor unit 20 and the photoelectric conversion unit 40 over the shortest distance in a plan view. Specifically, for example, the conductor patterns constituting the data transmission line Lop preferably connect the terminals of the processor unit 20 and the terminals of the photoelectric conversion unit 40 in straight lines in a plan view. This allows the transmission loss and delay of the data transmission line Lop to be further reduced.

[0029] The processor unit 20 and the memory 30 are preferably arranged close to each other, similar to the relationship between the processor unit 20 and the photoelectric conversion unit 40, and the information processing bus Lpm is preferably short, similar to the data transmission line Lop. This makes it possible to suppress transmission loss and transmission delay between the processor unit 20 and the memory 30.

[0030] Furthermore, it is preferable that the second substrate 62 has a high wiring density of the conductor patterns. This allows for a larger number of conductor patterns per unit area. This improves the flexibility of the wiring patterns of the processor unit 20, the photoelectric conversion unit 40, and the data transmission line Lop, and the information processing bus Lpm connecting the processor unit 20 and the memory 30, making it easier to form short conductor patterns connecting these.

[0031] Furthermore, the second substrate 62 is formed of a material (e.g., a material mainly made of silicon or a resin such as a dielectric material with a low dielectric loss tangent) that has lower loss of high-frequency signals than the motherboard 91 (see FIG. 3) on which the electronic circuit module 10 is mounted, thereby further suppressing transmission loss due to the data transmission line Lop and the information processing bus Lpm.

[0032] The second substrate 62 also has a processor power supply line Lpwp, a memory power supply line Lpwm, and a photoelectric conversion unit power supply line Lpwo formed thereon. The processor power supply line Lpwp, the memory power supply line Lpwm, and the photoelectric conversion unit power supply line Lpwo penetrate the second substrate 62 in the thickness direction. The processor power supply line Lpwp connects an electrode on the front surface of the second substrate 62 on which the processor unit 20 is mounted to a processor power supply terminal on the back surface of the second substrate 62. The memory power supply line Lpwm connects an electrode on the front surface of the second substrate 62 on which the memory 30 is mounted to a memory power supply terminal on the back surface of the second substrate 62. The photoelectric conversion unit power supply line Lpwo connects an electrode on the front surface of the second substrate 62 on which the photoelectric conversion unit 40 is mounted to a photoelectric conversion unit power supply terminal on the back surface of the second substrate 62.

[0033] It is preferable that the processor power supply line Lpwp, memory power supply line Lpwm, and photoelectric conversion unit power supply line Lpwo be as straight as possible. In other words, it is preferable that they are formed so that most of their length extends in the thickness direction of the second substrate 62. Because the thickness of the second substrate 62 is significantly smaller than the other dimensions, this configuration shortens the power supply distance. Therefore, a decrease in power supply efficiency is suppressed. Furthermore, it is preferable that the sections of the processor power supply line Lpwp, memory power supply line Lpwm, and photoelectric conversion unit power supply line Lpwo that extend in the thickness direction have a larger cross-sectional area than the data transmission line Lop and the information processing bus Lpm. This improves power supply efficiency.

[0034] The second substrate 62 and the power conversion unit 50 are mounted on the surface of the first substrate 61 .

[0035] A plurality of power supply lines Lpw are formed on the first substrate 61. The plurality of power supply lines Lpw are conductor patterns and are connected to the electrodes on which the power conversion unit 50 is mounted, the electrodes on which the processor power supply terminals of the second substrate 62 are mounted, the electrodes on which the memory power supply terminals are mounted, and the electrodes on which the photoelectric conversion unit power supply terminals are mounted, respectively.

[0036] With this configuration, the power supply from the power conversion unit 50 to the processor unit 20 can be completed by the conductor pattern (power supply line Lpw) within the first substrate 61, which is smaller than the motherboard 91, and the conductor pattern (processor power supply line Lpwp) extending in the thickness direction of the second substrate 62. This allows the electronic circuit module 10 to supply power to the processor unit 20 with high efficiency.

[0037] Similarly, the power supply from the power conversion unit 50 to the photoelectric conversion unit 40 can be completed by a conductor pattern (power supply line Lpw) in the first substrate 61, which is smaller than the motherboard 91, and a conductor pattern (power supply line Lpwo for the photoelectric conversion unit) extending in the thickness direction of the second substrate 62. This allows the electronic circuit module 10 to supply power to the photoelectric conversion unit 40 with high efficiency.

[0038] Similarly, power supply from the power conversion unit 50 to the memory 30 can be completed by a conductor pattern (power supply line Lpw) within the first substrate 61, which is smaller than the motherboard 91, and a conductor pattern (memory power supply line Lpwm) extending in the thickness direction of the second substrate 62. This allows the electronic circuit module 10 to supply power to the memory 30 with high efficiency.

[0039] The second substrate 62 and the power conversion unit 50 are mounted adjacent to each other. In other words, no other mounted electronic components are mounted between the second substrate 62 and the power conversion unit 50. The second substrate 62 and the power conversion unit 50 are disposed in close proximity to each other. For example, the distance between the processor unit 20 and the power conversion unit 50 on the second substrate 62 is preferably equal to or less than the length of the long sides of the processor unit 20 and the power conversion unit 50, and more preferably equal to or less than half of the long sides or the length of the short sides. If the processor unit 20 and the power conversion unit 50 are square in plan view, the distance is preferably equal to or less than one side of the square, and more preferably equal to or less than one half of the long sides.

[0040] This shortens the distance over which power is supplied from the power conversion unit 50 to the processor unit 20, the memory 30, and the photoelectric conversion unit 40, thereby preventing a decrease in power supply efficiency.

[0041] The first substrate 61 is made of a material that is easier to obtain and manufacture than the second substrate 62 .

[0042] A plurality of external connection terminals BP61 are formed on the rear surface of the first substrate 61.

[0043] It is preferable that the width and cross-sectional area of ​​the multiple power supply lines Lpw be as large as possible. This prevents a decrease in power supply efficiency. In particular, in this configuration, the first substrate 61 does not have a data communication conductor pattern, and only the multiple power supply lines Lpw are formed. Therefore, the wiring and shape of the multiple power supply lines Lpw are easily formed as desired. That is, the multiple power supply lines Lpw can be made larger in width and cross-sectional area and shorter in length than when the multiple power supply lines Lpw are formed on the same substrate (e.g., a motherboard) as the data communication conductor pattern, as in the conventional case. Therefore, the electronic circuit module 10 can realize power supply lines Lpw with high power supply efficiency.

[0044] In particular, low voltage and high current are required for the processor unit 20. Therefore, by shortening the power supply line Lpw and the processor power supply line Lpwp from the power conversion unit 50 to the processor unit 20, the electronic circuit module 10 can supply power more efficiently.

[0045] Furthermore, the power supply line Lpw extends linearly from the power conversion unit 50 to the processor unit 20 in a direction perpendicular to the thickness direction of the first substrate 61, and the processor power supply line Lpwp extends linearly in the thickness direction of the second substrate 62, thereby minimizing the distance of the line connecting the power conversion unit 50 and the processor unit 20. This further reduces power transmission loss, enabling the electronic circuit module 10 to supply power more efficiently.

[0046] Power input lines 652 are formed on the first substrate 61. The power input lines 652 connect the electrodes on which the power conversion unit 50 is mounted to the external connection terminals BP61 for power input. The power input lines 652 extend in the thickness direction of the first substrate 61. The power input lines 652 are preferably as linear as possible. In other words, they are preferably formed so that most of the portion extending in the thickness direction of the first substrate 61 is. Because the thickness of the first substrate 61 is significantly smaller than the other dimensions, this configuration can shorten the power supply distance. Therefore, a decrease in the efficiency of power input from the outside is suppressed. Furthermore, the portion of the power input line 652 extending in the thickness direction preferably has a large cross-sectional area. This improves the efficiency of power input from the outside.

[0047] With this configuration, the electronic circuit module 10 can achieve high information transmission efficiency and high power supply efficiency.

[0048] The electronic circuit module 10 having such a configuration is mounted on a motherboard 91, as shown in Fig. 3. The motherboard 91 is provided with a power supply that converts power from a commercial power source or the like into DC power, and power is supplied from this power supply to the electronic circuit module 10 via a power line 92P of the motherboard 91.

[0049] Furthermore, a plurality of mounting lands 93 are formed on the surface of the motherboard 91, and a socket mechanism 94 is provided.

[0050] The plurality of external connection terminals BP61 of the electronic circuit module 10 abuts against the plurality of mounting lands 93 of the motherboard 91. In this state, the socket mechanism 94 fixes the electronic circuit module 10 by pressing it against the surface of the motherboard 91. This provides a stable electrical and mechanical connection between the electronic circuit module 10 and the motherboard 91.

[0051] It is also possible to mount the electronic circuit module 10 on the motherboard 91 using a conductive bonding material such as solder. However, providing the socket mechanism 94 described above makes it easier to attach and replace the electronic circuit module 10. Furthermore, although the present embodiment shows an aspect in which the socket mechanism 94 is used, other structures may also be used as long as they can detachably fix the electronic circuit module 10 to the motherboard 91.

[0052] In the electronic circuit module 10, the processor unit 20, memory 30, photoelectric conversion unit 40, and power conversion unit 50 are mounted by solder or the like, but these can also be mounted using a detachable structure such as a socket mechanism 94. Furthermore, a detachable structure such as a socket mechanism 94 can also be used to fix the second substrate 62 to the first substrate 61.

[0053] In the above-described embodiment, the processor unit 20 and the photoelectric conversion unit 40 are connected only by the conductor pattern within the electronic circuit module 10. However, the processor unit 20 may be connected to another photoelectric conversion unit mounted on the motherboard 91 in a complementary manner, together with the photoelectric conversion unit 40 within the electronic circuit module 10.

[0054] Similarly, in the above-described embodiment, the processor unit 20 and the power conversion unit 50 are connected only by the conductor patterns inside the electronic circuit module 10. However, the processor unit 20 may be connected to another power conversion unit mounted on the motherboard 91 in a complementary manner, together with the power conversion unit 50 inside the electronic circuit module 10.

[0055] Furthermore, in the above-described embodiment, the photoelectric conversion unit 40 and the power conversion unit 50 are connected only by the conductor pattern inside the electronic circuit module 10. However, the photoelectric conversion unit 40 may be connected to another power conversion unit mounted on the motherboard 91 in a complementary manner, together with the power conversion unit 50 inside the electronic circuit module 10.

[0056] Second Embodiment An electronic circuit module according to a second embodiment of the present invention will be described with reference to the drawings. Fig. 4 is a side view showing the configuration of the electronic circuit module according to the second embodiment.

[0057] 4, the electronic circuit module 10A according to the second embodiment differs from the electronic circuit module 10 according to the first embodiment in that it includes a heat dissipation mechanism. The other configuration of the electronic circuit module 10A is the same as that of the electronic circuit module 10, and a description of similar parts will be omitted.

[0058] The electronic circuit module 10A includes a heat sink 71 and a thermally conductive gel 710. The heat sink 71 is a flat plate made of a highly thermally conductive material such as metal. In plan view, the heat sink 71 overlaps the processor unit 20, the memory 30, the photoelectric conversion unit 40, and the power conversion unit 50.

[0059] The heat sink 71 is connected to the processor unit 20 , the memory 30 , the photoelectric conversion unit 40 , and the power conversion unit 50 via a thermally conductive gel 710 .

[0060] With this configuration, the electronic circuit module 10 can effectively dissipate heat from the processor unit 20, the memory 30, the photoelectric conversion unit 40, and the power conversion unit 50 to the outside.

[0061] It is possible to omit the thermally conductive gel 710. However, even if the top surfaces of the heat dissipation targets are not flush (for example, if the top surface of the power conversion unit 50 in FIG. 4 is lower than the other top surfaces), the heat sink 71 common to multiple units can be connected via a highly thermally conductive path.

[0062] In the above description, the heat sink 71 is shared by the processor unit 20, memory 30, photoelectric conversion unit 40, and power conversion unit 50, but each unit may have its own heat sink. If separate heat sinks are provided, it is preferable that at least the processor unit 20 and power conversion unit 50, which generate particularly high amounts of heat, have a heat sink.

[0063] However, by using the common heat sink 71, the number of components of the electronic circuit module 10A can be reduced, and the heat dissipation area can be easily increased.

[0064] Third Embodiment An electronic circuit module according to a third embodiment of the present invention will be described with reference to the drawings. Fig. 5 is a side view showing the configuration of an electronic circuit module according to the third embodiment.

[0065] 5, the electronic circuit module 10B according to the third embodiment differs from the electronic circuit module 10 according to the first embodiment in the configuration of the power supply system. Other configurations of the electronic circuit module 10B are similar to those of the electronic circuit module 10, and a description of similar parts will be omitted.

[0066] The electronic circuit module 10B includes a package substrate 60B. The package substrate 60B includes a first substrate 61B and a second substrate 62B.

[0067] The first substrate 61B is made of the same material as the first substrate 61 according to the first embodiment. The planar area of ​​the first substrate 61B is approximately the same as the planar area of ​​the second substrate 62. A plurality of power conversion units 51B are mounted on the rear surface of the first substrate 61B, i.e., the surface of the first substrate 61B opposite to the surface on which the second substrate 62 is mounted.

[0068] The electronic circuit module 10B includes a power conversion unit 51B for the memory 30, and a power conversion unit 51B for the processor unit 20 and the photoelectric conversion unit 40.

[0069] An external power supply connector 52 is mounted on the back surface of the first substrate 61B. An external power supply cable PL is connected to the external power supply connector 52. This allows power to be supplied to the electronic circuit module 10B from the outside.

[0070] Here, in a plan view of the electronic circuit module 10B, the layout area of ​​the plurality of power conversion units 51B overlaps with the layout areas of the processor unit 20, the memory 30, and the photoelectric conversion unit 40.

[0071] Therefore, the planar area of ​​the electronic circuit module 10B can be made smaller than that of the electronic circuit module 10.

[0072] 5 shows a configuration in which the package substrate 60B is connected to the motherboard using a connector, etc. However, a configuration in which multiple terminal electrodes are formed on the side edge of the package substrate 60B and the multiple terminal electrodes are inserted into the connector of the motherboard may also be employed.

[0073] The electronic circuit module 10B includes a heat sink 71B, a heat sink 72B, a thermally conductive gel 710B, and a thermally conductive gel 720B.

[0074] The heat sink 71B is thermally connected to the processor unit 20, the memory 30, and the photoelectric conversion unit 40 via the thermally conductive gel 710B. This allows the processor unit 20, the memory 30, and the photoelectric conversion unit 40 to efficiently dissipate heat.

[0075] The heat sink 72B is thermally connected to the plurality of power conversion units 51B via thermally conductive gel 720B, thereby allowing the plurality of power conversion units 51B to efficiently dissipate heat.

[0076] Furthermore, in this configuration, the processor unit 20 and the multiple power conversion units 51B, which generate relatively high amounts of heat, are each provided with a separate heat sink 71B, 72B. This allows the electronic circuit module 10B to achieve even higher heat dissipation efficiency. The heat sink 71B and the heat sink 72B are also located on different sides of the package substrate 60B. This makes it difficult for the heat from the heat sink 71B and the heat sink 72B to combine, improving the heat dissipation effect of the electronic circuit module 10B.

[0077] Furthermore, the electronic circuit module 10B does not need to be mounted on a motherboard 91, and therefore can be used in a wider variety of situations.

[0078] [Fourth Embodiment] An electronic circuit module according to a fourth embodiment of the present invention will be described with reference to the drawings. Fig. 6(A) is a plan view showing the configuration of the electronic circuit module according to the fourth embodiment, Fig. 6(B) is a side view taken along line A-A' of Fig. 6(A), and Fig. 6(C) is a cross-sectional view taken along line B-B' of Fig. 6(A). Fig. 7(A) is a diagram showing an example of a wiring pattern for a data communication system in the electronic circuit module according to the fourth embodiment, and Fig. 7(B) is a diagram showing an example of a wiring pattern for a power supply system in the electronic circuit module according to the fourth embodiment.

[0079] Note that the components in this embodiment (fourth embodiment) and the following embodiments are the same as those in the first embodiment, except for the following points, and the description of these points will be omitted. Also, in the following embodiments, the terminals of the components are not shown in the drawings.

[0080] As shown in Figures 6(A), 6(B), and 6(C), the electronic circuit module 10C includes a plurality of processor units 20, a plurality of memories 30, a plurality of photoelectric conversion units 40, a power conversion unit 50, and a package substrate 60C.

[0081] The multiple processor units 20, the multiple memories 30, the multiple photoelectric conversion units 40, and the power conversion unit 50 are mounted on a first surface (front surface) of the package substrate 60C. That is, the multiple processor units 20, the multiple memories 30, the multiple photoelectric conversion units 40, and the power conversion unit 50 are mounted on a single common package substrate 60C. The package substrate 60C is formed of a material that has lower high-frequency signal loss than the motherboard 91, at least in the mounting areas of the multiple processor units 20, the multiple memories 30, and the multiple photoelectric conversion units 40.

[0082] The second surface (rear surface) of the package substrate 60C is mounted on a motherboard 91.

[0083] The multiple processor units 20 are arranged in the center of the first surface. The multiple memories 30 and the power conversion unit 50 are arranged in a first direction (x-axis direction in the figure) parallel to the first surface, with the placement area of ​​the multiple processor units 20 sandwiched between them. The placement area of ​​the multiple processor units 20 and the placement area of ​​the multiple memories 30 are adjacent and close to each other. The placement area of ​​the multiple processor units 20 and the power conversion unit 50 are adjacent and close to each other.

[0084] The photoelectric conversion units 40 are arranged in a second direction (y-axis direction in the figure) that is parallel to the first surface and perpendicular to the first direction (x-axis direction in the figure), sandwiching the arrangement area of ​​the processor units 20. The arrangement area of ​​the processor units 20 and the photoelectric conversion units 40 are adjacent and close to each other.

[0085] 7A, the electronic circuit module 10C can shorten the data transmission line Lop (the line connecting the multiple processor units 20 and the multiple photoelectric conversion units 40). Furthermore, the electronic circuit module 10C can simplify and facilitate the wiring of the data transmission line Lop. Therefore, the electronic circuit module 10C can suppress transmission loss and delay due to the data transmission line Lop.

[0086] Furthermore, the electronic circuit module 10C can shorten the information processing bus Lpm (the line connecting the multiple processor units 20 and the multiple memories 30). Furthermore, the electronic circuit module 10C can simplify and facilitate the wiring of the information processing bus Lpm. Therefore, the electronic circuit module 10C can reduce transmission loss and delays caused by the information processing bus Lpm.

[0087] 7B, the electronic circuit module 10C can shorten the processor power supply line Lpwp, the memory power supply line Lpwm, and the photoelectric conversion unit power supply line Lpwo from the power conversion unit 50, thereby achieving a simple configuration. Therefore, the electronic circuit module 10C can improve power supply efficiency.

[0088] Furthermore, in this configuration, the multiple memories 30 and the power conversion unit 50 are spaced apart with the layout area of ​​the multiple processor units 20 sandwiched therebetween. This allows the electronic circuit module 10C to suppress the superposition of power supply noise on the multiple memories 30.

[0089] An electronic circuit module according to a fifth embodiment of the present invention will be described with reference to the drawings. Fig. 8A is a plan view showing the configuration of the electronic circuit module according to the fifth embodiment, Fig. 8B is a diagram showing an example of a wiring pattern for a data communication system in the electronic circuit module according to the fifth embodiment, and Fig. 8C is a diagram showing an example of a wiring pattern for a power supply system in the electronic circuit module according to the fifth embodiment.

[0090] 8A, 8B, and 8C, the electronic circuit module 10D according to the fifth embodiment differs from the electronic circuit module 10C according to the fourth embodiment in the layout pattern of the components and the wiring pattern. The other configuration of the electronic circuit module 10D is the same as that of the electronic circuit module 10C, and a description of similar parts will be omitted.

[0091] The memories 30 are arranged on both sides of the package substrate 60D in a first direction (the x-axis direction in the figure) with the arrangement area of ​​the processor units 20 sandwiched therebetween. The photoelectric conversion units 40 are arranged on both sides of the package substrate 60D in a second direction (the y-axis direction in the figure) with the arrangement area of ​​the processor units 20 sandwiched therebetween.

[0092] The plurality of power conversion units 50 are arranged at corners of the outline formed by the arrangement of the plurality of memories 30 and the plurality of photoelectric conversion units 40 .

[0093] The processor units 20 and the memories 30 are adjacent to each other in the first direction, and the processor units 20 and the photoelectric conversion units 40 are adjacent to each other in the second direction.

[0094] 8B , the electronic circuit module 10D can shorten the data transmission line Lop and the information processing bus Lpm. Furthermore, the electronic circuit module 10D can simplify and facilitate the wiring of the data transmission line Lop and the information processing bus Lpm. Therefore, the electronic circuit module 10D can suppress transmission loss and delay due to the data transmission line Lop and the information processing bus Lpm.

[0095] Furthermore, each of the multiple power conversion units 50 is adjacent to or close to the processor unit 20, memory 30, and photoelectric conversion unit 40. Therefore, as shown in Figure 8C, the electronic circuit module 10D can shorten the processor power supply line Lpwp, memory power supply line Lpwm, and photoelectric conversion unit power supply line Lpwo from the power conversion unit 50, thereby achieving a simple configuration. Therefore, the electronic circuit module 10D can increase power supply efficiency.

[0096] Furthermore, the area efficiency of the package substrate 60D for the multiple processor units 20, multiple memories 30, multiple photoelectric conversion units 40, and multiple power conversion units 50 is good. Therefore, the electronic circuit module 10D can be made smaller.

[0097] Furthermore, the multiple power conversion units 50 are arranged at corners of the areas where the multiple processor units 20, the multiple memories 30, and the multiple photoelectric conversion units 40 are arranged. This reduces the effect of heat from the multiple power conversion units 50 on the multiple processor units 20, and the electronic circuit module 10D can easily dissipate this heat to the outside.

[0098] An electronic circuit module according to a sixth embodiment of the present invention will be described with reference to the drawings. Fig. 9A is a plan view showing the configuration of the electronic circuit module according to the sixth embodiment, Fig. 9B is a diagram showing an example of a wiring pattern for a data communication system in the electronic circuit module according to the sixth embodiment, and Fig. 9C is a diagram showing an example of a wiring pattern for a power supply system in the electronic circuit module according to the sixth embodiment.

[0099] 9A, 9B, and 9C, the electronic circuit module 10E according to the sixth embodiment differs from the electronic circuit module 10C according to the fourth embodiment in the layout pattern of the components and the wiring pattern. The other configuration of the electronic circuit module 10E is the same as that of the electronic circuit module 10C, and a description of similar parts will be omitted.

[0100] The memories 30 are arranged on both sides of the package substrate 60E in a first direction (the x-axis direction in the figure) with the arrangement area of ​​the processor units 20 sandwiched therebetween. The photoelectric conversion units 40 are arranged on both sides of the package substrate 60E in a second direction (the y-axis direction in the figure) with the arrangement area of ​​the processor units 20 sandwiched therebetween.

[0101] The plurality of power conversion units 50E1 are arranged between the plurality of memories 30 aligned in the second direction, and are adjacent to and close to each other. The plurality of power conversion units 50E2 are arranged between the plurality of photoelectric conversion units 40 aligned in the first direction, and are adjacent to and close to each other.

[0102] The plurality of processor units 20 and the plurality of memories 30 are adjacent and close to each other in the first direction. The plurality of processor units 20 and the plurality of photoelectric conversion units 40 are adjacent and close to each other in the second direction. The plurality of processor units 20 and the plurality of power conversion units 50E1 are adjacent and close to each other in the first direction. The plurality of processor units 20 and the plurality of power conversion units 50E2 are adjacent and close to each other in the second direction.

[0103] 9B , the electronic circuit module 10E can shorten the data transmission line Lop and the information processing bus Lpm. Furthermore, the electronic circuit module 10E can simplify and facilitate the wiring of the data transmission line Lop and the information processing bus Lpm. Therefore, the electronic circuit module 10E can suppress transmission loss and delay due to the data transmission line Lop and the information processing bus Lpm.

[0104] Furthermore, the multiple power conversion units 50E1, 50E2 are adjacent to or close to the processor unit 20, memory 30, and photoelectric conversion unit 40, respectively. Therefore, as shown in Figure 9C, the electronic circuit module 10E can shorten the processor power supply line Lpwp, memory power supply line Lpwm, and photoelectric conversion unit power supply line Lpwo from the power conversion units 50E1, 50E2, thereby achieving a simple configuration. Therefore, the electronic circuit module 10E can increase power supply efficiency.

[0105] This configuration also provides good symmetry in the arrangement of the multiple memories 30, the multiple photoelectric conversion units 40, and the multiple power conversion units 50E1 and 50E2. The electronic circuit module 10E can realize a configuration that makes it easy to design the wiring patterns of the data transmission line Lop, the information processing bus Lpm, the processor power supply line Lpwp, the memory power supply line Lpwm, and the photoelectric conversion unit power supply line Lpwo.

[0106] Furthermore, the plurality of memories 30 are arranged on both sides of the power conversion unit 50E1, and the plurality of photoelectric conversion units 40 are arranged on both sides of the power conversion unit 50E2. This allows the electronic circuit module 10E to symmetrize the power supply to the plurality of memories 30 and the plurality of photoelectric conversion units 40.

[0107] Furthermore, the electronic circuit module 10E can separate and space the power supply from the power conversion unit 50E1 to the multiple memories 30 and the power supply from the power conversion unit 50E2 to the multiple photoelectric conversion units 40. This allows the electronic circuit module 10E to suppress interference between these power supply lines (the memory power supply line Lpwm and the photoelectric conversion unit power supply line Lpwo).

[0108] Furthermore, the electronic circuit module 10E can separate the photoelectric conversion unit power supply line Lpwo from other power supply lines, thereby suppressing noise from being superimposed on the photoelectric conversion unit power supply line Lpwo.

[0109] An electronic circuit module according to a seventh embodiment of the present invention will be described with reference to the drawings. Fig. 10(A) is a plan view showing the configuration of the electronic circuit module according to the seventh embodiment, Fig. 10(B) is a diagram showing an example of a wiring pattern for a data communication system in the electronic circuit module according to the seventh embodiment, and Fig. 10(C) is a diagram showing an example of a wiring pattern for a power supply system in the electronic circuit module according to the seventh embodiment.

[0110] 10A, 10B, and 10C, the electronic circuit module 10F according to the seventh embodiment differs from the electronic circuit module 10C according to the fourth embodiment in the layout pattern of the components and the wiring pattern. The other configuration of the electronic circuit module 10F is the same as that of the electronic circuit module 10C, and a description of similar parts will be omitted.

[0111] The power conversion unit 50 is disposed in the center of the first surface of the package substrate 60F. The multiple processor units 20 are disposed in positions surrounding the power conversion unit 50. The multiple processor units 20 are adjacent to and close to the power conversion unit 50.

[0112] The multiple memories 30 are arranged on both sides of the package substrate 60F in a first direction (x-axis direction in the figure) with the placement area for the power conversion unit 50 and the multiple processor units 20 sandwiched therebetween. The multiple photoelectric conversion units 40 are arranged on both sides of the package substrate 60F in a second direction (y-axis direction in the figure) with the placement area for the power conversion unit 50 and the multiple processor units 20 sandwiched therebetween.

[0113] The processor units 20 and the memories 30 are adjacent to each other in the first direction, and the processor units 20 and the photoelectric conversion units 40 are adjacent to each other in the second direction.

[0114] 9B , the electronic circuit module 10F can shorten the data transmission line Lop and the information processing bus Lpm. Furthermore, the electronic circuit module 10F can simplify and facilitate the wiring of the data transmission line Lop and the information processing bus Lpm. Therefore, the electronic circuit module 10F can suppress transmission loss and delay due to the data transmission line Lop and the information processing bus Lpm.

[0115] Furthermore, this configuration provides good symmetry in the arrangement of the multiple memories 30, the multiple photoelectric conversion units 40, and the multiple power conversion units 50. This allows the electronic circuit module 10E to easily design the wiring patterns of the data transmission line Lop and the information processing bus Lpm. Furthermore, the central location of the power conversion unit 50 allows for a variety of wiring patterns for the processor power supply line Lpwp, the memory power supply line Lpwm, and the photoelectric conversion unit power supply line Lpwo. That is, the power supply lines for the multiple memories 30, the multiple photoelectric conversion units 40, and the multiple power conversion units 50 can be separated or shared depending on the power supply specifications of each. When separate lines are used, the electronic circuit module 10F can improve the power quality for the multiple memories 30, the multiple photoelectric conversion units 40, and the multiple power conversion units 50. When a shared power supply line is used, the electronic circuit module 10F can reduce the space required for power supply, thereby achieving a compact design.

[0116] Furthermore, in this configuration, the power conversion unit 50 and the multiple processor units 20 are adjacent and close to each other. Therefore, the electronic circuit module 10F can shorten the processor power supply line Lpwp, and can increase the efficiency of power supply to the multiple processor units 20.

[0117] [Eighth Embodiment] An electronic circuit module according to an eighth embodiment of the present invention will be described with reference to the drawings. Figures 11(A) and 11(B) are plan views showing the configuration of an electronic circuit module according to the eighth embodiment, with Fig. 11(A) showing the first surface side and Fig. 11(B) showing the second surface side. Fig. 12(A) is a diagram showing an example of a wiring pattern for a data communication system in the electronic circuit module according to the eighth embodiment, and Fig. 12(B) is a diagram showing an example of a wiring pattern for a power supply system in the electronic circuit module according to the eighth embodiment.

[0118] 11A and 11B, the electronic circuit module 10G according to the eighth embodiment differs from the electronic circuit module 10C according to the fourth embodiment in the layout pattern of the components and the wiring pattern. The other configuration of the electronic circuit module 10G is the same as that of the electronic circuit module 10C, and a description of similar parts will be omitted.

[0119] The multiple processor units 20 are arranged in the center of the first surface of the package substrate 60G. The multiple memories 30 are arranged on both sides of the arrangement area of ​​the multiple processor units 20 in the first direction of the package substrate 60G (the x-axis direction in the figure). The multiple photoelectric conversion units 40 are arranged on both sides of the arrangement area of ​​the multiple processor units 20 in the second direction of the package substrate 60G (the y-axis direction in the figure).

[0120] The processor units 20 and the memories 30 are adjacent to each other in the first direction, and the processor units 20 and the photoelectric conversion units 40 are adjacent to each other in the second direction.

[0121] The power conversion unit 50 is disposed on the second surface of the package substrate 60G. When viewed in a direction perpendicular to the first and second surfaces (the z-axis direction in the figure), the power conversion unit 50 overlaps the multiple processor units 20, the multiple memories 30, and the multiple photoelectric conversion units 40.

[0122] 12A, the electronic circuit module 10G can shorten the data transmission line Lop and the information processing bus Lpm. Furthermore, the electronic circuit module 10G can simplify and facilitate the wiring of the data transmission line Lop and the information processing bus Lpm. Therefore, the electronic circuit module 10G can suppress transmission loss and delay due to the data transmission line Lop and the information processing bus Lpm.

[0123] In this configuration, the processor power supply line Lpwp, the memory power supply line Lpwm, and the photoelectric conversion unit power supply line Lpwo are formed by conductor patterns extending in the thickness direction of the package substrate 60G. This allows the processor power supply line Lpwp, the memory power supply line Lpwm, and the photoelectric conversion unit power supply line Lpwo to be short in the electronic circuit module 10G. This allows the electronic circuit module 10G to have high power supply efficiency.

[0124] Furthermore, this configuration allows for a larger area for the power conversion unit 50. Therefore, the electronic circuit module 10G allows for greater freedom in designing the power conversion unit 50.

[0125] Ninth Embodiment An electronic circuit module according to a ninth embodiment of the present invention will be described with reference to the drawings. Fig. 13(A) is a plan view showing the configuration of an electronic circuit module according to the ninth embodiment, and Figs. 13(B) and 13(C) are diagrams showing different examples of the CC' cross section of Fig. 13(A). Fig. 13(A) shows a state in which the heat sink and thermally conductive gel have been removed. Fig. 14(A) is a diagram showing an example of a wiring pattern for a data communication system in an electronic circuit module according to the ninth embodiment, and Fig. 14(B) is a diagram showing an example of a wiring pattern for a power supply system in an electronic circuit module according to the ninth embodiment.

[0126] 13A, 13B, and 13C, the electronic circuit module 10H according to the ninth embodiment differs from the electronic circuit module 10C according to the fourth embodiment in the layout pattern of the components and the wiring pattern. The other configuration of the electronic circuit module 10H is the same as that of the electronic circuit module 10C, and a description of similar parts will be omitted.

[0127] The processor units 20 are arranged in the center of the first surface of the package substrate 60H. The photoelectric conversion units 40 are arranged around the arrangement area of ​​the processor units 20. The arrangement area of ​​the processor units 20 and the photoelectric conversion units 40 are adjacent to each other in a direction parallel to the first surface and are close to each other.

[0128] The plurality of power conversion units 50 are arranged at corners of the outline formed by the arrangement of the plurality of photoelectric conversion units 40 .

[0129] The memory 30 is arranged above the multiple processor units 20 so as to overlap the arrangement area of ​​the multiple processor units 20. In other words, the memory 30 is arranged in a position facing the package substrate 60H with the multiple processor units 20 in between. The memory 30 and the multiple processor units 20 are adjacent to and close to each other in a direction perpendicular to the first surface.

[0130] 14A, the electronic circuit module 10H can shorten the data transmission line Lop and the information processing bus Lpm. Furthermore, in the electronic circuit module 10H, the main wiring directions of the data transmission line Lop and the information processing bus Lpm are perpendicular to each other, which facilitates wiring and results in shorter wiring lengths. Therefore, the electronic circuit module 10H can suppress transmission loss and delays due to the data transmission line Lop and the information processing bus Lpm.

[0131] Furthermore, in a plan view of the electronic circuit module 10H, the multiple power conversion units 50 are adjacent to or close to the processor unit 20, the memory 30, and the photoelectric conversion unit 40, respectively. Therefore, as shown in Figure 14B, the electronic circuit module 10H can shorten the processor power supply line Lpwp, the memory power supply line Lpwm, and the photoelectric conversion unit power supply line Lpwo from the power conversion unit 50, thereby achieving a simple configuration. Therefore, the electronic circuit module 10H can increase power supply efficiency.

[0132] This configuration also allows for a larger planar area of ​​the memory 30. Therefore, the electronic circuit module 10H can increase the capacity of the memory 30 without increasing the overall size.

[0133] Furthermore, as shown in FIGS. 13B and 13C, in this configuration, the configuration of the heat sink can be appropriately adjusted depending on the height of the plurality of photoelectric conversion units 40.

[0134] 13B, the height of the photoelectric conversion unit 40 is approximately the same as the height of the processor unit 20 and the height of the memory 30. In this case, the electronic circuit module 10H includes a heat sink 71H. The heat sink 71H overlaps the multiple photoelectric conversion units 40 and the memory 30, and is thermally connected to the multiple photoelectric conversion units 40 and the memory 30 via a thermally conductive gel 710H.

[0135] 13C , the height of the photoelectric conversion unit 40 is approximately the same as the height of the processor unit 20. In this case, the electronic circuit module 10H includes a heat sink 71H and a heat sink 72H. The heat sink 71H overlaps the memory 30 and is thermally connected to the memory 30 via a thermally conductive gel 710H. The heat sink 72H overlaps multiple photoelectric conversion units 40 and is thermally connected to the multiple photoelectric conversion units 40 via a thermally conductive gel 720H.

[0136] <1> An electronic circuit module mounted on a motherboard having a power supply source, comprising: a photoelectric conversion unit that converts optical signals to electrical signals; a processor unit that performs arithmetic processing using the electrical signals; a power conversion unit that converts power from the power supply source and supplies power to the photoelectric conversion unit and the processor unit; and a package substrate on which the photoelectric conversion unit, the processor unit, and the power conversion unit are mounted, wherein the photoelectric conversion unit, the processor unit, and the power conversion unit are connected only through a conductor pattern formed on the package substrate.

[0137] <2> The electronic circuit module described in <1>, wherein the package substrate includes: a first substrate on which the power conversion unit is mounted; and a second substrate mounted on the first substrate on which the photoelectric conversion unit and the processor unit are mounted.

[0138] <3> An electronic circuit module mounted on a motherboard having a power supply source, comprising: a photoelectric conversion unit that converts optical signals to electrical signals; a processor unit that performs arithmetic processing using the electrical signals; a power conversion unit that converts power from the power supply source and supplies it to the photoelectric conversion unit and the processor unit; and a package substrate on which the photoelectric conversion unit, the processor unit, and the power conversion unit are mounted, the package substrate having a portion with lower high-frequency signal loss than the motherboard.

[0139] <4> The electronic circuit module of <3>, wherein the package substrate includes: a first substrate on which the power conversion unit is mounted; and a second substrate on which the photoelectric conversion unit and the processor unit are mounted and which is mounted on the first substrate; and wherein a loss of the high-frequency signal in the first substrate is lower than a loss of the high-frequency signal in the motherboard.

[0140] <5> The electronic circuit module according to any one of <1> to <4>, wherein the photoelectric conversion unit and the processor unit are supplied with power from the common power conversion unit.

[0141] <6> The electronic circuit module according to <5>, wherein the photoelectric conversion unit and the processor unit are supplied with power from one of the power conversion units.

[0142] <7> The electronic circuit module according to any one of <1> to <6>, wherein the photoelectric conversion unit and the processor unit are thermally connected to a common heat sink.

[0143] <8> The electronic circuit module according to <7>, wherein the photoelectric conversion unit, the processor unit, and the power conversion unit are thermally connected to the shared heat sink.

[0144] <9> The electronic circuit module according to any one of <1> to <8>, wherein the package substrate is mounted in a detachable structure on the motherboard.

[0145] <10> The electronic circuit module according to <9>, wherein the package substrate has a socket mechanism on a surface that is mounted on the motherboard.

[0146] <11> The electronic circuit module according to <9> or <10>, wherein at least one of the photoelectric conversion unit, the processor unit, and the power conversion unit is mounted in a detachable structure on the package substrate.

[0147] <12> An electronic circuit module according to any one of <1> to <4>, further comprising a memory connected to the processor unit, wherein the photoelectric conversion unit, the processor unit, the power conversion unit, and the memory are mounted on a first surface of the package substrate, the processor unit is disposed at the center of the first surface, the memory and the power conversion unit are disposed in a first direction parallel to the first surface, with the processor unit sandwiched therebetween, and the photoelectric conversion units are disposed in a second direction parallel to the first surface and perpendicular to the first direction, with the processor unit sandwiched therebetween.

[0148] <13> An electronic circuit module according to any one of <1> to <4>, further comprising: a memory connected to the processor unit; the photoelectric conversion unit, the processor unit, the power conversion unit, and the memory are mounted on a first surface of the package substrate; the processor unit is disposed at the center of the first surface; the memories are disposed in a first direction parallel to the first surface, with the processor unit sandwiched therebetween; the photoelectric conversion units are disposed in a second direction parallel to the first surface and orthogonal to the first direction, with the processor unit sandwiched therebetween; and the power conversion units are disposed at corners of an outline formed by the arrangement of the memories and the photoelectric conversion units.

[0149] <14> The electronic circuit module of any of <1> to <4>, further comprising: a memory connected to the processor unit; the photoelectric conversion unit, the processor unit, the power conversion unit, and the memory are mounted on a first surface of the package substrate; the processor unit is disposed at the center of the first surface; the memories are disposed in a first direction parallel to the first surface, with the processor unit sandwiched therebetween; the photoelectric conversion units are disposed in a second direction parallel to the first surface and orthogonal to the first direction, with the processor unit sandwiched therebetween; and the power conversion units are disposed between the memories and between the photoelectric conversion units.

[0150] <15> An electronic circuit module according to any one of <1> to <4>, further comprising: a memory connected to the processor unit; the photoelectric conversion unit, the processor unit, the power conversion unit, and the memory are mounted on a first surface of the package substrate; the power conversion unit is arranged in the center of the first surface; the processor units are arranged in positions surrounding the power conversion unit; the memories are arranged in a first direction parallel to the first surface, with the processor unit and the power conversion unit therebetween; and the photoelectric conversion units are arranged in a second direction parallel to the first surface and perpendicular to the first direction, with the processor unit and the power conversion unit therebetween.

[0151] <16> An electronic circuit module according to any one of <1> to <4>, further comprising a memory connected to the processor unit, wherein the photoelectric conversion unit, the processor unit, and the memory are mounted on a first surface of the package substrate, and the power conversion unit is mounted on a second surface of the package substrate, and when viewed in a direction perpendicular to the first surface and the second surface, the power conversion unit at least partially overlaps the photoelectric conversion unit, the processor unit, and the memory.

[0152] <17> An electronic circuit module according to any one of <1> to <4>, further comprising: a memory connected to the processor unit; the photoelectric conversion unit, the processor unit, and the power conversion unit are mounted on a first surface of the package substrate; the processor unit is disposed at the center of the first surface; the photoelectric conversion units are disposed in positions surrounding the processor unit; and the power conversion units are disposed at corners of an outline formed by the arrangement of the photoelectric conversion units; and the memory is disposed in a position that overlaps the processor unit and faces the package substrate across the processor unit when viewed in a direction perpendicular to the first surface.

[0153] 10, 10A, 10B, 10C, 10D, 10E, 10F, 10G, 10H: Electronic circuit module 20: Processor unit 30: Memory 40: Photoelectric conversion unit 50, 51B, 50E1, 50E2: Power conversion unit 52: External power supply connector 60, 60B, 60C, 60D, 60E, 60F, 60G, 60H: Package substrate 61, 61B: First substrate 62: Second substrate 71, 71B, 71H, 72B, 72H: Heat sink 91: Motherboard 92P: Power line 93: Mounting land 94: Socket mechanism 652: Power supply input line 710, 710B, 710H, 720B, 720H: Thermal conductive gel BP61: External connection terminal Lop: Data transmission line Lpm: Information processing bus Lpw: Power supply line Lpwm: Power supply line for memory Lpwo: Power supply line for photoelectric conversion unit Lpwp: Power supply line for processor OTL: Optical waveguide PL: Power cable

Claims

1. An electronic circuit module mounted on a motherboard equipped with a power supply source, comprising: a photoelectric conversion unit that converts optical signals to electrical signals; a processor unit that performs arithmetic processing using the electrical signals; a power conversion unit that converts power from the power supply source and supplies it to the photoelectric conversion unit and the processor unit; and a package substrate on which the photoelectric conversion unit, the processor unit, and the power conversion unit are mounted, wherein the photoelectric conversion unit, the processor unit, and the power conversion unit are connected only through conductor patterns formed on the package substrate.

2. The electronic circuit module according to claim 1, wherein the package substrate comprises: a first substrate on which the power conversion unit is mounted; and a second substrate mounted on the first substrate on which the photoelectric conversion unit and the processor unit are mounted.

3. An electronic circuit module mounted on a motherboard equipped with a power supply source, comprising: a photoelectric conversion unit that converts optical signals into electrical signals; a processor unit that performs arithmetic processing using the electrical signals; a power conversion unit that converts power from the power supply source and supplies it to the photoelectric conversion unit and the processor unit; and a package substrate on which the photoelectric conversion unit, the processor unit, and the power conversion unit are mounted, the package substrate having a portion with lower high-frequency signal loss than the motherboard.

4. The electronic circuit module according to claim 3, wherein the package substrate comprises: a first substrate on which the power conversion unit is mounted; and a second substrate on which the photoelectric conversion unit and the processor unit are mounted and which is mounted on the first substrate; and wherein the high-frequency signal loss of the first substrate is lower than the high-frequency signal loss of the motherboard.

5. The electronic circuit module according to any one of claims 1 to 4, wherein the photoelectric conversion unit and the processor unit are supplied with power from the common power conversion unit.

6. The electronic circuit module according to claim 5, wherein the photoelectric conversion unit and the processor unit are supplied with power from one of the power conversion units.

7. The electronic circuit module according to any one of claims 1 to 4, wherein the photoelectric conversion unit and the processor unit are thermally connected to a common heat sink.

8. The electronic circuit module according to claim 7, wherein the photoelectric conversion unit, the processor unit, and the power conversion unit are thermally connected to the shared heat sink.

9. The electronic circuit module according to any one of claims 1 to 4, wherein the package substrate is mounted in a structure that allows it to be attached to and detached from the motherboard.

10. The electronic circuit module according to claim 9, wherein the package substrate has a socket mechanism on the surface that is mounted to the motherboard.

11. The electronic circuit module according to claim 9, wherein at least one of the photoelectric conversion unit, the processor unit, and the power conversion unit is mounted in a detachable structure on the package substrate.

12. An electronic circuit module as described in any one of claims 1 to 4, comprising a memory connected to the processor unit, wherein the photoelectric conversion unit, the processor unit, the power conversion unit, and the memory are mounted on a first surface of the package substrate, the processor unit is arranged at the center of the first surface, the memory and the power conversion unit are arranged in a first direction parallel to the first surface, with the processor unit sandwiched between them, and the multiple photoelectric conversion units are arranged in a second direction parallel to the first surface and perpendicular to the first direction, with the processor unit sandwiched between them.

13. An electronic circuit module as described in any one of claims 1 to 4, comprising a memory connected to the processor unit, wherein the photoelectric conversion unit, the processor unit, the power conversion unit, and the memory are mounted on a first surface of the package substrate, the processor unit is arranged in the center of the first surface, the multiple memories are arranged in a first direction parallel to the first surface, with the processor unit sandwiched between them, the multiple photoelectric conversion units are arranged in a second direction parallel to the first surface and perpendicular to the first direction, with the processor unit sandwiched between them, and the multiple power conversion units are arranged at corners of an outline formed by the arrangement of the multiple memories and the multiple photoelectric conversion units.

14. An electronic circuit module as described in any one of claims 1 to 4, comprising a memory connected to the processor unit, wherein the photoelectric conversion unit, the processor unit, the power conversion unit, and the memory are mounted on a first surface of the package substrate, the processor unit is arranged in the center of the first surface, the multiple memories are arranged with the processor unit between them in a first direction parallel to the first surface, the multiple photoelectric conversion units are arranged with the processor unit between them in a second direction parallel to the first surface and perpendicular to the first direction, and the multiple power conversion units are arranged between the multiple memories and between the multiple photoelectric conversion units.

15. An electronic circuit module as described in any one of claims 1 to 4, comprising a memory connected to the processor unit, wherein the photoelectric conversion unit, the processor unit, the power conversion unit, and the memory are mounted on a first surface of the package substrate, the power conversion unit is arranged in the center of the first surface, the multiple processor units are arranged in positions surrounding the power conversion unit, the multiple memories are arranged in a first direction parallel to the first surface, with the processor unit and the power conversion unit sandwiched between them, and the multiple photoelectric conversion units are arranged in a second direction parallel to the first surface and perpendicular to the first direction, with the processor unit and the power conversion unit sandwiched between them.

16. An electronic circuit module as described in any one of claims 1 to 4, comprising a memory connected to the processor unit, wherein the photoelectric conversion unit, the processor unit, and the memory are mounted on a first surface of the package substrate, and the power conversion unit is mounted on a second surface of the package substrate, and when viewed in a direction perpendicular to the first surface and the second surface, the power conversion unit at least partially overlaps the photoelectric conversion unit, the processor unit, and the memory.

17. An electronic circuit module as described in any one of claims 1 to 4, comprising a memory connected to the processor unit, wherein the photoelectric conversion unit, the processor unit, and the power conversion unit are mounted on a first surface of the package substrate, the processor unit is arranged in the center of the first surface, the multiple photoelectric conversion units are arranged in positions surrounding the processor unit, and the multiple power conversion units are arranged at corners of an outline formed by the arrangement of the multiple photoelectric conversion units, and the memory is arranged in a position that overlaps the processor unit and faces the package substrate with the processor unit in between when viewed in a direction perpendicular to the first surface.

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