Phase conjugating circuit and retrodirective antenna system comprising same

Abstract

A phase conjugation circuit 100 for a retrodirective antenna system includes a phase locked loop (PLL) circuit and a signal amplifying device 102 comprising a power amplifier that produces an intermediate frequency (IF) signal by subtracting a received signal from a transmit signal. The IF signal is divided by two by frequency divider 110, the resulting signal provided as an input 103 for the phase detector 112 of the PLL circuit. A second input 105 to the phase detector is provided by mixing the transmit signal with a reference signal to produce a signal having the same phase as the transmit signal. The output of the phase detector controls a signal generator 114 for generating the transmit signal. The circuit requires fewer components in comparison with conventional phase conjugation circuits, and results in minimal loss, particularly in the transmission path. A retrodirective transceiver or array may comprise an antenna module having the phase conjugation circuit. A signal amplifying device is also provided.

Description

The present invention relates to an apparatus and method for producing the phase conjugate of an input signal, especially for use in duplex communication in long range wireless power transmission systems, for example, in the microwave and radio frequency range. BACKGROUND Mobile devices and the like tend to radiate energy in all directions to maintain quality of service. This means the electromagnetic spectrum has become increasingly congested. Thus, it has become more common to implement directional antennas. These direct a signal into a desired spatial region. This means that the signal to noise ratio is increased, as the interference, from / with other users of the spectrum, and that due to multipath effects, is reduced. Directional antennas are typically built using more than one antenna and work by individually modifying the phase of the signals received or transmitted. Spatially, in-phase signals constructively interfere, and out-of-phase signals destructively interfere. The resulting interference pattern is the antenna array radiation pattern. The use of directional antennas allows for lower transmit powers from each channel / antenna, which eases the burden of design requirements and improves reliability. Certain antenna systems are able to track incoming signals to accommodate the relative movement between transmitter and receiver, and focus energy on the source of the relevant received signal. This characteristic is highly beneficial in a mobile environment. Said antennas are referred to as retrodirective antennas, which are able to automatically return a signal back in the direction from which it originated. One of the ways by which retrodirectivity is achieved is via phase conjugation of the incoming, or pilot, signal. A retrodirective antenna may act as a phase conjugating mirror, which re-transmits a signal which is the phase conjugate of the received signal at each antenna element. Each antenna is capable of encoding data on re-transmit and / or extracting data on receive. By retransmitting a signal which is the phase conjugate of the received signal, the transmitted signal will be in phase with the signal at the source. Using N receive antennas, N retransmitted signals will be in phase at the source, and add constructively, whereas at other points in space the signals will not add, or destructively interfere. This system is therefore effectively focusing energy on the source. These antennas are often referred to as “self-steering”, such that when there is relative movement between transmitter and receiver, the antenna can track the incoming signal to ensure it is received and that the retrodirected signal is co-aligned with the incoming signal. With the progress of technology, it is becoming increasingly beneficial to use retrodirective antennas which can react to fast signal variations with sufficient sensitivity, such that the array may be used as a transceiver in mobile satellite communication systems. In fact, the array may be used as a self-steering transceiver in any application which requires automatic bean alignment between unfixed, or unstabilised platforms. Phase conjugating antenna or antenna arrays can significantly improve the functional characteristics of wireless communication systems, due to their intrinsic autocorrecting and autophasing properties. In known satellite array systems, there is a requirement for separate transmitters (TX) and receivers (RX), and / or the use of one or more duplexers to provide isolation between the TX and RX frequencies. However, duplexers are complex filter circuits which are often bulky and challenging to design. They also introduce significant loss between the TX / RX and antenna. Antenna systems often implement phase cancellation networks to allow the transmit signal to be cancelled at the receiver or otherwise, but such networks may only be used over very narrow frequency ranges, and require extremely accurate component tolerances and / or calibration so that they can operate effectively. Finally, many systems use circulators to provide isolation between the transmitter and receiver, but these are also very bulky and expensive, making them unsuitable for large arrays. It would thus be beneficial to provide a phase conjugation circuit for use in retrodirective antenna systems which requires fewer components, and results in minimal loss, particularly in the transmission path. This is highly desirable in applications involving high efficiency wireless power transfer, whereby the signal direction is determined from the pilot signal received at the transmit antennas. SUMMARY OF INVENTION From a first aspect the invention provides a phase conjugation circuit comprising: an antenna feed for receiving signals from, and transmitting signals to, an antenna; a phase locked loop (PLL) circuit; and a signal amplifying device having an input for receiving a transmit signal from the PLL circuit, a first output connected to the antenna feed for providing an amplified transmit signal to the antenna feed and for receiving a received signal from the antenna feed, and a second output for providing an intermediate frequency (IF) signal, wherein said transmit signal has a transmit signal phase and a transmit frequency, and said received signal has a received signal phase and a received signal frequency, said received signal frequency being different than said transmit signal frequency, said signal amplifying device including a frequency mixer configured to mix said transmit signal and said received signal to produce said IF signal with an IF signal phase equal to the difference between the transmit signal phase and the received signal phase, and wherein the phase conjugation circuit includes a frequency divider and is configured to provide said IF signal to said frequency divider, said frequency divider being configured to produce a divided IF signal with a phase equal to half of the difference between the transmit signal phase and the received signal phase, and wherein said PLL circuit comprises: a phase detector having a first input and a second input and being configured to generate an output signal that is dependent on the phase difference between the respective signals received at said first and second inputs; a signal generator for generating said transmit signal having a frequency that is variable in response to a control signal, wherein the output signal of said phase detector provides said control signal; and a frequency mixer configured to mix the transmit signal with a reference signal having a reference frequency and a reference phase to produce a mixer output signal with said transmit signal phase, said mixer output signal being provided to the second input of said phase detector, and wherein said phase conjugation circuit is configured to provide said divided IF signal to the first input of said phase detector. Advantageously, the circuit requires fewer components in comparison with conventional phase conjugation circuits, and results in minimal loss, particularly in the transmission path. Preferably, said reference phase is 0°. Preferably, said reference frequency is offset from said received signal frequency by an amount equal to half of the difference between said received signal frequency and said transmit signal frequency. Preferably, said frequency divider is configured to produce said divided IF signal with a frequency equal to half of the difference between the transmit signal frequency and the received signal frequency. Preferably, said frequency mixer of said signal amplifying device is configured to produce said IF signal with an IF signal phase equal to the received signal phase subtracted from the transmit signal phase. Preferably, said frequency mixer of said signal amplifying device is configured to produce said IF signal with an IF signal frequency equal to the difference between the transmit signal frequency and the received signal frequency. Preferably, said frequency mixer of said signal amplifying device is configured to produce said IF signal with an IF signal frequency equal to the received signal frequency subtracted from the transmit signal frequency. Preferably, said frequency mixer of said PLL circuit is configured to produce said mixer output signal with a frequency equal to half of the difference between the transmit signal frequency and the received signal frequency. Preferably, the signal amplifying device comprises at least one transistor coupled between the input and the first output for amplifying the transmit signal to produce the amplified transmit signal, said frequency mixer being coupled between the first output and said at least one transistor, typically between the first output and the drain of said at least one transistor. Preferably, said second output of said signal amplifying device is coupled to the drain of said at least one transistor, typically by said frequency mixer. Preferably, said signal amplifying device includes a filter between the frequency mixer and the second output, the filter being tuned to extract the IF signal produced by the frequency mixer. Preferably, said signal amplifying device comprises a power amplifier. Preferably, signal generator comprises an electronic oscillator, preferably an adjustable, or variable frequency, electronic oscillator, which may be configured to generate said transmit signal, or a signal from which said transmit signal is generated. Preferably, said signal generator includes a frequency multiplier, the electronic oscillator and frequency multiplier being configured to generate said transmit signal. Preferably, said received signal frequency is lower than said transmit signal frequency. Preferably, the frequency mixer of the signal amplifying device is configured to subtract said received signal from said transmit signal to produce said IF signal. From a second aspect the invention provides an antenna module comprising the phase conjugation circuit of the first aspect of the invention and an antenna connected or coupled to the antenna feed, the antenna module typically being configured to transmit said transmit signal in the same direction from which said received signal is received by causing said transmit signal to have a phase that is the conjugate of the phase of the received signal. From a third aspect the invention provides a retrodirective transceiver comprising at least one antenna module of the second aspect of the invention, wherein the, or each, antenna module is typically configured to transmit said transmit signal in the same direction from which said received signal is received by causing said transmit signal to have a phase that is the conjugate of the phase of the received signal. From a fourth aspect the invention provides a retrodirective array comprising an array of antenna modules of the second aspect of the invention or an array of retrodirective receivers of the third aspect of the invention. From a fifth aspect, the invention provides a retrodirective antenna system comprising a retrodirective transceiver of the third aspect of the invention, or a retrodirective array of the fourth aspect of the invention, in wireless communication with at least one other object, said at least one other object being configured to transmit a signal, preferably a pilot signal, for receipt by the, or each, antenna module as said received signal, and wherein the, or each, antenna module is typically configured to transmit said transmit signal in the same direction from which said received signal is received by causing said transmit signal to have a phase that is the conjugate of the phase of the received signal. From a sixth aspect, the invention provides a method of producing a transmit signal having a phase that is the conjugate of the phase of a received signal, the method comprising: generating said transmit signal having a transmit signal phase and a transmit frequency, receiving said received signal, said received signal having a received signal phase and a received signal frequency, said received signal frequency being different than, preferably lower than, said transmit signal frequency, mixing said transmit signal and said received signal to produce an intermediate frequency (IF) signal with an IF signal phase equal to the difference between the transmit signal phase and the received signal phase, producing a divided IF signal with a phase equal to half of the difference between the transmit signal phase and the received signal phase, mixing the transmit signal with a reference signal having a reference frequency and a reference phase to produce a mixer output signal with said transmit signal phase, comparing the phase of said divided IF signal with the phase of said mixer output signal to produce a control signal that is dependent on the phase difference between said divided IF signal and said mixer output signal, and controlling the transmit frequency using said control signal. From a seventh aspect the invention provides a method of transmitting a signal retrodirectively with respect to a signal received by an antenna, the method comprising producing a transmit signal having a phase that is the conjugate of the phase of a received signal by the method of the sixth aspect of the invention, and transmitting the transmit signal by the antenna. From an eighth aspect, the invention provides a signal amplifying device comprising: a first input configured to receive a first input signal; a second input configured to receive a second input signal; an output; and a frequency mixer; wherein the first input signal has a first signal phase and a first frequency and the second input signal has a second signal phase and second frequency, said first frequency being different to said second frequency; wherein the frequency mixer is configured to mix said first input signal and said second input signal to produce an intermediate frequency (IF) signal with an IF signal phase equal to the difference between the first signal phase and the second signal phase; and wherein said IF signal is output via the output. Further advantageous aspects of the invention will become apparent to those ordinarily skilled in the art upon review of the following description of specific embodiments and with reference to the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS Embodiments of the invention are now described by way of example and with reference to the accompanying drawings in which like numerals are used to denote like parts and in which: Figure 1 is an exemplary diagram of a circuit for producing a phase conjugate signal embodying one aspect of the present invention; Figure 2 is an exemplary diagram of a retrodirective array system embodying another aspect of the invention, the antenna array comprising one or more instances of the circuit of Figure 1, and being suitable for wireless communication with an object such as a drone; Figure 3 is another exemplary diagram of a circuit for producing a phase conjugate signal according to another embodiment of the present invention; Figure 4 is still another exemplary diagram of a circuit for producing a phase conjugate signal according to another embodiment of the present invention; and Figure 5 is an exemplary diagram of a power amplifier for use in a circuit according to an embodiment of the present invention. DETAILED DESCRIPTION OF DRAWINGS Figure 1 is an exemplary diagram of a circuit 100 configured to transmit a signal 1 which is the phase conjugate of a received signal 2. Circuit 100 is typically connected to an antenna (not shown in Figure 1) for receiving and transmitting the signals 1,2. Signal 2 may emanate from any conventional signal source, such as a satellite, radio transmitter, television transmitter or any other apparatus, system or device configured to transmit and receive wireless signals, in particular radio frequency (RF) signals (including microwave signals). The circuit 100 comprises means to manipulate input signal 2 and produce a phase conjugate signal 1 for transmission back in the direction of the signal source via the antenna(s) associated with the circuit 100. In preferred embodiments, circuit 100 comprises a signal amplifying device 102 comprising at least one electronic amplifier, typically at least one transistor-based electronic amplifier. In preferred embodiments, the signal amplifying device 102 comprises a power amplifier and the following description is provided on this basis. Optionally, one or more pre-amplifier(s) and / or driver(s) may be provided. Preferably, power amplifier 102 is configured to receive and transmit signals. Preferably, power amplifier 102 is coupled to at least one antenna to receive the signal emanating from a source. Typically, received signal 2 is a pilot signal, i.e. a signal, typically of a single frequency, which is transmitted over wireless communication systems for reference purposes, in that it provides a reference for a receiver to lock onto and track. The pilot signal may accompany, and is usually a different frequency to, a further signal, e.g. a modulated signal, from the source, which carries information encoded onto a carrier signal. The power amplifier 102 receives the pilot signal 2, and manipulates it for use in the circuit 100, as described below. Although not shown in Figure 1, the preferred circuit 100 comprises signal feeding means (e,g, comprising a transmission line or other suitable conventional signal feed structure(s)) by which the transmit signal 1 is transmitted and the received signal 2 is received, and which is preferably coupled to the input / output of the power amplifier 102. In typical embodiments, the feeding means couples the circuit 100, typically the power 7 amplifier 102, to the antenna and may therefore be referred to as antenna feeding means. Conveniently, the same feeding means is used to both transmit and receive signals 1,2. In preferred embodiments, circuit 100 comprises a signal generator, typically comprising an adjustable electronic oscillator 114, which is operable to produce an output signal of variable frequency. In preferred embodiments, oscillator 114 is a voltage controlled oscillator, and more particularly a voltage controlled crystal oscillator (VCXO) in this example. Oscillator 114 is configured to produce an output signal 11 that is used to provide the transmitted signal 1 from the circuit 100 via the power amplifier 102. Circuit 100 typically comprises means for providing the output signal 11 to power amplifier 102, the corresponding output of the power amplifier 102 being the transmit signal 1. The output signal 11 is also provided to a phase-locked loop (PLL) circuit as is explained in more detail below. Optionally, the VCO 114 may be used in conjunction with a frequency multiplier (which together may be referred to as a signal generator or signal generating means) in order to provide an output signal of the desired frequency (see for example the arrangements shown in Figures 3 and 4), in which case the frequency multiplier may provide the output signal 11 (which may be referred to as the oscillator output signal 11). Unlike other retrodirective systems, which use separate transmitter and receiver antennas, and / or duplexers to isolate the pilot and transmit signals, the circuit 100 is configured to exploit a frequency offset between the pilot signal 2 and transmit signal 1 to reduce the complexity of the circuitry. In particular, with the received and retransmitted signals at different frequencies, there is a significant reduction in isolation problems that would otherwise be caused by cross-coupling between antennas in the array. The circuit 100 is suitable for use in a variety of applications, especially in systems that support wireless duplex communication and / or wireless power transmission, particularly using signals in the microwave and radio frequency range. Accordingly, while the circuit 100 may transmit and / or receive continuous wave (CW) signals for wireless power transfer, the retransmitted signal 1 may optionally be modulated by any suitable conventional means to carry information as suits the application. For instance, circuit 100 may comprise a signal modulator, for example located between oscillator 114 and power amplifier 102. The pilot signal 2 is of frequency FPj and the transmit signal 1 is of frequency Ft, wherein FP and FT are offset from each other, i.e. different to each other, and Ft is higher than FP. In preferred embodiments, the offset is relatively small, typically being 10 MHz or less, to facilitate recovery by the low frequency bias circuit on the gate of the power amplifier 102.The phase of the pilot signal is denoted by 4>fp and the phase of the signal 11 is denoted by 4>ft for the purposes of this disclosure. Circuit 100 comprises means to mix the pilot signal 2 and output signal 11 to produce an intermediate frequency (IF) signal. Advantageously, power amplifier 102 is configured to mix the pilot signal 2 and output signal 11 to produce IF signal 22. The power amplifier 102 may therefore be described as a self-mixing power amplifier (SMPA) 102. In preferred embodiments, the mixing performed by the SMPA 102 involves subtracting the pilot signal 2 from the output signal 11, wherein the output signal 11 typically provides the transmit signal 1 .The IF signal 22 has a frequency equal to 8 the difference between the pilot frequency FP and the transmit frequency Ft, i.e. FT-FP in the example of Figure 1, where Ft is higher than Fp . The IF signal 22 is of phase <|>ft - rfFP, i.e., the difference in phase between signal 11 and the pilot signal 2. Preferably, the IF signal 22 is output via output 101 to the remainder of the circuit 100, in particular, the PLL circuit as is described in more detail below. SMPA 102 may further comprise means for filtering or extracting the IF signal 22 while rejecting the transmit beam and pilot beam RF frequencies. Said means may comprise, for example, a low pass filter or any other suitable means (not shown in Figure 1). In the exemplary diagram of Figure 1, the IF signal 22 may optionally be amplified by one or more amplifiers 104, before being received by the PLL circuit. Amplifier(s) 104 may provide an amplification of around, for example, 10dB in this exemplary configuration. In preferred embodiments, circuit 100 comprises a divide-by-2 component 110. Divide-by-2 component 110 comprises a frequency divider, i.e. a circuit component which divides the frequency of IF signal 22, and thus correspondingly divides the phase of the IF signal 22, to produce a signal of phase (4>ft - 0fp) / 2 and frequency (Ft - FP) / 2. The circuit 100 includes a phase locked loop (PLL) comprising a phase detector (PD) 112 and oscillator 114. The PLL further comprises a frequency mixer 115. PD 112 has inputs 103, 105 and is configured to produce an output signal 44 that is indicative of whether respective signals received at inputs 103, 105 are matching in phase, output signal 44 preferably having a zero value if the respective signals received at inputs 103, 105 are matching in phase and a non-zero value if the respective signals received at inputs 103, 105 do not match in phase, the non-zero value preferably being indicative of, or otherwise determined by, the phase difference. When the respective signals received at inputs 103, 105 are matching in phase (and therefore also in frequency), the PD 112 produces a steady state zero output signal 44, i.e. adopts a locked state. The output signal 44 of the PD 112 is provided as an input to the oscillator 114 to control the oscillator output, in particular to control the frequency of oscillator 114, and hence control the frequency of the oscillator output signal 11. The configuration is such that the circuit 100, in particular the PLL, adopts a locked state when the respective signals received at inputs 103, 105 of the PD 112 are matching in phase (and hence matching in frequency), i.e. the frequency of the oscillator 114 is controlled, or varied, until the locked state is reached. The signal received at input 103 is the output of the divide-by-2 component 110, i.e. a signal of phase (4>ft - $ff) / 2 and frequency (Ft - FP) / 2). At input 105, a second signal 33 is received from frequency mixer 115. Mixer 115 is coupled to the output of oscillator 114 to receive oscillator output signal 11, wherein output signal 11 is of frequency Ft and phase <|)ft. Mixer 115 is also coupled to a reference signal source (not shown in Figure 1), the reference signal having a reference frequency Fref, with a reference phase, preferably 0°. Mixer 115 is configured to mix the reference signal and oscillator output signal 11 to produce signal 33, in 9 particular such that signal 33 has a frequency corresponding to a subtraction of the reference signal frequency from the oscillator output signal frequency, and has a phase corresponding to a subtraction of the reference signal phase from the oscillator output signal phase. The frequency Free of the reference signal is mid-way between the pilot frequency Fp and the transmit frequency Ft, i.e. offset from the pilot frequency Fp and the transmit frequency Ft by an equal amount, or offset from the pilot frequency FP or the transmit frequency FT by an amount equal to half of the offset between the pilot frequency FP and the transmit frequency Ft. The value of the reference frequency Fref determines the frequency FT of the transmit signal, and it is preferably, but not necessarily, selected such that the offset between the transmit frequency and pilot frequency is 10 MHz or less to facilitate extracting the mixing product from the SMPA 102. Thus, PD 112 receives, at input 103, a first signal of phase (4>ft - <|>fp) / 2 and frequency (Ft — FP) / 2, and a second signal 33, at input 105, of phase <|>ft and frequency FT - FREP. When the circuit 100, in particular the PLL, adopts its locked state, the respective phases (and frequencies) of the signals received at inputs 103 and 105 match, which may be expressed as follows: 4>ft = (4>ft - 4>fp) / 2 which can be rearranged as: 24>ft = 4>ft - ¢FP 4>ft = - 4>fp Accordingly, circuit 100 acts as a phase conjugation circuit and produces a transmit signal 1 having the conjugate phase of the received pilot signal 2, i.e. 4>ft = - 4>fp- In the locked state, the transmit frequency Ft is determined by the reference frequency Fref and the pilot frequency Fp, whereby the transmit frequency Ft is offset from the pilot frequency FP by twice the offset between the transmit frequency Ft and the reference frequency Fref, i.e., (Ft - FP) = 2(Ft - Fref), where Ft is greater than FP. Hence, in the locked state, the signal 11 has the desired phase and frequency and is provided to SMPA 102 for output as transmit signal 1. The transmit signal 1 of frequency FT and phase - 4>fp is provided to the SMPA 102. SMPA 102 outputs the amplified transmit signal 1 for transmission by the antenna(s) such that the transmit signal 1 is directed toward the origin of the pilot signal 2. The transmit signal 1 may be modulated as required by the application and output, so as to effect automatic real-time return of a signal carrying information to be received by the pilot signal source, that is, full duplex communication with retrodirective ability. In preferred embodiments, SMPA 102 is configured to simultaneously receive the pilot signal 2, of frequency Fpand phase 4>fp, and transmit the transmit signal 2 of different, or offset, frequency Ft and phase -<|>fp- As a result of the phase conjugation, the transmitted signal travels toward the origin of the pilot signal. The circuit 100 is configured to recover the received pilot signal 2 in the presence 10 of a higher power transmit signal 1 using a single transmit / receive antenna. This enables a high power transmit signal, e.g. microwave beam, to be directed in the location of the pilot beam origin. The circuit 100 may for example be used as part of long range microwave wireless power transmission systems, for instance, solar power space satellite applications. By having a pilot signal of different frequency to the transmit signal, there is a significant reduction in isolation issues caused by, for example, cross-coupling between antennas in an array. The embodiments of the present invention are particularly, but not exclusively, suitable for both microwave and radio frequency signals, e.g., in the range of ~300 MHz to ~300 GHz. More generally, the offset of the pilot and transmit signal frequencies may take any value suitable for the application for which the circuit 100 is used. Advantageously, the configuration is such that the offset between the pilot frequency Fp and transmit frequency Ft is small enough that the pilot signal can be received, and the transmit signal transmitted, by the same antenna, i.e. such that the pilot frequency Fp and transmit frequency Ft are within the operating band, or respective operating bands of the antenna to which the circuit 100 is connected. In typical embodiments, the pilot frequency FP is determined by the source of the pilot signal. The reference frequency Fref may be set to a value that is offset from the pilot frequency by an amount that is half of the desired offset between the pilot frequency Fp and the transmit frequency Ft. In other words, for a given pilot frequency, the reference frequency may be set such that the resulting transmit signal frequency is of a desired value. In the exemplary embodiment of Figure 1, the pilot signal is 433MHz. The reference frequency FREf is set at 433.5MHz. In the locked state, oscillator 114 produces a transmit signal 1, or output signal 11, of frequency FT = 434MHz. SMPA 102 is configured to mix the transmit signal 11 and the pilot signal 2 to produce an IF signal 22 of frequency 1 MHz (i.e. equal to the amount of the offset between Fp and Ft), which is subsequently halved to 0.5MHz by divide-by-2 divider 110. The oscillator output signal 11, which is also the transmit signal 1, is mixed with the reference signal by mixer 115 to produce signal 33 of frequency Ft - Fref = 0.5MHz. The circuit 100 is thus configured such, in the locked state when the inputs to the PD 112 are matched in both frequency (Ft - Fref = (Ft - FP) / 2) and phase (4>ft = (4>ft - 4>fp) / 2), oscillator 114 produces output signal 11 of frequency Ft = 434MHz, which is amplified by SMPA 102 before transmission as transmit signal 1. With reference to Figure 2, in typical embodiments, the circuit 100 is connected to an antenna 206 by an antenna feed 205 (e.g. comprising a feed line, transmission line or other conventional feed structure or feeding means) by which the pilot signal 2 is received by the circuit 100 from the antenna 206, and by which the transmit signal 1 is sent to the antenna 206 from the circuit 206. The feed 205 is connected to, or coupled to, an input / output port of the circuit 100, more particularly of the SMPA 102, as is described in more detail hereinafter. The circuit 100 does not require any lossy components on the TX path, providing transmission efficiencies equal to the efficiency of the SMPA 102.The combination of the circuit 100 and antenna 206 may be referred to as an antenna module 204, more specifically a retrodirective antenna module, or a retrodirective transceiver. Multiple 11 instances of antenna module 204 may be provided together as an antenna array, in particular a retrodirective array. The antenna modules in the retrodirective array may be coupled together in any conventional manner, for example by providing each module 204 with a common reference signal. The antenna array can transmit a powerful beam automatically directed toward the source of the pilot signal, as shown in Figure 2. Figure 2 shows an exemplary diagram of a retrodirective, or self-steering, antenna array system 200 in wireless communication with one or more device. In this example, each device is assumed to be a drone 202, but may alternatively be any object, typically a mobile object such as a drone, vehicle or satellite, equipped for wireless communication, i.e. typically including a wireless transceiver (not shown). Antenna array system 200 comprises N antenna modules 204, where N may be any positive integer value. Each module 204 includes at least one antenna 206, preferably only one antenna 206, connected to a respective instance of circuit 100. Each module may be referred to as a retrodirective antenna module. In preferred embodiments, signals are received and transmitted by the same antenna 206. Typically, each circuit 100 of the array 200 comprises an SMPA 102 and a PLL. In the exemplary embodiment of Figure 2, circuit 100 may optionally comprise one or more filters 106, and / or one or more amplifiers 104. The amplifier(s) 104 may be in the form of a low-noise amplifier (LNA) or other suitable amplifier. The phase of the pilot signal received at each antenna depends on the location of each antenna in the array. Thus, while each antenna, by virtue of a corresponding circuit 100, produces the phase conjugate of the pilot signal, these transmitted signals will have relative phases such that they interfere constructively along the direction from which the pilot signal originated. The automatic and autonomous operation of the PLL means that, even if the source of the pilot signal 2, and / or the source of the transmit signal 1, is moving, the circuit 100 allows the system to track the received signal without any need for corresponding movement of the system’s components. Further, the response time of the system is significantly improved by the arrangement of circuit 100, when compared to known arrangements, which typically require more components comprising the internal circuits or external system. These components are typically bulkier and more complex. Figure 3 is a schematic diagram of an alternative embodiment of a phase conjugate circuit 100’ embodying the invention, which is similar to the circuit 100 and in which like numerals are used to denote like parts and in respect of which the same or similar description applies unless otherwise indicated. Prior to divider 110, circuit 100’ may comprise amplifier 104, and one or more band pass filters 106. The IF signal passes through the band pass filter(s) 106 and / or amplifier(s) 104 in order to remove unwanted mixing products and noise to create a more clear and powerful signal. Circuit 100 may optionally comprise one or more phase shifter(s) 108. Phase shifter(s) 108 may be configured to fine tune the transmit signal 1, such that it is coherent with a neighbouring transmit signal (i.e., such that the neighbouring transmit signals have a constant relative phase) when, for example, the circuit 100 is implemented within a self-steering antenna array. Typically, such fine 12 tuning is performed as a one-time adjustment and does not form part of the retrodirective phase conjugating process of the pilot signal described herein. In the embodiment of Figure 3, circuit 100’ comprises one or more low pass filters 116 prior to the input of oscillator 114. Such filters are typical components of PLL circuits, and may be referred to as loop filters, to produce a stable locked condition. Optionally, circuit 100’ comprises a frequency multiplier 118 for increasing the frequency of the output signal from the oscillator 114 to the transmission frequency Ft. This results in a signal 11 of the frequency required for use in the mixer 115 or for transmission by the SMPA 102. The necessity of the frequency multiplier 118 may depend on the difference between the output frequency range of the oscillator 114 and the required transmit frequency. Optionally, the transmit signal 11 is provided to a gain amplifier 120 and / or a driver 121 prior to the SMPA 102. At least for ease of isolation of the signals, it is advantageous to set the frequency of the pilot 2 and transmit 1 signals to be of known, differing values. In the exemplary embodiment of Figure 3, the pilot signal 2 is of frequency FP 2.46GHz, and the transmit signal 1 is of frequency FT 2.47GHz. To produce a transmit signal 1 of this frequency, in this example the frequency of oscillator 114 is 19.2MHz, the output of which is subsequently multiplied by multiplier 118 to produce signal 11. In this example, the multiplication value of multiplier 118 is 128.125 to produce a transmit signal 2.47GHz. The SMPA 102 mixes signal 11 and pilot signal 2 and produces an IF signal 22 of 10MHz which is output at 101. This frequency is halved to 5MHz by divide-by-2 divider 110 before being provided to the PD 112. In the locked state, the inputs to the PD 112 are matched, i.e., (Ft - Fp) / 2 = Ft - Fref- Thus, the output of reference mixer 115 (Ft - Free) is also 5MHz. In the locked state, the SMPA 102 transmits a power beam transmit signal 1 (at 2.47 GHz in this example), which is generated as output signal 11 from the oscillator 114 and multiplier 118. At the same time, the SMPA 102 (configured as a non-linear mixer) receives pilot signal 2 from a pilot tone transmitter (at 2.46 GHz in this example). The pilot tone transmitter is typically co-located with a rectifying antenna (rectenna) or other receiving antenna, e.g. at the drone 202 (or other remote device as applicable) for receiving the transmit signal 1. The SMPA 102 mixes the pilot tone signal 2, with the power beam transmit signal 1 to produce the IF signal 22, with an intermediate frequency IF of 10 MHz in this example. The IF signal 22 is extracted from the SMPA 102, typically from the drain bias connection 101 of the SMPA 102, which typically comprises a low pass filter (or other suitable filter) configured to allow the IF signal 22 to pass but rejects the transmit signal 1 and pilot signal 2 RF frequencies. The received IF signal 22 is then amplified by an IF amplification stage which in this example comprises an amplifier 104 and two band pass filters 106, which remove unwanted mixing products and noise. The circuit 100’ is configured to phase conjugate the pilot beam signal 2. In particular, the filtered IF signal 22 has a phase relationship of the transmit signal phase minus the pilot phase (0ft - 0fp). This is fed to a divide-by-2 divider 110 which produces a phase output of (0ft - 0fp) / 2, which is fed to one 13 port, or input, of the PLL phase detector PD 112. The second port, or input 105, of the PLL phase detector 112 is fed by the transmit signal 33 of phase ^ft- Assuming the phases of the signals provided to the inputs of the PD 112 are equal when the PLL is in the locked state, then: (^FT - <Pfp) / 2 = ^FT , ^FT ~ ^FP = 20FT .-. -^Fp = ^ft, i.e. phase conjugation. Hence the transmit signal 1, or transmit beam, has a phase that is the phase conjugate of the pilot signal 2. Figure 4 is schematic diagram of an alternative embodiment of a phase conjugate circuit 100” embodying the invention, which is similar to the circuits 100 and 100’, and in which like numerals are used to denote like parts and in respect of which the same or similar description applies unless otherwise indicated. The exemplary configuration of Figure 4 incorporates various additional components, such as filters and amplifiers to ensure the transmit signal is strong and uncontaminated. Figure 4 also indicates, by way of example only, suitable values and operating parameters for the components. For example, the input power PP of the pilot signal 2 may be 30dBm and after mixing in SMPA 102, the resultant IF signal 22 may have a power Pifi = -15dBm due to mixing losses. Phase shifter 108 may be in the range of -120° to 120° to ensure coherence of the signal with those of neighbouring antennas. Band pass filters 106 may provide a gain of around 1dB-1.5dB whilst filtering out frequencies which do not fall within a specified range, for example, depending on the placement of the filters 106, they may prevent passing of frequencies outside of the intermediate frequency IF 22 (10MHz), outside of the frequency of signal 33 (5MHz) or outside of the transmission frequency. Amplifiers 104 may provide a gain of around 10-20dB depending on their placement in the circuit 100. The circuit 100 of the exemplary diagram of Figure 4 comprises attenuators 107. Attenuators 107 may be used to prevent overloading the PLL. The attenuator(s) 107 may be electronically variable and part of an automatic gain control system, which facilitates circuit 100 tracking sources at variable distances since the received pilot signals may have variable signal strength. The exemplary embodiment of Figure 4 comprises frequency mulitplier 118, comprising two outputs A' and A+- one which directs signal 11 to mixer 115, and another which directs signal 11 to the SMPA 102 for transmission back to the pilot source, respectively. Also shown in Figure 4 is an oscillator 117 coupled to reference mixer 115 to provide said mixer 115 with the reference signal for mixing with signal 11. Figure 5 is a schematic diagram of an exemplary embodiment of the SMPA 102. The SMPA 102 has an input port 8 (RFin) for receiving transmit signal 11 from the PLL, and an output port 10 (RF0Ut) for outputting the amplified transmit signal 1 to the antenna. One or more transistors 3 are coupled between the input 8 and output 10 for amplifying the received signal 11 to produce the amplified transmit signal 1. As such, the SMPA 102 acts as a power amplifier for the transmit signal 11. The pilot signal 2 is received at the output port 10. The SMPA 102 includes a frequency mixer 18 for mixing, or multiplying, the signal 11 and the pilot signal 2 to produce a signal at an intermediate frequency (IF) that is the difference of the signal 11 and the pilot signal 2 frequencies. The mixer 18 is preferably coupled between the output port 10 and the transistor 3, typically the drain of the transistor 3. The SMPA 102 includes an output port 23, or extraction port, by which the IF signal is output from the SMPA 102 (to the PLL in preferred embodiments). The SMPA 102 includes a filter 20 between the mixer 18 and extraction port 23 that is tuned to allow the IF signal to pass. The filter may comprise an inductance 16 in parallel with a capacitance 14. The mixer 18 may comprise any suitable frequency mixing circuitry, and in the illustrated embodiment comprises a capacitance 14 connected between the amplifier output (drain) and ground, and an inductance 16 connected between the amplifier output (drain) and the filter 20. The extraction output 23 is coupled to the amplifier drain in this example. In alternative embodiments, mixer 18 may take other configurations, for example comprising parallel resonant circuit(s), distributed transmission lines configured to act as resonator(s), or other resonator circuitry. Optionally, mixer 18 may be tuned to frequency Ft to increase the efficiency of the SMPA 102. Typically, an impedance matching network (IMN) 17 is provided at the input port 8. The IMN 17 may comprise any suitable inductance 16 and capacitance 14 network. SMPA 102 typically comprises or is connected to one or more power supplies, for example a gate supply voltage VGg, and a drain supply voltage and a drain supply voltage Vdd. By way of example, transistor 3 may be a GaN HEMT high efficiency PA transistor. The self-mixing operation of the SMPA 102 has a non-linear aspect and so any conventional type of transistor may be used, e.g. BJT, FET and so on, the nonlinear effect (inherent to any type of transistor) facilitating the self mixing operation. In preferred embodiments, the SMPA 102 operates by utilising the non-linear characteristics of the PA transistor 3 such that it can also operate as a non-linear multiplier (or mixer) circuit. While the PA 102 is operating to provide a high power output signal 1, the injected pilot signal 2 at FP is multiplied by the RFn signal at Fs, to produce a mixing product of Fr -- FP. This mixing product, or IF signal, which is at a frequency considerably lower than the RF frequency, is extracted at the port 23 (from the drain bias circuit in the illustrated example) by the filtering circuit 20, which is tuned to allow Ft-Fpto pass through, while rejecting other higher frequency components. The preferred SMPA 102 does not suffer from problems associated with conventional mixers - for instance, conversion loss, unwanted mixing products, and low retransmitted power. More generally, preferred embodiments of the invention provide a simple, efficient and compact circuit for providing a phase conjugate signal of large retransmitting power with minimal loss. The invention is not limited to the embodiment(s) described herein but can be amended or modified without departing from the scope of the present invention.

Claims

1. A phase conjugation circuit comprising:an antenna feed for receiving signals from, and transmitting signals to, an antenna;a phase locked loop (PLL) circuit; anda signal amplifying device having an input for receiving a transmit signal from the PLL circuit, a first output connected to the antenna feed for providing an amplified transmit signal to the antenna feed and for receiving a received signal from the antenna feed, and a second output for providing an intermediate frequency (IF) signal, wherein said transmit signal has a transmit signal phase and a transmit frequency, and said received signal has a received signal phase and a received signal frequency, said received signal frequency being different than said transmit signal frequency, said signal amplifying device including a frequency mixer configured to mix said transmit signal and said received signal to produce said IF signal with an IF signal phase equal to the difference between the transmit signal phase and the received signal phase,and wherein the phase conjugation circuit includes a frequency divider and is configured to provide said IF signal to said frequency divider, said frequency divider being configured to produce a divided IF signal with a phase equal to half of the difference between the transmit signal phase and the received signal phase, and wherein said PLL circuit comprises:a phase detector having a first input and a second input and being configured to generate an output signal that is dependent on the phase difference between the respective signals received at said first and second inputs;a signal generator for generating said transmit signal having a frequency that is variable in response to a control signal, wherein the output signal of said phase detector provides said control signal; anda frequency mixer configured to mix the transmit signal with a reference signal having a reference frequency and a reference phase to produce a mixer output signal with said transmit signal phase, said mixer output signal being provided to the second input of said phase detector,and wherein said phase conjugation circuit is configured to provide said divided IF signal to the first input of said phase detector.

2. The circuit of claim 1, wherein said reference phase is 0°.

3. The circuit of claim 1 or 2, wherein said reference frequency is offset from said received signal frequency by an amount equal to half of the difference between said received signal frequency and said transmit signal frequency.

4. The circuit of any preceding claim, wherein said frequency divider is configured to produce said divided IF signal with a frequency equal to half of the difference between the transmit signal frequency and the received signal frequency.

5. The circuit of any preceding claim, wherein said frequency mixer of said signal amplifying device is configured to produce said IF signal with an IF signal phase equal to the received signal phase subtracted from the transmit signal phase.

6. The circuit of any preceding claim, wherein said frequency mixer of said signal amplifying device is configured to produce said IF signal with an IF signal frequency equal to the difference between the transmit signal frequency and the received signal frequency.

7. The circuit of claim 6, wherein said frequency mixer of said signal amplifying device is configured to produce said IF signal with an IF signal frequency equal to the received signal frequency subtracted from the transmit signal frequency.

8. The circuit of any preceding claim, wherein said frequency mixer of said PLL circuit is configured to produce said mixer output signal with a frequency equal to half of the difference between the transmit signal frequency and the received signal frequency.

9. The circuit of any preceding claim, wherein the signal amplifying device comprises at least one transistor coupled between the input and the first output for amplifying the transmit signal to produce the amplified transmit signal, said frequency mixer being coupled between the first output and said at least one transistor, typically between the first output and the drain of said at least one transistor.

10. The circuit of any preceding claim, wherein said second output of said signal amplifying device is coupled to the drain of said at least one transistor, typically by said frequency mixer.

11. The circuit of any preceding claim, wherein said signal amplifying device includes a filter between the frequency mixer and the second output, the filter being tuned to extract the IF signal produced by the frequency mixer.

12. The circuit of any preceding claim, wherein said signal amplifying device comprises a power amplifier.

13. The circuit of any preceding claim, wherein signal generator comprises an electronic oscillator, preferably an adjustable, or variable frequency, electronic oscillator, which may be configured to generate said transmit signal, or a signal from which said transmit signal is generated.

14. The circuit of claim 13, wherein said signal generator includes a frequency multiplier, the electronic oscillator and frequency multiplier being configured to generate said transmit signal.

15. The circuit of any preceding claim, wherein said received signal frequency is lower than said transmit signal frequency.

16. The circuit of any preceding claim, wherein the frequency mixer of the signal amplifying device is configured to subtract said received signal from said transmit signal to produce said IF signal.

17. An antenna module comprising a phase conjugation circuit as claimed in any one of claims 1 to 16 and an antenna connected or coupled to the antenna feed, the antenna module typically being configured to transmit said transmit signal in the same direction from which said received signal is received by causing said transmit signal to have a phase that is the conjugate of the phase of the received signal.

18. A retrodirective transceiver comprising at least one antenna module as claimed in claim 17, wherein the, or each, antenna module is typically configured to transmit said transmit signal in the same direction from which said received signal is received by causing said transmit signal to have a phase that is the conjugate of the phase of the received signal.

19. A retrodirective array comprising an array of antenna modules as claimed in claim 17 or an array of retrodirective receivers as claimed in claim 18.

20. A retrodirective antenna system comprising a retrodirective transceiver as claimed in claim 18 or a retrodirective array as claimed in claim 19 in wireless communication with at least one other object, said at least one other object being configured to transmit a signal, preferably a pilot signal, for receipt by the, or each, antenna module as said received signal, and wherein the, or each, antenna module is typically configured to transmit said transmit signal in the same direction from which said received signal is received by causing said transmit signal to have a phase that is the conjugate of the phase of the received signal.

21. A method of producing a transmit signal having a phase that is the conjugate of the phase of a received signal, the method comprising:generating said transmit signal having a transmit signal phase and a transmit frequency, receiving said received signal, said received signal having a received signal phase and a received signal frequency, said received signal frequency being different than, preferably lower than, said transmit signal frequency,mixing said transmit signal and said received signal to produce an intermediate frequency (IF) signal with an IF signal phase equal to the difference between the transmit signal phase and the received signal phase,producing a divided IF signal with a phase equal to half of the difference between the transmit signal phase and the received signal phase,mixing the transmit signal with a reference signal having a reference frequency and a reference phase to produce a mixer output signal with said transmit signal phase,comparing the phase of said divided IF signal with the phase of said mixer output signal to produce a control signal that is dependent on the phase difference between said divided IF signal and said mixer output signal, andcontrolling the transmit frequency using said control signal.

22. A method of transmitting a signal retrodirectively with respect to a signal received by an antenna, the method comprising producing a transmit signal having a phase that is the conjugate of the phase of a received signal by the method of claim 21, and transmitting the transmit signal by the antenna.

23. A signal amplifying device comprising:a first input configured to receive a first input signal;a second input configured to receive a second input signal;an output; anda frequency mixer;wherein the first input signal has a first signal phase and a first frequency and the second input signal has a second signal phase and second frequency, said first frequency being different to said second frequency;wherein the frequency mixer is configured to mix said first input signal and said second input signal to produce an intermediate frequency (IF) signal with an IF signal phase equal to the difference between the first signal phase and the second signal phase; andwherein said IF signal is output via the output.

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