Estimation program, estimation method, and information processing apparatus

By adjusting the number of processing and nodes on the computing nodes, drawing the memory usage curve, predicting and avoiding insufficient memory, the problem of insufficient memory in large-scale computing is solved, and the cost and time overhead are reduced.

JP2025019787APending Publication Date: 2025-02-07FUJITSU LTD
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Patent Information

Application Number
JP2023123606
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-07-28
Publication Date
2025-02-07

AI Technical Summary

Technical Problem

When the computing scale is large, the memory usage of the computing nodes increases, which may lead to insufficient memory and lead to calculation failure. It is difficult for the existing technology to predict and avoid this situation at low cost.

Method used

By performing the processing of evaluation problems on multiple computing nodes, adjusting the number of processing and nodes, recording memory usage, drawing memory usage curves, predicting memory shortage points, and adjusting the node and memory configuration of the actual computing task based on the prediction.

Benefits of technology

Effectively predict and avoid insufficient memory, reduce computing costs and time overhead, and ensure the stable operation of the computing system.

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Abstract

To provide a low-cost method for estimating conditions under which a memory capacity shortage of a node can be suppressed when causing the plurality of nodes to execute processing of a problem.SOLUTION: A control unit multiplies the number of first processes per node in the case of executing the process of a target problem B1 by a predetermined number to calculate the number of second processes per node in the case of executing the process of an evaluation problem B2 which is smaller in a computational amount than the target problem B1 on a small number of nodes; allows, assuming that the number of second processes is constant, executing the process of the evaluation problem B2 under respective conditions under which each of the size of the evaluation problem B2 and the number of nodes executing the process of the evaluation problem B2 is increased stepwise at the same rate; calculates an approximate curve of the relationship between the size of the evaluation problem B2 and the memory usage per node under each condition; and estimates the number of nodes executing the process of the target problem B1 and the size of the target problem B1 based on the approximate curve, the amount of memory usage per node when an error occurs due to insufficient memory capacity, and the predetermined number.SELECTED DRAWING: Figure 12
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Description

[Technical field]

[0001] The present invention relates to an estimation program, an estimation method, and an information processing device. [Background technology]

[0002] 2. Description of the Related Art Computer systems are known in which a plurality of computing nodes, each of which is a computer equipped with a processor and a memory, cooperate to perform calculations.

[0003] The memory installed in each computing node is allocated to the system, computing programs, inter-process communication, etc. The computation in each computing node is performed within the range of the memory installed in the computing node. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 09-179834 [Patent Document 2] International Publication No. 2004 / 099985 [Patent Document 3] US Patent Application Publication No. 2018 / 0293184 [Patent Document 4] US Patent Application Publication No. 2022 / 0374283 Summary of the Invention [Problem to be solved by the invention]

[0005] For example, the larger the scale of a calculation executed by a computer system, the greater the usage of the memory storage area used by each calculation node (hereinafter, sometimes referred to as "memory usage"). If the memory usage in a calculation node exceeds the available storage capacity (hereinafter, sometimes referred to as "memory capacity") in the storage area of ​​the memory installed in the calculation node, an error due to insufficient memory may occur, and the calculation may fail to execute. A calculation is an example of a "problem" ("target problem") to be processed by a computer system.

[0006] In order to avoid failure in the execution of a calculation, it is conceivable to grasp in advance the target memory usage to be used in the calculation to be executed by the computer system, and to estimate in advance whether the memory capacity of the calculation node will be insufficient due to the execution of the calculation. However, the memory usage of the calculation node due to the execution of the calculation varies depending on the functions used in the calculation, etc. Therefore, for example, it may be necessary to provide the calculation node with a sufficient memory capacity assuming a memory usage amount greater than the target amount, which increases costs such as expenses and time.

[0007] It is also possible to identify conditions (e.g., problem size, number of nodes, etc.) under which memory capacity shortage will not occur by having a computer system that actually executes the calculation execute the calculation and determining whether or not memory capacity will be insufficient. However, in a computer system that executes a calculation of a certain scale, for example a large-scale calculation, the costs, such as the expense and time, required to execute a calculation of a certain scale may be large.

[0008] In this way, it is difficult to inexpensively identify conditions under which a node will not run out of memory capacity when a problem is executed on multiple nodes.

[0009] In one aspect, an object of the present invention is to estimate, at low cost, a condition that can suppress occurrence of a shortage of memory capacity in a node when a problem is executed on a plurality of nodes. [Means for solving the problem]

[0010] In one aspect, the estimation program causes a computer to execute the following process. The process may multiply a first number of processes per node when the target problem is processed by a first plurality of nodes by a predetermined number, thereby calculating a second number of processes per node when an evaluation problem having a smaller amount of calculation than the target problem is processed by a second plurality of nodes fewer than the first plurality of nodes. The process may also be configured to make the second number of processes per node constant, and to cause the second plurality of nodes corresponding to the number of nodes to process the evaluation problem in each state in which the size of the evaluation problem and the number of nodes that execute the processing of the evaluation problem are each increased stepwise at the same rate. Furthermore, the process may calculate an approximation curve of the relationship between the size in each of the states and the memory usage per node used in the processing of the evaluation problem in each of the states. In addition, the process may estimate a first node number of the first plurality of nodes that executes processing of the target problem and a first size of the target problem based on the calculated approximation curve, the memory usage per node when an error occurs due to insufficient memory capacity, and the specified number. Effect of the Invention

[0011] In one aspect, the present invention can estimate, at low cost, a condition under which a node's memory capacity shortage can be suppressed when a problem is executed on a plurality of nodes. [Brief description of the drawings]

[0012] [Figure 1] FIG. 2 is a block diagram showing an example of a hardware (HW) configuration of a computing system according to an embodiment. [Diagram 2] 2 is a block diagram showing an example of a hardware configuration of the node shown in FIG. 1. [Diagram 3] FIG. 2 is a block diagram showing a first configuration example of a node. [Figure 4] FIG. 13 is a block diagram showing a second configuration example of a node. [Diagram 5] FIG. 13 is a block diagram showing a third configuration example of a node. [Figure 6] FIG. 2 is a block diagram illustrating an example of a hardware configuration of a computer. [Figure 7] FIG. 1 is a diagram for explaining an example of the operation of a calculation process in a calculation system. [Figure 8] FIG. 2 illustrates an example of allocation of storage areas in a memory on a node. [Figure 9] FIG. 2 illustrates an example of a relationship between processes and threads. [Figure 10] FIG. 13 is a diagram illustrating an example of a weak scaling process. [Figure 11] FIG. 2 is a diagram illustrating an example of communication between nodes. [Figure 12] FIG. 11 is a diagram illustrating an example of a memory usage estimation process. [Figure 13] 2 is a block diagram showing an example of a software configuration of the management server shown in FIG. 1. [Figure 14] FIG. 13 is a diagram illustrating an example of weak scaling information. [Figure 15] FIG. 11 is a diagram illustrating an example of a condition estimation process. [Figure 16] 13 is a flowchart illustrating an example of the operation of a management server. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. However, the embodiment described below is merely an example, and is not intended to exclude various modifications or application of techniques not specified below. For example, this embodiment can be implemented with various modifications within the scope of the gist of the present invention. In the drawings used in the following description, parts with the same reference numerals represent the same or similar parts unless otherwise specified.

[0014] [A] Hardware configuration example of one embodiment FIG. 1 is a block diagram showing an example of a hardware (HW) configuration of a computing system 1 according to an embodiment.

[0015] As shown in FIG. 1, the computing system 1 may illustratively include a computing server 2, a management server 3, a console 4, and a storage 5.

[0016] The computation server 2 executes the processing of the problem. The problem is, for example, a computation assigned to the computation server 2. The computation server 2 may be, for example, a computer system that realizes the function of HPC (High Performance Computing). The computation server 2 includes a plurality of nodes 20-1 to 20-15 (sometimes written as nodes 20) that are communicatively connected to each other, and performs computations by linking the plurality of nodes 20. FIG. 1 shows an example in which the computation server 2 includes 15 nodes 20, but the computation server 2 may include, for example, tens of thousands of nodes 20 or more.

[0017] Each node 20 is an example of a computer or calculator equipped with a processor and a memory. The multiple nodes 20 are connected to each other so that they can communicate with each other via a high-speed network 2a. A program for executing a calculation assigned to the calculation server 2 is executed by one or more nodes 20, and when executed by multiple nodes 20, the calculation results are obtained by communicating the calculation contents between the nodes 20. Examples of the high-speed network 2a include Ethernet (registered trademark), Infiniband, Millinet, PCIe (Peripheral Component Interconnect express), FC (Fibre Channel), and Tofu (Torus fusion) interconnect.

[0018] The management server 3 is an example of a computer or information processing device that manages the order of multiple programs to be executed by the calculation servers 2 and the range of computer resources. The management server 3 may also be called a login server. The computer resources may be, for example, computational resources in units of nodes 20. In FIG. 1, the management server 3 manages a range of one or more nodes 20 used to execute a program as computer resources. The management server 3 may be connected to the calculation servers 2 via a network 1a.

[0019] Examples of the network 1a and each of the networks 1b to 1d described below include Ethernet (registered trademark), Infiniband, Millinet, PCIe, and FC.

[0020] The management server 3 includes a CPU (Central Processing Unit) 3a, a memory 3b, and an IF (Interface) device 3c. The HW configuration of the management server 3 will be described later. Note that one or more of the multiple nodes 20 may be used as the management server 3.

[0021] The console 4 is a terminal device operated by a user to cause the calculation server 2 to execute calculations, and is an example of a computer. The console 4 is connected to the management server 3 via a network 1b. The calculation system 1 may include multiple consoles 4.

[0022] The storage 5 is an example of a storage device that stores various data, programs, and other information. In one example, the storage 5 may be a shared storage that can be accessed by both the management server 3 and the nodes 20 of the calculation server 2. Examples of the storage 5 include various storage devices such as a magnetic disk device such as a hard disk drive (HDD), a semiconductor drive device such as a solid state drive (SSD), and a nonvolatile memory. Examples of the nonvolatile memory include a flash memory, a storage class memory (SCM), and a read only memory (ROM).

[0023] The storage 5 and the calculation server 2 may be connected to each other via a network 1c so that they can communicate with each other. The storage 5 and the management server 3 may be connected to each other via a network 1d.

[0024] Fig. 2 is a block diagram showing an example of a hardware configuration of the node 20 shown in Fig. 1. The node 20 includes CPUs 21-1 and 21-2 (sometimes referred to as CPU 21), a memory 22, a memory controller 23, and an IF device 24.

[0025] The CPU 21 is an example of a calculation processing device that performs various controls and calculations. The CPU 21 may execute processing of a target problem. In the example of Fig. 2, the CPU 21 is a multiprocessor including a plurality of CPUs 21-1 and 21-2. Each CPU 21 is a multicore processor including a plurality of processor cores (referred to as "cores" in Fig. 2) 25-1 to 25-9.

[0026] The memory 22 is an example of HW that stores various data, programs, and other information, and is an example of a main memory. The memory 22 may be, for example, one or both of a volatile memory such as a dynamic random access memory (DRAM) and a non-volatile memory such as a persistent memory (PM).

[0027] The memory 22 may be implemented, for example, inside and / or outside a computing device such as the CPU 21 or a graphics processing device.

[0028] The memory controller 23 is a controller that controls access between the CPU 21 and the memory 22, and is, for example, an integrated circuit (IC).

[0029] The IF device 24 is a communication device used for communication between the nodes 20 .

[0030] 2, the node 20 may include hardware components such as a storage device slower than the memory 22 and a graphics processing device. Hereinafter, a configuration example (one example of architecture) focusing on the implementation form of the memory 22 in the node 20 will be described with reference to FIGS.

[0031] Fig. 3 is a block diagram showing a first configuration example of the node 20A. The node 20A includes memories 22-1 to 22-3 outside the CPU 21a. The CPU 21a and the memories 22-1 to 22-3 are examples of the CPU 21 and the memory 22 shown in Fig. 2, respectively. The outside of the CPU 21a may mean the outside of the package of the CPU 21a. Note that the memory controller 23 and the IF device 24 are omitted from Fig. 3 and Figs. 4 and 5 described later.

[0032] The CPU 21a includes cores 25a-1 and 25a-2 (sometimes referred to as cores 25), an L1 cache 26, and an L2 cache 27. The L1 cache 26 and the L2 cache 27 are cache memories used to store information recently accessed by the CPU 21a. The L2 cache 27 is located farther away from the core 25 than the L1 cache 26.

[0033] 4 is a block diagram showing a second configuration example of the node 20 B. The node 20 B includes a CPU 21 b, a memory 22 b, and a graphics processing unit 28.

[0034] The graphics processing device 28 is an example of an arithmetic processing device. When the graphics processing device 28 is notified of the calculation contents from the CPU 21b via the communication path, the graphics processing device 28 executes the actual calculation and transfers the calculation result to the CPU 21b. Note that the communication between the multiple nodes 20B is executed by the CPU 21b via the high-speed network 2a.

[0035] The graphics processing device 28 may include multiple pairs of cores 28a and High Bandwidth Memory (HBM) 28b (N sets of 28a-1 and HBM 28b-1 to 28a-N and HBM 28b-N in the example of FIG. 4) (N is an integer of 2 or more).

[0036] The HBM 28b is an example of a memory that can be accessed at high speed, and is a memory in which multiple memory chips are stacked using silicon through-hole technology and connected to the cores 28a via a wide-bandwidth bus. The available capacity of the storage area of ​​each HBM 28b is smaller than that of the memory 22b. However, since the number of HBMs 28b is provided according to the number of cores 28a, this is suitable for the case where the calculation server 2 executes a large amount of similar processing.

[0037] The CPU 21b is an example of the CPU 21 shown in FIG. 2, and the memory 22b is an example of the memory 22 shown in FIG.

[0038] 3, the memory 22 can be easily expanded, and the node 20A can be equipped with a large-capacity memory 22. However, since the distance between the CPU 21a and the memory 22 becomes long, there may be a case where the memory access speed from the CPU 21a to the memory 22 is limited.

[0039] 4, the main calculation is executed by the graphic processing unit 28, and the communication between the nodes 20 is executed by the CPU 21b. Therefore, even if the number of the nodes 20B increases, the occurrence of a memory shortage error in the node 20B when executing the problematic processing is suppressed.

[0040] 5 is a block diagram showing a third configuration example of the node 20C. The node 20C includes cores 25c-1 to 25c-16 (may be referred to as cores 25c), L1 caches 26-1 to 26-16, L2 caches 27-1 to 27-4, and HBMs 29-1 to 29-4 (may be referred to as HBM 29) on a CPU 21c. The core 25c, the L1 cache 26, the L2 cache 27, and the HBM 29 shown adjacent to each other may be mounted on a board such as a CPU board. The HBM 29 is an example of the memory 22 shown in FIG. 2.

[0041] The CPU 21c is an example of the CPU 21 shown in FIG. 2, and the HBM 29 is an example of the memory 22 shown in FIG.

[0042] In the node 20C shown in FIG. 5, the distance between the core 25 and the corresponding HBM 29 is shorter than in the case of FIG. 3 or FIG.

[0043] As described above, the node 20 shown in FIG. 2 may be implemented by employing at least one of the architectures shown in FIGS.

[0044] Next, an example of the overall hardware configuration including the above-mentioned configurations of each of the node 20, management server 3, console 4, and storage 5 shown in FIG. 1 will be described using the computer 10 shown in FIG. 6 as an example.

[0045] Fig. 6 is a block diagram showing an example of a hardware configuration of the computer 10. As shown in Fig. 6, the computer 10 may include, as a HW configuration, a CPU 10a, a memory 10b, an IF device 10c, a graphics processing device 10d, a storage device 10e, an IO (Input / Output) device 10f, and a reading device 10g, for example.

[0046] The CPU 10a is an example of a calculation processing device or processor that performs various controls and calculations. For example, the CPU 3a shown in FIG. 1 is an example of the CPU 10a of the management server 3. Moreover, the CPUs 21 (21a to 21c) shown in FIGS. 2 to 5 are examples of the CPU 10a of the node 20. The CPU 10a may be connected to each block in the computer 10 via a bus 10j so that they can communicate with each other. The CPU 10a may be a multiprocessor including a plurality of processors, a multicore processor having a plurality of processor cores, or a configuration having a plurality of multicore processors.

[0047] Instead of the CPU 10a, a processor such as an integrated circuit (IC) such as an MPU, APU, DSP, ASIC, or FPGA may be provided. A combination of two or more of these integrated circuits may be used as a processor. MPU is an abbreviation for Micro Processing Unit. APU is an abbreviation for Accelerated Processing Unit. DSP is an abbreviation for Digital Signal Processor, ASIC is an abbreviation for Application Specific IC, and FPGA is an abbreviation for Field-Programmable Gate Array.

[0048] The memory 10b is an example of HW that stores various data, programs, and other information. For example, the memory 3b shown in FIG. 1 is an example of the memory 10b of the management server 3. Furthermore, the memories 22, 22b, and HBM 29 shown in FIGS. 2 to 5 are examples of the memory 10b of the node 20. The memory 10b may be, for example, one or both of a volatile memory such as a DRAM and a non-volatile memory such as a PM. The memory 10b is an example of a main storage device.

[0049] The IF device 10c is an example of a communication IF that controls the connection and communication between each of the node 20, the management server 3, the console 4, and the storage 5. For example, the IF device 3c shown in Fig. 1 is an example of the IF device 10c of the management server 3. For example, the IF device 10c may include an adapter that complies with the communication standards of each of the high-speed network 2a and the networks 1a to 1d, such as an adapter that complies with a high-speed interconnect, a LAN (Local Area Network) such as Ethernet (registered trademark), or optical communication such as FC. The adapter may be compatible with either or both of wireless and wired communication methods.

[0050] The program 10h may be downloaded to the computer 10 from a network via the communication IF and stored in the storage device 10e.

[0051] The graphics processing device 10d is an example of a processing device that performs screen display control for an output device such as a monitor of the IO device 10f. The graphics processing device 10d may also have a configuration as an accelerator that executes various calculations, such as machine learning processing and estimation processing using a machine learning model. The graphics processing device 10d may be various processing devices, such as integrated circuits (ICs) such as a GPU (Graphics Processing Unit), an APU, a DSP, an ASIC, or an FPGA. The graphics processing device 28 shown in FIG. 4 is an example of the graphics processing device 10d of the node 20.

[0052] The storage device 10e is an example of HW that stores various data, programs, and other information. The storage device 10e may be used as local storage for each of the node 20, the management server 3, and the console 4. The storage device 10e may also be used as at least a part of the storage area of ​​a shared storage that the storage 5 provides to the node 20 and the management server 3. Examples of the storage device 10e include various storage devices such as a magnetic disk device such as an HDD, a semiconductor drive device such as an SSD, and a nonvolatile memory. Examples of the nonvolatile memory include a flash memory, an SCM, and a ROM.

[0053] The storage device 10e may store a program 10h. The program 10h is a program executed by the CPU 10a or the graphic processing device 10d. The program 10h stored in the management server 3 may include, for example, an estimation program for estimating the usage of the memory area of ​​the memory in each node 20. The program 10h stored in the storage 5 may include, for example, a program to be executed by the calculation server 2 (node ​​20).

[0054] For example, the CPU 10a of the management server 3 can realize the function of the management server 3 (for example, the control unit 30 shown in FIG. 13) described later by expanding the program 10h stored in the storage device 10e into the memory 10b and executing it. Also, for example, the CPU 10a of the console 4 can realize the function of the console 4 described later by expanding the program 10h stored in the storage device 10e into the memory 10b and executing it. Furthermore, for example, the CPU 10a of the node 20 can realize the function of the node 20 described later (for example, execution of calculations such as problems) by expanding the program 10h stored in the storage 5 or the storage device 10e into the memory 10b and executing it.

[0055] The IO device 10f may include one or both of an input device and an output device. Examples of the input device include a keyboard, a mouse, a touch panel, etc. Examples of the output device include a monitor, a projector, a printer, etc. The IO device 10f may also include a display device such as a touch panel in which the input device and the output device are integrated. The output device may be connected to the graphics processing device 10d.

[0056] The reading device 10g is an example of a reader that reads out data or program information recorded on the recording medium 10i. The reading device 10g may include a connection terminal or device to which the recording medium 10i can be connected or inserted. Examples of the reading device 10g include an adapter that complies with USB (Universal Serial Bus) or the like, a drive device that accesses a recording disk, and a card reader that accesses a flash memory such as an SD card. The recording medium 10i may store a program 10h, and the reading device 10g may read the program 10h from the recording medium 10i and store it in the storage device 10e.

[0057] Examples of the recording medium 10i include non-transitory computer-readable recording media such as magnetic / optical disks and flash memories. Examples of the magnetic / optical disks include flexible disks, CDs (Compact Discs), DVDs (Digital Versatile Discs), Blu-ray Discs, and HVDs (Holographic Versatile Discs). Examples of the flash memory include semiconductor memories such as USB memories and SD cards.

[0058] The above-described HW configuration of the computer 10 is an example. Therefore, the HW in the computer 10 may be increased or decreased (for example, adding or deleting any block), divided, or integrated in any combination, or buses may be added or deleted, etc.

[0059] [B] Description of one embodiment 7 is a diagram for explaining an example of the operation of the calculation process in the calculation system 1. A user operates the console 4 to log in to the management server 3 via the network 1b.

[0060] The console 4 transfers the batch file 6 for submission and the calculation program 63 to the management server 3 through the network 1b based on the user's instruction. The calculation program 63 may be the main body of the program executed by the calculation server 2, and may include data used in the execution of the program. The console 4 may transfer the calculation program 63 (calculation programs 63-1, 63-2, ... in the example of FIG. 7) to the storage 5 through the management server 3 and the network 1d, for example. In this way, the console 4, the management server 3, and the calculation server 2 may share the storage 5 and transfer the calculation program 63 through the storage 5.

[0061] A user may create a batch file 6 and a calculation program 63 on the console 4, or may obtain a batch file 6 and a calculation program 63 that have been created on another computer.

[0062] The batch file 6 may include calculation conditions 61 and resource information 62 (resource requirements). The calculation conditions 61 may be conditions for executing the calculation program 63 in the calculation server 2, and may include the priority and parameters of the calculation execution. The resource information 62 specifies the computer resources to be used during the calculation in the calculation server 2. As an example, the resource information 62 may include the number of nodes 20 to be used for executing the processing of the target problem (e.g., calculation). Since each node 20 is provided with a CPU 21 and a memory 22, the computer resources may mean the total number of CPUs 21 and memories 22.

[0063] The management server 3 may execute a plurality of calculation programs 63 in cooperation with each other based on the batch files 6-1, 6-2, etc. received from the console 4. The batch files 6-1, 6-2 may include instructions for inputting the calculation results calculated by the calculation program 63-1 to another calculation program 63-2.

[0064] The management server 3 executes a scheduler 7. The scheduler 7 determines the operation order 71-73 (execution order) of the calculation program 63. The operation order 71-73 may be determined based on the amount of computer resources and priority requested from the console 4, the amount of computer resources currently being used in the calculation server 2, and the amount of computer resources to be released in the future. The scheduler 7 secures computer resources to be used in the calculation server 2 according to the determined operation order 71-73, and causes the calculation server 2 to execute the calculation program using the secured computer resources.

[0065] The scheduler 7 instructs a specific node 20 as the range of computer resources for executing a plurality of calculation programs 63. In the example shown in FIG. 7, the scheduler 7 instructs the calculation server 2 to execute the calculation program #1 of the calculation programs 63 using the computer resources of the nodes 20-1, 20-2, 20-6, and 20-7. The scheduler 7 also instructs the calculation server 2 to execute the calculation program #2 of the calculation programs 63 using the computer resources of the nodes 20-11 to 20-14. Furthermore, the scheduler 7 instructs the calculation server 2 to execute the calculation program #3 of the calculation programs 63 using the computer resources of the node 20-3.

[0066] In the field of HPC, the linkage of processes within each node 20 and between nodes 20 is controlled using an API (Application Programming Interface) such as MPI (Message Passing Interface), thereby enabling large-scale calculations to be realized.

[0067] The calculation server 2 processes the problems by executing the calculation programs 63-1 and 63-2 on one or more nodes 20 through MPI communication, and stores the processing results 64-1 and 64-2 of each problem in the storage 5 via the network 1c. The processing results 64-1 and 64-2 may be transferred to the console 4 (user) that issued the batch file 6 of the calculation program 63, for example, via the network 1d and the management server 3.

[0068] The management server 3 executes an estimation program that estimates the usage of the storage area of ​​the memory 22 in each node 20. Furthermore, the management server 3 may execute a build process from the source file of the calculation program 63. The build process may include a series of processes for checking whether there are any problems with the source code, converting it into machine code, and combining the files to create an executable file. Furthermore, the management server 3 may execute a part of the calculation programs 63 out of the multiple calculation programs 63.

[0069] 8 is a diagram showing an example of allocation of the storage area 8 of the memory 22 on the node 20. The storage area 8 is a storage area provided by the memory 22 (e.g., the memory 22, 22b, HBM 29, etc.) on the node 20 shown in FIGS.

[0070] As shown in FIG. 8, the memory area 8 includes a system area 81, a process area 82, and a communication area 84.

[0071] The system area 81 is a storage area allocated to a system that provides general-purpose functions of the node 20. The process area 82 is allocated to a computation program 63 (process) that executes the processing in question, and includes one or more thread areas 83. The thread area 83 is a storage area used by a thread, which is an execution unit of the computation program 63 by the CPU 21, and is allocated to each core 25, for example. In one process, multiple threads can operate in parallel.

[0072] In MPI, hybrid parallelism (hybrid MPI) that executes both parallel processing of multiple processes and parallel processing of multiple threads in each process can be used. In this case, a core 25 may be assigned to each process and thread.

[0073] FIG. 9 is a diagram showing an example of the relationship between the processes 82a-1 to 82a-3 and the threads 83a-1 to 83a-12. A process area 82 is assigned to the processes 82a-1 to 82a-3 (sometimes referred to as processes 82a). The process 82a-1 includes a plurality of threads 83a-1 to 83a-4. A thread area 83 is assigned to the threads 83a-1 to 83a-4 (sometimes referred to as threads 83a). The cores 25d-1 to 25d-4 execute the threads 83a-1 to 83a-4, respectively. Any one of the cores 25d (e.g., the core 25d-2) among the cores 25d-1 to 25d-4 is a representative core 25d (25) that represents the process 32a-1.

[0074] Similarly, cores 25d-5 to 25d-8 execute threads 83a-5 to 83a-8, respectively. Core 25d-6 is the representative core 25d (25) that represents process 82a-2. Cores 25d-9 to 25d-12 execute threads 83a-9 to 83a-12, respectively. Core 25d-10 is the representative core 25d (25) that represents process 82a-3.

[0075] For example, in hybrid parallelism, inter-process communication in parallel processing of a plurality of processes 82a-1 to 82a-3 (sometimes referred to as processes 82a) is executed by the representative cores 25d-2, 25d-6, and 25d-10.

[0076] The number of processes per node 20 does not exceed the number of cores per node 20. On the other hand, the number of threads per node 20 may exceed the number of cores per node. However, it is efficient to match the total number of threads per node 20 to the number of cores per node 20. In other words, the number of cores per node 20 may be designed to match the number of processes per node 20 (3 in the example of FIG. 9) × number of threads per process (4 in the example of FIG. 9) = 12.

[0077] When the usage of the memory area 8 on each node 20 exceeds the available storage capacity of the memory area 8, an error due to insufficient memory may occur, and the execution of the problem processing may fail. In order to avoid failure in the execution of the calculation, it is possible to identify conditions (e.g., problem size, number of nodes, etc.) under which a memory capacity shortage does not occur, for example, by having a computer system that actually executes the calculation execute the calculation and determining whether or not there is a memory capacity shortage. However, in a calculation system 1 that executes a calculation of a certain scale, for example, a large-scale calculation on tens of thousands of nodes 20, the costs, such as the expense and time, for executing a calculation of a certain scale may be large.

[0078] Therefore, in one embodiment, a method is described for estimating, at low cost, a condition that can suppress occurrence of a shortage of memory capacity of the node 20 when a problem is executed by a plurality of nodes 20. For example, in one embodiment, the condition is estimated using a number of nodes 20 that is smaller than the number of nodes 20 that execute a problem (target problem) of a predetermined size.

[0079] 10 is a diagram illustrating an example of a weak scaling process. In the memory usage estimation method of an embodiment, for example, a weak scaling method may be used. Weak scaling is a method of increasing the number of nodes according to the increase A1-1 to A1-s (s is an integer equal to or greater than 2) in problem size A1 so that problem size A1 per node 20 remains constant.

[0080] The problem size A1 means the size of the problem to be solved, and in the case of an algorithm in which the problem is an array or a list, the problem size may usually be represented by its length. In the case of a two-dimensional array, the problem size A1 is represented by the vertical length and horizontal length, and in the case of a three-dimensional array, the problem size A1 is represented by the vertical length, horizontal length, and height. In one example, the length may be given as the number of grid points, and the problem size may be given by the number of grid points.

[0081] According to the weak scaling process (measurement), ideally, the calculation time required to process the problem remains constant when the number of nodes increases, as shown in the graph indicated by reference symbol A2. However, as the number of nodes increases, the amount of memory usage in each node 20 increases due to the increase in communication between the nodes 20 (between processes).

[0082] FIG. 11 is a diagram showing an example of communication between nodes 20. FIG. 11 shows a case where node 20-i communicates with surrounding node 20-j, node 20-(j+1), ..., node 20-k. i, j, and k are mutually exclusive integers. Each node 20 is provided with a plurality of communication buffers 84a in order to suppress communication delays caused by waiting for a buffer to become available. The communication buffers 84a are allocated from the communication area 84 in the storage area 8 of the memory 22.

[0083] For example, a plurality of communication buffers 84a-i are provided in node 20-j. Similarly, a plurality of communication buffers 84a-j, a plurality of communication buffers 84a-(j+1), ..., a plurality of communication buffers 84a-k are provided in node 20-j, node 20-(j+1), ..., a plurality of communication buffers 84a-k, respectively.

[0084] The number of communication buffers 84a provided in one node 20 increases as the number of nodes 20 performing inter-node communication increases. In one example, if the number of nodes is n (n is an integer), the number of communication buffers 84a increases in proportion to the square of n. As a result, as the number of nodes n increases, the amount of memory 22 usage increases like a polynomial function including the square of n. In other words, the amount of memory usage depends to a high degree on the number of nodes n.

[0085] 12 is a diagram for explaining an example of memory usage estimation processing. In one example, the management server 3 estimates conditions under which a memory capacity shortage does not occur when processing of the target problem B1 is executed by a plurality of (e.g., tens of thousands of) nodes 20. The target problem is a problem to be processed that is actually executed (which may also be called large-scale execution), and may also be called an actual execution problem.

[0086] The management server 3, for example, multiplies a first number of processes P (see symbol B3) per node when the target problem B1 is processed by the first plurality of nodes 20 by a predetermined number a to calculate a second number of processes a·P (see symbol B4) per node when the evaluation problem B2 is processed by the second plurality of nodes 20. The second plurality of nodes 20 is a number (second number of nodes) of nodes 20 that is less than the number of the first plurality of nodes 20 (first number of nodes). For example, the first number of nodes is a number obtained by multiplying the second number of nodes by the predetermined number a.

[0087] For example, if the evaluation problem size of evaluation problem B2 is a second size L, the problem size of target problem B1 is a first size aL (a×L). In other words, it can be considered that the management server 3 reduces the first size aL of the target problem B1 to an evaluation problem B2 of a second size L by dividing the first size aL of the target problem B1 by a predetermined number a. In one example, the predetermined number a may be a positive integer greater than 1.

[0088] In this way, the reduction in the communication buffer 84a per node 20 by using the evaluation problem B2 instead of the target problem B1 can be offset by the increase in the number of inter-process communications (i.e., the increase in the communication buffer 84a) due to multiplying the number of processes by a factor of a.

[0089] In the measurement of week scaling, the second size is increased. Hereinafter, the second size L, which is the minimum value (initial value) of the second size sL, may be referred to as the reference second size. Also, the first size aL obtained by multiplying the reference second size by a predetermined number a may be referred to as the reference first size.

[0090] In the measurement of week scaling, the number of second nodes is increased. Hereinafter, the minimum value (initial value, for example, 1) of the number of second nodes n (n is an integer of 1 or more) may be referred to as the reference second node number. Also, the number of first nodes obtained by multiplying the reference second node number by a predetermined number a may be referred to as the reference first node number.

[0091] In the measurement of week scaling, the management server 3 causes the evaluation problem B2 to be processed in each state where the number of second processes a·P per node 20 is constant and the second size sL and the number of second nodes n are each incremented stepwise at the same ratio m. m is, for example, a real number, and may be an integer for example, and 1 < m < a.

[0092] The management server 3, for example, keeps the number of second processes a·P constant, and for each of the second size sL and the number of nodes n, m 0 times (initial), m 1 times, ··· m x (x is an integer of 1 or more) times, and in each state, uses the calculation server 2 in a state where the number of nodes 20 is n×m y (y is an integer of 0 or more and x or less) units, and may cause the evaluation problem B2 to be processed on n×m x (y is an integer of 0 or more and x or less) units of nodes 20. The number of times m is multiplied by the second size sL and the number of nodes n (in other words, the value of x) may be set in advance by the user or the like within, for example, the range of m

[0093] The processing of the evaluation problem B2 may be executed in the same system and library as the processing of the target problem B1. The library may be a set of subroutines such as a communication library.

[0094] The management server 3 calculates an approximation curve B5 of the relationship between the second size sL in each state and the memory usage per node 20 used in processing the evaluation problem B2 in each state. The calculation of the approximation curve may be realized by various methods. For example, the approximation curve may be obtained by polynomial approximation.

[0095] The management server 3 estimates the first node number a·n of the first plurality of nodes 20 executing processing of the target problem B1 and the first size a·sL of the target problem B1 based on the calculated approximation curve, the memory usage per node 20 when an error occurs due to insufficient memory capacity, and a predetermined number a.

[0096] As an example, the management server 3 identifies a second size sL of an approximation curve corresponding to the memory usage per node 20 when an error occurs, and a second node number n of the second plurality of nodes 20 when the evaluation problem B2 is the second size sL. Then, the management server 3 calculates the first node number a·n and the first size a·sL by multiplying each of the second node number n and the second size sL by a predetermined number a (see symbol B6). Note that the number of processes per node 20 when the target problem B1 is executed is the first process number P, as described above.

[0097] The condition calculated in this way is a limit (critical) condition that can suppress the occurrence of memory capacity shortage. For example, the management server 3 may output, for example present, the condition to the user (console 4). The user can schedule the execution of the target problem B1 based on the presented condition.

[0098] [C] Software configuration example of one embodiment Fig. 13 is a block diagram showing an example of the software configuration of the management server 3 shown in Fig. 1. The management server 3 may include a control unit 30 and a memory unit 31. The control unit 30 and the memory unit 31 are configured with a focus on the condition estimation process performed by the management server 3. For example, the control unit 30 may be provided in the management server 3 as a part of the function of the scheduler 7 shown in Fig. 7.

[0099] The control unit 30 may illustratively include an initial condition setting unit 32, a weak scaling unit 33, a memory shortage error detection unit 34, an estimation unit 35, an approximation unit 36, and an actual execution condition calculation unit 37. The weak scaling unit 33 may illustratively include a change unit 33a, an evaluation problem execution unit 33b, and a correspondence relationship calculation unit 33c.

[0100] The memory unit 31 is an example of a storage area, and stores various data used by the management server 3. The memory unit 31 may be realized by, for example, a storage area included in at least one of the storage device 10e and the memory 10b shown in Fig. 6 and the storage 5 shown in Fig. 1.

[0101] As shown in FIG. 13, the memory unit 31 may be capable of storing, for example, calculation information 31a, weak scaling information 31b, an estimation result 31c, an approximation result 31d, and an actual execution condition calculation result 31e.

[0102] Hereinafter, the functional blocks 32 to 37 included in the control unit 30 shown in FIG. 13 and the information 31a to 31e stored in the memory unit 31 will be described with reference to FIGS.

[0103] Fig. 14 is a diagram showing an example of the weak scaling information 31b. As shown in Fig. 14, the weak scaling information 31b may include items such as the number of lattice points per dimension, the number of three-dimensional lattice points, the number of nodes, the number of second processes per node, the number of threads per process, and the number of cores per node for each stage.

[0104] Fig. 15 is a diagram showing an example of a condition estimation process, in which the weak scaling information 31b in Fig. 14 is used.

[0105] The horizontal axis of Fig. 15 is the number of three-dimensional lattice points, which is an example of the second size sL of the evaluation problem B2. The vertical axis of Fig. 15 is the usage of the storage area 8 of the memory 22 per node 20 when the evaluation problem B2 is processed in each state in which the second size sL and the number of second nodes n are increased stepwise at the same rate m. The usage of the storage area 8 may be the maximum usage used for problem processing.

[0106] 13, the initial condition setting unit 32 sets initial conditions. For example, when the reference first size aL of the target problem B1 is known, the initial condition setting unit 32 calculates the reference second size L of the evaluation problem B2 by dividing the reference first size aL by a predetermined number a. The calculation information 31a may store at least two parameters among the reference first size aL of the target problem B1, the reference second size L of the evaluation problem B2, and the predetermined number a.

[0107] In addition, the initial condition setting unit 32 calculates the second number of processes a·P per node by multiplying the first number of processes P per node 20 when processing the target problem B1 is executed on multiple nodes 20 during large-scale execution by a predetermined number a.

[0108] In the examples shown in Figures 14 and 15, the predetermined number a is 8, and the first process number, which is the number of processes per node 20 during large-scale execution of target problem B1, is 1. The second process number, which is the number of processes per node 20 during execution of evaluation problem B2, is 8. The first size aL of target problem B1 is a times the reference second size L (8 times in Figure 14). The reference first size aL is "512M lattice points", which is a times (8 times) the reference second size L: "64M lattice points".

[0109] Also, in one embodiment, the number of threads per process 82a is 6, and the number of cores per node 20 is 48. Thus, in one embodiment, for simplicity, the value obtained by multiplying the number of second processes per node 20 by the number of threads per process 82a, i.e., the number of threads per node 20, is set to match the number of cores per node 20. Note that these setting values ​​are not limited to the values ​​and relationships described above, and may be set to various values.

[0110] The weak scaling unit 33 executes a weak scaling process. In the weak scaling process, the change unit 33a keeps the number of second processes a·P per node 20 constant, and gradually increases the second size sL of the evaluation problem B2 and the number of nodes n that execute the processing of the evaluation problem B2 at the same rate m. In other words, the change unit 33a keeps the second size of the evaluation problem B2 per node 20 constant (64M lattice points in Figs. 14 and 15), and gradually increases the second size sL and the number of nodes n at the same rate m.

[0111] In the example shown in Figure 14, the change unit 33a changes the second size sL and the second number of nodes n of the evaluation problem B2 to multiple values ​​so that the second size (number of three-dimensional lattice points) of the evaluation problem B2 per node 20 becomes a constant value (8 in Figure 14).

[0112] In Fig. 14 and Fig. 15, the second size sL in the current stage of the evaluation problem B2 is set to be multiplied by m (8 times in Fig. 14) to obtain the value of the second size sL in the next stage. As the second size sL increases, the number of nodes n also increases at the same rate m. Note that the value of m is m=2 when the target problem B1 and the evaluation problem B2 are p-dimensional arrays (p-dimensional lattices). p In FIG. 14 and FIG. 15, since the target problem B1 and the evaluation problem B2 are three-dimensional arrays, m=2 3 It is also possible to use the following.

[0113] 14 and 15, the change unit 33a changes the second size sL to a plurality of values, such as 64M lattice points, 512M lattice points, 4096M lattice points, 32768M lattice points, and 2672144M lattice points, while keeping the ratio between the second size sL and the second number of nodes n constant. The change unit 33a changes the second number of nodes n to a plurality of values, such as 1, 8, 64, 512, and 4096, in accordance with the change in the second size sL.

[0114] The evaluation problem executing unit 33b causes the second plurality of nodes 20 having the second node number n to execute the processing of the evaluation problem B2 in each state in which the second size sL and the second node number n are increased stepwise. Then, the evaluation problem executing unit 33b measures the maximum usage of the storage area 8 in the memory 22 of the execution node 20 that executed the processing of the evaluation problem B2 in each state.

[0115] The correspondence calculation unit 33c calculates the relationship between the second size sL in each state and the memory usage (maximum usage) per node 20 used in processing the evaluation problem B2 in each state.

[0116] 15, the calculated relationship shows that in an area where the second size sL is around 1E+10, the maximum usage of the memory area 8 increases constantly or linearly with respect to an increase in the second size sL. On the other hand, in an area where the second size sL is greater than 1E+10, the calculated relationship shows that the maximum usage of the memory area 8 increases along a quadratic function or a higher-order function. This is because, as explained in FIG. 11, with an increase in the number of second nodes executing the evaluation problem B2, in other words, with an increase in the communication buffer 84a, the memory area 8 used as the communication area 84 increases.

[0117] The memory shortage error detection unit 34 detects the occurrence of a memory shortage error in the processing of the evaluation problem B2. In other words, the memory shortage error detection unit 34 detects a state in which the usage of the memory area 8 in the memory 22 used by each node 20 exceeds the memory capacity of the memory area 8. The correspondence calculation unit 33c and the memory shortage error detection unit 34 detect the maximum usage of the memory area 8 of the memory 22 when a memory shortage error occurs. Note that when a memory shortage error is detected, the change unit 33a ends the change of the second size sL and the second number of nodes n.

[0118] The estimation unit 35 estimates a second value, which is the usage of the memory area 8 when the processing of the target problem B1 is executed by the first plurality of nodes 20, based on a first value, which is the usage of the memory area 8 of the memory 22 mounted on the node 20 in the processing of the evaluation problem B2. The first value is, for example, the maximum memory usage C1 in the evaluation problem B2.

[0119] When executing the process of the evaluation problem B2, the estimation unit 35 may detect a first value of the memory area 8 in a state where a memory shortage error occurs. The estimation unit 35 may detect a second value based on the maximum memory usage C1 of 24.5 (GiB) in a state where a memory shortage error occurs (4096 nodes, 32768 processes in FIG. 15).

[0120] In one example, the estimation unit 35 may estimate that the second value is the same as the first value. However, this is not limited to the above case, and the estimation unit 35 may estimate, as the second value, a value obtained by multiplying the first value by a correction coefficient set in advance. In Fig. 14 and Fig. 15, the estimation unit 35 estimates that the second value is the same as the first value. The estimation unit 35 may store the estimation result in the estimation result 31c.

[0121] The approximation unit 36 ​​calculates an approximation curve C2 of the relationship between the second size sL in each state calculated by the correspondence calculation unit 33c and the memory usage per node 20 used in processing the evaluation problem B2 in each state. The approximation unit 36 ​​may calculate, for example, a polynomial including sums and products based on numbers and indeterminate elements (also called variables) as the approximation curve C2. The approximation unit 36 ​​may store the equation of the approximation curve C2 in the approximation result 31d.

[0122] Note that it is preferable that the approximation unit 36 ​​calculates the approximation curve C2 by excluding the pair of the second size sL when the memory shortage error occurs and the usage amount of the memory area 8 obtained at the second size sL. This is because there is a possibility that an error is included in the relationship between the second size sL and the usage amount of the memory area 8 in a situation where a memory shortage error occurs.

[0123] For example, the approximation unit 36 ​​may fit the relationship between the second size sL and the usage of the memory area 8 with a quadratic equation using the least squares method, and if the residual sum of squares is equal to or greater than a predetermined threshold, repeat the fitting by adding higher order terms.

[0124] The actual execution condition calculation unit 37 estimates the first node number an of the first plurality of nodes 20 that executes the processing of the target problem B1 and the first size aL of the target problem B1 based on the calculated approximation curve C2, the memory usage per node 20 when an error occurs due to insufficient memory capacity, and the predetermined number a. The estimated first node number an and first size aL, and the first process number P are an example of a condition under which a memory capacity shortage does not occur in the node 20 when the plurality of nodes 20 are made to execute the target problem B1.

[0125] In one example, the actual execution condition calculation unit 37 may refer to the maximum memory usage C1 (first value) in the state where a memory shortage error occurs in the approximation result 31d. Based on the reference result, the actual execution condition calculation unit 37 may calculate a second size sL for making the usage of the memory area 8 when processing the evaluation problem B2 equal to or less than the available capacity of the memory area 8. In other words, the actual execution condition calculation unit 37 may calculate the second size sL that can suppress a memory shortage error when processing the evaluation problem B2, based on the approximation result 31d and the maximum memory usage C1 in the state where a memory shortage error occurs.

[0126] The actual execution condition calculation unit 37 calculates a first size aL of the target problem B1 such that the usage of the memory area 8 when the processing of the target problem B1 is executed on multiple nodes 20 is equal to or less than the available capacity of the memory area 8, based on the result of multiplying the calculated value of the second size sL by a predetermined number a.

[0127] In FIG. 15, the maximum memory usage C1 (first value) is 24.5 (GiB). The actual execution condition calculation unit 37 obtains a value of 1.5E+11 as the limit problem size C3 (second size) of the evaluation problem B2 by referring to the maximum memory usage C1 (first value) in the approximation curve C2. Then, the actual execution condition calculation unit 37 obtains 1.2E+12 as the first size by multiplying 1.5E+11 by 8, which is the predetermined number a. In this way, the calculation accuracy of the first size can be improved compared to the case where the first size (2.1E+12) is obtained based on the size of the evaluation problem B2 in the case of 4096 nodes and 32768 processes where a memory shortage error occurrence state is detected (262144000000≈2.6E+11 in FIG. 14).

[0128] Furthermore, the actual execution condition calculation unit 37 may calculate, based on the reference result, a value for the number of nodes for making the usage of the memory area 8 when processing the evaluation problem B2 equal to or less than the available capacity of the memory area 8. In other words, the actual execution condition calculation unit 37 calculates, based on the approximation result 31d and the maximum memory usage C1 in the state in which the memory shortage error occurs, the second number of nodes that can suppress the memory shortage error when processing the evaluation problem B2.

[0129] The actual execution condition calculation unit 37 calculates, based on the result of multiplying the calculated value of the second node number by a predetermined number a, the number of first nodes such that the usage of the memory area 8 is less than or equal to the available capacity of the memory area 8 when processing the target problem B1 is executed on multiple nodes 20.

[0130] 15, since the second size of evaluation problem B2 per node 20 is 64M(6.4E+7) lattice points, the number of nodes is calculated as (1.5E+11) / (6.4E+7)=2300. Since the limit number of nodes in evaluation problem B2 is 2300, the actual execution condition calculation unit 37 multiplies 2300 by 8, which is the predetermined number a, to obtain a value of 18400 as the number of nodes at which the memory usage is equal to or less than the memory capacity.

[0131] 15, for example, when target problem B1 is executed with 1 process / node, 1.2E+12 lattice points can be calculated with 32000 nodes. Also, when target problem B1 is executed with 4 processes / node, 3.0E+11 lattice points can be calculated with 8000 nodes.

[0132] The actual execution condition calculation unit 37 may store the calculated conditions in the actual execution condition calculation result 31e. The actual execution condition calculation result 31e may be transferred to the console 4, for example, or may be referable from the console 4. When the user executes the target problem B1 according to the actual execution condition calculation result 31e, as described with reference to FIG. 7, the batch file 6 including the calculated conditions as the calculation conditions 61 and resource information 62, and the calculation program 63 may be transmitted from the console 4 to the management server 3. The management server 3 may cause the calculation server 2 to execute the processing of the target problem B1 by the scheduler 7 based on the batch file 6.

[0133] [D] Example of operation Next, an example of the operation of the management server 3 according to an embodiment will be described. Note that instead of the management server 3, a part of the nodes 20 of the calculation server 2 may execute the process described below.

[0134] 16 is a flowchart illustrating an example of the operation of the management server 3. The initial condition setting unit 32 of the management server 3 sets an initial condition (step S1). In one example, the initial condition may include weak scaling information 31b.

[0135] The initial conditions may be set based on user instructions. The initial value of the second size, which is the problem size of evaluation problem B2, may be set to the minimum value in a predetermined range. The initial value of the number of nodes may be set to the minimum value in a predetermined range. The number of processes per node 20 (second number of processes) may be a times (i.e., α·P) the number of processes per node 20 (first number of processes P) assumed during actual execution (large-scale execution). The number of threads per node 20 may be the same as the number of cores per node 20. The number of rotations of the main loop may be set to the minimum value in a predetermined range.

[0136] The weak scaling unit 33 starts executing the main loop of the main calculation for processing the evaluation problem B2 in each state in which the second size is gradually increased (step S2), and causes the calculation server 2 to execute the main loop (step S3).

[0137] If the main loop has not been executed the set number of times (step S4, NO in step S4), the process proceeds to step S3. If the main loop has been executed the set number of times (YES in step S4), the main loop ends (step S5) and the process proceeds to step S6.

[0138] If the memory shortage error detection unit 34 does not detect the occurrence of a memory shortage error (step S6, NO in step S6), the weak scaling unit 33 multiplies the second node number (node ​​size) and the second size (data size) by m (step S7), and the process proceeds to step S2. The processes from step S2 to step S7 are repeatedly executed until a memory shortage error occurs.

[0139] The management server 3 may have a function of acquiring and outputting the usage amount of the storage area 8 of the memory 22 at the time of reserving a new used area or releasing a used area in the memory 22. In one example, when the source program of the calculation program 63 is available, the function may be realized by adding a code corresponding to the function to the calculation program 63.

[0140] In step S6, if the out-of-memory error detection unit 34 detects the occurrence of an out-of-memory error (YES in step S6), the approximation unit 36 ​​performs polynomial fitting (step S8). For example, in the process of repeating the processes from step S2 to step S7, the weak scaling unit 33 may plot the problem size (second size) of the evaluation problem B2 and the memory usage. The approximation unit 36 ​​performs polynomial fitting by the least squares method using the plot in the range where no out-of-memory error occurs.

[0141] The approximation unit 36 ​​may, for example, perform fitting using a quadratic equation, and if the residual sum of squares or the like is still greater than or equal to a predetermined threshold and does not satisfy the termination requirement even after fitting using the quadratic equation, it may add higher-order terms and repeat the fitting.

[0142] The estimation unit 35 estimates the memory usage when the processing of the target problem B1 is executed by the multiple nodes 20 (step S9). The processing of step S9 may be omitted.

[0143] The actual execution condition calculation unit 37 calculates conditions for actually executing the processing of the target problem B1 based on the approximation curve C2 obtained by the approximation unit 36 ​​and the maximum memory usage C1 in the state in which a memory shortage error occurs (step S10).

[0144] In one example, the actual execution condition calculation unit 37 identifies a second size on the approximation curve C2 corresponding to the memory usage per node 20 when a memory shortage error occurs, and a second node number of the second plurality of nodes 20 when the evaluation problem B2 is of the second size and the second process number a·P per node 20 is constant. Then, the actual execution condition calculation unit 37 calculates the first node number and the first size by multiplying each of the second node number and the second size by a predetermined number a.

[0145] For example, in response to a request from the console 4, the management server 3 may cause the calculation server 2 to execute the processing of the target problem B1 using the actual execution conditions for actually executing the processing of the target problem B1 (step S11).

[0146] [E] Effects of one embodiment According to a method according to an embodiment, the control unit 30 multiplies the first number of processes P per node when the target problem B1 is processed by the first plurality of nodes 20 by a predetermined number a, thereby calculating the second number of processes aP per node when the evaluation problem B2, which has a smaller amount of calculation than the target problem B1, is processed by the second plurality of nodes 20, which is less in number than the first plurality of nodes 20. The control unit 30 keeps the second number of processes aP per node constant, and causes the second plurality of nodes 20 with the number of nodes to process the evaluation problem B2 in each state in which the size of the evaluation problem B2 and the number of nodes that execute the processing of the evaluation problem B2 are each increased stepwise at the same rate. Furthermore, the control unit 30 calculates an approximation curve of the relationship between the size in each state and the memory usage per node used in the processing of the evaluation problem B2 in each state. Then, the control unit 30 estimates the first number of nodes of the first plurality of nodes 20 that execute processing of the target problem B1 and the first size of the target problem B1 based on the calculated approximation curve, the memory usage per node when an error occurs due to insufficient memory capacity, and the specified number a.

[0147] This makes it possible to estimate, at low cost, the conditions under which the occurrence of a shortage in memory capacity of the nodes 20 can be suppressed when the target problem B1 is executed by a plurality of nodes 20.

[0148] For example, in the configuration of the node 20C shown in Fig. 5, the HBM 29, which is an example of the memory 22, is implemented in the CPU 21c, so that the capacity of the storage area 8 of the memory 22 per node 20 is limited. The method according to an embodiment is more effective in cases where memory shortages are likely to occur, such as the node 20C. However, the method according to an embodiment can also be applied to the node 20A or 20B shown in Fig. 3 or 4, or can also be applied to other architectures.

[0149] Furthermore, the control unit 30 identifies a second size on the approximation curve corresponding to the memory usage per node when an error occurs, and a second node number of the second plurality of nodes 20 when the evaluation problem B2 is of the second size. Then, the control unit 30 calculates the first node number and the first size by multiplying each of the second node number and the second size by a predetermined number a.

[0150] This improves the accuracy of calculating the first size compared to when the second size in which the memory shortage error was detected is used directly to estimate the first size for preventing the occurrence of a memory shortage error during actual execution of the target problem B1.

[0151] Furthermore, the control unit 30 causes the first plurality of nodes 20 to execute processing of a target problem B1 that is subject to the conditions of the first number P of processes per node, the first size, and the first number of nodes.

[0152] This makes it possible to execute the processing of the target problem B1 by making maximum use of the memory capacity of the storage area 8 while suppressing the occurrence of memory shortage errors.

[0153] [F] Other The technology according to the above-described embodiment can be modified and changed as follows.

[0154] For example, the blocks 32 to 37 and the blocks 33a to 33c included in the control unit 30 shown in FIG. 13 may be merged in any combination, or each may be divided.

[0155] [G] Notes Regarding the above embodiment, the following supplementary notes are further disclosed.

[0156] (Appendix 1) multiplying a first number of processes per node when processing of a target problem is executed on a first plurality of nodes by a predetermined number, thereby calculating a second number of processes per node when processing of an evaluation problem having a smaller amount of calculations than the target problem is executed on a second plurality of nodes that is fewer than the first plurality of nodes; a second number of processes per node is kept constant, and the size of the evaluation problem and the number of nodes that execute the processing of the evaluation problem are each increased stepwise at the same rate, and in each state, the second plurality of nodes of the number of nodes are caused to execute the processing of the evaluation problem; Calculating an approximation curve of the relationship between the size in each of the states and the memory usage per node used in processing the evaluation problem in each of the states; estimating a first number of the first plurality of nodes that executes processing of the target problem and a first size of the target problem based on the calculated approximation curve, the memory usage per node when an error occurs due to insufficient memory capacity, and the predetermined number; An estimation program that causes a computer to execute the process.

[0157] (Appendix 2) The estimating process includes: Identifying a second size of the approximation curve corresponding to the memory usage per node when the error occurs, and a second number of nodes of the second plurality of nodes when the evaluation problem is of the second size; calculating the first number of nodes and the first size by multiplying the second number of nodes and the second size by a predetermined number, 4. The estimation program described in Appendix 1.

[0158] (Appendix 3) causing the first plurality of nodes to execute processing of the target problem subject to the first number of processes per node, the first size, and the first number of nodes; 3. The estimation program according to claim 1 or 2, which causes the computer to execute a process.

[0159] (Appendix 4) multiplying a first number of processes per node when processing of a target problem is executed on a first plurality of nodes by a predetermined number, thereby calculating a second number of processes per node when processing of an evaluation problem having a smaller amount of calculations than the target problem is executed on a second plurality of nodes that is fewer than the first plurality of nodes; a second number of processes per node is kept constant, and the size of the evaluation problem and the number of nodes that execute the processing of the evaluation problem are each increased stepwise at the same rate, and in each state, the second plurality of nodes of the number of nodes are caused to execute the processing of the evaluation problem; Calculating an approximation curve of the relationship between the size in each of the states and the memory usage per node used in processing the evaluation problem in each of the states; estimating a first number of the first plurality of nodes that executes processing of the target problem and a first size of the target problem based on the calculated approximation curve, the memory usage per node when an error occurs due to insufficient memory capacity, and the predetermined number; The estimation method includes a computer-implemented process.

[0160] (Appendix 5) The estimating process includes: Identifying a second size of the approximation curve corresponding to the memory usage per node when the error occurs, and a second number of nodes of the second plurality of nodes when the evaluation problem is of the second size; calculating the first number of nodes and the first size by multiplying the second number of nodes and the second size by a predetermined number, Estimation method described in Appendix 4.

[0161] (Appendix 6) causing the first plurality of nodes to execute processing of the target problem subject to the first number of processes per node, the first size, and the first number of nodes; 6. The estimation method according to claim 4 or 5, wherein the processing is performed by a computer.

[0162] (Appendix 7) multiplying a first number of processes per node when processing of a target problem is executed on a first plurality of nodes by a predetermined number, thereby calculating a second number of processes per node when processing of an evaluation problem having a smaller amount of calculations than the target problem is executed on a second plurality of nodes that is fewer than the first plurality of nodes; a second number of processes per node is kept constant, and the size of the evaluation problem and the number of nodes that execute the processing of the evaluation problem are each increased stepwise at the same rate, and in each state, the second plurality of nodes of the number of nodes are caused to execute the processing of the evaluation problem; Calculating an approximation curve of the relationship between the size in each of the states and the memory usage per node used in processing the evaluation problem in each of the states; estimating a first number of the first plurality of nodes that executes processing of the target problem and a first size of the target problem based on the calculated approximation curve, the memory usage per node when an error occurs due to insufficient memory capacity, and the predetermined number; An information processing device comprising a control unit.

[0163] (Appendix 8) The control unit, in the estimation process, Identifying a second size of the approximation curve corresponding to the memory usage per node when the error occurs, and a second number of nodes of the second plurality of nodes when the evaluation problem is of the second size; calculating the first number of nodes and the first size by multiplying the second number of nodes and the second size by a predetermined number, respectively; 8. The information processing device according to claim 7.

[0164] (Appendix 9) The control unit is causing the first plurality of nodes to execute processing of the target problem subject to the first number of processes per node, the first size, and the first number of nodes; 9. The information processing device according to claim 7 or 8. [Explanation of symbols]

[0165] 1. Computing System 1a~1d Network 10. Computers 10a,21,21-1,21-2,21a,21b,21c,3a CPU 10b, 22, 22-1~22-3, 22b, 3b Memory 10c,24 IF device 10d,28 Graphics Processing Unit 10e storage device 10f IO device 10g reader 10h Program 10i Recording media 10j Bus 2. Calculation Server 2a High-speed network 20, 20-1~20-15, 20A~20C, 20-i, 20-j~20-k nodes 23 Memory Controller 25, 25-1~25-9, 25a-1, 25a-2, 25b-1, 25b-2, 25c-1~25c-16, 25d-1~25d-12, 28a-1~28a-N Core 26,26-1~26-16 L1 cache 27,27-1~27-4 L2 cache 28b, 28b-1~28b-N,29,29-1~29-4 HBM 3 Management Server 30 Control section 31 Memory section 31a Calculation information 31b Weak Scaling Information 31c Estimation result 31d approximation result 31e Actual execution condition calculation results 32 Initial condition setting section 33 Weak Scaling Section 33a Changes 33b Evaluation Question Execution Section 33c Correspondence calculation unit 34 Memory shortage error detector 35 Estimation part 36 Approximation part 37 Actual execution condition calculation unit 4 Console 5. Storage 6,6-1,6-2 Batch files 61 Calculation conditions 62 Resource Information 63,63-1,63-2 Calculation program 64-1,64-2 Processing results 7 Scheduler 71~73 Operation order 8 Storage area 81 System Area 82 Process Area 82a, 82a-1 to 82a-3 Process 83 Thread Area Threads 83a, 83a-1 to 83a-12 84 Communication Area

Claims

1. multiplying a first number of processes per node when the processing of the target problem is executed on a first plurality of nodes by a predetermined number, thereby calculating a second number of processes per node when the processing of an evaluation problem, which has a smaller amount of calculations than the target problem, is executed on a second plurality of nodes that is fewer than the first plurality of nodes; a second number of processes per node is kept constant, and a size of the evaluation problem and a number of nodes that execute the processing of the evaluation problem are each increased stepwise at the same rate, and in each state, the second number of nodes executes the processing of the evaluation problem; Calculating an approximation curve of the relationship between the size in each of the states and the memory usage per node used in processing the evaluation problem in each of the states; estimating a first number of the first plurality of nodes that executes processing of the target problem and a first size of the target problem based on the calculated approximation curve, the memory usage per node when an error occurs due to insufficient memory capacity, and the predetermined number; An estimation program that causes a computer to execute the process.

2. The estimating process includes: determining a second size of the approximation curve corresponding to the memory usage per node when the error occurs, and a second number of nodes of the second plurality of nodes when the evaluation problem is of the second size; calculating the first number of nodes and the first size by multiplying the second number of nodes and the second size by a predetermined number, The estimation program according to claim 1 .

3. having the first plurality of nodes execute processing of the target problem subject to the first number of processes per node, the first size, and the first number of nodes; The estimation program according to claim 1 or 2, which causes the computer to execute a process.

4. multiplying a first number of processes per node when the processing of the target problem is executed on a first plurality of nodes by a predetermined number, thereby calculating a second number of processes per node when the processing of an evaluation problem, which has a smaller amount of calculations than the target problem, is executed on a second plurality of nodes that is fewer than the first plurality of nodes; a second number of processes per node is kept constant, and a size of the evaluation problem and a number of nodes that execute the processing of the evaluation problem are each increased stepwise at the same rate, and in each state, the second number of nodes executes the processing of the evaluation problem; Calculating an approximation curve of the relationship between the size in each of the states and the memory usage per node used in processing the evaluation problem in each of the states; estimating a first number of the first plurality of nodes that executes processing of the target problem and a first size of the target problem based on the calculated approximation curve, the memory usage per node when an error occurs due to insufficient memory capacity, and the predetermined number; The estimation method includes a computer-implemented process.

5. multiplying a first number of processes per node when the processing of the target problem is executed on a first plurality of nodes by a predetermined number, thereby calculating a second number of processes per node when the processing of an evaluation problem, which has a smaller amount of calculations than the target problem, is executed on a second plurality of nodes that is fewer than the first plurality of nodes; a second number of processes per node is kept constant, and a size of the evaluation problem and a number of nodes that execute the processing of the evaluation problem are each increased stepwise at the same rate, and in each state, the second number of nodes executes the processing of the evaluation problem; Calculating an approximation curve of the relationship between the size in each of the states and the memory usage per node used in processing the evaluation problem in each of the states; estimating a first number of the first plurality of nodes that executes processing of the target problem and a first size of the target problem based on the calculated approximation curve, the memory usage per node when an error occurs due to insufficient memory capacity, and the predetermined number; An information processing device comprising a control unit.

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