Semiconductor device

Abstract

To suppress unstable operation caused by propagation in a substrate in a high-speed semiconductor device.SOLUTION: A semiconductor device includes a semiconductor substrate, a coplanar line, and a resistive film. The coplanar line includes a signal line formed on the front surface side of the semiconductor substrate and a ground metal. The resistive film is formed between the surface of the semiconductor substrate and the ground metal or between the surface of the semiconductor substrate and a region where no metal is present on the semiconductor substrate. The ground metal and the resistive film are insulated from each other.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a semiconductor device including a coplanar waveguide. [Background technology]

[0002] In next-generation communications (B5G (Beyond 5th Generation) / 6G (6th Generation)), wireless communications using radio waves in the sub-THz band, such as the 100 GHz and 300 GHz bands, are being considered to achieve transmission rates exceeding 100 Gbps. For example, development of 100 GHz band beam control and 300 GHz band 4x4 antenna modules is underway. High-speed / high-power amplifiers are required as one of the elemental technologies to realize such wireless communications.

[0003] For example, high electron mobility transistors (HEMTs) made of gallium nitride (GaN)-based materials have high breakdown voltage and are used as high-power amplifiers. Indium phosphide (InP)-based HEMTs have excellent high-speed operation and low noise, making them suitable for amplifiers used in the sub-terahertz frequency band.

[0004] In the sub-terahertz band, the quarter wavelength of radio waves can be comparable to or even smaller than the substrate thickness. This can lead to resonance due to propagation within the substrate. For example, the thickness of a typical semiconductor substrate is 75 to 200 μm. Here, in a silicon carbide (SiC) substrate (εr = 9.66), the quarter wavelength of electromagnetic waves passing through the substrate is approximately 240 μm at 100 GHz and approximately 80 μm at 300 GHz. Propagation within the substrate can cause unstable operation and / or increased loss in the amplifier. In addition, the power-added efficiency of amplifiers generally tends to decrease with increasing frequency. For example, in the sub-terahertz band, the power-added efficiency of amplifiers is approximately 10 percent, and most of the input power is converted into heat, resulting in a large amount of heat generation.

[0005] A technique for suppressing conduction noise is described, for example, in Patent Document 1. A technique for improving high-frequency isolation characteristics between terminals connected to a transmission line is described, for example, in Patent Document 2. A technique for suppressing unwanted radiation waves by forming a resistive film on the back surface of a substrate is described, for example, in Patent Document 3. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Laid-Open No. 2009-038250 [Patent Document 2] Japanese Patent Application Laid-Open No. 2005-287055 [Patent Document 3] Japanese Patent Application Laid-Open No. 2007-165430 [Non-patent literature]

[0007] [Non-Patent Document 1] H. Hamada et al., "Millimeter-wave InP Device Technologies for Ultra-high Speed ​​Wireless Communications toward Beyond 5G," 2019 IEEE International Electron Devices Meeting (IEDM), San Francisco, CA, USA, 2019, pp. 9.2.1-9.2.4, doi: 10.1109 / IEDM19573.2019.8993540. Summary of the Invention [Problem to be solved by the invention]

[0008] A configuration has been proposed in which propagation within the substrate in the sub-terahertz band is suppressed by thinning the substrate (for example, 50 μm or less) (for example, Non-Patent Document 1). However, thinning the substrate makes it difficult for heat to diffuse laterally, which degrades heat dissipation characteristics. Furthermore, heat dissipation characteristics are also degraded in a configuration in which a resistive film is formed on the back surface of the substrate.

[0009] An object of one aspect of the present invention is to suppress unstable operation caused by propagation within a substrate in a high-speed semiconductor device. [Means for solving the problem]

[0010] A semiconductor device according to one aspect of the present invention includes a semiconductor substrate, a coplanar line including a signal line and a ground metal formed on a surface side of the semiconductor substrate, and a resistive film formed between the surface of the semiconductor substrate and the ground metal or between the surface of the semiconductor substrate and a region on the semiconductor substrate where no metal is present, and the ground metal and the resistive film are insulated from each other. [Effects of the Invention]

[0011] According to the above-described aspect, unstable operation caused by propagation within the substrate can be suppressed in a high-speed semiconductor device. [Brief explanation of the drawings]

[0012] [Figure 1] 1 is a diagram illustrating an example of a semiconductor device according to an embodiment of the present invention. [Figure 2] FIG. 2 is a diagram (part 1) illustrating a simulation result of the transmission characteristics of the coplanar waveguide shown in FIG. [Figure 3] FIG. 2 is a diagram (part 2) illustrating the simulation results of the transmission characteristics of the coplanar waveguide shown in FIG. [Figure 4] FIG. 2 is a diagram (part 3) illustrating the simulation results of the transmission characteristics of the coplanar waveguide shown in FIG. [Figure 5] FIG. 1 is a top view of a semiconductor device according to a first embodiment. [Figure 6] FIG. 6 is a cross-sectional view of the semiconductor device shown in FIG. [Figure 7] 1A to 1C are diagrams (part 1) illustrating an example of a method for manufacturing a semiconductor device according to the first embodiment. [Figure 8] 10A and 10B are diagrams (part 2) illustrating an example of a method for manufacturing a semiconductor device according to the first embodiment. [Figure 9] 10A to 10C are diagrams (part 3) illustrating an example of a method for manufacturing a semiconductor device according to the first embodiment. [Figure 10] 10A and 10B are diagrams (part 4) illustrating an example of a method for manufacturing a semiconductor device according to the first embodiment. [Figure 11] 5A to 5C are diagrams showing an example of a method for manufacturing a semiconductor device according to the first embodiment; [Figure 12] 6A to 6C are diagrams showing an example of the method for manufacturing a semiconductor device according to the first embodiment; [Figure 13] FIG. 10 is a top view of a semiconductor device according to a second embodiment. [Figure 14] FIG. 14 is a cross-sectional view of the semiconductor device shown in FIG. [Figure 15] 10A to 10C are diagrams (part 1) illustrating an example of a method for manufacturing a semiconductor device according to a second embodiment. [Figure 16] 10A and 10B are diagrams (part 2) illustrating an example of a method for manufacturing a semiconductor device according to the second embodiment. [Figure 17] 10A to 10C are diagrams (part 3) illustrating an example of a method for manufacturing a semiconductor device according to the second embodiment. [Figure 18] 10A and 10B are diagrams (part 4) illustrating an example of a method for manufacturing a semiconductor device according to the second embodiment. [Figure 19] 10A and 10B are diagrams (part 5) illustrating an example of a method for manufacturing a semiconductor device according to the second embodiment. [Figure 20] 1 is a diagram showing an example of a communication device in which a semiconductor device according to an embodiment of the present invention is mounted; DETAILED DESCRIPTION OF THE INVENTION

[0013] 1 shows an example of a semiconductor device according to an embodiment of the present invention. The semiconductor device 1 according to the embodiment of the present invention is, but is not limited to, a semiconductor amplifier. However, FIG. 1 shows a transmission line portion connected to a transistor constituting the amplifier.

[0014] 1A, the semiconductor device 1 is configured using a semiconductor substrate 11. The semiconductor substrate 11 is not particularly limited, but is, for example, a silicon carbide (SiC) substrate.

[0015] A metal film is selectively formed on the upper surface of the semiconductor substrate 11. The metal film forms a coplanar line including a signal line 12 and a ground metal 13. In addition, a surface protection film 14 and an interlayer insulating film 15 are formed between the metal film (i.e., the signal line 12 and the ground metal 13) and the semiconductor substrate 11. The surface protection film 14 and the interlayer insulating film 15 are not particularly limited, but may be made of silicon nitride (SiN), for example.

[0016] A resistive film 16 is formed on the upper surface of the semiconductor substrate 11. In this embodiment, the resistive film 16 is formed on the upper surface of the surface protection film 14. The resistive film 16 is electrically insulated from the metal films (here, the signal line 12 and the ground metal 13) by an interlayer insulating film 15. Furthermore, the resistive film 16 is formed at a position where it does not substantially affect the characteristic impedance of the coplanar line.

[0017] The resistive film 16 is preferably formed directly below the ground metal 13. Alternatively, the resistive film 16 may be formed directly below an area on the semiconductor substrate 11 where no metal is present. Alternatively, the resistive film 16 may be formed both directly below the ground metal 13 and directly below an area on the semiconductor substrate 11 where no metal is present. However, the resistive film 16 is not formed directly below the signal line 12. At least in the area where the signal line 12 acts as a coplanar line, the resistive film 16 is not formed directly below the signal line 12. In other words, in the case where the signal line 12 is connected to a transistor in a semiconductor device, the resistive film 16 may be formed directly below the signal line 12 in the area where the transistor is formed.

[0018] In addition, the resistive film 16 is formed so that its edge does not reach the edge of the ground metal 13 facing the signal line 12. Specifically, in the X direction shown in FIG. 1A, the distance d between the edge of the resistive film 16 and the edge of the ground metal 13 facing the signal line 12 is preferably 10 μm or more. The distance d is not particularly limited, but may represent, for example, the distance between the edge of the resistive film 16 and the edge of the ground metal 13 facing the signal line 12 when the semiconductor device 1 is viewed from above (i.e., in a plan view). Furthermore, the sheet resistance of the resistive film 16 is preferably 10 ohms / square or more.

[0019] The signal line 12 and the ground metal 13 that constitute the coplanar line are each formed to extend in a direction perpendicular to the paper surface in Fig. 1A. That is, the signal line 12 and the ground metal 13 are each formed to extend in the Y direction as shown in Fig. 1B. The resistive film 16 is also formed to extend in a direction perpendicular to the paper surface in Fig. 1A. That is, the resistive film 16 is formed to extend in the Y direction as shown in Fig. 1C.

[0020] A coplanar waveguide is constructed by sandwiching a signal line between ground metals. The characteristic impedance of a coplanar waveguide is essentially determined by the width of the signal line, the spacing between the signal line and the ground metal, and the effective dielectric constant of the surrounding area. In other words, the characteristic impedance of a coplanar waveguide is hardly affected by the thickness of the substrate or the material on the backside of the substrate. Therefore, to increase thermal conductivity, the thickness of the semiconductor substrate 11 can be made thicker than that of a typical substrate (e.g., 100 μm). It is also possible to provide SiC or diamond, which have excellent heat dissipation efficiency, on the backside of the semiconductor substrate 11 (i.e., the surface opposite to the surface on which the signal line 12 and ground metal 13 are formed). In a configuration using a microstrip line, the ground is provided on the backside of the substrate, limiting the design freedom of the substrate thickness and / or the material on the backside of the substrate.

[0021] Next, the reason for providing the resistive film 16 and the arrangement of the resistive film 16 will be explained with reference to FIGS. 2 and 3. FIGS. 2 and 3 show the results of a simulation of the transmission characteristics of the coplanar transmission line shown in FIG. 1. The horizontal axis represents the frequency of the signal applied to the signal line 12 of the semiconductor device 1. In this simulation, the semiconductor substrate 11 is a SiC substrate with a thickness of 350 μm. The surface protective film 14 and the interlayer insulating film 15 are each SiN layers. The width of the signal line 12 is 22 μm. The gap between the signal line 12 and the ground metal 13 is 14 μm. The characteristic impedance of the coplanar transmission line is 50 ohms. The sheet resistance of the resistive film 16 is 50 ohms / square. The length of the line (the length of the signal line 12 in the Y direction in FIG. 1) is 1 mm.

[0022] According to this simulation, when the resistive film 16 is not provided, discontinuous behavior appears in the sub-terahertz band (100 GHz to 200 GHz in FIGS. 2 and 3). Specifically, the transmission characteristics have local minimum points at several frequencies. It is believed that the discontinuous behavior occurs due to resonance caused by propagation within the substrate. This raises concerns about increased loss due to unstable operation.

[0023] In contrast, providing the resistive film 16 suppresses discontinuous behavior in the sub-terahertz band. That is, from 100 GHz to 200 GHz, the transmission characteristics change continuously without any minimum points. Here, in a configuration including the resistive film 16, when an electromagnetic wave propagating within the substrate reaches the resistive film 16, a conduction current flows through the resistive film 16, and the energy of the electromagnetic wave is converted into heat. That is, the electromagnetic wave within the substrate is absorbed by the resistive film 16 without being reflected. Therefore, propagation within the substrate is suppressed, and discontinuous behavior is suppressed.

[0024] However, when the resistive film 16 is formed directly under the ground metal 13, if the resistive film 16 is formed up to the edge of the ground metal 13 (here, the edge of the ground metal 13 facing the signal line 12), the transmission loss in the coplanar line increases. This transmission loss depends on the distance between the edge of the resistive film 16 and the edge of the ground metal 13 facing the signal line 12 (i.e., the distance d shown in FIG. 1A). For example, the transmission characteristics at 100 GHz change with the distance d as follows: 0μm:-1.741dB 10μm:-0.660dB 50μm:-0.509dB 100μm:-0.481dB 400μm:-0.456dB

[0025] As described above, when the distance d is small, it is believed that the transmission signal is attenuated by the resistive film 16. Therefore, in order to improve the transmission loss, it is preferable to increase the distance d. For example, in order to keep the transmission loss at 1 dB or less, it is preferable that the distance d be 10 μm or more. However, according to this simulation, if the distance d is 10 μm or more, the change in transmission loss is not significant. Furthermore, if the distance d is increased, it becomes difficult to miniaturize the semiconductor device 1. Therefore, it is preferable to determine the upper limit of the distance d taking into account the size of the semiconductor device 1.

[0026] Furthermore, the transmission characteristics of the coplanar line depend on the resistance value (sheet resistance in this embodiment) of the resistive film 16. Hereinafter, the relationship between the sheet resistance of the resistive film 16 and the transmission characteristics of the coplanar line will be described with reference to FIG.

[0027] Like Figures 2 and 3, Figure 4 shows the simulation results of the transmission characteristics of the coplanar line shown in Figure 1. The simulation conditions for Figure 4 are the same as those for Figures 2 and 3. However, in Figure 4, the distance d is 100 μm.

[0028] According to this simulation, when the sheet resistance of the resistive film 16 is high (for example, 100 ohms / square), discontinuous behavior does not appear. When the sheet resistance of the resistive film 16 is 50 ohms / square, discontinuous behavior (here, a local minimum) appears between 180 and 200 GHz. Furthermore, when the sheet resistance of the resistive film 16 is 10 ohms / square, discontinuous behavior appears between 120 and 140 GHz. In other words, as the sheet resistance of the resistive film 16 decreases, the frequency at which discontinuous behavior appears tends to decrease. Here, as the sheet resistance of the resistive film 16 decreases, metallic behavior becomes stronger. As a result, it is thought that electromagnetic waves within the substrate are reflected without being attenuated by the resistive film 16, resulting in discontinuous behavior.

[0029] Therefore, in order to suppress radio wave propagation within the substrate, it is preferable to set the sheet resistance of the resistive film 16 to a value greater than a predetermined value. In this case, the sheet resistance of the resistive film 16 may be determined taking into account the frequency of the signal applied to the semiconductor device 1. For example, according to the simulation shown in FIG. 4, when the sheet resistance of the resistive film 16 is 10 ohms / square, discontinuous behavior appears at 120 to 140 GHz. In other words, when a 100 GHz signal is applied to the semiconductor device 1, discontinuous behavior does not appear if the sheet resistance of the resistive film 16 is 10 ohms / square or greater. Therefore, in this case, it is preferable that the sheet resistance of the resistive film 16 be 10 ohms / square or greater.

[0030] However, if the sheet resistance of the resistive film 16 is too large, when the electromagnetic waves propagating within the substrate reach the resistive film 16, no conduction current flows through the resistive film 16, and the energy of the electromagnetic waves is not converted into heat. In other words, there is a risk that propagation within the substrate will not be suppressed. Therefore, it is preferable to determine the sheet resistance of the resistive film 16 so that the resistive film 16 does not act as an insulator.

[0031] <First Example> 5 and 6 show the configuration of a semiconductor device 2 according to the first embodiment. FIG. 5 shows a top view (plan view) of the semiconductor device 2 according to the first embodiment. FIG. 6A shows an AA cross-sectional view of the semiconductor device 2 shown in FIG. 5. FIG. 6B shows a BB cross-sectional view of the semiconductor device 2 shown in FIG. 5. The semiconductor device 2 includes a transistor that operates as an amplifier and a coplanar line connected to the amplifier. In FIG. 5, a transistor region 20 represents a region in which a transistor that operates as an amplifier is formed.

[0032] 5 or 6B, the transistor includes a source electrode 21, a drain electrode 22, and a gate electrode 23. The coplanar line is composed of the signal line 12 and the ground metal 13 described with reference to FIG. 1. In this embodiment, the signal line 12 includes a signal line 12a and a signal line 12b.

[0033] The source electrode 21 is formed on the upper surface of the semiconductor substrate 11. The source electrode 21 is provided between the ground metal 13 and the semiconductor substrate 11. The source electrode 21 is preferably in contact with (or electrically connected to) the ground metal 13 and the semiconductor substrate 11. The drain electrode 22 is formed on the upper surface of the semiconductor substrate 11. The drain electrode 22 is provided between the signal line 12 (12b) and the semiconductor substrate 11. The drain electrode 22 is preferably in contact with (or electrically connected to) the signal line 12 (12b) and the semiconductor substrate 11. The gate electrode 23 is formed in a region between the source electrode 21 and the drain electrode 22 on the upper surface of the semiconductor substrate 11. The gate electrode 23 is electrically connected to the signal line 12 (12a).

[0034] In the semiconductor device 2 configured as described above, for example, a predetermined power supply voltage is applied to the drain electrode 22. A signal is then applied to the gate electrode 23 via the signal line 12a. This causes an amplified signal to be output via the signal line 12a. A surface protection film 14 is provided on the transistor region 20.

[0035] The configuration of the coplanar line is as described with reference to FIG. 1. That is, as shown in FIG. 6A, metal films (signal line 12 and ground metal 13) that constitute the coplanar line are formed on the upper surface of a semiconductor substrate 11. A resistive film 16 is formed directly below the ground metal 13. However, the resistive film 16 is not formed in a region up to a distance d from the edge of the ground metal 13 on the side facing the signal line 12. The distance d is preferably 10 μm or more. The resistive film 16 is also not formed directly below the signal line 12. The resistive film 16 is insulated from the signal line 12 and the ground metal 13 by an interlayer insulating film 15. The sheet resistance of the resistive film 16 is preferably 10 ohms / square or more.

[0036] In the semiconductor device 2 configured as described above, radio waves within the semiconductor substrate 11 resulting from input and / or output signals are attenuated by the resistive film 16. Therefore, even if the thickness of the semiconductor substrate 11 is made thicker than a quarter wavelength of the radio waves, radio wave propagation within the substrate is suppressed. As a result, unstable behavior in the sub-terahertz range is suppressed. In addition, since the thickness of the semiconductor substrate 11 can be increased, heat dissipation characteristics are improved.

[0037] 7 to 12 show an example of a method for manufacturing the semiconductor device 2 according to the first embodiment. Here, the semiconductor device 2 includes a gallium nitride (GaN)-based high electron mobility transistor (HEMT).

[0038] As shown in FIG. 7, the semiconductor substrate 11 is constructed by forming an initial layer 11b, an electron transit layer 11c, a spacer layer 11d, and an electron supply layer 11e on a substrate 11a. The initial layer 11b, the electron transit layer 11c, the spacer layer 11d, and the electron supply layer 11e are formed, for example, by epitaxial growth using MOCVD (Metal Organic Chemical Vapor Disposition). The substrate 11a is made of, for example, SiC, Si, sapphire, GaN, aluminum nitride (AlN), or diamond. The initial layer 11b is made of a nitride semiconductor such as AlN, GaN, aluminum gallium nitride (AlGaN), or a stacked structure thereof. The electron transit layer 11c is made of, for example, intrinsic gallium nitride (i-GaN). The spacer layer 11d is made of, for example, a nitride semiconductor such as AlN or AlGaN. The electron supply layer 11e is formed of a nitride semiconductor such as AlGaN, indium aluminum nitride (InAlN), indium aluminum gallium nitride (InAlGaN), AlN, or scandium aluminum nitride (ScAlN). This structure generates a two-dimensional electron gas (2DEG) in the electron transit layer 11c near the interface between the electron transit layer 11c and the spacer layer 11d.

[0039] Next, an inactive region is formed by an isolation process, thereby defining a transistor region 20. Specifically, a resist pattern having openings in regions where the isolation regions are to be formed is formed by photolithography. Thereafter, the inactive region is formed by implanting Ar ions into the nitride semiconductor layer in regions where the resist pattern is not formed. The inactive region may be formed by removing a portion of the nitride semiconductor layer in regions where the resist pattern is not formed by dry etching such as RIE (Reactive Ion Etching) using a chlorine-based gas. After the isolation regions are formed, the resist pattern is removed using an organic solvent or the like.

[0040] Next, the source electrode 21 and the drain electrode 22 are formed. Specifically, a resist pattern having openings in the regions where the source electrode 21 and the drain electrode 22 are to be formed is formed by photolithography. Then, using this resist pattern, metal is deposited by vacuum deposition. At this time, for example, a metal laminate film is formed having a first layer of a Ti film with a thickness of 2 to 50 nm and a second layer of an Al film with a thickness of 100 to 300 nm. Thereafter, metal other than the source electrode 21 and the drain electrode 22 is removed by lift-off technology. In addition, ohmic contact between the source electrode 21 and the drain electrode 22 is established by performing a heat treatment (alloying treatment) at 500 to 650°C in a nitrogen atmosphere. As a result, the source electrode 21 and the drain electrode 22 are formed as shown in FIG. 8.

[0041] A surface protection film 14 is formed on the electron supply layer 11e by plasma CVD. The surface protection film 14 is made of, for example, SiN. The surface protection film 14 has a thickness of 2 to 100 nm, for example, 50 nm.

[0042] The gate electrode 23 is formed. Specifically, a resist pattern having an opening in the region where the gate electrode 23 is to be formed is formed. Then, using this resist pattern, metal is evaporated by vacuum evaporation. At this time, for example, a metal laminate film is formed having a first layer of a Ni film with a thickness of 5 to 30 nm and a second layer of an Au film with a thickness of 100 to 300 nm. Thereafter, the metal other than the gate electrode 23 is removed by lift-off.

[0043] 9, a sacrificial layer 31 is applied to protect the transistor region 20 from subsequent processes. The sacrificial layer 31 is, for example, PMGI (Poly-methylglutarimide). Note that the sacrificial layer 31 other than the transistor region 20 is removed.

[0044] As shown in FIG. 10, a resist film 16 is formed. Specifically, a resist pattern having openings in areas where the resist film 16 is to be formed is formed by photolithography. Then, using this resist pattern, the resist film 16 is formed by a sputtering method or the like. The resist film 16 is formed of, for example, nickel chromium (NiCr), titanium nitride (TiN), tantalum nitride (TaN), or the like. Thereafter, unnecessary resistive film is removed by a lift-off technique.

[0045] When the semiconductor device 2 includes an amplifier impedance matching circuit, the resistive film 16 and the resistive elements of the impedance matching circuit may be formed in the same process. In this case, the resistive film 16 and the resistive elements of the impedance matching circuit are formed using the same material and the same thickness. Here, the sheet resistance of the resistive film 16 is preferably 10 ohms / square or more. Therefore, the sheet resistance of the resistive film 16 and the resistive elements of the impedance matching circuit may be 50 ohms / square. Alternatively, the resistive film 16 and the resistive elements of the impedance matching circuit may be formed in different processes. In this case, the resistive film 16 and the resistive elements of the impedance matching circuit may be formed by repeating substantially the same process. Alternatively, the resistive film 16 and the resistive elements of the impedance matching circuit may be formed using different materials or different sheet resistances.

[0046] The semiconductor device 2 may also include a capacitive element (not shown). A method for forming the capacitive element includes, for example, a step of forming one electrode by vapor deposition and lift-off, a step of forming an insulating film by plasma CVD, and a step of forming the other electrode by vapor deposition and lift-off.

[0047] 11, an interlayer insulating film 15 is formed. The interlayer insulating film 15 is formed by, for example, plasma CVD. The interlayer insulating film 15 is formed using SiN or a low dielectric constant material (for example, benzocyclobutene (BCB)).

[0048] As shown in FIG. 12, the interlayer insulating film 15 and the sacrificial layer 31 are removed in the transistor region 20. Specifically, a resist pattern having openings in the transistor region 20 is formed by photolithography. Then, using this resist pattern, the interlayer insulating film 15 in the openings is removed by fluorine-based plasma etching. The resist and the sacrificial layer 31 are also removed. If the sacrificial layer 31 is formed using PMGI, the sacrificial layer 31 may be removed using N-methyl-2-pyrrolidone (NMP).

[0049] After this, metal patterns (such as signal lines 12 and ground metal 13) are formed. Specifically, the interlayer insulating film 15 and the surface protective film 14 are removed from areas that will be in contact with the metal patterns (such as the source electrode 21 and the drain electrode 22) by fluorine-based dry etching or the like. Next, a sacrificial layer for providing an air bridge is formed, and then a seed metal is formed by sputtering. Examples of the seed metal that can be used are Ti, Au, and Cu. A resist pattern having openings in areas where the metal patterns will be formed is then formed. Then, using this resist pattern, a metal film (such as Au or Cu) is formed in the resist openings by plating. After this, the resist is peeled off, the exposed seed metal is removed by milling, and the sacrificial layer for forming the air bridge is further removed by UV or the like, thereby forming the signal lines 12 and the ground metal 13. The semiconductor device 2 shown in FIGS. 5 and 6 is obtained by the above-mentioned process.

[0050] <Second Example> 13 and 14 show the configuration of a semiconductor device 3 according to the second embodiment. FIG. 13 shows a top view (plan view) of the semiconductor device 3 according to the second embodiment. FIG. 14A shows an AA cross-sectional view of the semiconductor device 3 shown in FIG. 13. FIG. 14B shows a BB cross-sectional view of the semiconductor device 3 shown in FIG. 13. Like the semiconductor device 2 according to the first embodiment, the semiconductor device 3 includes a transistor that operates as an amplifier and a coplanar line connected to the amplifier. In FIG. 13, a transistor region 20 represents a region in which a transistor that operates as an amplifier is formed.

[0051] 13 or 14B, the transistor includes a source electrode 21, a drain electrode 22, and a gate electrode 23. The coplanar line is composed of signal lines 12 (12a, 12b) and a ground metal 13.

[0052] The source electrode 21 is in contact with the ground metal 13. At least a portion of the lower surface of the source electrode 21 is in contact with the resistive film 17. The resistive film 17 is in contact with the semiconductor substrate 11. That is, the ground metal 13 is electrically connected to the semiconductor substrate 11 via the source electrode 21 and the resistive film 17. The drain electrode 22 is in contact with the signal line 12 (12b). At least a portion of the lower surface of the drain electrode 22 is in contact with the resistive film 18. The resistive film 18 is in contact with the semiconductor substrate 11. That is, the signal line 12b is electrically connected to the semiconductor substrate 11 via the drain electrode 22 and the resistive film 18. The resistive films 17 and 18 can reduce the contact resistance between the source electrode 21 / drain electrode 22 and the channel of the semiconductor substrate 11. The gate electrode 23 is substantially the same in the first and second embodiments.

[0053] The coplanar line is substantially the same in the first and second embodiments. That is, as shown in Fig. 14A, metal films (signal line 12 and ground metal 13) constituting the coplanar line are formed on the upper surface of a semiconductor substrate 11. A resistive film 16 is formed directly below the ground metal 13. However, in the second embodiment, the resistive film 16 is buried in the surface region of the semiconductor substrate 11. A surface protective film 14 and an interlayer insulating film 15 are formed between the ground metal 13 and the resistive film 16.

[0054] As in the first embodiment, the resistive film 16 is not formed in the region up to a distance d from the edge of the ground metal 13 on the side facing the signal line 12. The distance d is preferably 10 μm or more. The resistive film 16 is insulated from the signal line 12 and the ground metal 13 in terms of direct current by the surface protective film 14 and the interlayer insulating film 15. The sheet resistance of the resistive film 16 is preferably 10 ohms / square or more. The resistive films 16, 17, and 18 may be formed in the same process.

[0055] As in the first embodiment, in the semiconductor device 3, radio waves in the semiconductor substrate 11 caused by input signals and / or output signals are attenuated by the resistive film 16. Therefore, even if the thickness of the semiconductor substrate 11 is made thicker than a quarter wavelength of the radio waves, radio wave propagation in the substrate is suppressed. As a result, unstable behavior is suppressed even in the sub-terahertz region. In addition, since the thickness of the semiconductor substrate 11 can be increased, heat dissipation characteristics are improved.

[0056] 15 to 19 show an example of a method for manufacturing a semiconductor device 3 according to the second embodiment. The methods for forming the initial layer 11b, the electron transit layer 11c, the spacer layer 11d, and the electron supply layer 11e on the substrate 11a are substantially the same in the first and second embodiments.

[0057] As shown in FIG. 15, resistive films 16 to 18 are formed. Specifically, an insulating film (e.g., SiN) is formed on the surface of the semiconductor substrate 11 by plasma CVD. A resist pattern having openings in regions where the resistive films 16 to 18 are to be formed is formed by photolithography. The insulating film (i.e., SiN) is removed from the openings of the resist pattern by dry etching such as RIE using a fluorine-based gas. Furthermore, parts of the electron transit layer 11c, the spacer layer 11d, and the electron supply layer 11e are removed from the openings of the resist pattern by dry etching such as RIE using a chlorine-based gas. Thereafter, the resist is removed.

[0058] Furthermore, the resistive films 16-18 are formed by MOCVD or MBE (Molecular Beam Epitaxy) using the same material as the semiconductor that forms the electron transit layer 11c. Alternatively, the resistive films 16-18 may be formed so that the main component (i.e., 50 percent or more of the constituent components) of the resistive films 16-18 is the same as that of the semiconductor that forms the electron transit layer 11c. For example, in the case of a GaN-based semiconductor, GaN films exhibiting n-type conductivity are formed using impurities such as Si or Ge as the resistive films 16-18. Thereafter, the insulating film is removed by wet etching using hydrofluoric acid (HF) or the like.

[0059] 16, a source electrode 21, a drain electrode 22, a surface protection film 14, and a gate electrode 23 are formed. The methods for forming the source electrode 21, the drain electrode 22, the surface protection film 14, and the gate electrode 23 are essentially the same in the first and second embodiments.

[0060] 17, a sacrificial layer 31 is applied to protect the transistor region 20 from subsequent processes. The sacrificial layer 31 is, for example, PMGI. The sacrificial layer 31 other than the transistor region 20 is removed.

[0061] The semiconductor device 3 may include an amplifier impedance matching circuit. The impedance matching circuit is realized by, for example, a resistor element. In this case, a resist pattern having an opening in the region where the resistor element is to be formed is formed by photolithography. Then, using this resist pattern, the resistor element is formed by a sputtering method or the like. The resistor element is formed of, for example, NiCr, TiN, or TaN. After that, unnecessary resistive film is removed by lift-off technology.

[0062] The semiconductor device 3 may also include a capacitive element (not shown). A method for forming the capacitive element includes, for example, a step of forming one electrode by vapor deposition and lift-off, a step of forming an insulating film by plasma CVD, and a step of forming the other electrode by vapor deposition and lift-off.

[0063] 18, an interlayer insulating film 15 is formed. The interlayer insulating film 15 is formed by, for example, plasma CVD. The interlayer insulating film 15 is formed using SiN or a low dielectric constant material (for example, benzocyclobutene (BCB)).

[0064] 19, the interlayer insulating film 15 and the sacrificial layer 31 are removed in the transistor region 20. The method for removing the interlayer insulating film 15 and the sacrificial layer 31 in the transistor region 20 is substantially the same in the first and second embodiments.

[0065] Thereafter, metal patterns (signal lines 12, ground metal 13, etc.) are formed. The method for forming metal patterns on a substrate is substantially the same in the first and second embodiments. Through the above steps, a semiconductor device 3 shown in FIGS. 13 and 14 is obtained.

[0066] <Application example> The semiconductor devices 2 and 3 according to the embodiments of the present invention can be used as amplifiers capable of amplifying signals in the sub-terahertz band, and therefore can be used in, for example, wireless devices of next-generation communication systems.

[0067] 20 shows an example of a communication device in which a semiconductor device according to an embodiment of the present invention is implemented. In this example, the communication device 50 includes four antenna modules 51. Each antenna module 51 includes four sets of antenna circuits. That is, the communication device 50 is a 4×4 array antenna module. Each antenna circuit includes an antenna 52, an amplifier 53, and a phase shifter / mixer 54. The amplifier 53 is implemented using the semiconductor device 2 or 3 described above. [Explanation of symbols]

[0068] 1~3 Semiconductor devices 11 Semiconductor substrate 12(12a, 12b) Signal line 13 Ground Metal 14 Surface protective film 15 Interlayer insulating film 16 Resistive film 17, 18 Resistive film 20 Transistor Area 21 Source electrode 22 drain electrode 23 Gate electrode 31 Sacrificial Layer 50 Communication Equipment

Claims

1. a semiconductor substrate; a coplanar line including a signal line and a ground metal formed on the front surface side of the semiconductor substrate; a first resistive film formed between the surface of the semiconductor substrate and the ground metal or between the surface of the semiconductor substrate and a region on the semiconductor substrate where no metal is present; The ground metal and the first resistive film are insulated from each other. A semiconductor device characterized by:

2. The first resistive film is formed between the surface of the semiconductor substrate and the ground metal so that the edge of the first resistive film does not reach the edge of the ground metal on the side opposite to the signal line.

2. The semiconductor device according to claim 1.

3. The distance between the edge of the first resistive film and the edge of the ground metal facing the signal line is 10 μm or more.

3. The semiconductor device according to claim 2.

4. The sheet resistance of the first resistive film is 10 ohms / square or more.

2. The semiconductor device according to claim 1.

5. In a configuration in which the first resistive film is formed between the surface of the semiconductor substrate and the ground metal, an insulating film is formed between the first resistive film and the ground metal.

2. The semiconductor device according to claim 1.

6. a source electrode formed on an upper surface of the semiconductor substrate; a drain electrode formed on an upper surface of the semiconductor substrate; a gate electrode formed on the upper surface of the semiconductor substrate in a region between the source electrode and the drain electrode; the signal lines include a first signal line and a second signal line; the ground metal is electrically connected to the source electrode; the first signal line is electrically connected to the gate electrode; The second signal line is electrically connected to the drain electrode.

2. The semiconductor device according to claim 1.

7. a second resistive film formed on the semiconductor substrate and in contact with the source electrode; a third resistive film formed on the semiconductor substrate and in contact with the drain electrode; 7. The semiconductor device according to claim 6.

8. The first resistive film, the second resistive film, and the third resistive film are formed of the same material as an electron transit layer formed on the surface of the semiconductor substrate.

8. The semiconductor device according to claim 7.

9. 50% or more of the components of the materials for forming the first resistive film, the second resistive film, and the third resistive film are the same as those of the electron transit layer formed on the surface of the semiconductor substrate.

8. The semiconductor device according to claim 7.

10. an amplifier electrically connected to the coplanar line on the semiconductor substrate; a resistive element of an impedance matching circuit of the amplifier, electrically connected to the signal line; The first resistive film and the resistive element are formed in the same process.

2. The semiconductor device according to claim 1.

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