Display with side-wrap conductive trace

Abstract

The conductive traces may be conformally wrapped around a side of the display panel that includes the array of display pixels. The conductive traces may electrically connect contacts on the top surface of the display panel to corresponding contacts on a flexible printed circuit attached to the bottom surface of the display panel. The side-wrap conductive traces may be interposed between a first insulating layer and a second insulating layer. The flexible printed circuit may have a multi-step interface that is electrically connected to the side-wrap conductive traces. A system-in-package including a display driver integrated circuit may be mounted on the flexible printed circuit. The system-in-package may include a plurality of redistribution layers that electrically connect contacts on the display driver integrated circuit to contacts on the flexible printed circuit.

Description

Background Art

[0001] This application claims the priority of U.S. Patent Application No. 18 / 185,237, filed on March 16, 2023, and U.S. Provisional Patent Application No. 63 / 334,546, filed on April 25, 2022, the entire contents of which are incorporated herein by reference. This application generally relates to electronic devices, and more particularly to electronic devices having a display.

[0002] Electronic devices often include a display. For example, an electronic device may have an organic light-emitting diode display (OLED) based on organic light-emitting diode pixels or a liquid crystal display (LCD) based on liquid crystal display pixels.

[0003] An electronic device may include a control circuit configured to provide control signals to pixels in the display. If not taken care of, the components used to provide control signals to the pixels in the display may be bulkier than desired and / or less robust than desired.

Summary of the Invention

[0004] An electronic device may have a display having an array of display pixels. The display pixels may be organic light-emitting diode (OLED) display pixels, micro-LED display pixels, or other types of display pixels. The display may be flexible and / or may have a curved portion.

[0005] To provide control signals to the display pixels, conductive traces may be conformally wrapped around the perimeter of a side of a display panel that includes the array of display pixels. The conductive traces can electrically connect contacts on the top surface of the display panel to corresponding contacts on a flexible printed circuit attached to the bottom surface of the display panel. The side-lap conductive traces may be interposed between a first insulating layer and a second insulating layer.

[0006] The flexible printed circuit may have a multistep interface electrically connected to side-wrap conductive traces. A first subset of the side-wrap conductive traces may be electrically connected to contacts on the exposed portion of the first layer of the flexible printed circuit. A second subset of the side-wrap conductive traces may pass through the exposed portion of the first layer of the flexible printed circuit and be electrically connected to contacts on the second layer of the flexible printed circuit.

[0007] A system-in-package including a display driver integrated circuit may be mounted on a flexible printed circuit board. The system-in-package may include multiple redistribution layers that electrically connect contacts on the display driver integrated circuit to contacts on the flexible printed circuit board. [Brief explanation of the drawing]

[0008] [Figure 1] This is a schematic diagram of an exemplary electronic device having a display according to various embodiments.

[0009] [Figure 2] These are schematic diagrams of exemplary displays according to various embodiments.

[0010] [Figure 3] This is a schematic diagram of an exemplary display having a pixel control circuit according to various embodiments.

[0011] [Figure 4] This is a schematic diagram illustrating exemplary passive matrices of light-emitting diodes controlled by pixel control circuits, according to various embodiments.

[0012] [Figure 5] This is a side cross-sectional view of an exemplary display having a side-wrap conductive trace according to various embodiments.

[0013] [Figure 6] Top view of an exemplary display having contacts distributed around the display, according to various embodiments.

[0014] [Figure 7] Side cross-sectional view of an exemplary flexible printed circuit having a multi-step interface, according to various embodiments.

[0015] [Figure 8] Bottom view of the exemplary flexible printed circuit of FIG. 7, according to various embodiments.

[0016] [Figure 9] Side cross-sectional view of an exemplary display having a side-lap conductive trace and a planarization layer forming a dam structure, according to various embodiments.

[0017] [Figure 10A] Side cross-sectional view of an exemplary display having a side-lap conductive trace and a planarization layer forming a channel for the side-lap conductive trace, according to various embodiments.

[0018] [Figure 10B] Side cross-sectional view of the exemplary channel and corresponding conductive trace of FIG. 10A, according to various embodiments.

[0019] [Figure 11] Flowchart of exemplary method steps for forming a conductive trace between a first insulating layer and a second insulating layer, according to various embodiments.

[0020] [Figure 12] Flowchart of exemplary method steps for forming a conductive trace within a channel between a first insulating layer and a second insulating layer, according to various embodiments.

[0021] [Figure 13]A side cross-sectional view of an exemplary system-in-package having a display driver integrated circuit that may be included in a display of the type shown in FIG. 5, according to various embodiments.

DETAILED DESCRIPTION OF THE INVENTION

[0022] An exemplary electronic device of a type that may include a display is shown in FIG. 1. The electronic device 10 can be a computing device such as a laptop computer, a computer monitor including an embedded computer, a tablet computer, a cellular phone, a media player, or other handheld or portable electronic device, a wristwatch-type device, a pendant-type device, a headset-type or earphone-type device, a device incorporated within glasses or other equipment worn on the user's head, or other smaller devices such as other wearable or compact devices, a display, a computer display including an embedded computer, a computer display not including an embedded computer, a gaming device, a navigation device, an embedded system such as a system in which an electronic device having a display is mounted in a kiosk or in a vehicle, or other electronic devices. The electronic device 10 may have the shape of a pair of glasses (e.g., support frames), may form a housing having a helmet shape, or may have other configurations useful for mounting and securing components of one or more displays on or near the user's head.

[0023] As shown in Figure 1, the electronic device 10 may include a control circuit 16 to support the operation of the device 10. The control circuit 16 may include storage devices such as a hard disk drive, non-volatile memory (e.g., flash memory, or other electrically programmable read-only memory configured to form a solid-state drive), or volatile memory (e.g., static or dynamic random-access memory). Processing circuits within the control circuit 16 may be used to control the operation of the device 10. The processing circuits may be based on one or more microprocessors, microcontrollers, digital signal processors, baseband processors, power management units, audio chips, application-specific integrated circuits, etc.

[0024] Input / output circuits within device 10, such as input / output device 12, may be used to enable data to be supplied to device 10 and to enable data to be supplied from device 10 to external devices. Input / output device 12 may include buttons, joysticks, scroll wheels, touchpads, keypads, keyboards, microphones, speakers, sound sources, vibrators, cameras, sensors, light-emitting diodes, and other status indicators, data ports, etc. The user can control the operation of device 10 by supplying commands through the input resources of input / output device 12, and can receive status information and other outputs from device 10 using the output resources of input / output device 12.

[0025] The input / output device 12 may include one or more displays, such as display 14. Display 14 may be a touchscreen display including a touch sensor for collecting touch input from the user, or display 14 may not be touch-sensitive. The touch sensor for display 14 may be based on an array of capacitive touch sensor electrodes, an acoustic touch sensor structure, a resistive touch component, a force-based touch sensor structure, an optical touch sensor, or other suitable touch sensor device. The touch sensor for display 14 may be formed from electrodes formed on a common display substrate having the display pixels of display 14, or from a separate touch sensor panel overlapping the pixels of display 14. If desired, display 14 may not be touch-sensitive (i.e., the touch sensor may be omitted). Display 14 in the electronic device 10 may be a head-up display that allows the user to view without having to avert their gaze from a typical viewpoint, or a head-mounted display incorporated into a device worn on the user's head. If desired, display 14 may be a holographic display used to display holograms.

[0026] The control circuit 16 is used to execute software such as operating system code and applications on device 10. While device 10 is operating, the software running on the control circuit 16 can display images on the display 14.

[0027] The input / output device 12 may also include one or more sensors 13, such as force sensors (e.g., strain gauges, capacitive force sensors, resistive force sensors, etc.), audio sensors such as microphones, touch sensors and / or proximity sensors such as capacitive sensors (e.g., two-dimensional capacitive touch sensors associated with a display, and / or touch sensors forming buttons, trackpads, or other input devices not associated with a display), and other sensors. In some embodiments, the sensor 13 may include optical sensors such as optical sensors that emit and detect light (e.g., optical proximity sensors such as semi-reflective optical proximity structures), ultrasonic sensors and / or other touch and / or proximity sensors, monochromatic and color ambient light sensors, image sensors (cameras), fingerprint sensors, temperature sensors, proximity sensors and other sensors for measuring three-dimensional non-contact gestures ("air gestures"), pressure sensors, sensors for detecting position, orientation and / or motion (e.g., accelerometers, magnetic sensors such as compass sensors, gyroscopes and / or inertial measurement units including some or all of these sensors), health sensors, high-frequency sensors, depth sensors (e.g., structured optical sensors and / or depth sensors based on stereo imaging devices), optical sensors such as self-mixed sensors and light detection and ranging (lidar) sensors for collecting time-of-flight measurements, humidity sensors, moisture sensors, eye-tracking sensors and / or other sensors. In some configurations, device 10 can use sensors 13 and / or other input / output devices to collect user input (for example, a button can be used to collect button press input, a touch sensor superimposed on the display can be used to collect user touchscreen input, a touchpad can be used to collect touch input, a microphone can be used to collect audio input, and an accelerometer can be used to monitor when a finger touches the input surface, and thus can be used to collect finger press input).

[0028] The display 14 may be an organic light-emitting diode display, a display formed from a crystalline semiconductor die, an array of individual light-emitting diodes (micro-LEDs) formed from a liquid crystal display, or any other suitable type of display. In this specification, a device configuration in which the display 14 includes micro-LEDs may be described as an example. However, this is merely illustrative. Any suitable type of display may be used if desired. In general, the display 14 may have a rectangular shape (i.e., the display 14 may have a rectangular area and a rectangular peripheral edge extending around the rectangular area), or it may have any other suitable shape. The display 14 may be flat or it may have a curved shape.

[0029] Figure 2 is an illustrative diagram of a display. The display in Figure 2 is an active matrix display. As shown in Figure 2, the display 14 may include layers such as a substrate layer 26. The substrate layer, such as layer 26, may be formed from a rectangular, flat material layer or a material layer having other shapes (e.g., a circular shape or other shape with one or more curved and / or straight edges). The substrate layer of the display 14 may include a glass layer, a polymer layer, a silicon layer, a composite film containing polymers and inorganic materials, a metal foil, and the like.

[0030] The display 14 may have an array of pixels 22 for displaying an image to the user, such as a pixel array 28. The pixels 22 (e.g., micro-LEDs) in the array 28 may be arranged in rows and columns. The edges of the array 28 may be straight or curved (i.e., each row and / or column of pixels 22 in the array 28 may have the same length or different lengths). The array 28 may have any suitable number of rows and columns (e.g., 10 or more, 100 or more, or 1000 or more). The display 14 may include pixels 22 of different colors. As an example, the display 14 may include red pixels, green pixels, and blue pixels.

[0031] A display driver circuit 20 may be used to control the operation of the pixels 22. The display driver circuit 20 may be formed from an integrated circuit, a thin-film transistor circuit, and / or other suitable circuit. The exemplary display driver circuit 20 in Figure 2 includes a display driver circuit 20A and additional display driver circuits such as a gate driver circuit 20B. The gate driver circuit 20B may be formed along one or more edges of the display 14. For example, the gate driver circuit 20B may be positioned along the left and right sides of the display 14 as shown in Figure 2.

[0032] As shown in Figure 2, the display driver circuit 20A (e.g., one or more display driver integrated circuits, thin-film transistor circuits, etc.) may include a communication circuit for communicating with the system control circuit via a signal path 24. The path 24 can be formed from traces on a flexible printed circuit or from other cables. The control circuit may be located on one or more printed circuits within the electronic device 10. During operation, the control circuit (e.g., control circuit 16 in Figure 1) can supply image data for the image displayed on the display 14 to circuits such as the display driver integrated circuit within the circuit 20. The display driver circuit 20A in Figure 2 is located at the top of the display 14. This is merely an example. The display driver circuit 20A may be located both at the top and bottom of the display 14, or in other parts of the device 10.

[0033] To display an image on the pixels 22, the display driver circuit 20A may supply the corresponding image data to the data line D while issuing control signals to supporting display driver circuits, such as the gate driver circuit 20B, via the signal path 30. In the exemplary arrangement of Figure 2, the data line D extends vertically through the display 14 and is associated with each row of pixels 22.

[0034] The gate driver circuit 20B (sometimes called a gate line driver circuit or horizontal control signal circuit) may be implemented using one or more integrated circuits and / or using thin-film transistor circuits on the substrate 26. Horizontal control lines G (sometimes called gate lines, scan lines, output control lines, etc.) extend horizontally through the display 14. Each gate line G is associated with each row of pixels 22. If desired, there may be multiple horizontal control lines, such as gate lines G associated with each row of pixels. Individually controlled and / or global signal paths within the display 14 may also be used to distribute other signals (e.g., power signals).

[0035] The gate driver circuit 20B can assert control signals on gate lines G in the display 14. For example, the gate driver circuit 20B can receive a clock signal and other control signals from circuit 20A on path 30, and in response to the received signals, can sequentially assert gate line signals on gate lines G, starting with the gate line signal G in the first row of pixels 22 in array 28. Once each gate line is asserted, data from data lines D can be loaded into the corresponding row of pixels. In this way, control circuits such as display driver circuits 20A and 20B can provide the pixels 22 with signals instructing them to display a desired image on the display 14. Each pixel 22 may have a light-emitting diode and circuitry (e.g., a thin-film circuitry on substrate 26) that responds to control signals and data signals from the display driver circuit 20.

[0036] The gate driver circuit 20B may include blocks of gate driver circuits, such as gate driver row blocks. Each gate driver row block may include output buffers and other output driver circuits, register circuits (for example, registers that can be coupled together to form a shift register), and signal lines, power lines, and other interconnects. Each gate driver row block can supply one or more gate signals to each gate line in one or more corresponding rows of pixels in the array of pixels within the active area of ​​the display 14.

[0037] The active matrix addressing scheme in Figure 2 is merely illustrative. If desired, the display 14 may instead use a pixel control circuit that addresses the local passive matrix of the pixels. An example of this type is shown in Figure 3. As shown in Figure 3, the display 14 may also include layers such as a substrate layer 26. Layers such as the substrate 26 may be formed from layers of materials such as a glass layer, a polymer layer, a composite film containing polymers and inorganic materials, a metal foil, a semiconductor such as silicon or other semiconductor materials, a layer of material such as sapphire (e.g., a crystalline transparent layer, ceramic, etc.), or other materials. The substrate 26 may optionally be transparent (e.g., having transparency of over 80%, over 85%, over 90%, over 95%, over 98%, over 99%, etc.). The substrate 26 may be flat or have other shapes (e.g., concave, convex, shapes with flat and curved surface regions, etc.). The contour of the substrate 26 (for example, when viewed from above along the Z direction) may be circular, elliptical, rectangular, or square, and may have a combination of straight and curved edges, or may have other suitable shapes. As shown in the example of a rectangular substrate in Figure 3, the substrate 26 may have left and right vertical edges and top and bottom horizontal edges.

[0038] The display 14 may have an array of pixels 22 for displaying an image to the user. One or more sets of pixels 22 in Figure 3 can be controlled using their respective pixel control circuits 40 (sometimes referred to as driver circuits 40 or microdrivers 40). The pixel control circuits 40 can be formed using an integrated circuit (e.g., a silicon integrated circuit) and / or a thin-film transistor circuit on a substrate 26. The thin-film transistor circuit may include a thin-film transistor formed from silicon (e.g., a polysilicon thin-film transistor or an amorphous silicon transistor) and / or a thin-film transistor based on a semiconductor oxide (e.g., an indium gallium zinc oxide transistor or another semiconductor oxide thin-film transistor). Semiconductor oxide transistors, such as indium gallium zinc oxide transistors, can exhibit low leakage current and can therefore be advantageous in a display 14 configuration where it is desirable to reduce power consumption (e.g., by reducing the refresh rate of the pixels of the display). A display 14 configuration in which the pixel control circuits 40 are each formed from a set of silicon integrated circuits and thin-film semiconductor oxide transistors may be used as needed.

[0039] The pixels 22 can be organized into arrays (for example, arrays having rows and columns). The pixel control circuits 40 can be organized into associated arrays (for example, arrays having rows and columns). As shown in Figure 3, the pixel control circuits 40 can be scattered among the arrays of pixels 22. The pixels 22 and the pixel control circuits 40 may be organized into arrays having a rectangular contour, or they may have contours of other suitable shapes. Each array may have any suitable number of rows and columns (for example, 10 or more, 100 or more, or 1000 or more).

[0040] Each pixel 22 may be formed from a light-emitting component such as a light-emitting diode. If desired, each pixel may include a pair of light-emitting diodes or another suitable number of light-emitting diodes for redundancy. In this type of configuration, (as an example) a pair of light-emitting diodes within each pixel can be driven in parallel. If one of the light-emitting diodes fails, the other light-emitting diode will still produce light. Alternatively, or in addition, multiple pixel control circuits may be configured to control each pixel. If one of the pixel control circuits fails, the other pixel control circuit will continue to control the pixel.

[0041] A display driver circuit, such as the display driver circuit 20, is coupled to a conductive path, such as a metal trace on the substrate 26, using solder or conductive adhesive. The display driver circuit 20 may include a communication circuit for communicating with the system control circuit via a path 24. The path 24 may be formed from traces on a flexible printed circuit or other cable, or it may be formed using other signal path structures within the device 10. The control circuit may be located on the main circuit logic board in the electronic device in which the display 14 is used. During operation, a control circuit on the circuit logic board (e.g., control circuit 16 in Figure 1) can supply circuits such as the display driver circuit 20 with information about the image to be displayed on the display 14. To display an image on the display pixels 22, the display driver circuit 20 may supply corresponding image data, control signals, and / or power signals to a signal line S. The signal line supplies the corresponding image data, control signals, and power to the pixel control circuit 40. Based on the power, image data, and control signals received, the pixel control circuit 40 instructs individual subsets of pixels 22 to generate light at a desired intensity level.

[0042] The signal line S can carry analog and / or digital control signals (e.g., scan signals, emission transistor control signals, clock signals, digital control data, power signals, etc.). In some cases, the signal line may be coupled to individual rows of the pixel control circuit 40. In some cases, the signal line may be coupled to individual rows of the pixel control circuit 40. Each pixel control circuit 40 may be coupled to one or more signal lines. The circuit 20 may be formed on the upper edge of the display 14, the lower edge of the display 14, the upper and left edges of the display 14, the upper, left and right edges of the display, or any other desired location(s) within the display 14 (as shown in Figure 3).

[0043] The display control circuit, such as circuit 20, may be implemented using one or more integrated circuits (for example, a timing controller integrated circuit and associated source driver circuits and / or gate driver circuits, which are display driver integrated circuits), or it may be implemented using thin-film transistor circuits mounted on the substrate 26.

[0044] Pixel 22 may be an organic light-emitting diode pixel or a liquid crystal display pixel. Alternatively, pixel 22 in Figure 3 may be formed from individual inorganic light-emitting diodes (sometimes referred to as microLEDs). Pixel 22 may include light-emitting diodes of different colors (e.g., red, green, and blue). Red, green, and blue data can be carried using corresponding signal lines. Other color pixel arrangements may be used as needed (e.g., a four-color arrangement, an arrangement including a white pixel, a three-pixel configuration with pixels other than red, green, and blue pixels, etc.). To generate different colors, the light-emitting diodes of pixel 22 may be constructed from different material systems (e.g., AlGaAs for the red diode, and GaN multiple quantum well diodes with different quantum well configurations for the green and blue diodes, respectively), or they may be formed using different phosphorescent materials or different quantum dot materials to generate red, blue, and / or green luminescence, or they may be formed using other techniques or combinations thereof. The light-emitting diode of pixel 22 may emit upward (i.e., pixel 22 may use a top-emission design) or downward through the substrate 26 (i.e., pixel 22 may use a bottom-emission design). The light-emitting diode may have a thickness of 0.5 to 10 microns (for example) and a lateral dimension of 2 to 100 microns. Light-emitting diodes with other thicknesses (e.g., less than 2 microns, greater than 2 microns, etc.) and other lateral dimensions (e.g., less than 10 microns, less than 20 microns, greater than 3 microns, greater than 15 microns, etc.) may also be used as needed.

[0045] If necessary, a digital control signal can be supplied to circuit 40 (via signal line S), and circuit 40 can then generate a corresponding analog light-emitting drive signal based on the digital control signal. During the operation of the display 14, each pixel control circuit 40 can supply an output signal to the corresponding set of pixels 22 based on the control signal received by its pixel control circuit from the display driver circuit 20.

[0046] As an example, each pixel control circuit 40 can control the individual local passive matrix 42 of the LED pixel 22. Figure 4 is a schematic diagram of the local passive matrix 42 of the LED pixel 22. As shown in Figure 4, the anode of each LED 22 is coupled to an individual anode contact line A (sometimes referred to as anode contact A or anode line A). The LEDs 22 in each column of the passive matrix are connected to a common anode contact A. The cathode of each LED 22 is coupled to an individual cathode contact line C (sometimes referred to as cathode contact C or cathode line C). The LEDs 22 in each row of the passive matrix are connected to a common cathode contact C.

[0047] The pixel control circuit 40 can control the current and voltage supplied to each anode line A. The pixel control circuit 40 can also control the voltage supplied to each cathode contact line C. In this way, the pixel control circuit 40 controls the current passing through each light-emitting diode 22, which controls the intensity of the light emitted by each light-emitting diode. During passive matrix operation, the pixel control circuit 40 can rapidly scan the pixels 22 row by row to cause each LED 22 to emit light at a desired brightness level. In other words, each pixel in the first row is updated to the desired brightness level, then each pixel in the second row is updated to the desired brightness level, and so on.

[0048] The pixel control circuit 40 may have a first output terminal 32 coupled to anode contact line A and a second output terminal 34 coupled to cathode contact line C. For example, the pixel control circuit 40 may have one output terminal 32 for each anode contact line and one output terminal 34 for each cathode contact line. Therefore, by using a passive matrix as shown in Figure 4, the pixel control circuit 40 can control 64 light-emitting diodes (e.g., an 8x8 grid) using only 16 outputs (8 anode output terminals and 8 cathode output terminals).

[0049] Figure 5 is a side cross-sectional view of an exemplary display having side-wrap conductive traces. As shown in Figure 5, the display 14 may include a display panel 52. In the example of Figure 5, the display panel 52 is a microLED display panel having pixels 22, each formed from individual light-emitting diodes (microLEDs) formed from a crystalline semiconductor die. The pixels 22 are formed on at least one planarization layer 54. The at least one planarization layer 54 includes a plurality of metal layers 62 that form signal lines (e.g., anode line A in Figure 4, cathode line C in Figure 4, signal line S in Figure 3, data line D in Figure 2, gate line G in Figure 2, etc.) that provide control and data signals to the pixels 22. The at least one planarization layer 54 also covers one or more pixel control circuits 40 in the example of Figure 5.

[0050] A planarization layer (one or more) 54 and a pixel control circuit (one or more) 40 are formed on a substrate 56. The substrate 56 may be formed from polyimide or another desired material. An adhesive layer 58 (e.g., pressure-sensitive adhesive) attaches the substrate 56 to an additional substrate 60. The substrate 60 may be formed from polyethylene terephthalate (PET) or another desired material.

[0051] The display 14 may include display driver circuits, such as a display driver integrated circuit and / or a timing controller, which provide control and data signals to the pixels 22 (for example, through signal lines formed using the metal layer 62). The display panel 52 includes contacts 64 on the top surface of the display panel that receive control and data signals. The contacts 64 may be electrically connected to various signal lines formed from the metal layer 62. The signal lines are used to control the pixels 22 during the operation of the display.

[0052] In some displays, a flexible printed circuit may be directly attached to the contacts 64 on the top surface of the display panel 52. The flexible printed circuit may be bent and connected to a rigid printed circuit board within the electronic device. The flexible printed circuit supplies control and data signals to the display panel via the contacts 64. This type of configuration is less robust and may occupy more space than desired within the electronic device.

[0053] As shown in Figure 5, side-wrap conductive traces can be used to electrically connect the contacts 64 on the upper surface of the display panel 52 to the flexible printed circuit. The flexible printed circuit 66 is attached to the lower surface of the substrate 60 (e.g., the lower surface of the display panel) by an adhesive layer 68. The adhesive layer 68 may be a pressure-sensitive adhesive or another desired type of adhesive.

[0054] The system-in-package (SiP) 70 may be mounted on a flexible printed circuit board 66. The system-in-package may include a display driver integrated circuit 78. The display driver integrated circuit can provide control and data signals to the pixels 22 for operating the pixels 22 via side-wrap conductive traces 72. Signals from the display driver integrated circuit 78 are transmitted to the pixels 22 via the flexible printed circuit board 66, contacts 80 on the flexible printed circuit board 66, side-wrap traces 72, contacts 64 on the display panel 52, and a metal layer 62.

[0055] The first insulating layer 74 may be interposed between the conductive trace 72 and the edge of the display panel 52. The second insulating layer 76 may cover the conductive trace 72 such that the conductive trace is interposed between the first insulating layer 74 and the second insulating layer 76. The conductive trace 72 can conform to the edge of the display panel 52 and can therefore be said to be conformally wrapped around the edge of the display panel. The first insulating layer 74 may conform to the edge of the display panel 52. The conductive trace 72 can conform to the first insulating layer 74 (and, correspondingly, the display panel 52). There is no air gap between the conductive trace 72 and the edge of the display panel 52.

[0056] The configuration shown in Figure 5 offers several advantages. Side-wrap conductive traces occupy minimal volume within electronic devices (space is precious). Side-wrap conductive traces allow for narrow boundaries to the display. Side-wrap conductive traces can be easily formed on multiple edges of the display panel, improving IR drop and corresponding power delivery. Side-wrap conductive traces can be robust during drop events in the manufacturing process and in real-time use.

[0057] The side-wrap conductive traces in Figure 5 can also be an effective signal routing method for a wide variety of display types. For example, side-wrap conductive traces can be used in display panels having organic light-emitting diode (OLED) pixels, micro-LED pixels (as in Figure 5), or other types of pixels. Furthermore, side-wrap conductive traces can provide effective and robust electrical connections in non-flat displays (e.g., flexible and / or foldable displays configured to bend along one or more bending axes, curved displays with one or more curved sections, displays with composite curvature, etc.).

[0058] To deposit the trace 72, very precise deposition of the conductive material may be required. For example, the trace 72 may be deposited (e.g., printed) on the contacts 64, 80, and insulating layer 74 with micron-level resolution. The trace may be printed with a width of less than 2 microns, less than 1 micron, etc., and the trace may be separated by gaps of less than 5 microns, less than 3 microns, etc., and the trace may be printed on curved surfaces (e.g., surfaces with convex curves, compound curves, etc.), stepped surfaces, etc., while maintaining satisfactory electrical continuity.

[0059] Figure 6 is a top view of the display panel of Figure 5. As shown in Figure 6, the contacts 64 (each connected to a separate side-wrap conductive trace 72) can be distributed around the entire circumference of the display panel 52. The display panel 52 includes a pixel array 28 in the central portion of the display panel. The display panel has a first opposing edge and a second opposing edge (e.g., top and bottom) connected by a third opposing edge and a fourth opposing edge (e.g., left and right) (when viewed from above, for example, as in Figure 6). The contacts 64 may be optionally interposed between the pixel array and the first edge, between the pixel array and the second edge, between the pixel array and the third edge, and between the pixel array and the fourth edge. The side-wrap conductive traces 72 can be easily applied to all four edges of the display panel, and therefore there is no substantial increase in manufacturing cost or complexity to provide contacts along all four edges. By providing contacts around the display panel in this way, the IR drop and corresponding power supply of the display can be improved. By providing contacts around the display panel in this way, it is also possible to prevent congestion of corresponding signal lines (and the complexity of fan-out).

[0060] If desired, a multi-step interface may be provided between the conductive trace 72 and the flexible printed circuit 66. Figure 7 is a side cross-sectional view of a flexible printed circuit having a multi-step interface. As shown in Figure 7, the flexible printed circuit 66 includes a plurality of alternating insulating layers 66-I (e.g., formed from polyimide or another desired insulating material) and a plurality of conductive layers 66-C (e.g., formed from copper or another desired conductive material). Each adjacent pair of one insulating layer and one conductive layer can be considered a separate layer of the flexible printed circuit. A first plurality of contacts 80-1 are formed on the first conductive layer 66-C, and a second plurality of contacts 80-2 are formed on the second conductive layer 66-C. The conductive layer having contacts 80-2 has an edge shifted by a distance 82 from the edge of the rest of the flexible printed circuit (e.g., the conductive layer having contacts 80-1). This exposes a portion of the conductive layer having contact 80-1, allowing the trace 72 to be electrically connected to two conductive layers of the flexible printed circuit (not just the lower conductive layer of the flexible printed circuit).

[0061] Some of the conductive traces 72 are electrically connected to contact 80-1, and the other conductive traces 72 are electrically connected to contact 80-2. The precise deposition technique used for the conductive traces 72 allows the traces to maintain continuity when crossing right angles formed by the multi-step interface of the flexible printed circuit.

[0062] Figure 8 is a bottom view of the multi-step interface of the flexible printed circuit shown in Figure 7. As shown, a plurality of contacts 80-1 are formed on the first layer (L1) of the flexible printed circuit (having corresponding conductive layer 66-C and insulating layer 66-I). Contacts 80-1 may be electrically connected to the patterned portion of the corresponding conductive layer 66-C. Meanwhile, contacts 80-2 are formed on the second layer (L2) of the flexible printed circuit (having corresponding conductive layer 66-C and insulating layer 66-I). The edge of layer L2 is shifted by a distance 82 from the edge of layer L1. Contacts 80-2 may be electrically connected to the patterned portion of the corresponding conductive layer 66-C.

[0063] Trace 72-1 is electrically connected to contact 80-1 on layer L1. Specifically, trace 72-1 is electrically connected to a portion of layer L1 exposed by the shifted edge of layer L2. Trace 72-2 passes through the exposed portion of layer L1 and is electrically connected to contact 80-2 on layer L2. Trace 72 can be separated by a center-to-center pitch 84. The size of the pitch 84 may be greater than 3 microns, greater than 5 microns, greater than 10 microns, greater than 20 microns, greater than 50 microns, less than 3 microns, less than 5 microns, less than 10 microns, less than 20 microns, less than 50 microns, 5 to 15 microns, etc. Contact 80-1 may be separated by a center-to-center pitch 86. The size of the pitch 86 may be greater than 5 microns, greater than 10 microns, greater than 20 microns, greater than 50 microns, less than 5 microns, less than 10 microns, less than 20 microns, less than 50 microns, 10 to 30 microns, 15 to 25 microns, etc. Contact 80-2 may be separated by the same center-to-center pitch as contact 80-1, or by a different center-to-center pitch (for example, any of the sizes listed above in relation to contact 80-1). The center-to-center pitch of contact 80-1 and / or 80-2 may be greater than the center-to-center pitch of trace 72. The center-to-center pitch of contact 80-1 and / or 80-2 may be greater than the center-to-center pitch of trace 72 by at least 20%, at least 50%, at least 75%, at least 100%, 50% to 150%, etc.

[0064] In the multi-step configurations of Figures 7 and 8, conductive traces 72 having a small center-to-center pitch (for high resolution) can be electrically connected to the corresponding contacts while maintaining satisfactory manufacturing tolerances for the contacts 80 on the flexible printed circuit.

[0065] The examples of flexible printed circuits with contacts on two layers (e.g., a two-step configuration) shown in Figures 7 and 8 are for illustrative purposes only. If desired, the flexible printed circuit may have contacts on three layers (e.g., a three-step configuration), four layers, or more than four layers.

[0066] Figure 9 is a side cross-sectional view of an exemplary display having side-lap conductive traces. Figure 9 shows a method by which the insulating layer 74 may be provided with a curved surface (e.g., having a convex curve). This may allow for easier deposition of the conductive traces 72 onto the insulating layer. If necessary, one or more edges of the display panel 52 having side-lap traces may have a curve (e.g., a convex curve) to facilitate the curvature of the insulating layer 74.

[0067] Figure 9 also shows the planarization layer 88. In the portion of the display panel 52 having the pixel array 28, the planarization layer 88 may be coplanar with the pixels 22 (and conform to the edge surfaces of the pixels 22). The planarization layer 88 may also function as a dam structure for the insulating layer 74. As shown in Figure 9, an additional portion of the planarization layer 88 forms a dam structure 88-D. The insulating layer 74 is then deposited adjacent to the side surface of the dam structure 88-D. Thus, the dam structure 88-D is formed from the same material as the planarization layer 88 in the pixel array (and during the same manufacturing step). The dam structure 88-D may be formed on a flexible printed circuit 66. These dam structures can be formed from the same material as the planarization layer 88 in the pixel array.

[0068] In another possible configuration shown in Figures 10A and 10B, the planarization layer 88 defines channels for conductive traces 72. As shown in Figure 10A, the planarization layer 88 extends over the edge of the display panel having the contacts 64. The planarization layer 88 can define multiple channels, each containing a separate trace 72. As shown in Figure 10B, channel 90 is defined by the planarization layer 88 over the contacts 64. A separate trace 72 is then formed within each channel. As shown in Figure 10A, the traces 72 may exit the channel at the edge of the display panel and continue along the insulating layer 74. The planarization layer 88 may also be formed over the edges of the flexible printed circuit 66 and contacts 80 to define channels in a similar manner.

[0069] Figure 11 is a flowchart of an exemplary method for forming conductive traces between a first insulating layer and a second insulating layer. First, in step 1102, the first insulating layer 74 may be formed on one or more of the following: the top of the display panel 52, the edge of the display panel 52, the edge of the adhesive layer 68, the edge of the flexible printed circuit 66, the bottom of the flexible printed circuit 66, etc. Next, in step 1104, one or more conductive traces 72 are formed on the insulating layer 74. Finally, in step 1106, the second insulating layer 76 is formed on the traces 72 and the insulating layer 74. The second insulating layer 76 fits onto the traces 72 and the insulating layer 74.

[0070] Figure 12 is a flowchart of another exemplary method for forming conductive traces between a first insulating layer and a second insulating layer. First, in step 1202, the first insulating layer 74 may be formed (for example, on one or more of the following: the top of the display panel 52, the edge of the display panel 52, the edge of the adhesive layer 68, the edge of the flexible printed circuit board 66, the bottom of the flexible printed circuit board 66, etc.). Next, in step 1204, one or more channels 92 are formed on the upper surface of the insulating layer 74 (for example, by etching). Each of the one or more channels may be sized to contain an individual conductive trace 72. In step 1206, one or more conductive traces 72 are formed on the insulating layer 74 within their respective channels 92. The conductive traces may be contained within channels such that the upper surface of the trace 72 does not extend beyond the upper surface of the insulating layer 74. In the example of Figure 12, the upper surface of the trace 72 is coplanar with the upper surface of the insulating layer 74. This configuration yields a flat surface having a portion defined by the trace 72 and a portion defined by the insulating layer 74. Finally, in step 1208, a second insulating layer 76 is formed on the trace 72 and the insulating layer 74. By forming a conductive trace within the channel as shown in Figure 12, the robustness of the conductive trace (e.g., during drop events) can be improved.

[0071] Figure 13 is a side cross-sectional view of an exemplary system-in-package (SiP) that may be included in the display 14. As shown in Figure 13, the SiP 70 includes a display driver integrated circuit (DDIC) 78. The DDIC has a number of output contacts 102 electrically connected to a redistribution layer 104. The redistribution layer 104 (sometimes called the conductive redistribution layer 104) routes signals between contacts 102 (connected to the DDIC 78) and contact 106 (connected to the flexible printed circuit 66). As shown in Figure 13, contact 106 of the SiP 70 may be connected (e.g., mechanically and electrically) to a corresponding contact 108 in the flexible printed circuit 66 by a conductive mounting structure 110. The conductive mounting structure 110 may be formed from solder, for example.

[0072] Contact 106 (for SiP-to-flex interface) may be larger in size (area) and / or pitch than DDIC contact 102. The total area of ​​each contact 106 may be at least 50% larger than the total area of ​​each contact 102, at least 100% larger than the total area of ​​each contact 102, at least 150% larger than the total area of ​​each contact 102, at least 200% larger than the total area of ​​each contact 102, at least 400% larger than the total area of ​​each contact 102, and so on. The center-to-center pitch of each contact 106 may be at least 20% larger than the total area of ​​each contact 102, at least 50% larger than the total area of ​​each contact 102, at least 100% larger than the total area of ​​each contact 102, at least 200% larger than the total area of ​​each contact 102, and so on.

[0073] In addition to the DDIC 78, the SiP 70 may include additional integrated circuits and / or other passive display components (e.g., capacitors, resistors, etc.).

[0074] Any conductive component in this specification (e.g., Trace 72 or other desired component) may include nanoparticles and / or nanowires. In one example, the conductive component (e.g., Trace 72) may include both nanoparticles (e.g., spherical particles) and nanowires (e.g., rods having a diameter and a length greater than five times the diameter). Due to the increased contact / fusion points, including both nanowires and nanoparticles may reduce resistance at lower sintering temperatures compared to conductive fillers that do not include nanowires. Trace 72 may be formed from nanoparticles and / or nanowires formed from silver or another desired material. In one example, a single Trace 72 may include both silver nanowires and silver nanoparticles.

[0075] According to one embodiment, an electronic device is provided that includes a display panel having an upper surface, a lower surface, and an edge surface extending between the upper and lower surfaces, the display panel including an array of display pixels on the upper surface, a first conductive contact on the upper surface, a flexible printed circuit mounted on the lower surface, a second conductive contact on the flexible printed circuit, and a conductive trace conformally wrapped around the edge surface of the display panel to electrically connect the first conductive contact to the second conductive contact.

[0076] According to another embodiment, there is no air gap between the conductive trace and the edge surface of the display panel.

[0077] According to another embodiment, the electronic device includes a first insulating layer that conforms to the edge surface of the display panel, and the conductive trace is formed on the first insulating layer.

[0078] According to another embodiment, the electronic device includes a second insulating layer covering a conductive trace, the conductive trace being interposed between the first insulating layer and the second insulating layer.

[0079] According to another embodiment, the electronic device includes a planarization layer having a first portion formed within an array of display pixels and a second portion that functions as a dam structure for a first insulating layer.

[0080] According to another embodiment, the electronic device includes a system-in-package mounted on a flexible printed circuit, the system-in-package includes a display driver integrated circuit configured to provide signals to an array of display pixels using conductive traces.

[0081] According to another embodiment, the system-in-package includes a plurality of redistribution layers, a third conductive contact for electrically connecting a display driver integrated circuit to the plurality of redistribution layers, and a fourth conductive contact for electrically connecting the redistribution layers to a flexible printed circuit.

[0082] According to another embodiment, the third conductive contact has a first center-to-center pitch, and the fourth conductive contact has a second center-to-center pitch that is larger than the first center-to-center pitch.

[0083] According to another embodiment, the top surface of the display panel has a first opposing edge and a second opposing edge connected by a third opposing edge and a fourth opposing edge, and a first conductive contact is formed along the first edge, the second edge, the third edge, and the fourth edge.

[0084] According to another embodiment, the flexible printed circuit includes a first layer having a first edge and a second layer having a second edge, wherein the first edge is shifted relative to the second edge, and the first conductive contacts include a first subset of conductive contacts on the first layer and a second subset of conductive contacts on the second layer.

[0085] According to another embodiment, the conductive trace has a first center-to-center pitch, a first subset of conductive contacts on the first layer has a second center-to-center pitch greater than the first center-to-center pitch, and a second subset of conductive contacts on the second layer has a third center-to-center pitch greater than the first center-to-center pitch.

[0086] According to another embodiment, the electronic device includes a planarization layer having a first portion formed within an array of display pixels and a second portion defining a plurality of channels for conductive traces.

[0087] According to another embodiment, the electronic device includes an insulating layer that conforms to the edge surface of the display panel, the insulating layer defining a plurality of channels, each channel including an individual conductive trace among conductive traces.

[0088] According to another embodiment, the conductive trace includes silver nanoparticles and silver nanowires.

[0089] According to one embodiment, an electronic device is provided that includes a display panel having an array of display pixels and a flexible printed circuit attached to the display panel, the flexible printed circuit having a multistep edge, the multistep edge comprising a first layer and a second layer formed on the first layer, the first layer having a first edge, the second layer having a second edge shifted relative to the first edge, and a conductive trace that wraps around the edge of the display panel to electrically connect the display panel to the flexible printed circuit, a first subset of the conductive trace being electrically connected to the first layer of the flexible printed circuit, and a second subset of the conductive trace being electrically connected to the second layer of the flexible printed circuit.

[0090] According to another embodiment, the electronic device includes a layer of pressure-sensitive adhesive for attaching a flexible printed circuit to the underside of a display panel.

[0091] According to another embodiment, the conductive traces have a first center-to-center pitch, and a first subset of the conductive traces is electrically connected to conductive contacts on a first layer having a second center-to-center pitch, the second center-to-center pitch being at least 50% larger than the first center-to-center pitch.

[0092] According to another embodiment, a first subset of conductive traces passes through the exposed portion of the second layer to reach the first layer.

[0093] According to another embodiment, a second subset of conductive traces is electrically connected to the exposed portion of the second layer.

[0094] According to one embodiment, an electronic device is provided that includes a display panel having an array of display pixels, a flexible printed circuit attached to the display panel, a conductive trace wrapped around the edge of the display panel to electrically connect the display panel to the flexible printed circuit, and a system-in-package mounted on the flexible printed circuit, the system-in-package including a display driver integrated circuit configured to provide signals to the array of display pixels using the conductive trace.

[0095] According to another embodiment, the system-in-package includes a plurality of redistribution layers, a first conductive contact for electrically connecting a display driver integrated circuit to the plurality of redistribution layers, and a second conductive contact for electrically connecting the redistribution layers to a flexible printed circuit.

[0096] According to another embodiment, the first conductive contact has a first center-to-center pitch, and the second conductive contact has a second center-to-center pitch that is larger than the first center-to-center pitch.

[0097] The above are merely illustrative examples, and various modifications can be made by those skilled in the art without departing from the scope and spirit of the described embodiments. The embodiments described above may be implemented individually or in any combination.

Claims

1. It is an electronic device, A display panel having an upper surface, a lower surface, and an edge surface extending between the upper surface and the lower surface, wherein the upper surface includes an array of display pixels. The first conductive contact on the upper surface, The flexible printed circuit attached to the lower surface, The second conductive contact on the flexible printed circuit, To electrically connect the first conductive contact to the second conductive contact, a conductive trace is provided that conformally wraps around the edge surface of the display panel, A first insulating layer that fits the edge surface of the display panel, wherein the conductive trace is formed on the first insulating layer, An electronic device comprising a planarization layer having a first portion formed within the array of display pixels on the same plane as the array, and a second portion that functions as a dam structure for the first insulating layer.

2. The electronic device according to claim 1, wherein there is no air gap between the conductive trace and the edge surface of the display panel.

3. The electronic device according to claim 1, wherein the first insulating layer has a curved surface with a convex curvature.

4. A second insulating layer covering the conductive trace, wherein the conductive trace is interposed between the first insulating layer and the second insulating layer. The electronic device according to claim 1, further comprising the above.

5. The electronic device according to claim 3, wherein the conductive trace has an additional convex curvature.

6. A system-in-package mounted on the flexible printed circuit, comprising a display driver integrated circuit configured to provide signals to the array of display pixels using the conductive traces, The electronic device according to claim 1, further comprising the above.

7. The aforementioned system in package, Multiple redistribution layers, A third conductive contact electrically connects the display driver integrated circuit to the plurality of redistribution layers, The electronic device according to claim 6, comprising a fourth conductive contact for electrically connecting the redistribution layer to the flexible printed circuit, wherein the third conductive contact has a first center-to-center pitch, and the fourth conductive contact has a second center-to-center pitch that is greater than the first center-to-center pitch.

8. The electronic device according to claim 1, wherein the upper surface of the display panel has an opposing first edge and an opposing second edge connected by an opposing third edge and an opposing fourth edge, and the first conductive contact is formed along the first edge, the second edge, the third edge, and the fourth edge.

9. The electronic device according to claim 1, wherein the flexible printed circuit includes a first layer having a first edge and a second layer having a second edge, the first edge being shifted relative to the second edge, and the first conductive contacts including a first subset of conductive contacts on the first layer and a second subset of conductive contacts on the second layer.

10. The electronic device according to claim 9, wherein the conductive trace has a first center-to-center pitch, a first subset of the conductive contacts on the first layer has a second center-to-center pitch greater than the first center-to-center pitch, and a second subset of the conductive contacts on the second layer has a third center-to-center pitch greater than the first center-to-center pitch.

11. The electronic device according to claim 7, wherein a predetermined third conductive contact has a first region, and a predetermined fourth conductive contact has a second region that is larger than the first region.

12. The electronic device according to claim 1, wherein the display panel includes an additional planarization layer on which an array of display pixels is formed, and the additional planarization layer includes a plurality of metal layers that form signal lines for providing data signals to the array of display pixels.

13. The electronic device according to claim 1, wherein the conductive trace comprises silver nanoparticles and silver nanowires.

14. It is an electronic device, A display panel having a first surface facing another and a second surface facing another, the display panel having an array of display pixels, A flexible printed circuit attached to the second surface of the display panel, wherein the flexible printed circuit has a multi-step edge, the multi-step edge includes a first layer and a second layer formed on the first layer, the first layer is interposed between the second layer and the display panel, the first layer has a first edge, and the second layer has a second edge shifted relative to the first edge, An electronic device comprising: a conductive trace that wraps around the edge of the display panel to electrically connect the display panel to the flexible printed circuit, wherein the conductive trace has a first center-to-center pitch, and a first subset of the conductive trace is electrically connected to conductive contacts on the first layer of the flexible printed circuit having a second center-to-center pitch, the second center-to-center pitch being at least 50% larger than the first center-to-center pitch, and a second subset of the conductive trace is electrically connected to the second layer of the flexible printed circuit.

15. The electronic device according to claim 14, further comprising a layer of pressure-sensitive adhesive for attaching the flexible printed circuit to the lower surface of the display panel.

16. The electronic device according to claim 14, wherein the first subset of the conductive traces passes through the exposed portion of the second layer to reach the first layer, and the second subset of the conductive traces is electrically connected to the exposed portion of the second layer.

17. It is an electronic device, A display panel having an array of display pixels, A flexible printed circuit attached to the aforementioned display panel, A conductive trace is wrapped around the edge of the display panel to electrically connect the display panel to the flexible printed circuit, A system-in-package mounted on the flexible printed circuit includes a display driver integrated circuit configured to provide signals to the array of display pixels using the conductive traces, The aforementioned system in package, Multiple redistribution layers, A first conductive contact for electrically connecting the display driver integrated circuit to the plurality of redistribution layers, wherein the first conductive contact has a first center-to-center pitch, An electronic device comprising: a second conductive contact for electrically connecting the redistribution layer to the flexible printed circuit, wherein the second conductive contact has a second center-to-center pitch that is larger than the first center-to-center pitch.

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