A novel embedded packaging structure and electronic device

Abstract

The utility model relates to a novel embedded packaging structure, including PCB board, chip and backing plate, the upper surface of backing plate is opened with mounting hole, the chip sintering is installed in mounting hole and is flush with the upper surface of backing plate and forms chip unit, the lower surface of PCB board is connected with a plurality of chip unit. This structure directly adopts the backing plate of copper material and is welded or sintering connection with PCB, need not to be plated copper, has reduced the process complexity, has reduced the chip warping risk, and the process is more environmental protection;The present application need not laser drilling, uses mature mechanical drilling + plating process instead reduces the process complexity, improves the yield rate;Move the chip to the outside of PCB, avoid the warping deformation caused by the big CTE difference between chip and PCB material, avoid the equipment damage, the mounting difficulty etc. caused by the high warping of PCB;The radiator is in direct contact with the backing plate through the connecting layer, and the heat dissipation path is shorter, the thermal resistance is lower, and the heat dissipation efficiency is improved.

Description

Technical Field

[0001] This utility model relates to the field of power semiconductor packaging, and in particular to a novel embedded packaging structure and electronic device. Background Technology

[0002] With the development of new energy vehicles, higher requirements are being placed on power modules. Embedded packaging is gaining increasing attention due to its high power density, high customization, low parasitic parameters, and short development cycle. While there are many embedded packaging solutions, they all share structural similarities.

[0003] In existing technologies, embedded packaging for power chips mainly includes the following steps: First step: connecting the chip to a copper plate using methods such as welding and sintering; Second step: stacking copper foil, etc.; Third step: lamination, bonding the stacked structures together at high temperature; Fourth step: laser drilling, using a laser to drill holes of different diameters on the copper plate and the chip surface where they need to be connected; Fifth step: copper plating, plating the laser-drilled areas with copper to form a connection.

[0004] The above process has several drawbacks, mainly including the following:

[0005] 1. The chip surface needs to be plated with copper. Copper plating is a high-risk process for chips, which can easily cause chip warping and deformation. Moreover, the copper plating process is not environmentally friendly.

[0006] 2. Laser drilling process requires high precision in drilling depth. If the drilling depth is insufficient, copper plating will not be able to reach the chip surface. If the drilling depth is too deep, a thin layer of copper on the chip surface will be removed, causing chip damage.

[0007] 3. Due to the significant difference in the coefficient of thermal expansion (CTE) between the chip and the PCB, the embedded product is very prone to PCB warping, which in turn affects the subsequent bonding between the PCB and the heat sink.

[0008] 4. The chip is encased inside the PCB, which increases the heat dissipation path and thermal resistance compared to traditional packaging.

[0009] Therefore, a new type of embedded packaging structure is needed to solve the above problems. Utility Model Content

[0010] The present invention aims to provide a novel embedded packaging structure to address the shortcomings of the existing technology. The technical problem to be solved by the present invention is achieved through the following technical solution.

[0011] According to a first aspect of this application, a novel embedded packaging structure is provided, including a PCB board, a chip, and a substrate. The upper surface of the substrate has mounting holes, and the chip is sintered and mounted into the mounting holes and flush with the upper surface of the substrate to form a chip unit. A plurality of the chip units are connected to the lower surface of the PCB board by sintering or welding processes.

[0012] Preferably, the bottom of the mounting hole is coated with a first connection layer, and the chip is connected to the mounting hole through the first connection layer.

[0013] Preferably, the first bonding layer is one of solder paste, sintered silver, sintered copper, and TLPs diffusion solder.

[0014] Preferably, at least the upper surface of the liner is made of copper, the lower surface of the PCB board exposes a copper layer, and the upper surface of the liner is connected to the copper layer on the lower surface of the PCB board.

[0015] Preferably, the upper surface of the chip unit is coated with a second connection layer, and the chip unit is connected to the PCB board through the second connection layer.

[0016] Preferably, the second bonding layer is one of solder paste, sintered silver, sintered copper, and TLPs diffusion solder.

[0017] Preferably, an air guide groove is provided on the upper surface of the liner, and the air guide groove is connected to the mounting hole for filling the mounting hole with insulating material.

[0018] Preferably, the bottom surface of the PCB board is provided with a dam sealing area, the chip unit is installed in the dam sealing area, and the dam sealing area is filled with insulating material.

[0019] Preferably, it also includes a radiator, which is arranged in close contact with the bottom surface of the liner.

[0020] According to a second aspect of this application, an electronic device is provided that employs the novel embedded packaging structure described above.

[0021] The novel embedded packaging structure provided by this utility model embodiment has the following advantages:

[0022] The copper backing plate is directly sintered with the PCB, eliminating the need for copper plating, reducing process complexity, lowering the risk of chip warpage, and making the process more environmentally friendly.

[0023] This application eliminates the need for laser drilling, allowing the chip to directly contact the exposed copper layer on the PCB surface. This can be achieved using a mature mechanical drilling and plating process, reducing process complexity and improving yield.

[0024] Moving the chip outside the PCB avoids warping caused by a large difference in CTE between the chip and PCB materials, and avoids problems such as equipment damage and installation difficulties caused by high PCB warping.

[0025] The heat sink is directly fixed to the liner, resulting in a shorter heat dissipation path, lower thermal resistance, and improved heat dissipation efficiency. Attached Figure Description

[0026] Figure 1 This is a schematic diagram of a novel embedded packaging structure according to this utility model;

[0027] Figure 2 yes Figure 1 A schematic diagram of the structure of the middle liner plate. Detailed Implementation

[0028] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. The present invention will now be described in detail with reference to the accompanying drawings and embodiments.

[0029] It should be noted that the above detailed descriptions are exemplary and intended to provide further explanation of this application. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains.

[0030] like Figure 1 and Figure 2 As shown, a novel embedded packaging structure in one embodiment of this application includes a PCB board 300, a chip 100, and a substrate 200. The upper surface of the substrate 200 is provided with mounting holes 210. The chip 100 is sintered and mounted into the mounting holes 210 and flush with the upper surface of the substrate 200 to form a chip 100 unit. A plurality of the chip 100 units are connected to the lower surface of the PCB board 300 by sintering or welding processes.

[0031] In this embodiment, the chip includes various power chips such as SiC chip, SBD chip, IGBT chip, FRD chip, and GaN chip, and can be one of them or a combination of the above chips.

[0032] The substrate 200 uses a mature etching process to create the mounting holes 210, which is not only highly efficient but also allows for mass production. Fixing the chip 100 into the substrate 200 not only protects the chip 100 but also facilitates heat dissipation, avoiding problems such as warping and desoldering caused by the difference in thermal expansion coefficients between the chip 100 and the PCB board 300.

[0033] The bottom of the mounting hole 210 is coated with a first connection layer, and the chip 100 is connected to the mounting hole 210 through the first connection layer. The first connection layer is one of solder paste, sintered silver, sintered copper, and TLPs diffusion solder.

[0034] In this embodiment, at least the upper surface of the substrate 200 is made of copper, and the lower surface of the PCB board 300 exposes a copper layer, allowing it to connect with the chip 100 and the upper surface of the substrate. Power and signal paths within the PCB board 300 connect to the chip 100 via the exposed copper layer. The chip 100 unit is connected to the copper layer on the lower surface of the PCB board 300.

[0035] A plurality of air guide grooves 220 are provided on the upper surface of the substrate 200. The air guide grooves 220 are connected to the mounting holes 210. During the potting process, excess air can be discharged through the air guide grooves 220, so that the insulating material can smoothly enter the mounting holes 210, ensuring the sealing and insulation of the chip 100.

[0036] The air channel 220 is manufactured using etching, laser processing, and machining. During potting, a vacuum potting process can be used to improve the filling rate.

[0037] In this embodiment, the air guide groove 220 is provided with four grooves, which are respectively connected to the four sides of the mounting hole 210, and their depth is not greater than the depth of the mounting hole.

[0038] The upper surface of chip 100 is coated with a second connection layer, through which chip 100 is connected to the PCB board 300. This second connection layer is one of solder paste, sintered silver, sintered copper, and TLPs diffusion solder. The connection process involves: depositing solder balls, printing solder paste, printing TLPs, printing copper sintering material, and printing silver sintering material on the upper surface of chip 100; and connecting the PCB board 300 and chip 100 through reflow or sintering processes.

[0039] In this embodiment, a dam-sealing area 400 is provided on the bottom surface of the PCB board 300. The chip 100 unit is installed in the dam-sealing area 400, and insulating material is poured into the dam-sealing area 400 to fill the area around the chip 100 unit, serving to fix, protect, and insulate it. The insulating material poured into the dam-sealing area 400 is potting compound, underfiller, etc., and its thickness is no greater than the height of the chip 100 unit, so that the top surface of the chip 100 unit is exposed, thereby facilitating the installation of the heat sink tightly against the bottom surface of the backing plate 200. Since the backing plate 200 is made of copper, it has high thermal conductivity and can directly transfer the heat of the chip 100 to the heat sink, greatly improving the heat dissipation efficiency.

[0040] The cofferdam sealing zone 400 is formed, for example, by applying a ring of cofferdam sealant to the PCB board 300 to enclose the entire liner 200, or it can be a prefabricated sealing rubber with adhesive properties.

[0041] The fabrication method of this novel embedded packaging structure is as follows:

[0042] Several liner plates 200 are cut from the mother plate, and mounting holes 210 are made on the liner plates 200 by etching process;

[0043] Apply a bonding material such as sintered silver to the inside of the mounting hole 210;

[0044] Chip 100 is placed in mounting hole 210 and sintered and fixed by sintering process to form several chip 100 units;

[0045] After applying sintered silver or sintered copper, silver film, solder paste and other connecting materials to the chip 100 unit, the chip 100 unit is placed in the corresponding position on the PCB board 300 and sintered to fix it.

[0046] A sealing zone 400 is formed by applying sealant around the chip 100 unit, and underfiller is poured into the sealing zone 400. Air inside the liner 200 is discharged through the ventilation channel 220 to improve the sealing and insulation effect.

[0047] If necessary, a heat sink can be added to the bottom. The heat sink is installed at the bottom of the dam sealing area 400 so that it is in contact with the chip 100 unit to improve heat dissipation efficiency.

[0048] According to a second aspect of this application, an electronic device is provided that employs the novel embedded packaging structure described above.

[0049] The novel embedded packaging structure provided by this utility model embodiment has the following advantages:

[0050] The substrate 200 and PCB board 300 are directly sintered together using the same material, eliminating the need for copper plating, reducing process complexity, lowering the risk of chip 100 warping, and making the process more environmentally friendly.

[0051] This application eliminates the need for laser drilling, instead using a mature mechanical drilling + coating process, which reduces process complexity and improves yield.

[0052] Moving chip 100 outside PCB board 300 avoids warping and deformation caused by a large difference in CTE between chip 100 and PCB material, and avoids equipment damage and installation difficulties caused by high warping of PCB board 300.

[0053] The heat sink is directly fixed to the liner 200, resulting in a shorter heat dissipation path, lower thermal resistance, and improved heat dissipation efficiency.

[0054] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments according to this application. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0055] It should be noted that the terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such terms can be used interchangeably where appropriate so that the embodiments of this application described herein can be implemented in sequences other than those illustrated or described herein.

[0056] Furthermore, the terms “comprising” and “having”, and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not necessarily limited to those steps or units that are explicitly listed, but may include other steps or units that are not explicitly listed or that are inherent to such process, method, product, or apparatus.

[0057] For ease of description, spatial relative terms such as "above," "on top of," "on the upper surface of," "above," etc., are used herein to describe the spatial positional relationship of a device or feature as shown in the figures to other devices or features. It should be understood that spatial relative terms are intended to encompass different orientations in use or operation beyond the orientation of the device as described in the figures. For example, if the device in the figures were inverted, a device described as "above" or "on top of" other devices or structures would subsequently be positioned as "below" or "under" other devices or structures. Thus, the exemplary term "above" can include both "above" and "below." The device may also be positioned in other different ways, such as rotated 90 degrees or in other orientations, and the spatial relative descriptions used herein will be interpreted accordingly.

[0058] In the detailed description above, reference has been made to the accompanying drawings, which form part of this document. In the drawings, similar symbols typically identify similar parts unless the context otherwise indicates otherwise. The illustrated embodiments described in the detailed specification, drawings, and claims are not intended to be limiting. Other embodiments may be used and other changes may be made without departing from the spirit or scope of the subject matter presented herein.

[0059] The above description is merely a preferred embodiment of this utility model and is not intended to limit the utility model. Various modifications and variations can be made to this utility model by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this utility model should be included within the protection scope of this utility model.

Claims

1. A novel embedded packaging structure, characterized in that, The device includes a PCB board, a chip, and a substrate. The upper surface of the substrate has mounting holes. The chip is sintered and mounted into the mounting holes and flush with the upper surface of the substrate to form a chip unit. Several chip units are connected to the lower surface of the PCB board through sintering or soldering processes.

2. The novel embedded packaging structure according to claim 1, characterized in that, The bottom of the mounting hole is coated with a first connection layer, and the chip is connected to the mounting hole through the first connection layer.

3. The novel embedded packaging structure according to claim 2, characterized in that, The first bonding layer is one of solder paste, sintered silver, sintered copper, and TLPs diffusion solder.

4. The novel embedded packaging structure according to claim 1, characterized in that, At least the upper surface of the liner is made of copper, the lower surface of the PCB board exposes a copper layer, and the upper surface of the liner is connected to the copper layer on the lower surface of the PCB board.

5. The novel embedded packaging structure according to claim 4, characterized in that, The upper surface of the chip unit is coated with a second connection layer, and the chip unit is connected to the PCB board through the second connection layer.

6. The novel embedded packaging structure according to claim 5, characterized in that, The second bonding layer is one of solder paste, sintered silver, sintered copper, and TLPs diffusion solder.

7. The novel embedded packaging structure according to claim 1, characterized in that, An air guide groove is provided on the upper surface of the liner plate, and the air guide groove is connected to the mounting hole for filling the mounting hole with insulating material.

8. The novel embedded packaging structure according to claim 1, characterized in that, The bottom surface of the PCB board is provided with a dam sealing area, the chip unit is installed in the dam sealing area, and the dam sealing area is filled with insulating material.

9. The novel embedded packaging structure according to claim 1, characterized in that, It also includes a radiator, which is arranged close to the bottom surface of the liner.

10. An electronic device, characterized in that, The novel embedded packaging structure described in any one of claims 1 to 9 is adopted.

Images