High-voltage, high-efficiency sine wave generator that prevents spikes during amplitude adjustment and channel switching.
The system generates high-voltage sine waves with rapid amplitude adjustments and filtering to prevent spikes, ensuring effective and comfortable TTFields therapy.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- NOVOCURE GMBH CH
- Filing Date
- 2025-02-05
- Publication Date
- 2026-06-22
AI Technical Summary
Existing methods for generating high-voltage sine-wave signals for TTFields therapy introduce high-frequency artifacts (voltage spikes) during amplitude adjustment and channel switching, leading to unpleasant sensations and reduced therapeutic effectiveness.
A system comprising a DC power supply, transformer, power switch, and output filter, controlled by a controller to generate a sine wave with rapid amplitude adjustments and switching, using an oversampled waveform and specific filtering to prevent high-frequency artifacts.
Enables rapid voltage adjustments without spikes, maintaining strong electric fields for enhanced TTFields therapy efficacy without causing discomfort.
Smart Images

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Abstract
Description
Technical Field
[0001] Cross - reference to Related Applications This application claims the benefit of U.S. Provisional Application Nos. 62 / 955,673 (filed December 31, 2019) and 62 / 981,875 (filed February 26, 2020), each of which is incorporated herein by reference in its entirety.
Background Art
[0002] The use of TTFields therapy to treat tumors is described in U.S. Patent No. 7,805,201. TTFields therapy uses high - voltage sine - wave signals. Originally, these high - voltage sine - wave signals were obtained by using a function generator to generate a low - amplitude signal, using a linear amplifier to amplify the low - voltage signal to a high - voltage signal, and then applying the high - voltage signal to a set of electrodes (also called a transducer array) placed on the patient's body. U.S. Patent No. 9,910,453 describes an alternative method for generating the high - voltage sine - wave signal applied to the transducer array, and this alternative method provides dramatically improved efficiency over the original linear - amplifier method.
Prior - art Documents
Patent Documents
[0003]
Patent Document 1
Patent Document 2
Patent Document 3
Summary of the Invention
Problems to be Solved by the Invention
[0004] This application describes various methods for generating high-voltage sinusoidal signals that can rapidly adjust the output voltage without introducing high-frequency artifacts (e.g., voltage spikes) in the output. When these methods are used, a stronger electric field can be applied to the tumor for a longer period of time, which can enhance the effectiveness of TTFields therapy. [Means for solving the problem]
[0005] One aspect of the present invention is directed to a first apparatus for generating a sine wave of frequency f. The first apparatus comprises a DC power supply having a voltage control input for setting the output voltage of the DC power supply, a transformer having a primary and a secondary side, and a power switch. The power switch has a control input and is configured to apply the output of the DC power supply to the primary side of the transformer in a first direction when a first control signal is applied to the control input, to apply the output of the DC power supply to the primary side of the transformer in a second direction when a second control signal is applied to the control input, and to remain off when neither the first nor the second control signal is applied to the control input. The second direction is opposite to the first direction. The first device also includes a controller programmed to (a) apply a first control signal to the control input for a duration of T / 3, then (b) wait for a duration of T / 6, then (c) apply a second control signal to the control input for a duration of T / 3, then (d) wait for a duration of T / 6, and then continuously repeat the sequence (a), (b), (c), and (d), where T is the reciprocal of the frequency f. The first device also includes an output filter connected to the secondary side of a transformer, which allows frequency f to pass through and attenuates frequencies above the cutoff frequency. The controller is further programmed to control the amplitude of a frequency sine wave by adjusting a third control signal applied to the voltage control input of a DC power supply, and the controller is further programmed to prevent the adjustment of the third control signal from occurring when either the first or second control signal is applied to the control input.
[0006] In some embodiments of the first apparatus, the cutoff frequency is between 2f and 4f, and the output filter has a transfer function that has zero at 5f.
[0007] Another aspect of the present invention is directed to a second device for generating a sine wave of frequency f. The second device comprises n DC power supplies, each of which has a voltage control input that sets the output voltage of the respective power supply, where n is a positive integer. The second device also comprises a power switch having an output terminal and a control input. The power switch is configured to (a) route the output of one selected DC power supply with a selected polarity to the output terminal, depending on 2n states of a control signal applied to the control input, or (b) remain off, depending on an additional state of the control signal. The second device further includes a controller programmed to control the generation of an oversampled version of a sine wave, where N = 2 + 4n, by routing each of the n DC power supplies to the output terminals of a power switch with a polarity selected at appropriate times in the sequence, by setting the output voltages of the n DC power supplies to levels present in the oversampled version of the sine wave, and then sequencing control signals through 2n states and additional states. The second device also includes an output filter that filters the current coming from the output terminals of the power switch. The output filter allows frequency f to pass and attenuates frequencies above the cutoff frequency. The controller is programmed to control the amplitude of the sine wave by adjusting the output voltages of the n DC power supplies via a voltage control input, and the controller is further programmed not to adjust the output voltages of the DC power supplies while the outputs of the DC power supplies are routed to the output terminals of the power switch.
[0008] Some embodiments of the second apparatus further include a transformer having a primary side connected to the output terminals of a power switch and a secondary side connected to an output filter, wherein the current from the output terminals of the power switch reaches the output filter via the transformer.
[0009] Some embodiments of the second apparatus further include a transformer having a primary side connected to the output terminals of a power switch and a secondary side connected to an output filter, configured such that current from the output terminals of the power switch reaches the output filter via the transformer. In these embodiments, n=1, which means that only a single DC power supply is present. In these embodiments, the controller is programmed to control the generation of an oversampled version of a sine wave by (a) applying a first control signal to the control input for a duration of T / 3 to cause the power switch to route the output of a single DC power supply to the output terminal with a first polarity, then (b) waiting for a duration of T / 6, then (c) applying a second control signal to the control input for a duration of T / 3 to cause the power switch to route the output of a single DC power supply to the output terminal with a second polarity opposite to the first polarity, then (d) waiting for a duration of T / 6, and then continuously repeating the sequence (a), (b), (c), and (d), where T is the reciprocal of the frequency f. Optionally, in these embodiments, the cutoff frequency is between 2f and 4f, and the output filter has a transfer function that has zero at 5f.
[0010] In some embodiments of the second apparatus, n > 1, and the controller is further programmed to control the amplitude of the sine wave by adjusting the output voltages of the n DC power supplies via a voltage control input, while maintaining a constant ratio between the output voltages of each of the n DC power supplies. Optionally, in these embodiments, the output filter may have a transfer function that has zeros at the frequency in which harmonics of frequency f are expected to contain power.
[0011] Another aspect of the present invention is directed to a first method for generating a sine wave of frequency f. The first method includes the steps of setting n DC power supplies to their respective output voltages, where n is a positive integer, and generating an oversampled version of the sine wave, where N = 2 + 4n, is sampled N times per cycle using equally spaced samples including a sampling point at 0°, by setting the output voltages of the n DC power supplies to the levels present in the oversampled version of the sine wave, and then switching the outputs of the n DC power supplies to outputs in a controlled sequence, such that each of the n DC power supplies is switched to an output in each direction at appropriate times in the sequence, in order to generate the oversampled version of the sine wave. The first method also includes the step of filtering the oversampled version of the sine wave to pass frequency f and attenuate frequencies above the cutoff frequency, wherein the filtering implements a transfer function that has zeros at frequencies where harmonics of frequency f are expected to contain power. The amplitude of the sine wave is controlled by adjusting the output voltages of n DC power supplies, and while one of the given DC power supplies is switched to output, the adjustment of the output voltage of any one of the given DC power supplies is prevented.
[0012] In some examples of the first method, n=1, which means that only a single DC power supply is present, and the adjustment of the output voltage of the single DC power supply occurs only during times when the output of the single DC power supply is not switched to output.
[0013] In some examples of the first method, filtering implements a transfer function that has zeros at the frequency where harmonics of frequency f are expected to contain power.
[0014] Another aspect of the present invention is directed to a third device for generating an output waveform of frequency f. The third device comprises a first DC power supply having a first voltage control input for setting the output voltage of a first DC power supply, and a second DC power supply having a second voltage control input for setting the output voltage of a second DC power supply. The third device also comprises a power switch having an output terminal and a control input. The power switch is configured to (a) route the output of the first DC power supply to the output terminal with a first polarity depending on a first state of the control input, (b) route the output of the first DC power supply to the output terminal with a second polarity depending on a second state of the control input, (c) route the output of the second DC power supply to the output terminal with a first polarity depending on a third state of the control input, (d) route the output of the second DC power supply to the output terminal with a second polarity depending on a fourth state of the control input, and (e) remain off depending on an additional state of the control input. The second polarity is the opposite of the first polarity. The third device also includes an output filter that filters the current coming from the output terminal of the power switch. The output filter allows frequency f to pass through and attenuates frequencies above the cutoff frequency. The third device also includes a controller programmed to operate in a first mode in which the controller sets the control input to a first and second state in an alternating sequence while keeping the first voltage control input constant. The controller is further programmed to operate in a second mode in which the controller sets the control input to a third and fourth state in an alternating sequence while keeping the second voltage control input constant. The controller is further programmed so that, when operating in the first mode, the controller adjusts the second voltage control input and then switches the controller to the second mode, thereby causing a change in the amplitude of the output waveform, and so that, when operating in the second mode, the controller adjusts the first voltage control input and then switches the controller to the first mode, thereby causing a change in the amplitude of the output waveform.
[0015] In some embodiments of the third apparatus, the output waveform is a sine wave, and the setting of the control input in an alternating sequence to first and second states includes (a) placing the control input in a first state for a duration of T / 3, then (b) waiting for a duration of T / 6, then (c) placing the control input in a second state for a duration of T / 3, then (d) waiting for a duration of T / 6, and then repeating sequences (a), (b), (c), and (d) in succession; and the setting of the control input in an alternating sequence to third and fourth states includes (e) placing the control input in a third state for a duration of T / 3, then (f) waiting for a duration of T / 6, then (g) placing the control input in a fourth state for a duration of T / 3, then (h) waiting for a duration of T / 6, and then repeating sequences (e), (f), (g), and (h) in succession. T is the reciprocal of the frequency f.
[0016] In some embodiments of the third device, the controller is further programmed to cause a change in the amplitude of the output waveform by adjusting a second voltage control input at least 1 millisecond before switching the controller to a second mode when the controller is operating in a first mode, and the controller is further programmed to cause a change in the amplitude of the output waveform by adjusting a first voltage control input at least 1 millisecond before switching the controller to a first mode when the controller is operating in a second mode.
[0017] Some embodiments of the third device further include a transformer having a primary side connected to the output terminals of a power switch and a secondary side connected to an output filter, wherein the current from the output terminals of the power switch reaches the output filter via the transformer. Optionally, in these embodiments, the power switch may be configured to (a) route the output of a first DC power supply to the primary side of the transformer in a first direction, depending on a first state of the control input; (b) route the output of the first DC power supply to the primary side of the transformer in a second direction, depending on a second state of the control input; (c) route the output of a second DC power supply to the primary side of the transformer in a first direction, depending on a third state of the control input; (d) route the output of a second DC power supply to the primary side of the transformer in a second direction, depending on a fourth state of the control input; and (e) remain off depending on a fifth state of the control input. The second direction is opposite to the first direction.
[0018] In some embodiments of the third device, the cutoff frequency is between 2f and 4f, and the output filter has a transfer function that has zero at 5f.
[0019] Another aspect of the present invention is directed to a second method for generating an output waveform of frequency f. The second method includes the steps of: (b) routing the output of a first DC power supply to the output terminal of a power switch with a first polarity, depending on a first state of the control input of a power switch; (c) routing the output of the first DC power supply to the output terminal with a second polarity, depending on a second state of the control input; (d) routing the output of a second DC power supply to the output terminal with a first polarity, depending on a third state of the control input; (e) remaining off, depending on an additional state of the control input. The second polarity is opposite to the first polarity. The second method also includes the step of filtering the current coming from the output terminal of the power switch. The filtering includes passing frequency f and attenuating frequencies above the cutoff frequency. The second method also includes the step of operating in a first mode in which the control input is set in an alternating sequence between a first and a second state, while keeping the output voltage of the first DC power supply constant. The second method also includes the step of operating in a second mode in which the control input is set in an alternating sequence between a third and a fourth state, while keeping the output voltage of the second DC power supply constant. In the first mode, changes in the amplitude of the output waveform are caused by adjusting the output voltage of the second DC power supply and then switching to the second mode. Then, in the second mode, changes in the amplitude of the output waveform are caused by adjusting the output voltage of the first DC power supply and then switching to the first mode.
[0020] In some examples of the second method, the output waveform is a sine wave, and the control input is set in an alternating sequence between the first and second states by (a) placing the control input in a first state for a duration of T / 3, then (b) waiting for a duration of T / 6, then (c) placing the control input in a second state for a duration of T / 3, then (d) waiting for a duration of T / 6, and then repeating the sequence (a), (b), (c), and (d) in succession. In these examples, the control input is set to the third and fourth states in an alternating sequence by (e) placing the control input in the third state for a duration of T / 3, then (f) waiting for a duration of T / 6, then (g) placing the control input in the fourth state for a duration of T / 3, then (h) waiting for a duration of T / 6, and then continuously repeating the sequence (e), (f), (g), and (h). In these examples, T is the reciprocal of the frequency f.
[0021] In some examples of the second method, in the first mode, the change in the amplitude of the output waveform is caused by adjusting the output voltage of the second DC power supply at least 1 millisecond before switching to the second mode, and in the second mode, the change in the amplitude of the output waveform is caused by adjusting the output voltage of the first DC power supply at least 1 millisecond before switching to the first mode.
[0022] Another aspect of the present invention is directed to a fourth apparatus for generating an alternating current electrical signal for applying to a first pair of electrodes and a second pair of electrodes. The fourth apparatus includes an alternating voltage generator having an output, an electronic switch, and a controller. The electronic switch has an input that receives the output of the alternating voltage generator, a first power output, and a second power output. The electronic switch is configured to operate in: (a) a first mode in which the output of the alternating voltage generator is routed to the first power output, and (b) a second mode in which the output of the alternating voltage generator is routed to the second power output. The electronic switch is further configured to cycle through a repeating sequence that includes the first mode and the second mode. The controller is configured to synchronize the operation of the alternating voltage generator and the electronic switch such that whenever the electronic switch switches to either the first mode or the second mode, the instantaneous output of the alternating voltage generator is less than 5V in magnitude. Within 20 milliseconds after the electronic switch switches to either the first mode or the second mode, the output voltage of the alternating voltage generator is at least 80% of the steady-state output voltage of the alternating voltage generator.
[0023] In some embodiments of the fourth apparatus, the electronic switch is configured to operate in: (c) a third mode in which the output of the alternating voltage generator is not routed to either the first power output or the second power output, and (d) cycle through the first mode, the second mode, and the third mode in the following repeating sequence: (1) the first mode, (2) the third mode, (3) the second mode, and (4) the third mode. In some embodiments of the fourth apparatus, the controller is configured to synchronize the operation of the alternating voltage generator and the electronic switch such that whenever the electronic switch switches to either the first mode or the second mode, the instantaneous output of the alternating voltage generator is less than 1V in magnitude.
[0024] In some embodiments of the fourth device, within 5 milliseconds after the electronic switch switches to either the first mode or the second mode, the output voltage of the AC voltage generator is at least 80% of the steady-state output voltage of the AC voltage generator. In some embodiments of the fourth device, within 1 millisecond after the electronic switch switches to either the first mode or the second mode, the output voltage of the AC voltage generator is at least 80% of the steady-state output voltage of the AC voltage generator.
[0025] In some embodiments of the fourth device, during the transition of the electronic switch to either the first mode or the second mode, the AC voltage generator continues to operate at its full steady-state AC output voltage.
[0026] In some embodiments of the fourth device, the controller synchronizes the operation of the AC voltage generator and the electronic switch by controlling the timing of the transition of the electronic switch such that the window of time during which the instantaneous output of the AC voltage generator is less than 5 V in magnitude coincides with the transition. In some embodiments of the fourth device, the controller synchronizes the operation of the AC voltage generator and the electronic switch by controlling the AC voltage generator such that the output of the AC voltage generator is turned off whenever the transition of the electronic switch occurs. In some embodiments of the fourth device, the controller synchronizes the operation of the AC voltage generator and the electronic switch by both (a) controlling the timing of the transition of the electronic switch such that the window of time during which the instantaneous output of the AC voltage generator is less than 5 V in magnitude coincides with the transition and (b) controlling the AC voltage generator such that the output of the AC voltage generator is turned off whenever the transition of the electronic switch occurs.
[0027] In some embodiments of the fourth device, the electronic switch is configured to cycle through a first mode and a second mode in the following repeating sequence: (1) first mode, (2) second mode. In these embodiments, the electronic switch is configured to switch directly from the first mode to the second mode and directly from the second mode to the first mode.
[0028] Another aspect of the present invention is directed to a fifth apparatus for generating alternating current electrical signals to be applied to a first pair of electrodes and a second pair of electrodes. The fifth apparatus comprises an alternating current voltage generator having an output, an electronic switch, and a controller. The electronic switch has an input that receives the output of the alternating current voltage generator, a first power output, and a second power output. The electronic switch is configured to operate in a first mode of (a) routing the output of the alternating current voltage generator to the first power output, and in a second mode of (b) routing the output of the alternating current voltage generator to the second power output. The electronic switch is further configured to cycle through a repeating sequence including the first mode and the second mode. The controller is configured to synchronize the operation of the alternating current voltage generator and the electronic switch such that whenever the electronic switch switches to either the first mode or the second mode, the instantaneous output of the alternating current voltage generator is below a threshold that causes the object being treated to begin to feel a perceptible sensation. Within 20 milliseconds after the electronic switch switches to either the first or second mode, the output voltage of the AC voltage generator is at least 80% of the steady-state output voltage of the AC voltage generator.
[0029] In some embodiments of the fifth apparatus, the electronic switch is configured to (c) operate in a third mode in which the output of the AC voltage generator is not routed to either the first or second power output, and (d) cycle through the first, second, and third modes in the following repeating sequence: (1) first mode, (2) third mode, (3) second mode, and (4) third mode.
[0030] In some embodiments of the fifth apparatus, the controller is configured to synchronize the operation of the AC voltage generator and the electronic switch so that whenever the electronic switch switches to either the first mode or the second mode, the instantaneous output of the AC voltage generator is less than 1V in magnitude.
[0031] In some embodiments of the fifth apparatus, within 5 milliseconds after the electronic switch switches to either the first or second mode, the output voltage of the AC voltage generator is at least 80% of the steady-state output voltage of the AC voltage generator. In some embodiments of the fifth apparatus, within 1 millisecond after the electronic switch switches to either the first or second mode, the output voltage of the AC voltage generator is at least 80% of the steady-state output voltage of the AC voltage generator.
[0032] In some embodiments of the fifth apparatus, during the transition of the electronic switch to either the first or second mode, the AC voltage generator continues to operate at its full steady-state AC output voltage.
[0033] In some embodiments of the fifth apparatus, the controller synchronizes the operation of the AC voltage generator and the electronic switch by controlling the timing of the transition of the electronic switch so that the transition coincides with a time window during which the instantaneous output of the AC voltage generator is below a threshold magnitude. In some embodiments of the fifth apparatus, the controller synchronizes the operation of the AC voltage generator and the electronic switch by controlling the AC voltage generator so that the output of the AC voltage generator is turned off whenever an electronic switch transition occurs. In some embodiments of the fifth apparatus, the controller synchronizes the operation of the AC voltage generator and the electronic switch by both (a) controlling the timing of the transition of the electronic switch so that the transition coincides with a time window during which the instantaneous output of the AC voltage generator is below a threshold magnitude, and (b) controlling the AC voltage generator so that the output of the AC voltage generator is turned off whenever an electronic switch transition occurs.
[0034] In some embodiments of the fifth device, the electronic switch is configured to cycle between a first mode and a second mode in the following repeating sequence: (1) first mode, (2) second mode. In these embodiments, the electronic switch is configured to switch directly from the first mode to the second mode and directly from the second mode to the first mode. [Brief explanation of the drawing]
[0035] [Figure 1] This is a block diagram of a first embodiment of a sine wave generator that generates a sine wave of a preset frequency f with a controllable amplitude. [Figure 2] This is a block diagram of a suitable architecture for implementing a power switcher and an output filter, representing one preferred method for implementing a power switcher. [Figure 3] This figure shows a sine wave and an oversampled version of the sine wave, sampled six times per cycle. [Figure 4] This is a schematic diagram of an output filter embodiment. [Figure 5] This is a block diagram of a second embodiment of a sine wave generator that generates a sine wave of a preset frequency f with a controllable amplitude. [Figure 6] This is a block diagram of one preferred method for implementing the power switcher in the embodiment shown in Figure 5. [Figure 7] This figure shows a sine wave and an oversampled version of the sine wave, sampled 10 times per cycle. [Figure 8] This figure shows the sinusoidal output waveform under steady-state conditions. [Figure 9] This figure shows how the sinusoidal output waveform changes when the output of the DC-DC converter used to power the sinusoidal output changes at a specific time in the cycle. [Figure 10] This figure shows how the sinusoidal output waveform changes when the output of the DC-DC converter used to power the sinusoidal output changes at other times in the cycle. [Figure 11] This is a block diagram of a third embodiment of a sine wave generator that generates a sine wave with a controllable amplitude. [Figure 12] Figure 11 shows a waveform illustrating how the embodiment facilitates rapid changes in the output signal voltage. [Figure 13] This is a block diagram of a conventional system for applying TTFields to the human head. [Figure 14] Figure 13 is a timing diagram showing the sequencing between the two directions LR and AP used in the conventional system. [Figure 15] This figure shows a waveform containing significant spikes. [Figure 16A] This figure shows a conventional technique for avoiding the spikes shown in Figure 15 by ramping the output voltage of an AC generator up and down at 1-second intervals between switching events. [Figure 16B]Figure 16A is a schematic diagram of the instantaneous output voltage of an AC generator using ramp plates. [Figure 17A] Figure 16 shows what happens when the method is used with a 0.25-second interval between switching events. [Figure 17B] Figure 17A is a schematic diagram of the instantaneous output voltage of an AC generator using ramp plates. [Figure 18] This figure shows an embodiment for synchronizing the operation of an AC voltage generator and a switch. [Figure 19] This is a timing diagram showing the ordering between the two directions for the embodiment of Figure 18. [Figure 20] This figure shows a first method for achieving synchronization between the AC voltage generator and the switch in the embodiment of Figure 18, which operates by precisely adjusting the switching of the switch. [Figure 21] This figure shows a second method for achieving synchronization between the AC voltage generator and the switch in the embodiment of Figure 18, which operates by controlling the output of the AC voltage generator. [Figure 22] This figure shows how the output of the AC voltage generator instantly jumps to its full steady-state output voltage when the method shown in Figure 21 is used. [Figure 23] This figure shows another method for achieving synchronization between the AC voltage generator and the switch in the embodiment of Figure 18, which operates by precisely adjusting the switching of the switch. [Modes for carrying out the invention]
[0036] Various embodiments are described in detail below with reference to the attached drawings, where similar reference numerals represent similar elements.
[0037] When using prior art techniques to generate high-voltage sinusoidal signals in connection with TTFields therapy, high-frequency artifacts (e.g., voltage spikes) may appear in the output under certain conditions (e.g., in response to commands to change the output voltage or when the direction of the TTFields is switched). Furthermore, since these high-frequency artifacts can cause unpleasant sensations in a person being treated with TTFields therapy, the output voltage amplitude has typically been ramped up slowly to prevent the occurrence of these high-frequency artifacts (and the resulting unpleasant sensations). However, using a slow ramp-up has disadvantages; namely, the output voltage is not always as high as possible, meaning that the electric field applied to the tumor is not always as strong as possible. Also, if the electric field is not as strong as possible, the therapeutic effect may be reduced. The embodiments described herein advantageously allow for a much faster increase in output voltage amplitude without introducing high-frequency artifacts. Thus, these embodiments can prevent the occurrence of unpleasant sensations without resulting in a corresponding decrease in the therapeutic effect.
[0038] The embodiments described herein are useful in relation to generating TTFields, as described in U.S. Patent No. 7,805,201, which is incorporated herein by reference. The embodiments described herein are based on the architecture described in U.S. Patent No. 9,910,453, which is incorporated herein by reference. In particular, the embodiments described herein enable more rapid adjustment of the voltage of a sinusoidal signal (applied to the TTFields transducer array) without the risk of introducing high-frequency artifacts (e.g., voltage spikes) at the output. The embodiments described herein also enable instantaneous switching of the sinusoidal signal on and off to full power without the risk of introducing high-frequency artifacts at the output.
[0039] When generating a high-voltage signal for TTFields delivery, note that the exact shape of the signal is known at each point in time (a pure sine wave of known frequency), and only the amplitude of the output signal changes over time based on an external input (e.g., control based on the patient's skin temperature).
[0040] Embodiments described herein generate a high-voltage sinusoidal signal by generating a specific pulse train that, when filtered using a specific low-pass filter, results in a low-distortion sinusoidal signal of a desired amplitude and frequency.
[0041] Figure 1 is a block diagram of a first embodiment of a sine wave generator that generates a sine wave with a controllable amplitude at a preset frequency f. Ultimately, the amplitude of the output sine wave will be proportional to the output of a DC power supply 50, which is preferably a controlled DC-to-DC converter.
[0042] In the illustrated embodiment, the DC-DC converter 50 is configured to multiply the analog voltage control input signal by 10, so that by proportional control between them, when a voltage control signal of 1V is applied, the output becomes 10V, and when a voltage control signal of 5V is applied, the output becomes 50V. Therefore, the output of the DC-DC converter 50 can take any value between 0V and 50V, depending on the voltage applied to the analog voltage control input (e.g., 0 to 5V). The controller 40 controls the output voltage of the DC-DC converter 50 by writing a control word to the digital-to-analog converter (DAC) 42. The DAC 42 then generates an analog voltage proportional to the control word, and this analog voltage is applied to the voltage control input of the DC-DC converter 50.
[0043] The output of the DC-DC converter 50 is routed to a power switcher 60. The power switcher 60 has a control input and, depending on the state of the control input, routes the output of the DC-DC converter 50 to the primary side of the transformer 70 in either direction. More specifically, when a first control signal is applied to the control input, the power switcher 60 applies the output of the DC-DC converter 50 to the primary side of the transformer 70 in a first direction. When a second control signal is applied to the control input, the power switcher 60 applies the output of the DC-DC converter 50 to the primary side of the transformer 70 in a second direction opposite to the first direction. If neither the first nor the second control signal is applied to the control input, the power switcher 60 remains off, and in that case, power from the DC-DC converter 50 is not routed to the primary side of the transformer 70.
[0044] Figure 2 includes a block of one preferred method for implementing a power switcher 60 using a set of four electronically controlled switches 61-64 connected to the primary side of transformer 70 in an H-bridge configuration. These switches 61-64 open and close in response to a signal applied to a control input 68. As will be understood by those skilled in the art, a wide variety of techniques can be used to implement these switches. For example, switches 61-64 may be implemented using MOSFET transistors (e.g., BSC109N10NS3 manufactured by Infineon) with appropriate theory for switching them on and off in response to a control signal. Only switches 63 and 62 should be closed to apply the output of the DC-DC converter 50 to the primary side of transformer 70 in a first direction. Only switches 61 and 64 should be closed to apply the output of the DC-DC converter 50 to the primary side of transformer 70 in the opposite direction. When all four of these switches 61-64 are off, power is not routed to the primary side of transformer 70.
[0045] The transformer 70 is preferably a step-up transformer having a step-up ratio between 1:4 and 1:9. In some preferred embodiments, the transformer 70 is a step-up transformer having a step-up ratio of 1:6. For example, when a transformer with a step-up ratio of 1:6 is used in combination with a DC-to-DC converter 50 capable of outputting up to 24V, the resulting voltage on the secondary side of the transformer 70 can be as high as 300V.
[0046] Returning to Figure 1, the controller 40 applies control signals to the control input of the power switcher 60 in a time-choreographed sequence to construct an oversampled version of the sine wave sampled six times per cycle using equally spaced samples. More specifically, Figure 3 shows the sine wave 110 and its oversampled version 112, sampled at 0°, 60°, 120°, 180°, 240°, 300°, and 360°. Looking at this oversampled version 112, we can see that it contains only three voltage levels: a positive voltage +V between 60° and 180°, a negative voltage -V between 240° and 360°, and zero volts between 0° and 60° and also between 180° and 240°. Note that a zero-volt level exists because the sampling time was chosen such that one of the sampling points occurs at 0° where the sine function is equal to zero, and another sampling point occurs at 180° where the sine function is equal to zero. This choice advantageously reduces the number of voltage levels that must be generated to construct the oversampled version of the sine wave. It also advantageously reduces the number of switching events, which minimizes the losses that occur during the switching process.
[0047] As a result, an oversampled version of the sine wave at a preset frequency f can be constructed at the output of the transformer 70 by repeatedly performing the following four steps: (a) applying a first control signal to the control input 68 for a duration of T / 3 corresponding to the 60-180° segment of waveform 112 in Figure 3; (b) waiting for a duration of T / 6 corresponding to the 180-240° segment of waveform 112; (c) applying a second control signal to the control input 68 for a duration of T / 3 corresponding to the 240-360° segment of waveform 112; and (d) waiting for a duration of T / 6 corresponding to the 0-60° segment of waveform 112. Note that T is the reciprocal of the preset frequency f.
[0048] The controller 40 is responsible for generating these control signals in this sequence. The controller 40 can be implemented using a wide variety of methods that will be apparent to those skilled in the art, including, but not limited to, a microcontroller or microprocessor programmed to perform the functions described herein. The controller 40 can also be implemented using a microcontroller or microprocessor in combination with a hardwired sequencer, which can be implemented using, for example, a state machine or counters.
[0049] The output of the secondary side of transformer 70 is routed to an output filter 80 having a cutoff frequency between 2f and 4f. The output filter 80 allows a preset frequency f to pass through and attenuates frequencies above the cutoff frequency.
[0050] Note that when the oversampled version of the sine wave (112 in Figure 3) is converted to the frequency domain, all even harmonics become zero as a result of the fact that waveform 112 is symmetrical. In addition, since sampling is performed 6 times per period, the third harmonic of waveform 112 also becomes zero.
[0051] Many filter designs have inherent instabilities at their cutoff frequencies. However, since the third harmonic component of the oversampled waveform 112 is zero, the lowest harmonic that will have any significant power is the fifth harmonic. If the output filter 80 is designed so that its cutoff frequency matches the third harmonic, the waveform will not contain power at 3f, and therefore the oversampled waveform 112 will not be affected by instability near the cutoff frequency. Thus, it is most preferable to design the output filter 80 to have its cutoff frequency at 3f, in which case (a) the fundamental component will be sufficiently low above the cutoff frequency so as not to activate instability, and (b) the fifth harmonic will be sufficiently high above the cutoff frequency so as not to activate instability.
[0052] To further reduce higher harmonics, the output filter 80 is preferably designed such that the transfer function of the output filter has zeros located at the fifth harmonic. This can be achieved, for example, by selecting components within the output filter 80 to implement an elliptic low-pass filter or a Chebyshev-2 low-pass filter. Typically, elliptic and Chebyshev-2 filters have significant ripple within the stopband and are therefore unsuitable for filtering a square wave into a sine wave. As a result, if an arriving signal happens to contain a frequency component that coincides with the crest in its ripple, that component will not be filtered from the arriving signal. The embodiment in Figure 1 avoids this situation by generating a waveform 112 that is oversampled at a predetermined frequency, meaning that the frequency of the fifth harmonic is known in advance. By selecting components within the output filter 80 such that its transfer function has zeros at the fifth harmonic, it is ensured that the fifth harmonic never coincides with the crest in the ripple within the stopband.
[0053] To further reduce higher harmonics, the output filter 80 may be designed such that its transfer function has an additional zero located at the seventh harmonic. Here again, since the frequency of the seventh harmonic is known in advance, the components within the output filter 80 may be selected such that their transfer function has a zero at the seventh harmonic.
[0054] Designing an output filter 80 with zeros at the 5th and 7th harmonics reduces attenuation at other frequencies located between harmonics, which is usually highly undesirable. However, since the frequencies of the oversampled waveform 112 are predetermined and the signal contains only odd harmonics (starting from the 5th harmonic), this design actually reduces the overall distortion of the output signal in the embodiment of Figure 1.
[0055] If the output filter 80 is designed with zeros in the 5th and 7th harmonics, the initial harmonic containing any significant power is the 9th harmonic. However, the power in the 9th harmonic of the oversampled waveform 112 (in Figure 3) is relatively low to begin with, and the 9th harmonic is 6f higher than the cutoff frequency, so the power in the 9th harmonic (and all higher harmonics) in the output 100 of the output filter 80 will be low enough to produce a good sine wave.
[0056] Figure 2 shows a suitable architecture for implementing an output filter 80 having a cutoff frequency and zero at the position indicated above. Preferably, the output filter 80 is a multi-stage low-pass LC filter. In this case, the first stage of the output filter 80 comprises an inductor 82 and a capacitor 83, and the subsequent stages are represented by a block 85. In some embodiments, the filter 80 is a fourth-order LC low-pass filter. In some embodiments, the filter 80 is a dual M-type element low-pass filter.
[0057] Once the electrical characteristics of the transformer 70 are modeled, the transformer's leakage inductance appears in series with the secondary side of the transformer 70. Consequently, this leakage inductance must be taken into consideration when calculating the inductance of the first inductor 82 in the first stage of the output filter 80. In some embodiments, a transformer 70 is selected that has a leakage inductance large enough to supply all the required inductance for the first inductor 82. In this case, the first inductor 82 can be completely eliminated from the output filter 80 and replaced with a wire. For example, if the desired value calculated for the first inductor in the output filter is 60 μH and the leakage inductance of the transformer 70 is 60 μH, then the first inductor 82 in the output filter can be completely eliminated.
[0058] In alternative embodiments, the leakage inductance of transformer 70 accounts for at least half of the inductance of the first stage of the low-pass LC filter. In these embodiments, starting with the calculated value for the first inductor 82, the value is reduced by the leakage inductance of transformer 70. For example, if the calculated value for the first inductor in the first stage of the output filter is 100 μH and the leakage inductance of transformer 70 is 60 μH, then (100 μH - 60 μH = 40 μH) an inductor of 40 μH should be used as the first inductor 82 of the output filter.
[0059] Figure 4 is a schematic diagram of an embodiment of an output filter 80 in which the inductance of transformer 70 provides all the inductance necessary for it to function as the first inductor for the first stage of the output filter. The transformer in Figure 4 is a Zolotov TRM085 with the following characteristics: a turns ratio of 6:25, an inductance of 0.25 mH on the primary side (at 200 kHz), an inductance of 4.5 mH on the secondary side (at 200 kHz), and a leakage inductance between 32 μH and 36 μH (at 200 kHz). Capacitors C33, C35, C36, C42, C43, and C44 are all 3300 pF capacitors. C40 is a 4.7 nF capacitor. C41 is a 470 pF capacitor. Inductors L5 to L8 are all 4 μH inductors. The values of these components were chosen so that, when the operating frequency is 200 kHz, the filter's zeros are located at the 5th and 7th harmonics.
[0060] An alternative design for implementing the output filter 80 having an operating frequency of 150 kHz can be achieved by (a) adding an additional 4.7 nF capacitor in parallel with C40, and (b) replacing the 3300 pF capacitors C33, C35, C36, C42, C43, and C44 with 5600 pF capacitors, starting from the schematic diagram in Figure 4. These components were selected so that the filter zeros are located at the 5th and 7th harmonics when the operating frequency is 150 kHz.
[0061] The output impedance of the output filter 80 is preferably as close as possible to 70 ohms. In an alternative embodiment, the output impedance of the output filter 80 is between 40 ohms and 120 ohms. Since the current and voltage of the output signal 100 may vary depending on the presented load (i.e., the patient and transducer array in the context of TTFields therapy), it is appropriate to use the output impedance within this range. However, since the output impedance is between 40 ohms and 120 ohms, the current will not surge to dangerous values even if a short circuit is present at the output. In addition, if the impedance of the load suddenly increases (for example, if the electrodes are partially disconnected from the patient), the drop in current is not so significant. This is very useful as a safety feature in the context of TTFields therapy.
[0062] The controller 40 controls the amplitude of the output signal 100 by adjusting the control signal applied to the voltage control input of the DC-DC converter 50. In the illustrated embodiment, this is achieved by the controller 40 writing a control word to the DAC 42. The DAC 42 responds by outputting an analog voltage that serves as the control signal applied to the voltage control input of the DC-DC converter 50. For example, suppose the output of the DAC 42 starts at 1V, the DC-DC converter outputs 10V DC, and the transformer 70 has a boost ratio of 1:6. Under these conditions, the pulse at the output on the secondary side of the transformer 70 will be 60V. When the controller 40 writes a new control word to the DAC 42, it causes the output of the DAC 42 to increase to 2V. The DC-DC converter 50 responds to the new signal applied to its voltage control input by boosting its output voltage to 20V DC, which (after passing through the step-up transformer 70) boosts the pulse at the secondary output of the transformer 70 to 120V.
[0063] Preferably, the voltage and / or current of the output signal 100 are monitored by a voltage sensing circuit 92 and / or a current sensing circuit 94. The outputs of these circuits 92, 94 are preferably fed back to a controller 40, which is preferably configured to shut down the power switcher 60 by suppressing the generation of both a first control signal and a second control signal applied to the control input 68 of the power switcher 60 when an error condition (e.g., overvoltage, overcurrent, severe voltage drop, etc.) is detected in the output 100. Optionally, the shutdown of the power switcher 60 may also be triggered by an overheating condition in the load, including appropriate temperature sensors, by routing signals from these temperature sensors back to the controller 40.
[0064] Note that in the illustrated embodiment, a single controller 40 is used to implement all of the control and sequencing functions described herein. However, in alternative embodiments, a programmable controller 40 may be combined with a hardwired sequencer to perform these two functions, respectively.
[0065] In some embodiments, the outputs of the current sensing circuit 94 and / or the voltage sensing circuit 92 are fed back to the controller 40. In these embodiments, the controller can adjust the voltage at the output of the DC-DC converter 50 by writing appropriate control words to the DAC 42 to adjust the current or voltage of the output signal 100 to a desired level. For example, if the controller 40 is set to adjust the current to a specific level and the output of the current sensing circuit 94 indicates that the current is too low, the controller can increase the voltage at the output of the DAC 42, which causes an increase in the amplitude of the output signal 100. Similarly, if the output of the current sensing circuit 94 indicates that the current is too high, the controller can decrease the voltage at the output of the DAC 42, which causes a corresponding decrease in the amplitude of the output signal 100.
[0066] In alternative embodiments, the transformer 70 (shown in Figures 1 and 2) may be omitted, in which case the two conductors at the output of the power switcher 60 are directly connected to the two conductors at the input of the output filter 80. In these embodiments, current flows directly from the output of the power switcher 60 to the input of the output filter 80 without going through the transformer. However, these alternative embodiments are less desirable, particularly in situations where isolation is desired and where a high voltage output is desired. In addition, these alternative embodiments cannot rely on the leakage inductance of the transformer to provide some or all of the inductance required for the first stage of the filter.
[0067] It should be noted that the design of the embodiment in Figure 1 relies on prior knowledge of the arriving signal and the deliberate construction of both the signal and the output filter 80 such that the most important high frequencies are essentially zero (e.g., even harmonics and the third harmonic) or zeroed out by the output filter 80 (e.g., the fifth and seventh harmonics). This helps to provide a very clean high-voltage output signal at the desired frequency with very high efficiency.
[0068] The embodiment in Figure 1 uses a single DC-DC converter 50 and implements six equally spaced sampling points per cycle. In an alternative embodiment, the number of sampling points may be increased to N = 2 + 4n, where n is a positive integer. When n = 1, the situation is as described above in relation to Figure 1. When n = 2, the situation is as described below in relation to Figure 5, which uses two DC-DC converters. Other embodiments may be implemented for n > 2, following the same framework, using additional DC-DC converters and even more samples (following the rule N = 2 + 4n).
[0069] Figure 5 is a block diagram of a second embodiment of a sine wave generator that generates a sine wave with a controllable amplitude at a preset frequency f, where n=2. As a result, there are two DC-DC converters 50, 50B, and 10 samples are used per cycle (according to equation N=2+4n). Note that in the embodiments of Figures 5 and 6, components having similar reference numerals operate in the same manner as described above in relation to the embodiments of Figures 1 and 2.
[0070] Figure 7 shows a sine wave 120 and an oversampled version 122 of that sine wave sampled 10 times per cycle (i.e., at 0°, 36°, 72°, ..., 324°, and 360°). Looking at this oversampled version 122, we can see that it contains only five voltage levels: a lower positive voltage +V1, a higher positive voltage +V2, a lower negative voltage -V1, a higher negative voltage -V2, and zero volts (between 0° and 36°, and between 180° and 216°). Again, the zero volt level exists because we chose the sampling time so that one of the sampling points occurs at 0° where the sine function is equal to zero, and another of the sampling points occurs at 180° where the sine function is equal to zero. This choice is advantageous because it reduces the number of voltage levels that must be generated to construct the oversampled version 122 of the sine wave into two levels (i.e., V1 and V2).
[0071] As a result, controller 40B can be used to control each DC power supply so that it is applied to the primary side of the transformer in each direction at appropriate times in the sequence, thereby generating an oversampled version of a sine wave, which is sampled N times per cycle using equally spaced samples including a sampling point at 0°, where N = 2 + 4n, by setting the output voltage of the DC power supply to a level present in the oversampled version of the sine wave, and then sequencing the control signals through 2n states and an additional off state.
[0072] (As shown in the embodiments in Figures 5 and 6) When n=2, an oversampled version of a sine wave of a preset frequency f can be constructed at the output of the transformer 70 by continuously repeating the following eight steps: applying V1 to the primary side of the transformer 70 in a first direction between 36° and 72°; applying V2 in a first direction between 72° and 144°; applying V1 in a first direction between 144° and 180°; remaining off between 180° and 216°; applying V1 in a second direction between 216° and 252°; applying V2 in a second direction between 252° and 324°; applying V1 in a second direction between 324° and 360°; and remaining off between 0° and 36°. It should be noted that the ratio between V1 and V2 must remain constant in order for the resulting waveform to properly follow the oversampled version of the sine wave (122 in Figure 7). More specifically, the ratio V2 / V1 must be equal to sin(72°) / sin(36°), which equals 1.618.
[0073] The controller 40B is responsible for generating control signals that cause the power switcher 60B to apply these voltages to the transformer 70 in the sequence specified above. The controller 40B is similar to the controller 40 in the embodiment of Figure 1, except that it sequences 10 states per cycle instead of 6 states per cycle.
[0074] Referring to Figure 6, the power switch 60B has a control input 68, and the power switch is configured to (a) apply one selected output of the DC power supply to the primary side of the transformer 70 in a selected direction, depending on the 2n states of the control signal applied to the control input 68, or (b) remain off, depending on an additional state of the control signal.
[0075] Figure 6 is a block diagram of one preferred method for implementing the power switcher 60B. This power switcher is similar to the power switcher 60 in the embodiment of Figure 1, except that it includes additional switches 65-66 for switching the output of the second DC-DC converter across the transformer 70 in either direction. More specifically, the power switcher 60B uses a set of six electronically controlled switches 61-66 connected to the primary side of the transformer 70, as shown in Figure 6. These switches 61-66 (similar to the corresponding switches in the embodiments of Figures 1-2) open and close in response to a signal applied to the control input 68. Only switches 63 and 62 should be closed to route the output of the first DC-DC converter 50 to the primary side of the transformer 70 in a first direction. Only switches 61 and 64 should be closed to route the output of the first DC-DC converter 50 to the primary side of the transformer 70 in the opposite direction (i.e., with opposite polarity). To route the output of the second DC-DC converter 50B to the primary side of the transformer 70 in the first direction, only switches 65 and 62 should be closed. To route the output of the second DC-DC converter 50B to the primary side of the transformer 70 in the opposite direction (i.e., with the opposite polarity), only switches 61 and 66 should be closed. If all six of these switches 61-66 are off, no power is routed to the primary side of the transformer 70.
[0076] Returning to Figure 5, the output filter 80B is connected to the secondary side of the transformer 70, and the output filter allows a preset frequency f to pass through and attenuates frequencies above the cutoff frequency. The output filter 80B is similar to the output filter 80 in the embodiments of Figures 1 and 2, except that the position of the zero in the transfer function of the output filter 80B must be adjusted to take into account the different frequency contents of the oversampled waveform 122 (shown in Figure 7). More specifically, the output filter 80B should have a transfer function that has zeros at the frequency in which the harmonics of the preset frequency f are expected to contain power.
[0077] For example, since waveform 122 has 10 samples per cycle, the expected initial harmonic is the 9th harmonic. Therefore, when this waveform 122 is used, a transfer function with zeros at the 9th harmonic is useful. The filter's cutoff frequency should also be adjusted accordingly based on the expected set of harmonics (which can be calculated in advance by performing a Fourier transform of the waveform being used).
[0078] Optionally, the transfer function of the output filter 80B may also be designed to have zero at the next frequency in which a harmonic of a predetermined frequency f is expected to contain power. In the case of waveform 122, this is the 11th harmonic.
[0079] Controller 40B controls the amplitude of the sine wave at output 100B of output filter 80B by adjusting the output voltages of DC power supplies 50 and 50B via their voltage control inputs, while maintaining a constant ratio between the respective output voltages of the DC power supplies. In the illustrated embodiment, this is achieved by writing appropriate control words to DAC42 and DAC42B, taking care to maintain the required ratio of sin(72°) / sin(36°) as described above. In an alternative embodiment, the second DAC42B may be eliminated and replaced with a 1.618 × hardware multiplier inserted between the output of DAC42 and the voltage control input to the second DC-DC converter 50B.
[0080] In alternative embodiments, the transformer 70 may be omitted from the embodiment in Figure 5, in which case the two conductors at the output of the power switcher 60B are directly connected to the two conductors at the input of the output filter 80B. In these embodiments, the current flows directly from the output of the power switcher 60B to the input of the output filter 80B without going through the transformer. However, these embodiments are less desirable for the same reasons discussed above in relation to Figure 1.
[0081] It should be noted that the system described above is suitable for generating high-voltage signals of any shape, provided that the resulting pulse train can be determined before use, either by calculation or experiment, and the filter is designed accordingly.
[0082] When the output signal generated by the system is applied to electrodes to generate TTFields (as described in Patents 7,805,201), changes in the load associated with the patient's body and the transducer array can alter the output signal through interaction with the output filter. This means that any change in this load (e.g., lifting a disk from the patient's body, short-circuiting, etc.) will immediately affect the output signal, which is constantly being monitored. Therefore, it is possible for the device to respond very quickly to these changes (e.g., by shutting down the power switcher 60 in response to the detection of a short circuit or overload condition).
[0083] In particular, in the embodiments described above, since a sine wave is generated at a known frequency, the exact shape of the desired output signal is known in advance at each point in time. Only the amplitude of the output signal changes over time based on a controller that responds to an external input (e.g., a current measurement or a temperature measurement). The embodiments described above can advantageously be used to generate a very clean narrowband-limited signal in the frequency range of 100–500 kHz with very low loss and very low sensitivity to an external load to which the signal generator is connected.
[0084] In alternative embodiments, the system may be used to generate a sine wave of any desired frequency within a predetermined range by constructing a filter using components having adjustable reactance (e.g., adjustable capacitance or adjustable inductance). In these embodiments, the reactance of the adjustable components is set to feed the filter with the desired transfer function characteristics. A suitable oversampled sine wave is then generated and fed into the filter, as discussed above in relation to Figures 1 and 5.
[0085] In other alternative embodiments, the system may be used to generate a finite number of predefined signals of several different pre-set frequencies. These embodiments may be implemented by storing the pulse train characteristics for each of the predefined signals in a lookup table and providing a bank of filters that can be selectively switched to the signal path to provide the filtering characteristics necessary to generate one of the desired predefined signals. When the system is used to generate one of the predefined signals, the required pulse train characteristics are retrieved from memory and the appropriate filter (i.e., one that matches this pulse train) is switched to the signal path.
[0086] In other alternative embodiments, a composite signal containing a small number of discrete frequencies (for example, frequencies between 2 and 5) may be generated by producing an oversampled version of the composite signal and passing the oversampled version of the composite signal through an appropriate filter.
[0087] In the embodiments shown in Figures 1 and 5 described above, depending on the structure of the DC-DC converters 50 / 50B, when the output voltage of those DC-DC converters changes (for example, when the controller 40 / 40B writes a new control word to the DAC 42 / 42B), high-frequency artifacts (e.g., spikes) may appear in the output 100 / 100B. Furthermore, since high-frequency artifacts can cause unpleasant sensations in people being treated with TTFields therapy, it is desirable to take measures to prevent such high-frequency artifacts.
[0088] One appropriate technique to prevent high-frequency artifacts from appearing at the 100 / 100B output is to intentionally slow down the response time of the 50 / 50B DC-DC converter (for example, by adding a sufficiently large capacitor across the output of each DC-DC converter). However, while this technique is effective, it has two drawbacks: firstly, it requires the inclusion of additional components in the circuit; and secondly, slowing down the system's response time prevents abrupt changes in the output voltage, which can be desirable in situations where rapid changes are preferred.
[0089] Figures 8 to 10 show alternative methods to prevent high-frequency artifacts from appearing at the 100 / 100B output without intentionally slowing down the response time of the 50 / 50B DC-DC converter.
[0090] More specifically, Figure 8 shows the same waveform 112 (appearing at the output of the power switcher 60 in Figure 1) and the sinusoidal output waveform 115 (appearing at the output 100 of the output filter 80 in Figure 1) under steady-state conditions (for example, when the voltage at the output of the DC-DC converter 50 in Figure 1 is held at a constant DC of 20V, meaning that the controller 40 in Figure 1 is not updating the contents of the DAC 42). Under these steady-state conditions, the output waveform 115 operates as described above in relation to Figures 1 to 4 and does not contain any high-frequency artifacts.
[0091] Figure 9 shows how things change when a DC-DC converter with a fast response time is used and the output of the DC-DC converter 50 (shown in Figure 1) changes from 20V DC to 40V DC. As described above in relation to Figure 1, the controller 40 can initiate this change by updating the contents of the DAC 42 at time t9. Before this time t9, the output waveform 215 is identical to the output waveform 115 in the example in Figure 8. However, as soon as the controller 40 updates the contents of the DAC 42 at time t9, the output of the DAC 42 is applied to the voltage control input of the DC-DC converter 50, so the output voltage of the DC-DC converter begins to change rapidly (for example, from 20V to 40V in the illustrated example). Then, since the power switch 60 is set to actively supply current from the DC-DC converter 50 to the transformer 70 at that moment t9, the rapid change in current is transmitted through the transformer 70 to the output filter 80, which adds a high-frequency artifact 215 to the output 100. (Note that the dashed line 222 represents the continuation of the original sine wave that existed before t9, and the dashed line 220 represents a clean sine wave with twice the original amplitude.)
[0092] A similar situation exists if the DC-DC converter is designed such that spikes and / or instabilities may appear at the output of the DC-DC converter in response to changes in the voltage control input of the DC-DC converter (regardless of the DC-DC converter's response time). More specifically, if the power switch 60 is set to actively supply current from the DC-DC converter 50 to the transformer 70 at the moment the voltage control input of the DC-DC converter changes, any spikes at the output of the DC-DC converter will propagate through the transformer 70 to the output filter 80, which will add a high-frequency artifact 215 to the output 100.
[0093] Under certain circumstances, if the output voltage of the DC-DC converter changes during time intervals in which the power switch 60 is set to actively supply current from the DC-DC converter 50 / 50B to the transformer 70, a high-frequency artifact may be added to output 100. On the other hand, if the output of the DC-DC converter changes during time intervals in which the power switch 60 is not actively supplying current from the DC-DC converter 50 / 50B to the transformer 70, the high-frequency artifact will not appear in output 100. The controller 40 / 40B in the embodiment of Figure 1 / Figure 5 can utilize this dichotomy to prevent the high-frequency artifact from appearing in output 100 / 100B. More specifically, the controller 40 / 40B does this by ensuring that the output of the DC-DC converter 50 / 50B changes only during intervals in which the power switcher 60 / 60B is not actively supplying current from the DC-DC converter.
[0094] In the context of the embodiment of Figure 1 described above, the controller 40 achieves this by preventing adjustment of the voltage control input of the DC-DC converter 50 when (a) a first control signal is applied to the control input of the power switcher 60 (i.e., the power switcher 60 routes the output of the DC-DC converter 50 to the primary side of the transformer 70 in one direction), or (b) a second control signal is applied to the control input of the power switcher 60 (i.e., the power switcher 60 routes the output of the DC-DC converter 50 to the primary side of the transformer 70 in the opposite direction). When neither the first nor the second control signal is applied to the control input, the power switcher 60 remains off, in which case the controller 40 can adjust the voltage control input of the DC-DC converter 50 without introducing high-frequency artifacts at output 100.
[0095] Figure 10 shows how things unfold in the context of the embodiment in Figure 1 when the output of the DC-DC converter 50 changes from 20V DC to 40V DC during a time t10 when the power switch 60 is not actively supplying current from the DC-DC converter. Before this time t10, the output of the DC-DC converter 50 is at a first level (e.g., 20V in the illustrated example), and the output waveform 315 is identical to the output waveform 115 in the example in Figure 8. The controller 40 updates the contents of the DAC 42 at time t10 when the power switch 60 is not actively supplying current from the DC-DC converter 50 to the transformer 70. The output voltage of the DC-DC converter 50 begins to change rapidly (e.g., from 20V to 40V in the illustrated example) and stabilizes before the power switch 60 begins routing current to the transformer 70 at t11. Since the output of the DC-DC converter 50 is already stable when the power switch 60 begins routing the current to the transformer 70 at t11, the waveform that enters the output filter after t11 is an oversampled sine wave with a different amplitude (e.g., 40V). Then, as explained above in relation to Figures 1 to 4, when the oversampled sine wave is supplied to the output filter 80, the resulting output 100 is a very clean sine wave.
[0096] Similarly, in the context of the embodiment of Figure 5 described above, the controller 40B prevents high-frequency artifacts from appearing at output 100B by ensuring that the output of any given DC-DC converter 50 / 50B is changed only during intervals when the power switch 60 is not actively supplying current from a given DC-DC converter. The controller 40B achieves this by not adjusting the output voltage of any DC power supply while its output is routed to the output terminal of the power switch 60.
[0097] Figure 11 is a block diagram of a third embodiment of a sine wave generator that generates a sine wave with a controllable amplitude at a preset frequency f. Components having similar reference numerals operate in a similar manner to the corresponding components described above in relation to Figures 1 to 5.
[0098] This embodiment uses two DC-to-DC converters 51 and 52. Each of these DC-to-DC converters is configured to multiply the analog voltage control input signal by a fixed number (e.g., 10). In this example, proportional control between them ensures that when a voltage control signal of 1V is applied, the output becomes 10V, and when a voltage control signal of 5V is applied, the output becomes 50V. Thus, the outputs of the DC-to-DC converters 51 and 52 can take any value between 0V and 50V, depending on the voltage (e.g., 0 to 5V) applied to the analog voltage control input. Controller 40C controls the output voltages of the DC-to-DC converters 51 and 52 by writing control words to DACs 42 and 42B. The DACs then generate analog voltages proportional to the control words, and these analog voltages are applied to the voltage control inputs of the DC-to-DC converters 51 and 52.
[0099] The controller 40C is responsible for generating control signals that cause the power switcher 60B to apply these voltages to the transformer 70 in the sequence described below.
[0100] Figure 6 is a block diagram of one preferred method for implementing the power switcher 60B. This power switcher is identical to the power switcher 60B in the embodiment of Figure 5. More specifically, this power switcher 60B uses a set of six electronically controlled switches 61-66 connected to the primary side of the transformer 70, as shown in Figure 6. These switches 61-66 open and close in response to signals applied to the control input 68.
[0101] To route the output of the first DC-DC converter 51 to the primary side of the transformer 70 in a first direction, only switches 63 and 62 should be closed. The power switcher 60B is configured to occur in response to a first state of the control input. To route the output of the first DC-DC converter 51 to the primary side of the transformer 70 in the opposite direction (i.e., with the opposite polarity), only switches 61 and 64 should be closed. The power switcher 60B is configured to occur in response to a second state of the control input.
[0102] To route the output of the second DC-DC converter 52 to the primary side of the transformer 70 in the first direction, only switches 65 and 62 should be closed. The power switcher 60B is configured to occur in response to a third state of the control input. To route the output of the second DC-DC converter 52 to the primary side of the transformer 70 in the opposite direction (i.e., with opposite polarity), only switches 61 and 66 should be closed. The power switcher 60B is configured to occur in response to a fourth state of the control input. When all six of these switches 61-66 are off, no power is routed to the primary side of the transformer 70. The power switcher 60B is configured to occur in response to a fifth state of the control input (also referred to herein as an additional state).
[0103] The controller 40C has the capability to operate in either a first or second mode. In the first mode, the controller 40C generates an output waveform 100C powered exclusively by the first DC-DC converter 51 by setting the control input of the power switcher 60B to a first and second state in an alternating sequence while keeping the first voltage control input constant. In some preferred embodiments, a waveform similar to the waveform 112 in Figure 3 can be generated by (a) placing the control input in a first state for a duration of T / 3, then (b) waiting for a duration of T / 6, then (c) placing the control input in a second state for a duration of T / 3, then (d) waiting for a duration of T / 6, and then continuously repeating the sequence (a), (b), (c), and (d). The amplitude of this waveform depends solely on the output voltage of the DC-DC converter 51. Filtering this waveform with the output filter 80 (identical to the output filter 80 in the embodiments of Figures 1 to 2) results in a clean sine wave (as described above in relation to Figures 1 to 4).
[0104] In the second mode, the controller 40C generates an output waveform 100C that is powered exclusively by the second DC-DC converter 52 by setting the control input of the power switcher 60B to a third and fourth state in an alternating sequence while keeping the second voltage control input constant. In some preferred embodiments, a waveform similar to the waveform 112 in Figure 3 can be generated by (e) placing the control input in the third state for a duration of T / 3, then (f) waiting for a duration of T / 6, then (g) placing the control input in the fourth state for a duration of T / 3, then (h) waiting for a duration of T / 6, and then continuously repeating the sequence (e), (f), (g), and (h). The amplitude of this waveform depends solely on the output voltage of the DC-DC converter 52. Filtering this waveform by the output filter 80 results in a clean sine wave.
[0105] Figure 12 shows how the embodiment of Figure 11 facilitates a rapid change in the voltage of the output signal 100C by switching between the first and second modes. Trace 410 is the output voltage of the first DC-to-DC converter 51, trace 420 is the output voltage of the second DC-to-DC converter 52, and trace 430 is the output signal. Figure 11 shows the controller 40C operating in the first mode, starting at t0. In this mode, the output waveform 430 is powered exclusively by the first DC-to-DC converter 51 (set to 20V in the illustrated example). The controller 40C controls the generation of the output waveform 430 by setting the control input of the power switcher 60B to the first and second states in an alternating sequence (with intermittent waiting times at appropriate intervals) while keeping the first voltage control input constant, as described above.
[0106] While still operating in the first mode, the controller 40C predetermines what the output voltage will be when it finally switches to the second mode. Then, at time t1, the controller 40C issues a command to move the output voltage of the second DC-DC converter 52 to a desired level. In the illustrated example, the desired level of the second DC-DC converter 52 is 40V. In particular, since the second DC-DC converter is not in use at this time, the response time of the second DC-DC converter can be very slow.
[0107] Preferably, after the output of the second DC-DC converter 52 has settled to the desired level, the controller 40C switches to the second mode. This transition from the first mode to the second mode occurs simultaneously when the power switcher 60B is in the fifth state and is not routing current to the transformer 70. In the second mode, the output waveform 430 is powered exclusively by the second DC-DC converter 52 (set to 40V in the illustrated example). The controller 40C controls the generation of the output waveform 430 by setting the control input of the power switcher 60B to the third and fourth states in an alternating sequence (with intermittent waiting times at appropriate intervals) while keeping the second voltage control input constant, as described above. Preferably, in order to settle the output of the second DC-to-DC converter 52 to a desired level, such that the output waveform 430 immediately reaches the desired level when the second mode starts at t2, the command to initiate a change in the voltage of the second DC-to-DC converter 52 (i.e., t1 in Figure 12) occurs well in advance (for example, at least 1 millisecond) before the controller 40C switches to the second mode (i.e., t2 in Figure 12).
[0108] A similar process occurs when switching from the second mode back to the first mode. More specifically, while still operating in the second mode, the controller 40C predetermines what the output voltage will be when it finally switches to the first mode. The controller 40C then issues a command at time t3 to move the output voltage of the first DC-DC converter 51 to a desired level. In the illustrated example, the new desired level of the first DC-DC converter 51 is 10V. In particular, since the first DC-DC converter is not in use at this time, its response time can be very slow.
[0109] Preferably, after the output of the first DC-DC converter 51 has settled to a desired level, the controller 40C switches to the first mode. This transition from the second mode to the first mode occurs simultaneously when the power switcher 60B is in the fifth state and is not routing current to the transformer 70. In the first mode, the output waveform 430 is powered exclusively by the first DC-DC converter 51 (set to 10V in the illustrated example). The controller 40C controls the generation of the output waveform 430 by setting the control input of the power switcher 60B to the first and second states in an alternating sequence (with intermittent waiting times at appropriate intervals) while keeping the first voltage control input constant, as described above. Preferably, in order to settle the output of the first DC-DC converter 51 to a desired level so that the output waveform 430 immediately reaches the desired level when the first mode starts at t4, the command to initiate a change in the voltage of the first DC-DC converter 51 (i.e., t3 in Figure 12) occurs well in advance (for example, at least 1 millisecond) before the controller 40C switches to the first mode (i.e., t4 in Figure 12).
[0110] In alternative embodiments, the transformer 70 may be omitted from the embodiment of Figure 11, in which case the two conductors at the output of the power switcher 60B are directly connected to the two conductors at the input of the output filter 80. In these embodiments, the current flows directly from the output of the power switcher 60B to the input of the output filter 80 without going through the transformer. However, these embodiments are less desirable for the same reasons discussed above in relation to Figure 1.
[0111] TTFields therapy involves inducing an electric field (for example, at 200 kHz) through a target body part to treat a tumor in that body part. Experiments have shown that the efficiency of TTFields increases when the direction of the TTFields is changed during the course of treatment. For example, in Optune®'s prior art system, the direction of the TTFields changes every second. However, in alternative embodiments, the direction can be changed at different speeds (for example, between 50 milliseconds and 10 seconds).
[0112] Figure 13 is a block diagram of the original Optune® prior art system for applying TTFields to a human head (or other body part) in two different directions. This is achieved using a pair of transducer arrays 25A, 25P positioned anterior-posterior (i.e., front and back) of the head and another pair of transducer arrays 25L, 25R positioned on the left and right sides of the human head. More specifically, when an AC voltage is applied between transducer arrays 25L and 25R, an electric field is induced in the target head that propagates primarily in the left-to-right (LR) direction. Then, when an AC voltage is applied between transducer arrays 25A and 25P, an electric field is induced in the target head that propagates primarily in the front-to-back (AP) direction. TTFields can also be applied to other parts of the body (e.g., pancreas, lungs, etc.) by positioning transducer arrays in the target skin on the front / back and right / left sides of the relevant body part.
[0113] In the embodiment shown in Figure 13, a single AC voltage generator 20 is used to drive both pairs of transducer arrays (i.e., 25L / R and 25A / P). This is achieved by routing the output of the AC voltage generator 20 to a switch 22. Depending on the state of the control signal, the switch 22 routes the signal from the AC voltage generator 20 across either one pair of transducer arrays (i.e., 25L / R) or the other pair of transducer arrays (i.e., 25A / P).
[0114] Figure 14 is a timing diagram showing the sequence between the two directions LR and AP used in the original Optune®. In this technique, switch 22 (a) routes the output of AC voltage generator 20 to the left and right transducer arrays (25L / R) for 1 second, and then (b) routes the output of AC voltage generator 20 to the front and rear transducer arrays (25A / P) for 1 second, and then repeats steps (a) and (b) in an alternating sequence. A short time period (e.g., 5-10 milliseconds) in which the output of AC voltage generator 20 is not routed to either pair of transducer arrays (25L / R, 25A / P) is inserted between each step (indicated by the label off).
[0115] One problem addressed during the design of the original Optune® is described in relation to Figure 15. More specifically, if the switch 22 switches from the off state to either the LR state or the AP state (trace 525) while the instantaneous output voltage 520 generated by the AC voltage generator 20 is substantial (e.g., >10V), the output waveform resembles trace 530, which includes a spike 532. Since such a spike 532 can cause an unpleasant sensation in the subject, the original Optune® was designed to prevent such spikes from occurring. More specifically, this was achieved by ramping down the output voltage of the AC voltage generator 20 from its steady state value to zero V during a 100-millisecond interval preceding each off state, and then ramping up the output voltage back to its steady state value during a 100-millisecond interval following each off state, as shown in trace 540 in Figure 16A. The ramp speed was approximately 1 V / millisecond, which was slow enough to avoid spikes that the patient might notice.
[0116] The resulting waveform at the output of the AC voltage generator 20 was similar to the waveform shown in Figure 16B (except that the actual frequency of the sine wave generated by the AC voltage generator 20 was orders of magnitude larger than the sine wave shown). Note that the x-axis scale in Figure 16B is four times larger than that in Figure 16A to show additional detail. Also, this solution worked very well in the context of the original Optune®, as the system operated at its peak output voltage for 80% of the time, and only 20% of the time was spent ramping up the voltage, ramping down the voltage, or turning the voltage off.
[0117] Here, we investigate what happens when the same technique is used, but the interval at which the AC voltage is applied to either the LR or AP transducer array is shortened from 1 second to 0.25 seconds. When the same 1V / millisecond ramp-down and ramp-up technique described above in relation to Figure 16A is used on this new timescale, the output voltage of the AC voltage generator 20 follows trace 550 in Figure 17A. As a result, the waveform at the output of the AC voltage generator 20 is similar to the waveform shown in Figure 17B (except, again, that the actual frequency of the sine wave generated by the AC voltage generator 20 is orders of magnitude larger than the illustrated sine wave). Note that the x-axis scale in Figure 17B is magnified four times compared to Figure 17A to show additional detail.
[0118] However, this solution is not ideal because the peak output voltage is applied to the transducer array for only 20% of the time, which means that the maximum electric field is applied to the target for only 20% of the time. Thus, unlike the conventional technology shown in Figures 16A / 16B (where the output voltage is ramped up / down to ensure patient comfort, reducing the proportion of time spent at peak voltage by a small amount), using the same ramp slope when the switching time is reduced to 0.25 seconds reduces the proportion of time spent at peak voltage by a very large amount (as shown in Figures 17A / 17B). Furthermore, if the interval at which the AC voltage is applied to either the LR or AP transducer array is reduced to less than 0.20 seconds, the situation worsens even further, in which case the peak voltage (and corresponding peak electric field strength) is never reached.
[0119] The embodiment in Figure 18 uses a different technique for avoiding spikes similar to the spike 532 shown in Figure 15. More specifically, the embodiment in Figure 18 has an AC voltage generator 30 and a switch 32, and relies on synchronization between the two functional blocks to avoid spikes, as described below in relation to Figures 19 to 23. In some preferred embodiments, the AC voltage generator 30 in Figure 18 is implemented using the technique described above in relation to Figures 1 to 7. The switch 32 is configured to (a) route the output of the AC voltage generator 30 to the left and right transducer arrays (25L / R) depending on a first state of its control input, (b) route the output of the AC voltage generator 30 to the front and rear transducer arrays (25A / P) depending on a second state of its control input, or (c) remain off depending on a third state of its control input. The switch 32 may be implemented using any of the various techniques apparent to those skilled in the art, including, but not limited to, field-effect transistors, solid-state relays, etc.
[0120] In the illustrated embodiment, synchronization between the AC voltage generator 30 and the switch 32 is achieved using a synchronization controller 35 programmed to send control signals to the AC voltage generator 30 and / or the switch 32 to coordinate their components so that the signals described below are generated in the time relationships described below. Various alternative techniques for synchronizing the AC voltage generator 30 and the switch 32 may also be used. For example, synchronization may be achieved by allowing the AC voltage generator 30 to operate freely (as described below in relation to Figure 20) and adjusting the switching time of the switch 32. Alternatively, synchronization may be achieved by allowing the switch 32 to switch automatically (as described below in relation to Figure 21) and turning off the AC voltage generator 30 before each switching event. Yet another alternative for achieving synchronization is to control the timing of both the AC voltage generator 30 and the switch 32.
[0121] Figure 19 is a timing diagram showing the ordering between two directions, LR and AP, according to the embodiment of Figure 18. In this embodiment, switch 32 (a) routes the output of AC voltage generator 30 to the left and right transducer arrays (25L / R) for a duration T, and then (b) routes the output of AC voltage generator 30 to the front and rear transducer arrays (25A / P) for a duration T, and then repeats steps (a) and (b) in an alternating sequence. A short time period (e.g., 5-10 milliseconds) in which the output of AC voltage generator 30 is not routed to either pair of transducer arrays is inserted between each step (indicated by the label OFF). This can be choreographed by repeatedly adjusting the control input of switch 32 so that the LR mode, AP mode, and off mode cycle through the following repeating sequence: (1) LR mode, (2) off mode, (3) AP mode, and (4) off mode.
[0122] In this embodiment, the output voltage of the voltage generator 30 does not slowly ramp up and ramp down (as in the prior art embodiments described above in relation to Figure 16), so the duration T can be much shorter than 1 second. Instead, the output of the AC voltage generator 30 either stays at its full value (as described below in relation to Figure 20) or jumps to its full value immediately after the switch 32 switches its state (as described below in relation to Figure 21). In either case, the signals applied to the transducer arrays 25A / P, 25L / R are at their full value for most of the time (e.g., >90% or >95% of the time). And keeping the TTFields stronger for a larger proportion of the time can favorably improve the effectiveness of TTFields treatment. In some embodiments, the duration T is longer than 20 milliseconds. In some embodiments, the duration T is between 0.1 and 0.5 seconds. In some embodiments, the duration T is between 0.2 and 0.3 seconds. In particular, in contrast to the situation described above in relation to Figures 17A / 17B, the system operates at its full output voltage for a large proportion of the time, regardless of how short the duration of T is.
[0123] Figure 20 shows a first technique for achieving synchronization between the AC voltage generator 30 and the switch 32, which operates by controlling the timing of the transition of switch 32 from the off state to either the LR state or the AP state (indicated by trace 635) so that the jump from the off state to a small voltage does not cause any perceptible sensation to the object being treated, by ensuring that the transition coincides with a time window during which the instantaneous magnitude of the AC voltage generator's output is sufficiently small.
[0124] The perceived voltage threshold may vary from person to person and may depend on which part of the body is in contact with the transducer array. For example, in different parts of the body, a jump from the off state to 1V, 1.5V, 2V, 2.5V, 3V, 3.5V, 4V, 4.5V, or 5V may not be perceptible. Therefore, to prevent the switching from causing a perceptible sensation, the transition from the off state to either the LR state or the AP state should be timed to coincide with a time window during which the magnitude of the instantaneous output of the AC voltage generator is below those thresholds. In this technique, the output voltage of the AC voltage generator 30 can remain at its full steady-state value for 100% of the time, as shown by trace 630. In some preferred embodiments, the transition occurs when the instantaneous output of the AC voltage generator is less than 1V in magnitude.
[0125] For example, suppose the perception threshold for a given object is 5V, and the output of the AC voltage generator 30 is 100V pk-pk (meaning the instantaneous output value of the AC voltage generator 30 is in the range between +50V and -50V). The instantaneous output of the AC voltage generator will be less than 5V in magnitude for the first 5.7° of each 360° cycle, the middle 11.4° of each cycle, and the last 5.7° of each cycle. By limiting the switching of switch 32 from the off state to either the LR state or the AP state to these specific time windows, the signal 640 applied to the transducer array (25L / R or 25A / P) will not have any spikes greater than 5V in magnitude, which means they are not perceptible to the object. Note that when the AC voltage generator is operating at 200 kHz, 11.4° corresponds to 0.16 microseconds, and this window is long enough to facilitate synchronization by aligning the switching of switch 32 with the specific time window specified in this paragraph.
[0126] In some preferred embodiments, the switching of switch 32 from the off state to either the LR or AP state is limited to those time windows during which the instantaneous output of the AC voltage generator is less than 1V in magnitude. Assuming the same 100V pk-pk output voltage, the instantaneous output of the AC voltage generator will be less than 1V in magnitude at the first 1.1° of each cycle, the middle 2.2° of each cycle, and the last 1.1° of each cycle. By limiting the switching of switch 32 from the off state to either the LR or AP state to these specific time windows, the signal 640 applied to the transducer array (25L / R or 25A / P) will never have any spikes greater than 1V in magnitude. As will be understood by those skilled in the art, the timing of switch 32 can be adjusted similarly to other thresholds.
[0127] In the example shown in Figure 20, the output voltage of the AC voltage generator 30 remains at its full steady-state value for 100% of the time, as indicated by trace 630. In this situation, the signal 640 applied to the transducer array (25L / R or 25A / P) instantly jumps to its full steady-state output voltage as soon as it is turned on. Thus, the signal applied to the transducer arrays 25A / P and 25L / R is almost always at its full value. And, as described above, keeping the TTFields stronger for a larger proportion of the time can favorably improve the effectiveness of TTFields treatment. However, it should be noted that the output voltage of the AC voltage generator 30 during the very initial stages of the LR or AP state is not critical, and in alternative embodiments, it is also acceptable for the output voltage of the AC voltage generator to decrease to some extent. However, the output of the AC voltage generator 30 preferably reaches at least 80% of the steady-state output voltage of the AC voltage generator within 20 milliseconds after the electronic switch switches from the off state to either the LR or AP state. In some preferred embodiments, this occurs within 5 milliseconds. Also, in some preferred embodiments, this occurs within 1 millisecond.
[0128] When switch 32 switches back from either the LR state or the AP state to the OFF state, it is preferable to perform a similar synchronization of the switching of switch 32 to the smaller magnitude portion of the output sine wave of the AC voltage generator (i.e., magnitude 1V, 1.5V, 2V, 2.5V, 3V, 3.5V, 4V, 4.5V, or 5V or less).
[0129] Figure 21 shows a second technique for achieving synchronization between the AC voltage generator 30 and the switch 32 in Figure 18. This technique operates by reducing the instantaneous output voltage of the AC voltage generator 30 to less than 5V in magnitude before the switch 32 switches from the off state to either the LR state or the AP state, in order to prevent spikes from appearing in the conductors connected to the transducer arrays 25L / R and 25A / P when the switch 32 switches states. In some preferred embodiments, the instantaneous output voltage of the AC voltage generator 30 is reduced to less than 1V in magnitude (e.g., to 0V) before the switch 32 switches.
[0130] Reducing the output voltage of the AC voltage generator 30 to 0V is easily achieved when any of the embodiments described above in relation to Figures 1 to 6 and Figures 10 to 12 is used as the AC voltage generator. For example, when the AC voltage generators of Figures 1 and 2 are used, their output can be set to zero by ensuring that neither the first nor the second control signal is applied to the control input of the power switcher 60, which means that all switches in the power switcher 60 (i.e., switches 61 to 64) remain off. Similarly, when the AC voltage generators of Figures 5 and 6 are used, their output can be set to zero by sending a control signal to the power switcher 60B that switches all switches in the power switcher 60B (i.e., switches 61 to 66) off.
[0131] In Figure 21, the upper trace 650 shows the output of the AC voltage generator 30, the middle trace 655 shows the state of the switch 32, and the lower trace 660 shows one of the outputs (LR or AP) of the switch 32. Assume that the switch 32 starts in the OFF state, and at t20, the switch 32 is set to route the output of the AC voltage generator 30 to either the LR pair 25L / R of the transducer array or the AP pair 25A / P of the transducer array. At some point before t20, a control signal is sent to the AC voltage generator 30 to reduce its output voltage to zero. When the switch 32 is switched at t20, the output of the AC voltage generator 30 is 0V, so no spikes appear in the conductors connected to the transducer arrays 25L / R and 25A / P at that time.
[0132] After a short time interval (e.g., <0.1 milliseconds), at t21, the synchronous controller 35 (see Figure 18) begins to send a control signal to the AC voltage generator 30 (for example, as described above in relation to Figures 1-6 and 10-12), which causes the AC voltage generator 30 to begin generating a sine wave 650. Due to the configuration of the AC voltage generator (for example, as described above in relation to Figures 1-6 and 10-12), particularly the output filter 80 / 80B in the embodiments of Figures 1-5, the AC voltage generator 30 does not introduce any spikes in output 650 at t21, so the spikes do not propagate to output 660. Also, since switch 32 has already settled into its current state, switch 32 does not introduce any spikes in output 660 (supplied to transducer array 25L / R or 25A / P) at t21.
[0133] In particular, as shown in Figure 21, the output voltage 650 of the AC voltage generator 30 preferably jumps immediately to its full steady-state output voltage without a ramp-up period. Thus, the signals applied to the transducer arrays 25A / P, 25L / R are almost always at their full value. And, as described above, keeping the TTFields stronger for a larger proportion of time can favorably improve the effectiveness of the TTFields treatment. Figure 22 shows an immediate jump to the full steady-state output voltage on a longer time scale, which is in stark contrast to the prior art configuration shown in Figure 16. However, it should be noted that the output voltage of the AC voltage generator 30 during the very early stages of the LR or AP state is not critical, and in alternative embodiments, it is acceptable if the output voltage of the AC voltage generator does not jump immediately to its full steady-state voltage. However, the output of the AC voltage generator 30 should preferably reach at least 80% of the steady-state output voltage of the AC voltage generator within 20 milliseconds after the electronic switch switches from the off state to either the LR or AP state. In some preferred embodiments, this occurs within 5 milliseconds. Furthermore, in some preferred embodiments, this occurs within 1 millisecond.
[0134] Figure 21 also shows an exemplary technique for synchronizing the AC voltage generator 30 and switch 32 when switching from either the LR state or the AP state to the OFF state. At time t22, the AC voltage generator 30 is generating a sine wave at its fully steady-state output voltage, and switch 32 remains configured to route the output of the AC voltage generator 30 to either the LR pair of transducer array 25L / R or the AP pair of transducer array 25A / P. At time t23, the controller stops generating the signal to the power switcher 60 / 60B (as described above in relation to Figures 1-6 and 10-12), which drops the output of the AC voltage generator 30 to 0V. Also, due to the AC voltage generator configuration described above, no spike appears at output 650 at t23, which means no spike appears at output 660 of switch 32. After a short time interval (e.g., <0.1 milliseconds), at t24, switch 32 is set to the OFF state. Furthermore, since the output of the AC voltage generator 30 is 0V at t24, no spikes are introduced into the conductor extending between the switch 32 and the transducer array 25 at t24.
[0135] In the embodiments described above with reference to Figures 18 and 19, the switch 32 (a) routes the output of the AC voltage generator 30 to the left and right transducer arrays (25L / R) for a duration T, and then (b) routes the output of the AC voltage generator 30 to the front and rear transducer arrays (25A / P) for a duration T, and then repeats steps (a) and (b) in an alternating sequence. A short time period (e.g., 5 to 10 milliseconds) in which the output of the AC voltage generator 30 is not routed to any pair of transducer arrays is inserted between each step. This is choreographed by repeatedly adjusting the control input of the switch 32 so that the LR mode, AP mode, and off mode cycle through the following repeating sequence: (1) LR mode, (2) off mode, (3) AP mode, and (4) off mode.
[0136] In the variations of these embodiments, the off-mode (i.e., a short period of time during which the output of the AC voltage generator 30 is not routed to any pair of transducer arrays) is omitted. In this variation, the switch 32 (a) routes the output of the AC voltage generator 30 to the left and right transducer arrays (25L / R) for a duration T, and then (b) routes the output of the AC voltage generator 30 to the front and rear transducer arrays (25A / P) for a duration T, and then repeats steps (a) and (b) in an alternating two-step sequence. This is choreographed by repeatedly adjusting the control input of the switch 32 so that the LR mode and AP mode cycle through the following repeating sequence: (1) LR mode, (2) AP mode.
[0137] In this variant, where the off mode is omitted, the duration T can also be much shorter than 1 second for the same reasons described above. And here again, in contrast to the situation described above in relation to Figures 17A / 17B, regardless of how short the duration T is, the system operates at its full output voltage for a large proportion of the time (e.g., 100% of the time).
[0138] The transitions of switch 32 from the LR state to the AP state, and from the AP state to the LR state, are timed to coincide with a time window during which the instantaneous magnitude of the AC voltage generator output is sufficiently small so as not to cause any perceptible sensation to the object being treated. More specifically, the transition between the LR state and the AP state should be timed to coincide with a time window during which the instantaneous magnitude of the AC voltage generator output is below the same threshold as described above in the embodiments of Figures 18-20, which include an off state (for example, at the first 1.1° of each cycle, the middle 2.2° of each cycle, and the last 1.1° of each cycle).
[0139] Figure 23 shows an example of timing to synchronize the transition of switch 32 (shown in Figure 18) between the LR state (shown by trace 675 in Figure 23) and the AP state (shown by trace 670 in Figure 18) with the output of AC voltage generator 30 (shown in Figure 18), such that the transition between the LR state and the AP state coincides with a time window during which the instantaneous magnitude of the output of AC voltage generator 30 (trace 675) is close to zero (e.g., <5V or <1V).
[0140] The embodiments described above, in relation to Figures 18 to 22, advantageously allow the transducer array to be driven at full power for a much longer period of time than was possible in prior art systems, without the risk of introducing voltage spikes that could cause unpleasant sensations in the person being treated. Furthermore, driving the transducer array at full power can advantageously enhance the effectiveness of treatments using TTFields.
[0141] Finally, while the embodiments described above in relation to Figures 18-23 discuss switching an AC voltage between a first pair of transducer arrays positioned on the front / rear of the relevant body part and a second pair of transducer arrays positioned on the front / rear of the relevant body part, this technique can be extended to three or more pairs of transducer arrays. For example, a third pair of transducer arrays may be positioned above / below the relevant body part, in which case the AC voltage is switched in a repeating sequence between the first, second, and third pairs of transducer arrays in a manner similar to the switching described above in relation to Figures 18-23.
[0142] Although the present invention is disclosed with reference to specific embodiments, numerous modifications, alterations, and changes are possible to the embodiments described without departing from the scope and scope of the invention, as defined in the appended claims. Therefore, the present invention is not limited to the embodiments described and is intended to have the entire scope as defined by the following claims and equivalents. [Explanation of Symbols]
[0143] 20 AC voltage generator 22 switches 25A Transducer Array 25L transducer array 25P transducer array 25R Transducer Array 30 AC voltage generator 32 switches 35 Synchronization Controller 40 Controllers, Programmable Controllers 40B Controller 40C Controller 42 Digital-to-Analog Converter (DAC), DAC 50 DC power supply, DC-to-DC converter, first DC-to-DC converter 51 DC-DC converter, first DC-DC converter 52 DC-DC converter, second DC-DC converter 50B DC-DC converter, second DC-DC converter 60 Power Switcher 60B Power Switcher, Power Switch 61 Electronically controlled switches, switches 62 Electronically controlled switches, switches 63 Electronically controlled switches, switches 65 Electronically controlled switches, switches 66 Electronically controlled switches, switches 64 Electronically controlled switches, switches 68 Control Inputs 70 Transformer 80 Output Filters 80B output filter 82 Inductor, First Inductor 83 Capacitors 85 blocks 92 Voltage sensing circuit, circuit 94 Current sensing circuit, circuit 100 output, output signal 100B output 100C output waveform 110 sine wave 112 Oversampled version, waveform 115 Sine wave output waveform, output waveform 120 sine wave 122 Oversampled Version 215 Output waveform, high-frequency artifacts 220 dashed line 222 dashed line 315 Output waveform 410 traces 420 traces 430 traces, output waveform 520 Instantaneous Output Voltage 525 traces 530 traces 532 Spikes 540 traces 550 traces 630 traces 635 trace 640 signal 650 traces, sine wave, output, output voltage 655 traces 660 traces, output 675 traces
Claims
1. A device for generating a sine wave of frequency f, wherein the device is A DC power supply having a voltage control input for setting the output voltage of the DC power supply, A transformer having a primary side and a secondary side, A power switch having a control input, wherein when a first control signal is applied to the control input, the power switch applies the output voltage of the DC power supply to the primary side of the transformer in a first direction; when a second control signal is applied to the control input, the power switch applies the output voltage of the DC power supply to the primary side of the transformer in a second direction; and when neither the first nor the second control signal is applied to the control input, the power switch remains off, and the second direction is opposite to the first direction. A controller programmed to (a) apply the first control signal to the control input for a duration of T / 3, then (b) wait for a duration of T / 6, then (c) apply the second control signal to the control input for a duration of T / 3, then (d) wait for a duration of T / 6, and then continuously repeat the sequence (a), (b), (c), and (d), where T is the reciprocal of the frequency f, and An output filter connected to the secondary side of the transformer, wherein the output filter allows the frequency f to pass through and attenuates frequencies above the cutoff frequency, and Equipped with, The controller is further programmed to control the amplitude of the sine wave of the frequency by adjusting a third control signal applied to the voltage control input of the DC power supply, and the controller is further programmed to prevent the adjustment of the third control signal from occurring when either the first control signal or the second control signal is applied to the control input. Device.
2. The apparatus according to claim 1, wherein the cutoff frequency is between 2f and 4f, and the output filter has a transfer function that is zero at 5f.
3. A device for generating a sine wave of frequency f, wherein the device is n DC power supplies, each of the n DC power supplies having a voltage control input for setting the output voltage of the respective power supply, where n is a positive integer, and A power switch having an output terminal and a control input, wherein the power switch is configured to (a) route one selected output from the n DC power supplies to the output terminal with a selected polarity according to 2n states of a control signal applied to the control input, or (b) remain off according to an additional state of the control signal. A controller programmed to control the generation of an oversampled version of a sine wave by routing each of the n DC power supplies to the output terminal of the power switch with the selected polarity at timings in a sequence such that the output voltages of the n DC power supplies are set to the level present in the oversampled version of the sine wave, and then the control signals are sequenced through the 2n states and the additional states to generate the oversampled version of the sine wave, wherein each of the n DC power supplies is routed to the output terminal of the power switch with the selected polarity. An output filter for filtering the current coming from the output terminal of the power switch, wherein the output filter allows the frequency f to pass through and attenuates frequencies above the cutoff frequency, and Equipped with, The controller is programmed to control the amplitude of the sine wave by adjusting the output voltages of the n DC power supplies via the voltage control input, and the controller is further programmed not to adjust the output voltages of the DC power supplies while the outputs of the DC power supplies are routed to the output terminals of the power switch. Device.
4. The apparatus according to claim 3, further comprising a transformer having a primary side connected to the output terminal of the power switch and a secondary side connected to the output filter, wherein the transformer is configured such that the current from the output terminal of the power switch reaches the output filter via the transformer.
5. n=1 means that only a single DC power source exists. Apparatus according to claim 3, wherein the controller is programmed to control the generation of the oversampled version of the sine wave by (a) applying a first control signal to the control input for a duration of T / 3 to cause the power switch to route the output of the single DC power supply to the output terminal with a first polarity, then (b) waiting for a duration of T / 6, then (c) applying a second control signal to the control input for a duration of T / 3 to cause the power switch to route the output of the single DC power supply to the output terminal with a second polarity opposite to the first polarity, then (d) waiting for a duration of T / 6, and then continuously repeating the sequence (a), (b), (c), and (d), where T is the reciprocal of the frequency f.
6. The apparatus according to claim 5, wherein the cutoff frequency is between 2f and 4f, and the output filter has a transfer function that is zero at 5f.
7. The apparatus according to claim 3, wherein n > 1, and the controller is further programmed to control the amplitude of the sine wave by adjusting the output voltages of the n DC power supplies via the voltage control input, while maintaining a constant ratio between the output voltages of each of the n DC power supplies.
8. The apparatus according to claim 7, wherein the output filter has a transfer function that has zeros at the frequency in which the harmonics of the frequency f are expected to contain power.
9. A method for generating a sine wave of frequency f, wherein the method is A step of setting n DC power supplies to their respective output voltages, where n is a positive integer, and a step of The steps include generating an oversampled version of a sine wave, where N = 2 + 4n, sampled N times per cycle using equally spaced samples including a sampling point at 0°, by setting the output voltages of the n DC power supplies to the levels present in the oversampled version of the sine wave, and then, at timings in the sequence that generates the oversampled version of the sine wave, switching the output voltages of the n DC power supplies to the outputs in the controlled sequence so that each of the n DC power supplies is switched to the output in each direction; and A step of filtering the oversampled version of the sine wave so as to pass a frequency f and attenuate frequencies above a cutoff frequency, wherein the filtering implements a transfer function that has zeros at frequencies in which harmonics of the frequency f are expected to contain power. Includes, The amplitude of the sine wave is controlled by adjusting the output voltages of the n DC power supplies, and adjustment of the output voltage of one of the DC power supplies is prevented while one of the DC power supplies is switched to the output. method.
10. The method according to claim 9, wherein n=1, which means that only a single DC power supply is present, and the adjustment of the output voltage of the single DC power supply occurs only during times when the output of the single DC power supply is not switched to the output.
11. The method according to claim 9, wherein the filtering implements a transfer function that has zeros at frequencies in which harmonics of the frequency f are expected to contain power.
12. A device for generating an output waveform of frequency f, wherein the device is A first DC power supply having a first voltage control input for setting the output voltage of the first DC power supply, A second DC power supply having a second voltage control input for setting the output voltage of the second DC power supply, A power switch having an output terminal and a control input, wherein the power switch is configured to (a) route the output of a first DC power supply to the output terminal with a first polarity depending on a first state of the control input, (b) route the output of the first DC power supply to the output terminal with a second polarity depending on a second state of the control input, (c) route the output of a second DC power supply to the output terminal with a first polarity depending on a third state of the control input, (d) route the output of a second DC power supply to the output terminal with a second polarity depending on a fourth state of the control input, and (e) remain off depending on an additional state of the control input, wherein the second polarity is the opposite of the first polarity, An output filter for filtering the current coming from the output terminal of the power switch, wherein the output filter allows the frequency f to pass through and attenuates frequencies above the cutoff frequency, A controller, wherein the controller is programmed to operate in a first mode that sets the control input to a first and second state in an alternating sequence while maintaining the output voltage of the first DC power supply constant via the first voltage control input, and the controller is further programmed to operate in a second mode that sets the control input to a third and fourth state in an alternating sequence while maintaining the output voltage of the second DC power supply constant via the second voltage control input. Equipped with, The controller is further programmed to cause a change in the amplitude of the output waveform by, when the controller is operating in the first mode, adjusting the output voltage of the second DC power supply via the second voltage control input, and then switching the controller to the second mode. The controller is further programmed, when the controller is operating in the second mode, to adjust the output voltage of the first DC power supply via the first voltage control input, and then switch the controller to the first mode, thereby causing a change in the amplitude of the output waveform. Device.
13. The output waveform is a sine wave. The setting of the control input to the first and second states in the alternating sequence includes (a) placing the control input in the first state for a duration of T / 3, then (b) waiting for a duration of T / 6, then (c) placing the control input in the second state for a duration of T / 3, then (d) waiting for a duration of T / 6, and then continuously repeating the sequence (a), (b), (c), and (d). The setting of the control input to the third and fourth states in the alternating sequence includes (e) placing the control input in the third state for a duration of T / 3, then (f) waiting for a duration of T / 6, then (g) placing the control input in the fourth state for a duration of T / 3, then (h) waiting for a duration of T / 6, and then continuously repeating the sequence (e), (f), (g), and (h). T is the reciprocal of the frequency f. The apparatus according to claim 12.
14. The controller is further programmed, when the controller is operating in the first mode, to cause a change in the amplitude of the output waveform by adjusting the second voltage control input at least 1 millisecond before switching the controller to the second mode. The controller is further programmed, when the controller is operating in the second mode, to cause a change in the amplitude of the output waveform by adjusting the first voltage control input at least 1 millisecond before the controller switches to the first mode. The apparatus according to claim 12.
15. The apparatus according to claim 12, further comprising a transformer having a primary side connected to the output terminal of the power switch and a secondary side connected to the output filter, wherein the current from the output terminal of the power switch reaches the output filter via the transformer.
16. The apparatus according to claim 15, wherein the power switch is configured to (a) route the output of the first DC power supply to the primary side of the transformer in a first direction according to the first state of the control input, (b) route the output of the first DC power supply to the primary side of the transformer in a second direction according to the second state of the control input, (c) route the output of the second DC power supply to the primary side of the transformer in a first direction according to the third state of the control input, (d) route the output of the second DC power supply to the primary side of the transformer in a second direction according to the fourth state of the control input, and (e) remain off according to the fifth state of the control input, the second direction being opposite to the first direction.
17. The apparatus according to claim 12, wherein the cutoff frequency is between 2f and 4f, and the output filter has a transfer function that has zero at 5f.
18. A method for generating an output waveform of frequency f, wherein the method is (b) a step of routing the output of a first DC power supply to the output terminal of the power switch with a first polarity, depending on a first state of the control input of the power switch; (c) a step of routing the output of the first DC power supply to the output terminal with a second polarity, depending on a second state of the control input; (d) a step of routing the output of the second DC power supply to the output terminal with a first polarity, depending on a third state of the control input; (e) a step of remaining off depending on an additional state of the control input, wherein the second polarity is opposite to the first polarity. A step of filtering the current coming from the output terminal of the power switch, wherein the filtering includes passing the frequency f and attenuating frequencies above the cutoff frequency. A step in which the control input is set to the first and second states in an alternating sequence while the output voltage of the first DC power supply is kept constant, The steps include: operating in a second mode in which the control input is set to the third and fourth states in an alternating sequence while keeping the output voltage of the second DC power supply constant; Includes, In the first mode, the change in the amplitude of the output waveform is caused by adjusting the output voltage of the second DC power supply and then switching to the second mode. In the second mode, the change in the amplitude of the output waveform is caused by adjusting the output voltage of the first DC power supply and then switching to the first mode. method.
19. The output waveform is a sine wave. The control input is set to the first and second states in the alternating sequence by (a) placing the control input in the first state for a duration of T / 3, then (b) waiting for a duration of T / 6, then (c) placing the control input in the second state for a duration of T / 3, then (d) waiting for a duration of T / 6, and then continuously repeating the sequence (a), (b), (c), and (d). The control input is set to the third and fourth states in the alternating sequence by (e) placing the control input in the third state for a duration of T / 3, then (f) waiting for a duration of T / 6, then (g) placing the control input in the fourth state for a duration of T / 3, then (h) waiting for a duration of T / 6, and then repeating the sequence (e), (f), (g), and (h) in succession. T is the reciprocal of the frequency f. The method according to claim 18.
20. In the first mode, the change in the amplitude of the output waveform is caused by adjusting the output voltage of the second DC power supply at least 1 millisecond before switching to the second mode. In the second mode, the change in the amplitude of the output waveform is caused by adjusting the output voltage of the first DC power supply at least 1 millisecond before switching to the first mode. The method according to claim 18.