Power control method and apparatus, repeater, and storage medium

Abstract

The present invention relates to a power control method and apparatus, a repeater, and a storage medium. The method comprises: acquiring a gain control parameter for performing automatic gain control on a baseband signal; identifying a target time slot type corresponding to the baseband signal; on the basis of the target time slot type, determining a power statistical duration corresponding to the target time slot type; acquiring a power statistical value of the baseband signal within the power statistical duration; and performing power control on the signal on the basis of the power statistical value and the gain control parameter.

Description

Power control method, device, repeater and storage medium

[0001] This disclosure claims priority to Chinese patent application number 202311723076.2, filed with the China Patent Office on December 13, 2023, entitled “Power Control Method, Device, Repeater and Storage Medium,” the entire contents of which are incorporated by reference into this disclosure. Technical Field

[0002] The present disclosure relates to a power control method, device, repeater and storage medium. Background Art

[0003] P25 is the abbreviation of Project 25, which was developed and promoted by the Association of Public Safety Communications Officials (APCO), the National Association of State Telecommunications Directors (NASTD), federal government users and the Telecommunications Industry Association (TIA) for all wireless operators to follow.

[0004] P25 signals are primarily used for private network communications. Currently, there are two main modulation technologies for P25 signals: Frequency Division Multiple Access (FDMA) and Time Division Multiple Access (TDMA). Due to the influence of the communication environment and distance, the received and transmitted signal power varies between different communication devices. Therefore, power control methods are required to stabilize the output and received power.

[0005] However, current power control for multi-mode P25 communication systems that coexist with FDMA and TDMA is still not perfect. Traditional power control solutions generally focus on signals of one standard and are unable to adapt to P25 signals of different standards. This affects signal demodulation and device output power in multi-mode P25 communication systems.

[0006] Summary of the Invention

[0007] In order to solve the above technical problems or at least partially solve the above technical problems, the present disclosure provides a power control method, device, repeater and storage medium.

[0008] A power control method, comprising:

[0009] Obtaining gain control parameters for performing automatic gain control on a baseband signal;

[0010] Identifying a target timeslot type corresponding to the baseband signal;

[0011] Determining, according to the target timeslot type, a power statistics duration corresponding to the target timeslot type;

[0012] Obtaining a power statistical value of the baseband signal during the power statistical time period;

[0013] Power control is performed on the signal based on the power statistics and the gain control parameter.

[0014] A power control device, comprising:

[0015] A parameter acquisition module is used to obtain gain control parameters for performing automatic gain control on a baseband signal;

[0016] A timeslot identification module, configured to identify a target timeslot type corresponding to the baseband signal;

[0017] A duration determination module, configured to determine, according to the target time slot type, a power statistics duration corresponding to the target time slot type;

[0018] A power acquisition module, configured to acquire a power statistical value of the baseband signal during the power statistics time period;

[0019] A power control module is configured to perform power control on the signal based on the power statistics and the gain control parameter.

[0020] A repeater includes a processor and a memory; the processor calls a program or instruction stored in the memory, so that the processor implements the steps of the power control method provided in any embodiment of the present disclosure.

[0021] A computer-readable storage medium stores computer-executable instructions. When the computer-executable instructions are executed by a processor, the processor implements the steps of the power control method provided in any embodiment of the present disclosure.

[0022] A computer program product includes computer-readable instructions, wherein when the computer-readable instructions are executed by a processor, the processor implements the steps of the power control method provided in any one embodiment of the present disclosure.

[0023] The details of one or more embodiments of the present disclosure are set forth in the accompanying drawings and the description below. Other features and advantages of the present disclosure will become apparent from the description, drawings, and claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] FIG1 is a schematic flow chart of a power control method according to one or more embodiments;

[0025] FIG2 is a schematic diagram of a timeslot signal frame format according to one or more exemplary embodiments;

[0026] FIG3 is a schematic flow chart of a power control method according to one or more embodiments;

[0027] FIG4 is a schematic flow chart of a power control method according to one or more embodiments;

[0028] FIG5 is a principle block diagram of a power control method according to one or more exemplary embodiments of the present disclosure;

[0029] FIG6 is a schematic diagram of a specific structure of a power control module according to one or more exemplary embodiments;

[0030] FIG7 is a schematic flow chart of a power control method according to one or more embodiments;

[0031] FIG8 is a schematic diagram of a process for identifying time slots of a signal according to one or more exemplary embodiments;

[0032] FIG9 is a schematic diagram illustrating a process of power control performed by a power control module according to one or more exemplary embodiments;

[0033] FIG10 is a schematic structural diagram of a power control device according to one or more embodiments. DETAILED DESCRIPTION

[0034] In view of the fact that general power control methods cannot fully adapt to multi-standard P25 communication systems where FDMA and TDMA coexist, P25 signals of different standards cannot stably output and receive power, affecting the demodulation of P25 signals and the dynamic range of device power output, the present disclosure provides a power control scheme to solve the problem that the error vector magnitude (EVM) of the signal is poor when power controlling multi-standard P25 signals, resulting in the inability to demodulate the signal; in addition, the two signal modulation technologies of P25 signals are single-slot signals when FDMA signal modulation technology is adopted, and dual-slot signals (including 2 slots, 4 slots, etc.) when TDMA signal modulation technology is adopted. In addition, interference background noise is also involved. That is, in a multi-standard P25 system, the power control method must simultaneously adapt to the interference background noise, single-slot signals and dual-slot signals to solve the problem that the power difference between time slots of multi-slot signals is large, resulting in a reduction in the dynamic range of device output power. In the scheme disclosed herein, the multi-standard P25 signal in which FDMA and TDMA coexist is converted into a P25 signal divided into a single-slot signal and a multi-slot signal. This scheme controls the power output of the single-slot signal and the multi-slot signal by identifying the time slot type of the P25 signal and selecting a power control scheme with different power statistical durations. Power control can be quickly achieved for signals in different time slots without affecting signal demodulation.

[0035] The disclosed solution is not limited to power control between time slots but can also be applied to power control between multiple carriers, eliminating the impact of the near-far effect between carriers. For situations where power differences between different time slots or carriers are large, this solution uses power control to achieve rapid attenuation of high-power time slot signals and rapid amplification of low-power time slot signals, ultimately outputting signals stably at the set power level. This achieves rapid attenuation and low bit error rates, thereby resolving the issue of a device's reduced power output dynamic range due to excessive attenuation of low-power signals when power differences between different time slots or carriers are large, and minimizing the impact of the near-far effect between users.

[0036] The following describes the implementation of the embodiments of the present disclosure in detail by taking the most commonly used single-slot signal and dual-slot signal in the multi-standard P25 signal as an example with reference to the accompanying drawings.

[0037] Figure 1 is a schematic flow chart of a power control method according to one or more embodiments. This method can be performed by a power control device provided by an embodiment of the present disclosure. The power control device can be implemented using software and / or hardware and integrated into an electronic device. For example, the electronic device can be a repeater that receives signals of multiple formats. The signals received by the repeater can be single-slot or dual-slot signals. The following uses the power control method of the present disclosure applied to a repeater as an example to illustrate the present disclosure.

[0038] As shown in FIG1 , the power control method may include the following steps:

[0039] Step 101: Obtain a gain control parameter for performing automatic gain control on a baseband signal.

[0040] The baseband signal may be a digital signal obtained by performing analog-to-digital conversion on a received analog signal.

[0041] For example, when a repeater receives an analog signal from another device, it can convert the analog signal into a digital signal. For example, the analog signal can be converted into a digital signal by the repeater's analog-to-digital conversion module. The automatic gain control (AGC) module can then perform automatic gain control on the digital signal and obtain the gain control parameters sent by the AGC module.

[0042] Step 102: Identify the target time slot type corresponding to the baseband signal.

[0043] In the embodiment of the present disclosure, after a baseband signal is obtained through analog-to-digital conversion, time slot identification may be performed on the baseband signal to determine a target time slot type corresponding to the baseband signal.

[0044] Taking the multi-standard P25 signal as an example, the P25 dual-slot signal uses TDMA technology, which divides time into periodic frames and then divides each frame into two time slots. For example, it can be a signal using two time slots (Dual Slot), or a signal using four time slots (Quad Slot), or a signal using other time slots. As long as it uses TDMA technology, it can be determined to be a dual-slot type; the time slot signal frame format is shown in Figure 2. The duration of each frame is 60ms, and each frame is divided into two time slots, each time slot is 30ms. The two time slots can accommodate two users communicating at the same time without affecting each other. The single-slot signal is a signal that only transmits one user within 60ms. In the embodiment of the present disclosure, the baseband signal is first time slot identified to identify whether the baseband signal is single-slot or dual-slot.

[0045] As an example, when performing time slot identification, the difference between the maximum power value and the minimum power value of the digital baseband signal of a certain time length can be counted, and the difference can be compared with a preset power threshold. If the difference is less than the power threshold, the target time slot type of the signal is determined to be a single time slot; otherwise, the target time slot type of the signal is determined to be a dual time slot.

[0046] In an optional embodiment of the present disclosure, before performing time slot identification on the signal, the signal may be down-converted to baseband frequency, down-sampled, and filtered, and then time slot identification may be performed on the processed signal.

[0047] Step 103: Determine the power statistics duration corresponding to the target time slot type according to the target time slot type.

[0048] In the embodiment of the present disclosure, after the target time slot type corresponding to the signal is determined, the power statistics duration corresponding to the target time slot type can be determined according to the target time slot type.

[0049] Exemplarily, different power statistics durations can be set in advance for different time slot types, for example, the power statistics duration of a single time slot is set longer than that of a double time slot, and then the corresponding power statistics duration is determined based on whether the target time slot type is a single time slot or a double time slot.

[0050] Step 104: Obtain a power statistic value of the baseband signal during the power statistics duration.

[0051] In the embodiment of the present disclosure, after the power statistics duration corresponding to the target time slot type is determined, power statistics may be performed based on the power statistics duration to obtain a power statistics value.

[0052] Illustratively, a duration parameter of an automatic level control (ALC) circuit may be set based on the determined power statistics duration, so that the ALC circuit performs power statistics based on the power statistics duration to obtain a power statistics value, which is then acquired from the ALC circuit.

[0053] Step 105: Perform power control on the signal based on the power statistics and the gain control parameter.

[0054] In the embodiment of the present disclosure, after the power statistics are obtained, power control of the signal can be performed based on the power statistics and the obtained gain control parameters.

[0055] As an example, if the power statistic obtained is less than the preset power threshold, the signal can be power controlled according to the preset coefficient, and the preset coefficient is multiplied by the signal to obtain the power-controlled signal and output to the subsequent module for processing. If the power statistic obtained is not less than the preset power threshold, the current coefficient (initialized as the preset coefficient) and the current power value (initialized as the power statistic) can be updated according to the preset coefficient adjustment step and power adjustment step on the basis of the preset coefficient and the power statistic, until the current power value is less than the preset power threshold, the current coefficient is no longer updated, and the gain control parameter is added to the coefficient address corresponding to the preset coefficient to obtain a new coefficient address, and the new coefficient corresponding to the new coefficient address is determined, and the signal is power controlled according to the smaller value of the new coefficient and the current coefficient. The above control process is only an example, and other power control strategies can also be used to control the power of the signal, which will be described in detail in subsequent embodiments.

[0056] In an optional embodiment of the present disclosure, corresponding to the aforementioned optional embodiment of down-converting the signal to baseband 0 frequency, down-sampling and filtering, in this embodiment, after the signal is power controlled, the power-controlled signal can also be subjected to at least one of up-sampling and up-conversion, and then the processed signal is converted into an analog signal and sent to subsequent modules for processing.

[0057] The power control method of the embodiment of the present disclosure obtains the gain control parameter for automatic gain control of the baseband signal, identifies the target time slot type corresponding to the baseband signal, and then determines the power statistics duration corresponding to the target time slot type according to the target time slot type, then obtains the power statistics value of the baseband signal during the power statistics duration, and finally performs power control on the signal based on the power statistics value and the gain control parameter. Using the scheme of the present disclosure, by identifying the time slot type of the received signal, different power statistics durations are determined according to different time slot types, and then subsequent power control is performed, achieving power control by selecting different power control schemes for different time slot types. Power control can be quickly achieved for signals of different time slot types without affecting signal demodulation. It can also be compatible with power control of different P25 standards. By obtaining the gain control parameter for automatic gain control of the signal and participating in the power control, it achieves the effect of attenuating large signals and amplifying small signals, solving the problem that when the power difference between different signals is large, the small power signal is attenuated too much, affecting the power output dynamic range of the device.

[0058] In an optional embodiment of the present disclosure, as shown in FIG3 , based on the embodiment shown in FIG1 , step 102 may include the following sub-steps:

[0059] Step 200: Preset a noise floor address threshold and a power address threshold of a baseband signal.

[0060] In the embodiment of the present disclosure, the noise floor address threshold and the power address threshold of the baseband signal can be set according to actual needs, and the present disclosure does not limit their specific values.

[0061] Step 201: Obtain the power value of the baseband signal counted a preset number of times within a preset time period.

[0062] The preset duration and the preset number of times can be set according to actual needs. For example, the preset duration can be set to 5ms (milliseconds) and the preset number of times can be set to 13 times.

[0063] For example, assuming that the preset duration is 5 ms and the preset number of times is 13, the power value statistics of the 5 ms digital baseband signal may be performed 13 times in total to obtain 13 power values.

[0064] Step 202: Look up the power address corresponding to each power value.

[0065] For example, the power address corresponding to each power value can be found based on a preset power table, wherein the power table records the correspondence between different power addresses and power values, the power address is equivalent to the number of the corresponding power value, and one power value corresponds to a unique power address.

[0066] In the embodiment of the present disclosure, after obtaining multiple power values, a power table may be queried to determine the power address corresponding to each of the multiple power values ​​obtained statistically, thereby obtaining multiple power addresses.

[0067] For example, assuming that 13 power values ​​are statistically obtained, 13 power addresses can be determined by querying the power table and comparing the 13 power values ​​with the power values ​​in the power table.

[0068] Step 203: Determine the address difference between the maximum power address and the minimum power address in the power addresses.

[0069] In the embodiment of the present disclosure, after multiple power addresses are determined, a maximum power address and a minimum power address can be determined from the multiple power addresses, and the difference between the maximum power address and the minimum power address can be calculated to obtain an address difference.

[0070] Step 204: determine whether the power address is greater than the noise floor address threshold.

[0071] In the embodiment of the present disclosure, after determining the power addresses corresponding to each power value, each power address can be compared with the noise floor address threshold. If each determined power address is greater than the noise floor address threshold, step 205 or step 206 is executed, and the target time slot type of the baseband information is determined based on the relationship between the address difference and the power address threshold. If at least one power address is not greater than the noise floor address threshold, it is determined that the power address is not greater than the noise floor address threshold, and step 207 is executed.

[0072] Step 205: In response to the address difference being greater than the power address threshold, determining that the target time slot type of the baseband signal is a dual time slot; wherein the target time slot type includes a dual time slot and a non-dual time slot.

[0073] Step 206 : In response to the address difference being not greater than the power address threshold, determining that the target time slot type of the baseband signal is a non-double time slot; wherein the non-double time slot includes a single time slot and a noise floor.

[0074] In the disclosed embodiment, when all power addresses are greater than the noise floor address threshold, a further determination is made as to whether the address difference is greater than the power address threshold. If the address difference is greater than the power threshold address, the target time slot type of the baseband signal is determined to be a dual time slot. If the address difference is not greater than the power address threshold, the target time slot type of the baseband signal is determined to be a non-dual time slot, more specifically, a single time slot within a non-dual time slot.

[0075] Step 207 determines whether the target time slot type corresponding to the baseband signal is a non-dual time slot; non-dual time slots include single time slots and noise floor. In the disclosed embodiment, if the power address is not greater than the noise floor address threshold, the target time slot type corresponding to the baseband signal is determined to be a non-dual time slot. More specifically, the target time slot type of the baseband signal is determined to be a noise floor in a non-dual time slot.

[0076] The power control method of the embodiment of the present disclosure presets a noise floor address threshold and a power address threshold of the baseband signal, obtains the power value of the baseband signal counted a preset number of times within a preset time length, searches for the power address corresponding to each power value, and determines the address difference between the maximum power address and the minimum power address in the power address. When the power address is greater than the noise floor address threshold, if the address difference is greater than the power address threshold, the target time slot type of the baseband signal is determined to be a dual time slot; if the address difference is not greater than the power address threshold, the target time slot type of the baseband signal is determined to be a non-dual time slot; when the power address is not greater than the noise floor address threshold, the target time slot type corresponding to the baseband signal is determined to be a non-dual time slot. Thus, the target time slot type corresponding to the signal can be accurately identified, providing conditions for subsequent accurate power control.

[0077] Furthermore, in an optional embodiment of the present disclosure, when determining the power statistics duration corresponding to the target time slot type according to the target time slot type, if the determined target time slot type is a dual time slot, the corresponding power statistics duration is determined to be the first duration; if the determined target time slot type is a non-dual time slot, the corresponding power statistics duration is determined to be the second duration, and the second duration is greater than the first duration. For example, when the target time slot type is a dual time slot, the power statistics duration can be determined to be 25μs (microseconds); when the target time slot type is a single time slot or background noise, the power statistics duration can be determined to be 5ms. Thus, by setting different power statistics durations for different time slot types for power control, different power control schemes are used to control the output power for signals of different time slot types, thereby being able to adapt to P25 signals of different standards.

[0078] In an optional implementation of the present disclosure, as shown in FIG4 , based on the above embodiment, step 105 may include the following sub-steps:

[0079] Step 301: Obtain the initial address of the coefficients of the baseband signal.

[0080] The coefficient initial address can be set according to actual needs, and the present disclosure does not limit its specific value.

[0081] Step 302: Determine candidate coefficient addresses based on power statistics.

[0082] In an optional embodiment of the present disclosure, when determining the candidate coefficient address, a preset noise floor power threshold can be first obtained, wherein the noise floor power threshold can be set according to actual needs. Then, it can be determined whether the power statistic is less than the noise floor power threshold. If the power statistic is less than the noise floor power threshold, the initial address of the coefficient is determined to be the candidate coefficient address; if the power statistic is not less than the noise floor power threshold, the high power threshold judgment step is performed. For example, assuming that the initial address of the coefficient is 50, if the power statistic is less than the noise floor power threshold, the candidate coefficient address is determined to be 50; if the power statistic is not less than the noise floor power threshold, the high power threshold judgment step is performed.

[0083] In an optional embodiment of the present disclosure, the high power threshold determination step includes: presetting a low power threshold address and a high power threshold address. The specific values ​​of the low power threshold address and the high power threshold address can be set according to actual needs. The difference between the low power threshold address and the high power threshold address is the preset address value, which is not limited by the present disclosure. The low power threshold address refers to the power address corresponding to the low power threshold of the ALC circuit in the repeater station. The high power threshold address = the low power threshold address + the preset address value. Assuming that the high power threshold address is 2 greater than the low power threshold address, and that an increase of 1 in the address increases the power by 0.5dB (i.e., a power step of 0.5dB), the high threshold power is 1dB greater than the low threshold power. Next, it can be determined whether the power statistic is greater than the high power corresponding to the high power threshold address. If the power statistic is not greater than the high power corresponding to the high power threshold address, and the power statistic is greater than the low power corresponding to the low power threshold address, the initial coefficient address is determined to be a candidate coefficient address.

[0084] In an optional embodiment of the present disclosure, the high power threshold judgment step includes: obtaining the current coefficient address, the preset maximum value of the power threshold address and the minimum value of the coefficient address, wherein the initial value of the current coefficient address is the coefficient initial address, and the specific values ​​of the maximum value of the power threshold address and the minimum value of the coefficient address can be set according to actual needs, and the present disclosure does not impose any restrictions on this. Then, it can be judged whether the power statistic is greater than the high power corresponding to the high power threshold address. If the power statistic is not greater than the high power corresponding to the high power threshold address, the low power threshold judgment step is performed. If the power statistic is greater than the high power corresponding to the high power threshold address, the current coefficient address is further compared with the minimum value of the coefficient address, and / or the current low power threshold address is compared with the maximum value of the power threshold address.

[0085] It is understood that when the current coefficient address is compared with the minimum value of the coefficient address for the first time, the current coefficient address is the initial coefficient address, and when the current low power threshold address is compared with the maximum value of the power threshold address for the first time, the current low power threshold address is the preset low power threshold address. In other words, the initial value of the current coefficient address is the initial coefficient address, and the initial value of the current low power threshold address is the preset low power threshold address. If the current coefficient address is not equal to the minimum value of the coefficient address and the current low power threshold address is not equal to the maximum value of the power threshold address, the current coefficient address and the high power threshold address are updated; in response to the current coefficient address being equal to the minimum value of the coefficient address and / or the current low power threshold address being equal to the maximum value of the power threshold address, the current coefficient address is determined as a candidate coefficient address.

[0086] In an optional embodiment of the present disclosure, when updating the current coefficient address and the high-power threshold address, the current coefficient address can be stepped by a first preset value, and the high-power threshold address can be stepped by a second preset value, to obtain an updated current coefficient address and an updated high-power threshold address. Thereafter, the process returns to the above-described high-power threshold determination step to continue determining whether the power statistic is greater than the high power corresponding to the updated high-power threshold address. The first preset value and the second preset value can be set according to actual needs. For example, the first preset value can be set to -1, and the second preset value can be set to +1.

[0087] In an optional embodiment of the present disclosure, the low power threshold determination step includes: obtaining a preset maximum value of a coefficient address, wherein the maximum value of the coefficient address can be pre-set according to actual needs, determining whether the power statistic is greater than the low power corresponding to the low power threshold address, and if the power statistic is not greater than the low power corresponding to the low power threshold address, further comparing the current coefficient address with the maximum value of the coefficient address, and / or determining whether the current low power threshold address is 0. It can be understood that when the current coefficient address is compared with the maximum value of the coefficient address for the first time, the current coefficient address is the coefficient initial address, and when it is determined for the first time whether the current low power threshold address is 0, the current low power threshold address is the aforementioned preset low power threshold address, that is, the initial value of the current coefficient address is the coefficient initial address, and the initial value of the current low power threshold address is the preset low power threshold address. If the current coefficient address is not equal to the maximum value of the coefficient address and the current low power threshold address is not 0, the current coefficient address and the low power threshold address are updated; in response to the current coefficient address being equal to the maximum value of the coefficient address, and / or the current low power threshold address being 0, the current coefficient address is determined as a candidate coefficient address.

[0088] In an optional embodiment of the present disclosure, when updating the current coefficient address and the low-power threshold address, the current coefficient address may be stepped by a third preset value, and the low-power threshold address may be stepped by a fourth preset value, to obtain updated current coefficient address and low-power threshold address. Thereafter, the process returns to the aforementioned low-power threshold determination step to continue determining whether the power statistic is greater than the low power corresponding to the updated low-power threshold address. The third preset value and the fourth preset value may be set based on actual needs. For example, the third preset value may be set to +1, and the fourth preset value may be set to -1.

[0089] Step 303: Determine the target coefficient address according to the candidate coefficient address, the coefficient initial address and the gain control parameter.

[0090] In an optional embodiment of the present disclosure, the maximum post-amplification threshold address of the baseband signal can be obtained, the sum of the coefficient initial address and the gain control parameter can be calculated, and the smaller of the candidate coefficient address and the sum can be determined as the new coefficient address. Finally, the new coefficient address and the maximum post-amplification threshold address are compared, and the smaller of the new coefficient address and the maximum post-amplification threshold address can be determined as the target coefficient address. The post-amplification value is the gain released in the ALC module after the AGC module attenuates the gain, which can be understood as attenuating the gain in the analog domain before analog-to-digital conversion and releasing the gain in the digital domain after analog-to-digital conversion. The maximum post-amplification threshold address is the address corresponding to the maximum value in the post-amplification threshold.

[0091] Step 304: Power control the baseband signal based on the target coefficient address.

[0092] In an exemplary embodiment, when power control is performed on a baseband signal based on a target coefficient address, a preset coefficient table may be queried first, and a target coefficient corresponding to the target coefficient address may be determined based on the coefficient table.

[0093] Among them, the coefficient table is pre-set, and the coefficient table records the correspondence between different coefficients and coefficient addresses. The coefficient address is equivalent to the number of the corresponding coefficient. One coefficient corresponds to a unique coefficient address. The coefficient is the attenuation value for attenuating the baseband signal or the amplification value for amplifying the baseband signal.

[0094] Once the target coefficient is determined, the baseband signal power can be controlled based on the target coefficient. This power control method achieves rapid attenuation of high-power time slot signals and rapid amplification of low-power time slot signals, thereby resolving the issue of reduced power output dynamic range when power differences between time slots are large, and minimizing the impact of the near-far effect between users.

[0095] In an optional embodiment of the present disclosure, a switch can be used to control whether to use the power control scheme provided by this scheme for power control. If the switch is turned on, this scheme is used for power control, and the baseband signal is power controlled using a determined target coefficient address. If the switch is turned off, the baseband signal is power controlled using a fixed coefficient.

[0096] The power control method of the embodiment of the present disclosure obtains the initial address of the coefficient of the baseband signal, determines the candidate coefficient address according to the power statistics, and determines the target coefficient address based on the candidate coefficient address, the initial address of the coefficient and the gain control parameter, and then performs power control on the baseband signal based on the target coefficient address. Thus, the rapid attenuation of high-power time slot signals and the rapid amplification of low-power time slot signals are achieved through power control, thereby solving the problem of reduced power output dynamic range of the device when the power difference between time slots is large, and reducing the influence of the far-near effect between users.

[0097] FIG5 is a block diagram illustrating a power control method according to one or more exemplary embodiments. As shown in FIG5 , the modules involved in implementing the power control method of the present disclosure include an analog-to-digital conversion module, an automatic gain control module (AGC), a downsampling module, a filtering module, a time slot identification module, a power control module, an upsampling module, and a digital-to-analog conversion module. The analog-to-digital conversion module converts the received analog RF signal into a digital signal. The automatic gain control module controls the signal gain of the input analog-to-digital converter to prevent overflow and signal anomalies caused by excessive signal strength. When the input signal is excessive, the AGC automatically attenuates the gain to a set value and transmits the attenuation value to the subsequent power control module for signal output power processing. The downsampling module converts high-sampling rate signals to a preset sampling rate, while the upsampling module converts low-sampling rate signals to a preset sampling rate for easier signal processing. The filtering module filters out unwanted interference signals outside the passband. The time slot identification module identifies the time slot type of the received signal for performing steps 200-207. The power control module controls the received signal to maintain a stable output power at the user-set power value and amplifies small signals below the user-set power value. The specific structure of the power control module is shown in Figure 6. The power control module includes a power statistics unit 1, a power statistics unit 2, a coefficient determination unit, and an attenuation and amplification unit. Power statistics units 1 and 2 are used for power statistics of different time slot types, respectively. The coefficient determination unit determines the target coefficient based on the power statistics obtained by power statistics units 1 and 2. The attenuation and amplification unit attenuates or amplifies the signal according to the target coefficient. The digital-to-analog conversion module converts digital signals into analog signals.

[0098] FIG. 7 is a schematic flowchart of a power control method according to one or more embodiments. As shown in FIG. 7, for the received analog signal, first, the received analog signal is converted into a digital signal by an analog-to-digital conversion module, and then the signal is automatically gain-controlled by an automatic gain control module according to the magnitude of the input signal, and at the same time, the gain control parameter is input into the power control module. Next, the digital signal is down-converted to the baseband 0 frequency, and the down-converted signal is decimated by a decimation module. The sampling rate can be selected according to the magnitude of the signal bandwidth. In this solution, the signal sampling rate is reduced to 0.48 Msps. Next, the decimated signal is filtered by a filtering module to filter out unwanted spurious signals outside the passband. The time slot of the filtered signal is identified by a time slot identification module, and a corresponding power control scheme is selected according to the identification result, that is, a corresponding power statistical duration is selected for power statistics for power control. The specific identification process is shown in FIG. 8. The specific power control process is executed by a power control module, and the power control flow is shown in FIG. 9. After the power of the signal is controlled to the user-set value by the power control module, the signal is interpolated by an interpolation module, and then the signal is up-converted to the required frequency point. Finally, the digital signal is converted into an analog signal by a digital-to-analog conversion module and sent to the subsequent module for processing.

[0099] As shown in FIG. 8, the specific steps for identifying the time slot of the signal include:

[0100] Step 61: Set the noise floor address threshold G0 and the power address threshold G1;

[0101] Step 62: Statistically calculate the power values of the 5 ms digital baseband signal 13 times to obtain 13 power values;

[0102] Step 63: Compare the 13 statistically calculated power values with the power table to obtain 13 power addresses R;

[0103] Step 64: Select the maximum power address RM and the minimum power address RI from the 13 addresses;

[0104] Step 65: Calculate the address difference by RM - RI, and assign the calculation result to M;

[0105] Step 66: Determine whether R < G0 and M < G1; if so (R < G0 and M < G1), execute step 67-1, otherwise execute step 67-2;

[0106] Step 67-1: Determine that the signal is the noise floor and assign H = 0;

[0107] Step 67-2: Determine whether R > G0 and M < G1; if so (R > G0 and M < G1), execute step 68-1; if not, execute step 68-2;

[0108] Step 68-1: Determine that the signal is a full time slot and assign H = 1;

[0109] Step 68-2: Determine whether R > G0 and M > G1; if so (R > G0 and M > G1), determine that the signal is a non-full time slot and assign H = 2, otherwise determine that the signal is a full time slot and assign H = 1 to complete time slot identification.

[0110] In the embodiment shown in FIG. 8, the full time slot is a single time slot, and the non-full time slot is a double time slot. When H = 0 or H = 1, it can be determined that the signal is a non-double time slot (background noise or single time slot signal), and when H = 2, it is determined that the signal is a double time slot signal. Through the time slot identification process shown in FIG. 8, it is possible to identify whether the currently received signal is background noise, a single time slot signal or a double time slot signal, achieving accurate distinction of different time slot types.

[0111] As shown in FIG. 9, the specific steps for the power control module to perform power control include:

[0112] Step 71: Set the low power threshold address, high power threshold address, maximum power threshold address, background noise power threshold PB, maximum post-amplification value threshold address R1, coefficient initial address R0 = 50, minimum coefficient address RMI, and maximum coefficient address RMA of the ALC, where the high power threshold address == low power threshold address + 2;

[0113] Step 72: Determine whether the time slot type is a double time slot (i.e., H = 2); if so, set the first ALC power statistical duration to 25 us, otherwise set the second ALC power statistical duration to 5 ms;

[0114] Step 73: Assign the power statistical value statistically measured by the ALC during the corresponding statistical duration to the variable P;

[0115] Step 74: Determine whether P < PB, if so, execute Step 79; otherwise execute Step 75;

[0116] Step 75: Determine whether P > PH, if so, execute Step 76, otherwise execute Step 77, where PH is the high power corresponding to the high power threshold address;

[0117] Step 76: Determine whether R = RMI and / or the low power threshold address = the maximum power threshold address, if so, execute Step 79; otherwise execute Step 76-1; where the initial value of R is the coefficient initial address R0;

[0118] Step 76-1: Update R and the low power threshold address. The updating method is: the updated current coefficient address R = the current coefficient address R-1, the updated low power threshold address = the current low power threshold address + 1, and the high power threshold address is simultaneously updated: the updated high power threshold address = the updated low power threshold address + 2, and then return to step 75;

[0119] Step 77: Determine whether P≤PL. If so, execute step 78; otherwise, execute step 79, where PL is the low power corresponding to the low power threshold address.

[0120] Step 78: Determine whether R = RMA and / or the low power threshold address = 0. If so, execute step 79; otherwise, execute step 78-1; wherein the initial value of R is the coefficient initial address R0;

[0121] Step 78-1: Update R and the low power threshold address. The updating method is: the updated current coefficient address R = the current coefficient address R + 1, the updated low power threshold address = the current low power threshold address - 1, and then return to step 77;

[0122] Step 79: R and PL maintain their current values ​​and are no longer updated, and the process continues with step 710;

[0123] Step 710: Determine whether the candidate coefficient address R>R0+RA; if so, R=R0+RA; otherwise, R retains its current value; RA is the gain control parameter passed in by the AGC module;

[0124] Step 711: Determine whether R>R1. If so, R=R1; otherwise, R retains its current value.

[0125] Step 712: According to the R value, query the coefficient table to obtain the target coefficient COE, where the target coefficient COE is the attenuation value for attenuating the baseband signal or the amplification value for amplifying the baseband signal;

[0126] Step 713: Determine whether switch EN=1. If so, multiply the target coefficient COE by the baseband signal; otherwise, multiply the baseband signal by a fixed coefficient 4096; wherein, 4096 is determined by assuming that the signal is truncated to 12 bits during signal processing. If it is truncated to 13 bits, the fixed coefficient is 8192. The fixed coefficient can be determined based on the actual truncation of the signal processing. 4096 is only an example. Multiplying the baseband signal by the fixed coefficient is equivalent to neither attenuation nor amplification of the signal.

[0127] Step 714: Complete signal power control and output the signal to the next module.

[0128] Through the power control process shown in FIG9 , stable power output of single-slot signals and dual-slot signals is achieved without affecting signal demodulation.

[0129] In order to implement the above embodiments, the present disclosure further provides a power control device, which can be implemented using software and / or hardware and can be integrated into a repeater.

[0130] Figure 10 is a structural diagram of a power control device provided according to one or more embodiments. As shown in Figure 10, the power control device 80 may include: a parameter acquisition module 810, a time slot identification module 820, a duration determination module 830, a power acquisition module 840 and a power control module 850.

[0131] The parameter acquisition module 810 is used to obtain gain control parameters for performing automatic gain control on the baseband signal;

[0132] The time slot identification module 820 is used to identify the target time slot type corresponding to the baseband signal;

[0133] The duration determination module 830 is configured to determine a power statistics duration corresponding to the target time slot type according to the target time slot type;

[0134] A power acquisition module 840 is configured to acquire a power statistical value of a baseband signal during a power statistics duration;

[0135] The power control module 850 is configured to perform power control on the signal based on the power statistics and the gain control parameter.

[0136] Optionally, the time slot identification module 820 includes:

[0137] A setting unit, used to preset a noise floor address threshold and a power address threshold of a baseband signal;

[0138] A power statistics unit, configured to obtain a power value of a baseband signal counted a preset number of times within a preset time period;

[0139] A power address determining unit, configured to find a power address corresponding to each power value;

[0140] a calculation unit, configured to determine an address difference between a maximum power address and a minimum power address in the power addresses;

[0141] A judgment unit, used to judge whether the power address is greater than the background noise address threshold;

[0142] The time slot type determination unit is used to determine that the target time slot type of the baseband signal is a dual time slot in response to the address difference being greater than the power address threshold when the power address is greater than the background noise address threshold; wherein the target time slot type includes dual time slot and non-dual time slot.

[0143] Optionally, the time slot type determining unit is further configured to:

[0144] In response to the address difference being no greater than the power address threshold, determining that the target time slot type corresponding to the baseband signal is a non-double time slot; wherein the non-double time slot includes a single time slot and a noise floor.

[0145] Optionally, the time slot type determining unit is further configured to:

[0146] In response to the power address being not greater than the noise floor address threshold, determining that the target time slot type corresponding to the baseband signal is a non-double time slot; wherein the non-double time slot includes a single time slot and a noise floor.

[0147] Optionally, the duration determination module 830 is further configured to:

[0148] In response to the target time slot type being a double time slot, determining the power statistics duration to be a first duration;

[0149] In response to the target time slot type being a non-double time slot, the power statistics duration is determined to be a second duration, wherein the second duration is greater than the first duration.

[0150] Optionally, the power control module 850 includes:

[0151] An acquisition unit, used for acquiring an initial address of a coefficient of a baseband signal;

[0152] A first determining unit, configured to determine a candidate coefficient address according to a power statistic;

[0153] a second determining unit, configured to determine a target coefficient address according to the candidate coefficient address, the coefficient initial address, and the gain control parameter;

[0154] A control unit is used to perform power control on a baseband signal based on a target coefficient address.

[0155] Optionally, the first determining unit is further configured to:

[0156] Get the preset noise floor power threshold;

[0157] Determine whether the power statistics value is less than the noise floor power threshold;

[0158] If so, the initial address of the coefficient is determined to be the candidate coefficient address;

[0159] If the power statistics value is not less than the noise floor power threshold, the high power threshold determination step is performed.

[0160] Optionally, the high power threshold determination step includes:

[0161] Preset low power threshold address and high power threshold address;

[0162] Determine whether the power statistics value is greater than the high power corresponding to the high power threshold address;

[0163] If the power statistic is not greater than the high power of the high power threshold address, and the power statistic is greater than the low power corresponding to the low power threshold address, the coefficient initial address is determined to be the candidate coefficient address;

[0164] The difference between the low power threshold address and the high power threshold address is a preset address value.

[0165] Optionally, the high power threshold determination step includes:

[0166] Obtaining a current coefficient address, a preset maximum value of a power threshold address, and a minimum value of a coefficient address, wherein an initial value of the current coefficient address is the coefficient initial address;

[0167] Determine whether the power statistics value is greater than the high power corresponding to the high power threshold address;

[0168] If not, proceed to the low power threshold determination step;

[0169] If yes, compare the current coefficient address with the minimum coefficient address, and / or compare the current low power threshold address with the maximum power threshold address;

[0170] In response to the current coefficient address being equal to the minimum coefficient address value, and / or the current low power threshold address being equal to the maximum power threshold address value, determining the current coefficient address as a candidate coefficient address;

[0171] In response to the current coefficient address being unequal to the minimum coefficient address, and the current low power threshold address being unequal to the maximum power threshold address, the current coefficient address and the high power threshold address are updated.

[0172] Optionally, the first determining unit is further configured to:

[0173] Stepping the current coefficient address by a first preset value and the high power threshold address by a second preset value to obtain an updated current coefficient address and an updated high power threshold address;

[0174] Return to the high power threshold determination step to continue determining whether the power statistics value is greater than the high power corresponding to the updated high power threshold address.

[0175] Optionally, the low power threshold determination step includes:

[0176] Get the preset maximum value of the coefficient address;

[0177] Determine whether the power statistics value is greater than the low power corresponding to the low power threshold address;

[0178] If not, compare the current coefficient address with the maximum coefficient address, and / or determine whether the current low power threshold address is 0;

[0179] In response to the current coefficient address being equal to the maximum coefficient address, and / or the current low power threshold address being 0, determining the current coefficient address as a candidate coefficient address;

[0180] In response to the current coefficient address being not equal to the maximum coefficient address, and the current low power threshold address being not 0, the current coefficient address and the low power threshold address are updated.

[0181] Optionally, the first determining unit is further configured to:

[0182] The current coefficient address steps to a third preset value, and the low power threshold address steps to a fourth preset value, to obtain updated current coefficient address and low power threshold address;

[0183] Return to the low power threshold determination step to continue determining whether the power statistics value is greater than the low power corresponding to the updated low power threshold address.

[0184] Optionally, the second determining unit is further configured to:

[0185] Get the maximum post-amplification threshold address of the baseband signal;

[0186] Calculate the sum of the coefficient initial address and the gain control parameter;

[0187] Determine the smaller value between the candidate coefficient address and the sum value as the new coefficient address;

[0188] The smaller value between the new coefficient address and the maximum post-playback threshold address is determined as the target coefficient address.

[0189] The power control device provided in the embodiments of the present disclosure, which can be applied to a repeater station, can execute the power control method provided in the embodiments of the present disclosure, and has the corresponding functional modules and beneficial effects. For any content not fully described in the embodiments of the present disclosure, reference can be made to the description of any method embodiment of the present disclosure.

[0190] The embodiment of the present disclosure also provides a repeater station device, including a processor and a memory; the processor calls the program or instructions stored in the memory to execute the steps of each embodiment of the power control method as described in the above embodiments. To avoid repeated description, they are not repeated here.

[0191] An embodiment of the present disclosure further provides a computer-readable storage medium storing computer-executable instructions. When the computer-executable instructions are executed by a processor, the steps of each embodiment of the power control method as described in the aforementioned embodiments are implemented. To avoid repeated description, they are not repeated here.

[0192] The embodiments of the present disclosure further provide a computer program product including computer-readable instructions, which, when executed by a processor, implement the steps of each embodiment of the power control method as described in the aforementioned embodiments. To avoid repeated description, they are not repeated here. Industrial Applicability

[0193] The power control scheme provided by the present invention selects different power control schemes for different time slot types for power control. Power control can be quickly implemented for signals of different time slot types without affecting signal demodulation. It can be compatible with power control of different P25 standards at the same time. The gain control parameters of automatic gain control of the acquired signal are used to participate in power control, thereby achieving the effect of attenuating large signals and amplifying small signals.

Claims

1. A power control method, the method comprising: Obtaining gain control parameters for automatic gain control of a baseband signal; Identifying a target timeslot type corresponding to the baseband signal; According to the target time slot type, determining a power statistics duration corresponding to the target time slot type; Obtaining a power statistical value of the baseband signal during the power statistical time period; Power control is performed on the baseband signal based on the power statistics and the gain control parameter.

2. The power control method according to claim 1, wherein the identifying the target time slot type corresponding to the baseband signal comprises: Presetting a noise floor address threshold and a power address threshold of the baseband signal; Obtaining a power value of the baseband signal counted a preset number of times within a preset time length; Find the power address corresponding to each power value; Determine an address difference between a maximum power address and a minimum power address in the power addresses; Determine whether the power address is greater than the background noise address threshold; If so, in response to the address difference being greater than the power address threshold, determining that the target time slot type of the baseband signal is a dual time slot; wherein the target time slot type includes a dual time slot and a non-dual time slot.

3. The power control method according to claim 2, further comprising: If the power address is not greater than the noise floor address threshold, it is determined that the target time slot type corresponding to the baseband signal is a non-double time slot; wherein the non-double time slot includes a single time slot and a noise floor.

4. The power control method according to claim 2, further comprising: If the address difference is not greater than the power address threshold, determine that the target time slot type of the baseband signal is a non-double time slot; wherein the non-double time slot includes a single time slot and a background noise.

5. The power control method according to any one of claims 2 or 4, wherein determining the power statistics duration corresponding to the target time slot type according to the target time slot type comprises: In response to the target time slot type being a dual time slot, determining the power statistics duration to be a first duration; In response to the target time slot type being a non-double time slot, the power statistics duration is determined to be a second duration, wherein the second duration is greater than the first duration.

6. The power control method according to any one of claims 1 to 5, wherein the performing power control on the baseband signal based on the power statistic and the gain control parameter comprises: Obtaining an initial address of a coefficient of the baseband signal; Determine a candidate coefficient address according to the power statistics; Determine a target coefficient address according to the coefficient initial address, the candidate coefficient address and the gain control parameter; The baseband signal is power controlled based on the target coefficient address.

7. The power control method according to claim 6, wherein the step of determining the target coefficient address according to the coefficient initial address, the candidate coefficient address and the gain control parameter comprises: Obtaining a maximum post-amplification threshold address of the baseband signal; Calculating the sum of the coefficient initial address and the gain control parameter; Determine a smaller value between the candidate coefficient address and the sum value as a new coefficient address; The smaller value between the new coefficient address and the maximum post-playback threshold address is determined as the target coefficient address.

8. The power control method according to claim 6 or 7, wherein determining the candidate coefficient address according to the power statistics comprises: Get the preset noise floor power threshold; Determine whether the power statistic value is less than the noise floor power threshold; If yes, determining the coefficient initial address as a candidate coefficient address; If the power statistic is not less than the noise floor power threshold, a high power threshold determination step is performed.

9. The power control method according to claim 8, wherein the high power threshold determination step comprises: Preset low power threshold address and high power threshold address; Determine whether the power statistic is greater than the high power corresponding to the high power threshold address; If the power statistic is not greater than the high power of the high power threshold address, and the power statistic is greater than the low power corresponding to the low power threshold address, determining the coefficient initial address as a candidate coefficient address; Wherein, the difference between the low power threshold address and the high power threshold address is a preset address value.

10. The power control method according to claim 8, wherein the high power threshold determination step comprises: Obtaining a current coefficient address, a preset maximum value of a power threshold address, and a minimum value of a coefficient address, wherein an initial value of the current coefficient address is the coefficient initial address; Determine whether the power statistic is greater than the high power corresponding to the high power threshold address; If not, proceed to the low power threshold determination step; If yes, compare the current coefficient address with the minimum value of the coefficient address, and / or compare the current low power threshold address with the maximum value of the power threshold address; In response to the current coefficient address being equal to the minimum value of the coefficient address, and / or the current low power threshold address being equal to the maximum value of the power threshold address, determining the current coefficient address as a candidate coefficient address; In response to the current coefficient address being unequal to the minimum value of the coefficient address, and the current low power threshold address being unequal to the maximum value of the power threshold address, the current coefficient address and the high power threshold address are updated.

11. The power control method according to claim 10, wherein the updating of the current coefficient address and the high power threshold address comprises: The current coefficient address steps to a first preset value, and the high power threshold address steps to a second preset value to obtain a more The new current coefficient address and the updated high power threshold address; Return to the high power threshold determination step to continue determining whether the power statistic is greater than the high power corresponding to the updated high power threshold address.

12. The power control method according to claim 10, wherein the low power threshold determination step comprises: Get the preset maximum value of the coefficient address; Determine whether the power statistic is greater than the low power corresponding to the low power threshold address; If not, compare the current coefficient address with the maximum value of the coefficient address, and / or determine whether the current low power threshold address is 0; In response to the current coefficient address being equal to the maximum value of the coefficient address, and / or the current low power threshold address being 0, determining the current coefficient address as a candidate coefficient address; In response to the current coefficient address being not equal to the maximum value of the coefficient address, and the current low power threshold address being not 0, the current coefficient address and the low power threshold address are updated.

13. The power control method according to claim 10, wherein the updating of the current coefficient address and the low power threshold address comprises: The current coefficient address steps to a third preset value, and the low power threshold address steps to a fourth preset value, to obtain an updated current coefficient address and a low power threshold address; Return to the low power threshold determination step to continue determining whether the power statistic is greater than the low power corresponding to the updated low power threshold address.

14. A power control device, characterized in that: The device comprises: A parameter acquisition module, used to acquire gain control parameters for automatic gain control of a baseband signal; A time slot identification module, used to identify the target time slot type corresponding to the baseband signal; A duration determination module, configured to determine, according to the target time slot type, a power statistics duration corresponding to the target time slot type; A power acquisition module, used to obtain the power statistical value of the baseband signal during the power statistical time length; A power control module is used to perform power control on the baseband signal based on the power statistics and the gain control parameter.

15. A repeater comprising a processor and a memory; The processor is used to execute the power control method according to any one of claims 1 to 13 by calling the program or instruction stored in the memory.

16. A computer-readable storage medium, wherein the computer-readable storage medium stores computer-executable instructions, and when the computer-executable instructions are executed by a processor, the power control method according to any one of claims 1 to 13 is implemented.

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