Capacitive pressure sensor and manufacturing method therefor
By introducing a reference capacitor into the capacitive pressure sensor and setting an air groove in its dielectric layer, the problem of low test accuracy is solved, higher test accuracy and controllability are achieved, and the process flow is simplified.
Patent Information
- Application Number
- PCT/CN2024/132534
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-03-14
- Filing Date
- 2024-11-18
- Publication Date
- 2025-09-18
AI Technical Summary
Existing capacitive pressure sensor preparation methods have the problem of low test accuracy, especially in capacitive pressure sensors made on SOI substrates and capacitive pressure sensors with polysilicon layers as electrodes, the test accuracy is insufficient and the process complexity is high.
A reference capacitor is introduced into the capacitive pressure sensor, and an air groove is set in its dielectric layer. The capacitance of the reference capacitor is adjusted by adjusting the size of the air groove, which increases the controllability of the reference capacitor and thus improves the test accuracy.
By adding the reference capacitor and the air groove design, the test accuracy and controllability of the capacitive pressure sensor are improved, the process flow is simplified, and the cost is reduced.
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Figure CN2024132534_18092025_PF_FP_ABST
Abstract
Description
Capacitive pressure sensor and preparation method thereof Technical Field
[0001] The present application relates to the field of semiconductor device technology, and in particular to a capacitive pressure sensor and a method for preparing the same. Background Art
[0002] The working principle of capacitive pressure sensors is to output a signal by detecting the change in capacitance between two plates. Their temperature drift is much lower than that of piezoresistive pressure sensors. Therefore, they are widely used in applications that require strict temperature stability.
[0003] A common capacitive pressure sensor is fabricated on a silicon-on-insulator (SOI) substrate. The capacitor's electrode spacing is formed by etching the buried silicon oxide layer within the SOI substrate. The top and bottom silicon layers of the SOI substrate serve as the capacitor's upper and lower electrodes, respectively. However, this fabrication method for capacitive pressure sensors suffers from low test accuracy. Summary of the Invention
[0004] Based on this, the present application provides a capacitive pressure sensor and a preparation method thereof, which increases the calibration function by adding a reference capacitor and improves the test accuracy of the capacitive pressure sensor; in addition, an air groove is introduced into the dielectric layer of the reference capacitor, and the capacitance of the reference capacitor can be adjusted by changing the size of the air groove, thereby increasing the controllability of the reference capacitor; due to the high controllability of the reference capacitor, the test accuracy of the capacitive pressure sensor can be improved by precisely controlling the reference capacitor as needed.
[0005] In a first aspect, the present application provides a capacitive pressure sensor, comprising:
[0006] substrate;
[0007] a variable capacitor located on the substrate;
[0008] A reference capacitor is located on the substrate on one side of the variable capacitor, and there is a distance between the reference capacitor and the variable capacitor; wherein,
[0009] The variable capacitor and the reference capacitor both include a lower electrode, an upper electrode and a capacitor medium located between the lower electrode and the upper electrode; the capacitor medium of the variable capacitor includes an air cavity, and the capacitor medium of the reference capacitor includes a dielectric layer with an air groove.
[0010] In some embodiments, the upper electrode and the lower electrode each include polysilicon electrodes.
[0011] In some embodiments, the capacitive pressure sensor further comprises:
[0012] a bottom dielectric layer, located between the lower electrode and the substrate;
[0013] The protective layer is located between the upper electrode and the capacitor dielectric.
[0014] In some embodiments, the capacitive pressure sensor further comprises:
[0015] a first release hole, penetrating the upper electrode and the protective layer in a thickness direction and communicating with the air groove;
[0016] a second release hole, penetrating the upper electrode and the protective layer in a thickness direction and communicating with the air cavity;
[0017] The through-hole structure penetrates the substrate and the bottom dielectric layer in the thickness direction to expose the lower electrode of the variable capacitor; the through-hole structure is located below the air cavity.
[0018] In some embodiments, the capacitive pressure sensor further comprises:
[0019] a first pad in contact with the lower electrode of the variable capacitor;
[0020] a second pad in contact with the upper electrode of the variable capacitor;
[0021] a third pad in contact with the lower electrode of the reference capacitor;
[0022] The fourth pad contacts the upper electrode of the reference capacitor.
[0023] In a second aspect, the present application further provides a method for preparing a capacitive pressure sensor, comprising:
[0024] providing a substrate;
[0025] A variable capacitor and a reference capacitor are formed on a substrate; the reference capacitor is located on one side of the variable capacitor and has a distance therebetween; the variable capacitor and the reference capacitor both include a lower electrode, an upper electrode, and a capacitor dielectric located between the lower electrode and the upper electrode; the capacitor dielectric of the variable capacitor includes an air cavity, and the capacitor dielectric of the reference capacitor includes a dielectric layer having an air groove.
[0026] In some embodiments, forming a variable capacitor and a reference capacitor on a substrate includes:
[0027] forming a lower electrode on the substrate;
[0028] forming a dielectric layer, wherein the dielectric layer covers the lower electrode;
[0029] etching the dielectric layer to form an air groove in the dielectric layer;
[0030] filling a sacrificial layer in the air groove;
[0031] forming an upper electrode on the dielectric layer;
[0032] forming a first release hole and a second release hole; the first release hole penetrates the upper electrode at least along the thickness direction to expose the sacrificial layer; the second release hole penetrates the upper electrode at least along the thickness direction to expose the dielectric layer;
[0033] removing the sacrificial layer through the first release hole to release the air groove;
[0034] A portion of the dielectric layer is removed through the second release hole to form an air cavity.
[0035] In some embodiments, before forming the lower electrode on the substrate, the method further includes: forming an underlying dielectric layer on the substrate; forming the lower electrode on the underlying dielectric layer;
[0036] Before removing a portion of the dielectric layer through the second release hole to form the air cavity, the method further includes: forming a first through hole, the first through hole penetrating the substrate along the thickness direction to expose a portion of the underlying dielectric layer;
[0037] Part of the dielectric layer is removed through the second release hole to form an air cavity, and at the same time, the exposed underlying dielectric layer is removed through the first through hole to form a second through hole. The second through hole and the first through hole together constitute a through hole structure; the through hole structure exposes the lower electrode of the variable capacitor and is located below the air cavity.
[0038] In some embodiments, the dielectric layer is etched to form an air recess in the dielectric layer and also to form a first contact opening and a second contact opening in the dielectric layer, wherein the first contact opening exposes the lower electrode of the variable capacitor and the second contact opening exposes the lower electrode of the reference capacitor;
[0039] After the sacrificial layer is filled in the air groove and before the upper electrode is formed on the dielectric layer, the method further includes: forming a protective layer to cover the dielectric layer, the sacrificial layer and the exposed surface of the lower electrode.
[0040] In some embodiments, a first contact hole and a second contact hole are formed simultaneously with the formation of the first release hole and the second release hole; the first contact hole is located within the first contact opening and exposes the lower electrode of the variable capacitor; the second contact hole is located within the second contact opening and exposes the lower electrode of the reference capacitor;
[0041] After removing part of the dielectric layer through the second release hole to form an air cavity, it also includes: forming a first pad, a second pad, a third pad and a fourth pad; wherein the first pad is located in the first contact hole and is located on the lower electrode of the variable capacitor; the second pad is located on the upper electrode of the variable capacitor; the third pad is located in the second contact hole and is located on the lower electrode of the reference capacitor; and the fourth pad is located on the upper electrode of the reference capacitor.
[0042] The capacitive pressure sensor and its preparation method provided in this application may have the following advantages:
[0043] In the capacitive pressure sensor of the present application, a variable capacitor and a reference capacitor are provided. By adding the reference capacitor, a calibration function is added, thereby improving the test accuracy of the capacitive pressure sensor. In addition, an air groove is introduced into the dielectric layer of the reference capacitor, and the capacitance of the reference capacitor can be adjusted by changing the size of the air groove, thereby increasing the controllability of the reference capacitor. Due to the high controllability of the reference capacitor, the test accuracy of the capacitive pressure sensor can be improved by precisely controlling the reference capacitor as needed.
[0044] In the preparation method of the capacitive pressure sensor of the present application, the prepared capacitive pressure sensor has both a variable capacitor and a reference capacitor. By adding the reference capacitor, the calibration function is increased, thereby improving the test accuracy of the capacitive pressure sensor. In addition, by introducing an air groove into the dielectric layer of the reference capacitor, the capacitance of the reference capacitor can be adjusted by changing the size of the air groove, thereby increasing the controllability of the reference capacitor. Due to the high controllability of the reference capacitor, the test accuracy of the capacitive pressure sensor can be improved by precisely controlling the reference capacitor as needed. BRIEF DESCRIPTION OF THE DRAWINGS
[0045] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the conventional technology, the following briefly introduces the drawings required for use in the embodiments or the conventional technology descriptions. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0046] FIG1 is a flow chart of a method for preparing a capacitive pressure sensor provided in some embodiments of the present application;
[0047] FIG2 is a flow chart of step S12 in the method for preparing a capacitive pressure sensor provided in some embodiments of the present application;
[0048] FIG3 is a schematic cross-sectional view of a structure obtained in step S11 of a method for preparing a capacitive pressure sensor provided in some embodiments of the present application;
[0049] FIG4 is a schematic cross-sectional view of a structure obtained after forming a bottom dielectric layer in a method for preparing a capacitive pressure sensor provided in some embodiments of the present application;
[0050] FIG5 is a schematic cross-sectional view of a structure obtained in step S121 of a method for preparing a capacitive pressure sensor provided in some embodiments of the present application;
[0051] FIG6 is a schematic cross-sectional view of a structure obtained in step S122 of a method for preparing a capacitive pressure sensor provided in some embodiments of the present application;
[0052] FIG7 is a schematic cross-sectional view of a structure obtained in step S123 of a method for preparing a capacitive pressure sensor provided in some embodiments of the present application;
[0053] FIG8 is a schematic cross-sectional view of a structure obtained in step S124 of a method for preparing a capacitive pressure sensor provided in some embodiments of the present application;
[0054] FIG9 is a schematic cross-sectional view of a structure obtained after forming a protective layer in a method for preparing a capacitive pressure sensor provided in some embodiments of the present application;
[0055] FIG10 is a schematic cross-sectional view of a structure obtained in step S125 of a method for preparing a capacitive pressure sensor provided in some embodiments of the present application;
[0056] FIG11 is a schematic cross-sectional view of a structure obtained in step S126 of a method for preparing a capacitive pressure sensor according to some embodiments of the present application;
[0057] FIG12 is a schematic diagram of a cross-sectional structure of a structure obtained in step S127 in a method for preparing a capacitive pressure sensor according to some embodiments of the present application;
[0058] FIG13 is a schematic cross-sectional view of a structure obtained in step S128 of a method for preparing a capacitive pressure sensor according to some embodiments of the present application;
[0059] 14 is a schematic cross-sectional view of a structure obtained after forming a first pad, a second pad, a third pad, and a fourth pad in a method for preparing a capacitive pressure sensor provided in some embodiments of the present application.
[0060] Explanation of the accompanying drawings: 10. substrate; 11. variable capacitor; 111. lower electrode; 112. air cavity; 113. upper electrode; 114. protective layer; 12. reference electrode; 121. lower electrode; 122. dielectric layer; 1221. air groove; 123. upper electrode; 124. protective layer; 125. sacrificial layer; 13. bottom dielectric layer; 14. second release hole; 15. through-hole structure; 151. first through-hole; 152. second through-hole; 161. first contact opening; 162. second contact opening; 163. first contact hole; 164. second contact hole; 171. first pad; 172. second pad; 173. third pad; 174. fourth pad. DETAILED DESCRIPTION
[0061] To facilitate understanding of the present application, a more comprehensive description of the present application will be provided below with reference to the accompanying drawings. The drawings illustrate preferred embodiments of the present application. However, the present application may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and comprehensive understanding of the present disclosure.
[0062] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application pertains. The terms used herein in the specification of this application are for the purpose of describing specific embodiments only and are not intended to limit this application.
[0063] It should be understood that while the terms "first" and "second" may be used to describe various elements, components, regions, layers, collector structures, and / or portions, these elements, components, regions, layers, collector structures, and / or portions should not be limited by these terms. These terms are used solely to distinguish one element, component, region, layer, collector structure, or portion from another element, component, region, layer, collector structure, or portion. Thus, a first element, component, region, layer, collector structure, or portion discussed below could be referred to as a second element, component, region, layer, or portion without departing from the teachings of this application. For example, a first collector structure could be referred to as a second collector structure, and similarly, a second collector structure could be referred to as a first collector structure; the first collector structure and the second collector structure are different collector structures. It should be understood that spatially relative terms encompass different orientations of the device during use and operation, in addition to the orientations shown in the figures. For example, if the device in the figures is turned over, an element or feature described as "below" or "beneath" or "under" another element would be oriented "above" the other element or feature. Thus, the exemplary terms "below" and "beneath" can encompass both an orientation of above and below. Furthermore, the device can be encompassed at alternative orientations (eg, rotated 90 degrees or at other orientations), and the spatial descriptors used herein should be interpreted accordingly.
[0064] As used herein, the singular forms "a," "an," and "the" may also include the plural forms, unless the context clearly indicates otherwise. It should also be understood that when the terms "comprising" and / or "including" are used in this specification, they may specify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. At the same time, when used herein, the term "and / or" includes any and all combinations of the relevant listed items.
[0065] The working principle of capacitive pressure sensors is to output a signal by detecting the change in capacitance between two plates. Their temperature drift is much lower than that of piezoresistive pressure sensors. Therefore, they are widely used in applications that require strict temperature stability.
[0066] A capacitive pressure sensor is made based on an SOI (Silicon-On-Insulator) substrate. The electrode spacing of the capacitor is formed by etching the buried silicon oxide layer in the SOI substrate, and the top silicon and bottom silicon of the SOI substrate are used as the upper and lower electrodes of the capacitor, respectively. This method improves the manufacturability of the device and increases the yield. However, using the buried silicon oxide layer of the SOI substrate as a sacrificial layer has many process limitations: first, the etching process is difficult to control, resulting in greater discreteness of the final device, reducing the yield; second, this process still requires the process of sealing the release hole to form a vacuum cavity, which increases the process complexity. Therefore, this preparation method has not become the mainstream process in the industry.
[0067] Another type of capacitive pressure sensor uses two layers of polysilicon as the upper and lower electrodes. The lower polysilicon layer serves as the pressure-sensitive membrane. Air holes penetrate the two layers, and the gap between the upper and lower electrodes is achieved by etching a sacrificial dielectric layer with HF (hydrofluoric acid). This fabrication method is simple and has a high yield, but it also suffers from low test accuracy.
[0068] Another type of capacitive pressure sensor uses a polysilicon layer as the pressure-sensitive membrane and introduces a completely identical reference capacitor and variable capacitor in the dielectric layer (cavity, dielectric layer below the upper electrode). These two different structures induce capacitance differences under changes in the environment, stress, etc., thereby improving the test accuracy of the product application test end. However, the capacitive pressure sensor prepared by this method has a complex structure, a difficult process implementation, and a low yield, which is not conducive to mass production.
[0069] In one embodiment, referring to FIG1 , the present application provides a method for preparing a capacitive pressure sensor. The method for preparing the capacitive pressure sensor may include the following steps: S11 to S12 .
[0070] S11: providing a substrate.
[0071] S12: forming a variable capacitor and a reference capacitor on a substrate; the reference capacitor is located on one side of the variable capacitor and has a distance therebetween; the variable capacitor and the reference capacitor both include a lower electrode, an upper electrode, and a capacitor dielectric located between the lower electrode and the upper electrode; the capacitor dielectric of the variable capacitor includes an air cavity, and the capacitor dielectric of the reference capacitor includes a dielectric layer having an air groove.
[0072] In the preparation method of the capacitive pressure sensor of the present application, the prepared capacitive pressure sensor has both a variable capacitor and a reference capacitor. By adding the reference capacitor, the calibration function is increased, thereby improving the test accuracy of the capacitive pressure sensor. In addition, an air groove is introduced into the dielectric layer of the reference capacitor, and the capacitance of the reference capacitor can be adjusted by changing the size of the air groove, thereby increasing the controllability of the reference capacitor. Due to the high controllability of the reference capacitor, the test accuracy of the capacitive pressure sensor can be improved by precisely controlling the reference capacitor as needed. The preparation method of the capacitive pressure sensor of the present application has a simple process, low cost, and high sensitivity.
[0073] In some examples, please refer to FIG. 2 in combination with FIG. 1 , in step S12 , forming a variable capacitor and a reference capacitor on a substrate may include steps S121 to S128 .
[0074] S121: forming a lower electrode on the substrate.
[0075] S122: forming a dielectric layer, wherein the dielectric layer covers the lower electrode.
[0076] S123: Etching the dielectric layer to form an air groove in the dielectric layer.
[0077] S124: Filling a sacrificial layer in the air groove.
[0078] S125: forming an upper electrode on the dielectric layer.
[0079] S126: forming a first release hole and a second release hole; the first release hole penetrates the upper electrode at least along the thickness direction to expose the sacrificial layer; the second release hole penetrates the upper electrode at least along the thickness direction to expose the dielectric layer.
[0080] S127: removing the sacrificial layer through the first release hole to release the air groove.
[0081] S128: removing a portion of the dielectric layer through the second release hole to form an air cavity.
[0082] In some examples, before forming the lower electrode on the substrate, that is, before step S121 , the following steps may be further included: forming an underlying dielectric layer on the substrate; and forming the lower electrode on the underlying dielectric layer.
[0083] In some examples, before removing a portion of the dielectric layer through the second release hole to form the air cavity, that is, before step S128 , the following step may be further included: forming a first through hole that penetrates the substrate along the thickness direction to expose a portion of the underlying dielectric layer.
[0084] In some examples, while a portion of the dielectric layer is removed through the second release hole to form an air cavity, the exposed underlying dielectric layer is removed through the first through hole to form a second through hole. The second through hole and the first through hole together constitute a through hole structure; the through hole structure exposes the lower electrode of the variable capacitor and is located below the air cavity.
[0085] In some examples, the dielectric layer is etched to form an air groove in the dielectric layer while also forming a first contact opening and a second contact opening in the dielectric layer. The first contact opening exposes the lower electrode of the variable capacitor, and the second contact opening exposes the lower electrode of the reference capacitor. That is, during the process of etching the dielectric layer, the air groove, the first contact opening, and the second contact opening can be formed simultaneously.
[0086] In some examples, after filling the air groove with a sacrificial layer and before forming the upper electrode on the dielectric layer, that is, between step S124 and step S125, the following step may also be included: forming a protective layer to cover the dielectric layer, the sacrificial layer and the exposed surface of the lower electrode.
[0087] In some examples, a first contact hole and a second contact hole may be formed at the same time as the first release hole and the second release hole; the first contact hole is located in the first contact opening and exposes the lower electrode of the variable capacitor; the second contact hole is located in the second contact opening and exposes the lower electrode of the reference capacitor.
[0088] In some examples, after removing a portion of the dielectric layer through the second release hole to form an air cavity, that is, after step S128, the following steps may also be included: forming a first pad, a second pad, a third pad and a fourth pad; wherein the first pad is located in the first contact hole and is located on the lower electrode of the variable capacitor; the second pad is located on the upper electrode of the variable capacitor; the third pad is located in the second contact hole and is located on the lower electrode of the reference capacitor; and the fourth pad is located on the upper electrode of the reference capacitor.
[0089] In step S11 , referring to step S11 in FIG. 1 and FIG. 3 , a substrate 10 is provided.
[0090] As an example, the substrate 10 may include but is not limited to a silicon substrate, a silicon carbide substrate, a gallium nitride substrate, a silicon germanium substrate, etc.; in this embodiment, the substrate 10 may be a silicon substrate.
[0091] As an example, after step S11 , the following step may be further included: forming an underlying dielectric layer 13 on the substrate 10 , as shown in FIG. 4 .
[0092] Specifically, forming the bottom dielectric layer 13 on the substrate 10 may include the following steps: S111 to S114.
[0093] S111: forming a thin oxide layer (not shown) on the substrate 10; specifically, a thin oxide layer may be formed on the substrate 10 by, but not limited to, a thermal oxidation process to form an implanted protective layer; the thin oxide layer may include a silicon oxide layer having a thickness less than that of an oxide layer formed by deposition.
[0094] S112: removing the thin oxide layer; specifically, the thin oxide layer may be removed by, but is not limited to, a dry etching process, a wet etching process, or a chemical mechanical polishing process.
[0095] S113 : forming an underlying dielectric material layer (not shown) on the substrate 10 ; specifically, the underlying dielectric material layer may be formed on the substrate 10 by, but not limited to, a physical vapor deposition process, a chemical vapor deposition process, or an atomic layer deposition process.
[0096] S114: Etching the bottom dielectric material layer to obtain the bottom dielectric layer 13; specifically, the bottom dielectric material layer can be etched by, but not limited to, photolithography and etching processes, and more specifically, the bottom dielectric material layer can be etched by, but not limited to, photolithography and dry etching processes; a plurality of openings (not shown) exposing the substrate 10 are formed in the bottom dielectric layer 13; the bottom dielectric layer 13 can include, but not limited to, an oxide layer, such as a silicon oxide layer, etc.
[0097] In step S12, referring to step S12 in FIG. 1 , FIG. 2 , and FIG. 5 to FIG. 13 , a variable capacitor 11 and a reference capacitor 12 are formed on a substrate 10; the reference capacitor 12 is located on one side of the variable capacitor 11 and is spaced apart from the variable capacitor 11; both the variable capacitor 11 and the reference capacitor 12 include a lower electrode, an upper electrode, and a capacitor dielectric located between the lower electrode and the upper electrode; the capacitor dielectric of the variable capacitor 11 includes an air cavity 112, and the capacitor dielectric of the reference capacitor 12 includes a dielectric layer 122 having an air groove 1221.
[0098] As an example, please continue to refer to FIG. 3 and FIG. 5 to FIG. 13 , step S12 may include the following steps: S121 to S128 .
[0099] S121 : forming a lower electrode on the substrate 10 , as shown in FIG5 .
[0100] S122 : forming a dielectric layer 122 , where the dielectric layer 122 covers the lower electrode, as shown in FIG6 .
[0101] S123 : etching the dielectric layer 122 to form an air groove 1221 in the dielectric layer 122 , as shown in FIG. 7 .
[0102] S124 : filling the air groove 1221 with a sacrificial layer 125 , as shown in FIG. 8 .
[0103] S125 : forming an upper electrode on the dielectric layer 122 , as shown in FIG. 10 .
[0104] S126: forming a first release hole (not shown) and a second release hole 14; the first release hole penetrates the upper electrode at least along the thickness direction to expose the sacrificial layer 125; the second release hole 14 penetrates the upper electrode at least along the thickness direction to expose the dielectric layer 122, as shown in FIG11.
[0105] S127 : removing the sacrificial layer 125 through the first release hole to release the air groove 1221 , as shown in FIG. 12 .
[0106] S128 : removing a portion of the dielectric layer 122 through the second release hole 14 to form an air cavity 112 , as shown in FIG. 13 .
[0107] In step S121 , referring to step S121 in FIG. 2 and FIG. 5 , a lower electrode is formed on the substrate 10 .
[0108] As an example, the lower electrode may be formed on the substrate 10 by using, but not limited to, a physical vapor deposition process, a chemical vapor deposition process, or an atomic layer deposition process. Specifically, the lower electrode may include, but not limited to, a polysilicon layer.
[0109] It should be noted that when a bottom dielectric layer 13 having an opening is formed on the substrate 10 , the bottom electrode is formed on the bottom dielectric layer 13 and on the substrate 10 exposed by the opening.
[0110] It should be further explained that the lower electrode formed in step S121 can be a continuous layer structure, but in order to facilitate subsequent description and to more conveniently display the variable capacitor 11 and the reference capacitor 12, the lower electrode 111 in the variable electrode 11 and the lower electrode 121 in the reference capacitor 12 are separately labeled in Figure 5 and subsequent figures.
[0111] In step S122 , referring to step S122 in FIG. 2 and FIG. 6 , a dielectric layer 122 is formed, and the dielectric layer 122 covers the bottom electrode.
[0112] As an example, the dielectric layer 122 may be formed by, but not limited to, physical vapor deposition, chemical vapor deposition, or atomic layer deposition. Specifically, the dielectric layer 122 may include, but not limited to, an oxide layer, such as a silicon oxide layer.
[0113] As an example, the thickness of the dielectric layer 122 can be set according to actual needs, but needs to meet the thickness requirement of the air cavity 112 of the variable capacitor 11 and the thickness requirement of the dielectric layer required by the reference capacitor 12 .
[0114] In step S123 , referring to step S123 in FIG. 2 and FIG. 7 , the dielectric layer 122 is etched to form an air groove 1221 in the dielectric layer 122 .
[0115] As an example, the dielectric layer 122 may be etched using, but not limited to, photolithography and etching processes to form the air recess 1221 in the dielectric layer 122 .
[0116] Specifically, there may be a plurality of air grooves 1221 , and the depths of the air grooves 1221 may be the same or different. However, the depth of each air groove 1221 must be smaller than the thickness of the dielectric layer 122 .
[0117] Specifically, a plurality of air grooves 122 distribution areas may be formed in the dielectric layer 122 to facilitate the subsequent formation of a plurality of reference capacitors 12 ; each distribution area may include a plurality of air grooves 1221 .
[0118] As an example, please continue to refer to Figure 7. In step S123, the dielectric layer 122 is etched to form an air groove 1221 in the dielectric layer 122, and a first contact opening 161 and a second contact opening 162 are also formed in the dielectric layer 122. The first contact opening 161 exposes the lower electrode 111 of the variable capacitor 11, and the second contact opening 162 exposes the lower electrode 121 of the reference capacitor 12.
[0119] Specifically, the first contact opening 161 and the second contact opening 162 can be formed by the same etching process. The first contact opening 161 and the second contact opening 162 can be formed by the same etching process as the air groove 1221. Of course, in other examples, the first contact opening 161 and the second contact opening 162 can also be formed by different etching steps from the air groove 1221.
[0120] In step S124 , referring to step S124 in FIG. 2 and FIG. 8 , a sacrificial layer 125 is filled in the air groove 1221 .
[0121] As an example, the sacrificial layer 125 may be formed by, but is not limited to, a physical vapor deposition process, a chemical vapor deposition process, or an atomic layer deposition process, and the sacrificial layer 125 fills each air groove 1221 .
[0122] As an example, the upper surface of the sacrificial layer 125 may be flush with the upper surface of the dielectric layer 122 .
[0123] As an example, the material of the sacrificial layer 125 is different from the material layer of the dielectric layer 122; specifically, under the same etching conditions, the etching rate of the sacrificial layer 125 is significantly greater than the etching rate of the dielectric layer 122, so as to facilitate the subsequent removal of the sacrificial layer 125 without causing significant etching to the dielectric layer 122.
[0124] As an example, please refer to Figure 9. After filling the sacrificial layer 125 in the air groove 1221 and before forming the upper electrode on the dielectric layer 122, that is, between step S124 and step S125, the following steps can also be included: forming a protective layer, the protective layer covering the dielectric layer 122, the sacrificial layer 125 and the exposed surface of the lower electrode.
[0125] As an example, the protective layer may be formed by, but is not limited to, a physical vapor deposition process, a chemical vapor deposition process, or an atomic layer deposition process.
[0126] It should be noted that the protective layer formed in this step can be a continuous layer structure, but in order to facilitate subsequent description and to more conveniently display the variable capacitor 11 and the reference capacitor 12, the protective layer 114 in the variable electrode 11 and the protective layer 124 in the reference capacitor 12 are separately labeled in Figure 9 and subsequent figures.
[0127] In step S125 , referring to step S125 in FIG. 2 and FIG. 10 , a top electrode is formed on the dielectric layer 122 .
[0128] As an example, a physical vapor deposition process, a chemical vapor deposition process, or an atomic layer deposition process may be used, but is not limited to, to form the upper electrode on the dielectric layer 122. Specifically, the upper electrode may include, but is not limited to, a polysilicon layer.
[0129] It should be noted that, when a protective layer is formed, the upper electrode is formed on the protective layer.
[0130] It should be further explained that the upper electrode formed in step S125 can be a continuous layer structure, but in order to facilitate subsequent description and to more conveniently display the variable capacitor 11 and the reference capacitor 12, the upper electrode 113 in the variable electrode 11 and the lower electrode 123 in the reference capacitor 12 are separately labeled in Figure 10 and subsequent figures.
[0131] In step S126, referring to step S126 in FIG. 2 and FIG. 11, a first release hole (not shown) and a second release hole 14 are formed; the first release hole penetrates the upper electrode at least along the thickness direction to expose the sacrificial layer 125; the second release hole 14 penetrates the upper electrode at least along the thickness direction to expose the dielectric layer 122.
[0132] As an example, when a protective layer is formed, the first and second release holes 14 also penetrate the protective layer in the thickness direction.
[0133] As an example, the upper electrode and the protective layer may be etched by, but not limited to, photolithography and etching processes to form the first release hole and the second release hole 14; specifically, the upper electrode and the protective layer may be etched by, but not limited to, photolithography and dry etching processes to form the first release hole and the second release hole 14.
[0134] As an example, the number of first release holes can be multiple, and the first release holes can be arranged in a one-to-one correspondence with the air grooves 1221. The number of second release holes can be set according to actual needs, and the number of second release holes can be one, two, three, four, five, or even more. The shapes of the first release holes and the second release holes can be set according to actual needs and are not specifically limited here.
[0135] As an example, in step S126, while forming the first release hole and the second release hole 14, the first contact hole 163 and the second contact hole 164 are also formed; the first contact hole 163 is located in the first contact opening 161 and exposes the lower electrode 111 of the variable capacitor 11; the second contact hole 164 is located in the second contact opening 162 and exposes the lower electrode 121 of the reference capacitor 12.
[0136] In step S127 , referring to step S127 in FIG. 2 and FIG. 12 , the sacrificial layer 125 is removed through the first release hole to release the air groove 1221 .
[0137] As an example, the sacrificial layer 125 can be removed through the first release hole using, but not limited to, an etching process. Specifically, the sacrificial layer 125 can be removed through the first release hole using, but not limited to, a wet etching process. The wet etching solution used in the wet etching process has a significantly higher etching rate for the sacrificial layer 125 than for the upper electrode, the protective layer, and the dielectric layer 122.
[0138] As an example, referring to FIG. 13 , before removing a portion of the dielectric layer 122 through the second release hole 14 to form the air cavity 112 , that is, between step S127 and step S128 , the process may further include forming a first through hole 151 , which penetrates the substrate 10 along the thickness direction to expose a portion of the underlying dielectric layer 13 .
[0139] As an example, the substrate 10 may be etched by, but not limited to, photolithography and etching processes to form the first through hole 151 ; specifically, the substrate 10 may be etched by, but not limited to, photolithography and dry etching processes to form the first through hole 151 .
[0140] As an example, the shape of the first through hole 151 can be set according to actual needs and is not specifically limited here.
[0141] In step S128 , referring to step S128 in FIG. 2 and FIG. 13 , a portion of the dielectric layer 122 is removed through the second release hole 14 to form the air cavity 112 .
[0142] As an example, an etching process may be used but is not limited to removing a portion of the dielectric layer 122 through the second release hole 14; specifically, a wet etching process may be used but is not limited to removing a portion of the dielectric layer 122 through the second release hole 14; the wet etching solution used in the wet etching process has an etching rate for the dielectric layer 122 that is significantly greater than an etching rate for the upper electrode and the protective layer.
[0143] As an example, while a portion of the dielectric layer 122 is removed through the second release hole 14 to form the air cavity 1112, that is, in step S128, while a portion of the dielectric layer 122 is removed through the second release hole 14, the exposed underlying dielectric layer 13 is removed through the first through hole 151 to form a second through hole 152. The second through hole 152 and the first through hole 151 together constitute a through hole structure 15; the through hole structure 15 exposes the lower electrode 111 of the variable capacitor 11 and is located below the air cavity 112.
[0144] As an example, please refer to Figure 14. After removing part of the dielectric layer 122 through the second release hole 14 to form the air cavity 112, that is, after step S128, the following steps may also be included: forming a first solder pad 171, a second solder pad 172, a third solder pad 173 and a fourth solder pad 174; wherein, the first solder pad 171 is located in the first contact hole 163 and is located on the lower electrode 111 of the variable capacitor 11; the second solder pad 172 is located on the upper electrode 113 of the variable capacitor 11; the third solder pad 173 is located in the second contact hole 164 and is located on the lower electrode 121 of the reference capacitor 12; and the fourth solder pad 174 is located on the upper electrode 123 of the reference capacitor 12.
[0145] As an example, the first pad 171 , the second pad 172 , the third pad 173 and the fourth pad 174 may each include a metal pad, such as a copper pad, an aluminum pad, a nickel pad or a gold pad.
[0146] It should be understood that although the steps in the flowcharts of Figures 1 and 2 are shown in sequence as indicated by the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order restriction on the execution of these steps, and these steps can be executed in other orders. Moreover, at least a portion of the steps in Figures 1 and 2 may include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least a portion of steps or stages in other steps.
[0147] It should be noted that the preparation methods of the capacitive pressure sensors in the embodiments of the present application can be used to prepare corresponding capacitive pressure sensors. Therefore, the technical features between the method embodiments and the structural embodiments can be replaced and supplemented with each other without conflict, so that those skilled in the art can understand the technical content of this application.
[0148] In another embodiment, please refer to Figure 14 in conjunction with Figures 1 to 13. The present application provides a capacitive pressure sensor, which may include: a substrate 10, a variable capacitor 11, and a reference capacitor 12. The variable capacitor 11 is located on the substrate 10; the reference capacitor 12 is located on the substrate 10 and is located outside the variable capacitor 11, with a spacing therebetween; wherein the variable capacitor 11 and the reference capacitor 12 each include a lower electrode, an upper electrode, and a capacitive dielectric located between the lower and upper electrodes; the capacitive dielectric of the variable capacitor 11 includes an air cavity 112, and the capacitive dielectric of the reference capacitor 12 includes a dielectric layer 122 having an air groove 1221.
[0149] The capacitive pressure sensor of the present application has both a variable capacitor 11 and a reference capacitor 12. By adding the reference capacitor 12, a calibration function is added, thereby improving the test accuracy of the capacitive pressure sensor. In addition, an air groove 1221 is introduced into the dielectric layer 122 of the reference capacitor 12, and the capacitance of the reference capacitor 12 can be adjusted by changing the size of the air groove 1221, thereby increasing the controllability of the reference capacitor 12. Due to the high controllability of the reference capacitor 12, the test accuracy of the capacitive pressure sensor can be improved by precisely controlling the reference capacitor 12 as needed.
[0150] As an example, the substrate 10 may include but is not limited to a silicon substrate, a silicon carbide substrate, a gallium nitride substrate, a silicon germanium substrate, etc.; in this embodiment, the substrate 10 may be a silicon substrate.
[0151] It should be noted that the lower electrode can be a continuous layer structure, but in order to facilitate subsequent description and to more conveniently display the variable capacitor 11 and the reference capacitor 12, the lower electrode 111 in the variable electrode 11 and the lower electrode 121 in the reference capacitor 12 are separately labeled in each figure.
[0152] It should be further explained that the upper electrode can be a continuous layer structure, but in order to facilitate subsequent description and to more conveniently display the variable capacitor 11 and the reference capacitor 12, the upper electrode 113 in the variable electrode 11 and the upper electrode 123 in the reference capacitor 12 are separately marked in each figure.
[0153] As an example, the upper electrode 113, the upper electrode 123, the lower electrode 111, and the lower electrode 121 can all comprise polysilicon electrodes. Using polysilicon as the upper and lower electrodes can increase the sensitivity of the variable capacitor 11 and shorten the preparation cycle of the capacitive pressure sensor and simplify the process.
[0154] As an example, the capacitive pressure sensor may further include a bottom dielectric layer 13 , which is located between the substrate 10 and the lower electrode 121 . Specifically, the bottom dielectric layer 13 is located on the substrate 10 , and the lower electrode 121 is located on the bottom dielectric layer 13 .
[0155] As an example, the bottom dielectric layer 13 may include but is not limited to an oxide layer, such as a silicon oxide layer.
[0156] As an example, the capacitive pressure sensor may further include a protection layer, where the protection layer is located between the upper electrode and the capacitor medium.
[0157] It should be noted that the protective layer can be a continuous layer structure, but for the convenience of subsequent description and for more convenient display of the variable capacitor 11 and the reference capacitor 12, the protective layer 114 in the variable electrode 11 and the protective layer 124 in the reference capacitor 12 are marked separately in each figure.
[0158] Specifically, the protective layer 114 in the variable electrode 11 is located between the upper electrode 113 and the air cavity 112 , and the protective layer 124 in the reference capacitor 12 is located between the upper electrode 123 and the dielectric layer 122 .
[0159] As an example, the capacitive pressure sensor may also include a first release hole (not shown), a second release hole 14 and a through-hole structure 15; the first release hole penetrates the upper electrode and the protective layer along the thickness direction and is connected to the air groove 1221; the second release hole 124 penetrates the upper electrode and the protective layer along the thickness direction and is connected to the air cavity 112; the through-hole structure 15 penetrates the substrate 10 and the underlying dielectric layer 13 along the thickness direction to expose the lower electrode 111 of the variable capacitor 11; the through-hole structure 15 is located below the air cavity 112.
[0160] As an example, the number of first release holes can be multiple, and the first release holes can be arranged in a one-to-one correspondence with the air grooves 1221. The number of second release holes can be set according to actual needs, and the number of second release holes can be one, two, three, four, five, or even more. The shapes of the first release holes and the second release holes can be set according to actual needs and are not specifically limited here.
[0161] As an example, the through-hole structure 15 may include a first through-hole 151 and a second through-hole 152 that are connected to each other.
[0162] As an example, the capacitive pressure sensor may also include: a first contact opening 161, a second contact opening 162, a first contact hole 163 and a second contact hole 164; the first contact opening 161 and the second contact opening 162 are located in the dielectric layer 122, the first contact opening 161 exposes the lower electrode 111 of the variable capacitor 11, and the second contact opening 162 exposes the lower electrode 121 of the reference capacitor 12; the first contact hole 163 is located in the first contact opening 161 and exposes the lower electrode 111 of the variable capacitor 11; the second contact hole 164 is located in the second contact opening 162 and exposes the lower electrode 121 of the reference capacitor 12.
[0163] As an example, please continue to refer to Figure 14. The capacitive pressure sensor may also include: a first pad 171, a second pad 172, a third pad 173 and a fourth pad 174; wherein, the first pad 171 is located in the first contact hole 163 and is located on the lower electrode 111 of the variable capacitor 11; the second pad 172 is located on the upper electrode 113 of the variable capacitor 11; the third pad 173 is located in the second contact hole 164 and is located on the lower electrode 121 of the reference capacitor 12; the fourth pad 174 is located on the upper electrode 123 of the reference capacitor 12.
[0164] As an example, the first pad 171 , the second pad 172 , the third pad 173 and the fourth pad 174 may each include a metal pad, such as a copper pad, an aluminum pad, a nickel pad or a gold pad.
[0165] As an example, the variable capacitor 11 may be connected in series with the reference capacitor 12 . Specifically, but not limited to, the lower electrode 111 of the variable capacitor 11 and the lower electrode 112 of the reference capacitor 12 may be connected in series.
[0166] In the above embodiment, the dielectric layer 122 of the reference capacitor 12 of the capacitive pressure sensor of the present application introduces an air groove 1221 so that the capacitance of the reference capacitor 12 is constant and does not change with environmental changes. As needed, by changing the size of the air groove 1221, the capacitance of the reference capacitor 12 can be adjusted to the required capacitance, that is, the size of the air groove 1221 can be set as needed to obtain a reference capacitor 12 of the required capacitance, thereby increasing the controllability of the reference capacitor 12. In the initial state of the air groove 1221 provided in the dielectric layer 122 of the reference capacitor 12, the capacitance difference between the reference capacitor 12 and the variable capacitor 11 is close to 0. In addition, the variable capacitor 11 of the present application can be distributed in the central area (i.e., the core area) of the substrate 10, and the reference capacitor 12 can be distributed in the area outside the central area; when the number of reference capacitors 12 is multiple, the multiple reference capacitors 12 can be arranged at intervals along the circumference of the variable capacitor 11.
[0167] In the capacitive pressure sensor of the present application, the upper electrode 113 and the lower electrode 111 of the variable capacitor 11 are both polysilicon electrodes, the lower electrode 111 is used as a pressure sensitive film, and the electrode gap between the upper electrode 113 and the lower electrode 111 (i.e., the air cavity 112) can be realized by removing the dielectric layer 122 by HF corrosion. The reference capacitor 12 makes rational use of parasitic capacitance and is distributed in the area outside the variable capacitor 11; the working principle of the reference capacitor 12 is similar to that of the variable capacitor 11, and there is no sensitive film between the upper electrode 123 and the lower electrode 121. The dielectric layer 122 with the air groove 1221 is used as the capacitor medium to form a controllable and constant capacitance. The dual capacitance setting of the variable capacitor 11 and the reference capacitor 12, setting the reference capacitor 12 in the area outside the variable capacitor 11 of the capacitive pressure sensor, reduces noise interference, reduces the test error of the capacitive pressure sensor, and improves the test accuracy.
[0168] In the capacitive pressure sensor of the present application, the capacitive medium of the reference capacitor 12 is fixed and the capacitance value remains unchanged. The capacitive medium of the variable capacitor 11 is fixed, and the distance between the upper electrode 113 and the lower electrode 111 causes the capacitance value to change as the pressure changes, thereby forming a capacitive pressure sensor. The lower electrode 111 of the variable capacitor 11 is a sensitive membrane, and the upper electrode 113 is fixed. As the pressure changes, the sensitive membrane will deform, the distance between the upper electrode 113 and the lower electrode 111 will change, and the capacitance value will change accordingly, thereby forming a variable capacitor. The upper electrode 121 and the lower electrode 123 of the reference capacitor 12 are in a constant position, forming a fixed capacitor. The application end tests the output difference between the two to reduce the test error of the capacitive pressure sensor and improve the test accuracy.
[0169] The technical features of the above-mentioned embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features of the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0170] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that a person of ordinary skill in the art may make various modifications and improvements without departing from the spirit of the present application, and these modifications and improvements fall within the scope of protection of the present application. Therefore, the scope of protection of the present patent application shall be determined by the appended claims.
Claims
1. A capacitive pressure sensor, characterized in that: include: substrate; a variable capacitor located on the substrate; A reference capacitor is located on the substrate on one side of the variable capacitor, wherein the reference capacitor and the variable capacitor have a distance therebetween; wherein, The variable capacitor and the reference capacitor both include a lower electrode, an upper electrode, and a capacitor dielectric located between the lower electrode and the upper electrode; the capacitor dielectric of the variable capacitor includes an air cavity, and the capacitor dielectric of the reference capacitor includes a dielectric layer with an air groove.
2. The capacitive pressure sensor according to claim 1, wherein: The upper electrode and the lower electrode each include a polysilicon electrode.
3. The capacitive pressure sensor according to claim 1, wherein: The capacitive pressure sensor further comprises: a bottom dielectric layer, located between the lower electrode and the substrate; A protective layer is located between the upper electrode and the capacitor medium.
4. The capacitive pressure sensor according to claim 3, wherein: The capacitive pressure sensor further comprises: a first release hole, penetrating the upper electrode and the protective layer in a thickness direction and communicating with the air groove; a second release hole, penetrating the upper electrode and the protective layer in a thickness direction and communicating with the air cavity; A through-hole structure penetrates the substrate and the bottom dielectric layer in a thickness direction to expose the lower electrode of the variable capacitor; the through-hole structure is located below the air cavity.
5. The capacitive pressure sensor according to claim 1, wherein: The capacitive pressure sensor further comprises: a first pad in contact with the lower electrode of the variable capacitor; a second pad in contact with the upper electrode of the variable capacitor; a third pad, contacting the lower electrode of the reference capacitor; A fourth pad contacts the upper electrode of the reference capacitor.
6. A method for preparing a capacitive pressure sensor, characterized in that: include: providing a substrate; forming a variable capacitor and a reference capacitor on the substrate; The reference capacitor is located on one side of the variable capacitor and has a distance from the variable capacitor; the variable capacitor and the reference capacitor both include a lower electrode, an upper electrode, and a capacitor dielectric located between the lower electrode and the upper electrode; the capacitor dielectric of the variable capacitor includes an air cavity, and the capacitor dielectric of the reference capacitor includes a dielectric layer with an air groove.
7. The method for preparing a capacitive pressure sensor according to claim 6, wherein: The step of forming a variable capacitor and a reference capacitor on the substrate includes: forming a lower electrode on the substrate; forming a dielectric layer, wherein the dielectric layer covers the lower electrode; etching the dielectric layer to form an air groove in the dielectric layer; filling a sacrificial layer in the air groove; forming an upper electrode on the dielectric layer; forming a first release hole and a second release hole; wherein the first release hole penetrates the upper electrode at least along the thickness direction to expose the sacrificial layer; and the second release hole penetrates the upper electrode at least along the thickness direction to expose the dielectric layer; removing the sacrificial layer through the first release hole to release the air groove; A portion of the dielectric layer is removed through the second release hole to form the air cavity.
8. The method for preparing a capacitive pressure sensor according to claim 7, wherein: Before forming the lower electrode on the substrate, the method further includes: forming a bottom dielectric layer on the substrate; the lower electrode is formed on the bottom dielectric layer; Before removing a portion of the dielectric layer based on the second release hole to form the air cavity, the method further includes: forming a first through hole, the first through hole penetrating the substrate along a thickness direction to expose a portion of the underlying dielectric layer; While partially removing the dielectric layer based on the second release hole to form the air cavity, the exposed underlying dielectric layer is also removed through the first through hole to form a second through hole. The second through hole and the first through hole together constitute a through hole structure; the through hole structure exposes the lower electrode of the variable capacitor and is located below the air cavity.
9. The method for preparing a capacitive pressure sensor according to claim 7, wherein: Etching the dielectric layer to form an air groove in the dielectric layer and also forming a first contact opening and a second contact opening in the dielectric layer, wherein the first contact opening exposes the lower electrode of the variable capacitor and the second contact opening exposes the lower electrode of the reference capacitor; After filling the air groove with a sacrificial layer and before forming the upper electrode on the dielectric layer, the method further includes forming a protective layer, wherein the protective layer covers the dielectric layer, the sacrificial layer and the exposed surface of the lower electrode.
10. The method for preparing a capacitive pressure sensor according to claim 9, wherein: When forming the first release hole and the second release hole, a first contact hole and a second contact hole are also formed; the first contact hole is located in the first contact opening and exposes the lower electrode of the variable capacitor; the second contact hole is located in the second contact opening and exposes the lower electrode of the reference capacitor; After removing part of the dielectric layer through the second release hole to form the air cavity, it also includes: forming a first pad, a second pad, a third pad and a fourth pad; wherein the first pad is located in the first contact hole and is located on the lower electrode of the variable capacitor; the second pad is located on the upper electrode of the variable capacitor; the third pad is located in the second contact hole and is located on the lower electrode of the reference capacitor; the fourth pad is located on the upper electrode of the reference capacitor.
Citation Information
Patent Citations
MEMS capacitive pressure sensor chip and manufacturing process thereof
CN112857628A
Capacitive pressure sensor and preparation method thereof
CN114518186A
Capacitive pressure sensor and manufacturing method thereof
CN115594145A
Capacitive pressure sensor and test auxiliary system of semiconductor structure
CN116380302A
Method for self-monitoring a ceramic pressure measuring cell of a capacitive pressure sensor and evaluation circuit for carrying out said method
US20130269412A1