Photodetection device

Abstract

A photodetection device that prevents decrease in a saturation charge amount and reduces or suppresses a parasitic light sensitivity is provided.　The photodetection device includes a plurality of photoelectric conversion sections that is arranged to be adjacent along a light incident surface for each pixel and accumulates a charge photoelectrically converted according to a light amount of incident light from the light incident surface, a light shielding section that is arranged substantially parallel to the light incident surface in the plurality of photoelectric conversion sections, and a charge holding section that is arranged on an opposite side to the light incident surface of the plurality of photoelectric conversion sections and is arranged at a place where at least a part overlaps the light shielding section in plan view to hold the charge.

Description

PHOTODETECTION DEVICECROSS REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of Japanese Priority Patent Application JP 2024-044097 filed on March 19, 2024, the entire contents of which are incorporated herein by reference.

[0002] The present disclosure relates to a photodetection device.

[0003] A global shutter method imaging device has been known that transfers a charge from a charge holding section to a floating diffusion region (floating diffusion) for each pixel row and generates a pixel signal after starting exposure in all pixels at the same time and holding charges generated by the exposure in the charge holding section (refer to PTLs 1 and 2).

[0004] With progress of microfabrication technology, the number of pixels of the imaging device tends to increase, and a pixel size decreases accordingly. For example, PTL 1 discloses a structure in which two photoelectric conversion sections and two charge holding sections are provided in a single pixel. By providing the two photoelectric conversion sections in each pixel, it is possible to detect a phase difference signal.

[0005] Moreover, PTL 2 discloses a configuration in which two photoelectric conversion sections and a single charge holding section are provided in a single pixel.

[0006] WO 2021 / 117648 AJP 2013-172210 ASummary

[0007] As in PTL 1, in a case where the two photoelectric conversion sections and the two charge holding sections are provided in each pixel, the size of the charge holding section is reduced. Therefore, it is difficult to cause the charge holding section to efficiently hold a charge photoelectrically converted by the photoelectric conversion section. In particular, in the photoelectric conversion section of each pixel, in order to prevent incident light from a light incident surface from directly entering the charge holding section without being photoelectrically converted by the photoelectric conversion section, a horizontal light shielding member may be arranged substantially parallel to the light incident surface, on the light incident surface side than the charge holding section. Since the charge photoelectrically converted by the photoelectric conversion section is less likely to reach the charge holding section when the horizontal light shielding member is arranged, when the size of the charge holding section is halved as in PTL 1, the number of charges held by the charge holding section is reduced, a saturation charge amount Qs decreases, a parasitic light sensitivity (PLS) deteriorates, and there is a possibility that image quality of an imaged image deteriorates.

[0008] Furthermore, PTL 2 does not disclose the horizontal light shielding member described above, does not recognize the problems in a case where the horizontal light shielding member is provided, and does not disclose countermeasures for solving the problems.

[0009] Therefore, the present disclosure provides a photodetection device that can prevent decrease in a saturation charge amount and reduce or suppress a parasitic light sensitivity.

[0010] According to the present disclosure, there is provided a photodetection device that includes: a plurality of photoelectric conversion sections that is arranged to be adjacent along a light incident surface for each pixel and each accumulates a charge photoelectrically converted according to a light amount of incident light from the light incident surface; a light shielding section that is arranged substantially parallel to the light incident surface in the plurality of photoelectric conversion sections; and a charge holding section that is arranged on an opposite side to the light incident surface of the plurality of photoelectric conversion sections and is arranged at a place where at least a part overlaps the light shielding section in plan view to hold the charge.

[0011] The charge holding section may hold the charge photoelectrically converted by each of the plurality of photoelectric conversion sections.

[0012] The charge holding section may be arranged across the plurality of photoelectric conversion sections.

[0013] The light shielding section may be arranged immediately below the charge holding section, as viewed from the light incident surface side.

[0014] The light shielding section may be arranged along a crystal plane represented by a plane index (111).

[0015] A plurality of the light shielding sections may be respectively arranged at different depths of the plurality of photoelectric conversion sections.

[0016] The plurality of photoelectric conversion sections includes a first photoelectric conversion section and a second photoelectric conversion section, and the light shielding section may be arranged substantially parallel to the light incident surface in the first photoelectric conversion section and the second photoelectric conversion section and across the first photoelectric conversion section and the second photoelectric conversion section.

[0017] A pixel separation section is included that is arranged from the light shielding section and along a boundary between the first photoelectric conversion section and the second photoelectric conversion section, and the light shielding section may be bonded to the pixel separation section.

[0018] The pixel separation section may include a light shielding material.

[0019] The pixel separation section may include a material of which at least one of a light absorptivity or a light reflectance is lower than that of the light shielding section.

[0020] The material may include an insulating material, a metal material, polysilicon, a metal oxide, a carbon-containing material, or an electrochromic material.

[0021] The first photoelectric conversion section and the second photoelectric conversion section may have a same volume.

[0022] The first photoelectric conversion section may have a larger volume than the second photoelectric conversion section.

[0023] A floating diffusion region may be included to which a charge photoelectrically converted by the first photoelectric conversion section is transferred after being held by the charge holding section and to which a charge photoelectrically converted by the second photoelectric conversion section is transferred without being held by the charge holding section.

[0024] A plurality of pixels each including the first photoelectric conversion section, the second photoelectric conversion section, the light shielding section, and the charge holding section is included, an exposure period of the first photoelectric conversion section in each of the plurality of pixels may be longer than an exposure period of the second photoelectric conversion section, the charge photoelectrically converted by the first photoelectric conversion section may be transferred to the floating diffusion region after being held by the charge holding section, and the charge photoelectrically converted by the second photoelectric conversion section may be transferred to the floating diffusion region without being held by the charge holding section.

[0025] An amplification transistor that generates a pixel signal according to the charge transferred to the floating diffusion region, a selection transistor that selects whether or not to output the pixel signal to a signal line, a reset transistor that switches whether or not to feed back a voltage level of the signal line to a gate of the amplification transistor, and a switching circuit that switches whether or not to connect a first current source that supplies a first reference voltage to a drain of the amplification transistor and generates a current flowing from the signal line to a second reference voltage node to the signal line or to connect a second current source that supplies a second reference voltage at a voltage level lower than the first reference voltage to the drain of the amplification transistor and generates a current flowing from the signal line to between a drain and a source of the reset transistor to the signal line may be included.

[0026] When the reset transistor is turned on, the second reference voltage at the voltage level lower than the first reference voltage may be supplied to the drain of the amplification transistor, and the second current source may be connected to the signal line, and when the reset transistor is turned off, the first reference voltage may be supplied to the drain of the amplification transistor, and the first current source may be connected to the signal line.

[0027] A plurality of the pixels each including the first photoelectric conversion section, the second photoelectric conversion section, the light shielding section, and the charge holding section and a control section that alternatively selects one of a first mode in which a global shutter operation is performed for holding charges obtained by starting exposure by the first photoelectric conversion section and the second photoelectric conversion section in each of the plurality of pixels at the same time, in the charge holding section and a second mode in which a global shutter operation for holding the charge obtained by starting the exposure by the second photoelectric conversion section in the charge holding section is performed after the global shutter operation is performed for holding the charge obtained by starting the exposure by the first photoelectric conversion section in each of the plurality of pixels in the charge holding section may be included.

[0028] A floating diffusion region to which the charge photoelectrically converted by the first photoelectric conversion section is transferred after being held by the charge holding section and to which the charge photoelectrically converted by the second photoelectric conversion section is transferred after being held by the charge holding section, a plurality of the pixels each including the first photoelectric conversion section, the second photoelectric conversion section, the light shielding section, and the charge holding section, a control section that alternatively selects a first mode in which a global shutter operation is performed for holding charges obtained by starting exposure by the first photoelectric conversion section and the second photoelectric conversion section in each of the plurality of pixels at the same time, in the charge holding section and a second mode in which the charge obtained by starting the exposure by the second photoelectric conversion section is transferred to the floating diffusion region without being held by the charge holding section, after the charge obtained by starting the exposure by the first photoelectric conversion section in each of the plurality of pixels is transferred to the floating diffusion region without being held by the charge holding section, and a defocus amount calculation section that detects an image plane phase difference signal on the basis of a pixel signal according to the charge that is photoelectrically converted by the first photoelectric conversion section and transferred to the floating diffusion region and a pixel signal according to the charge that is photoelectrically converted by the second photoelectric conversion section and transferred to the floating diffusion region, at the time of the second mode may be included.

[0029] Fig. 1 is a block diagram illustrating an overall configuration of a photodetection device according to a first embodiment of the present disclosure.Fig. 2A is a cross-sectional view of one pixel of the photodetection device according to the first embodiment.Fig. 2B is a cross-sectional view according to a modification of Fig. 2A.Fig. 3 is a cross-sectional view of one pixel of a photodetection device according to a comparative example.Fig. 4 is a circuit diagram of one pixel of the photodetection device according to the first embodiment.Fig. 5 is a diagram schematically illustrating charge transfer in a pixel according to the first embodiment.Fig. 6A is a diagram for describing a procedure of the charge transfer using the same schematic view as Fig. 5.Fig. 6B is a diagram for describing a procedure subsequent to Fig. 6A.Fig. 6C is a diagram for describing a procedure subsequent to Fig. 6B.Fig. 6D is a diagram for describing a procedure subsequent to Fig. 6C.Fig. 6E is a diagram for describing a procedure subsequent to Fig. 6D.Fig. 6F is a diagram for describing a procedure subsequent to Fig. 6E.Fig. 7 is a timing chart illustrating a timing when accumulated charges of a long-accumulating PD and a short-accumulating PD of each pixel are transferred.Figs. 8A and 8B are reading timing charts of a pixel signal for one frame corresponding to the procedure of the charge transfer illustrated in Figs. 6A to 6F.Fig. 9 is a circuit diagram of each pixel included in a photodetection device according to a second embodiment.Fig. 10 is a diagram illustrating a correspondence relationship between a voltage of a vertical signal line and a voltage of a floating diffusion region FD.Figs. 11A to 11C are diagrams for describing a first mode and a second mode.Figs. 12A to 12C are diagrams for describing that the first mode or a third mode in which image plane phase difference detection is performed is alternatively selected.Fig. 13 is a circuit diagram of a pixel for realizing the third mode.Fig. 14 is a circuit diagram of a pixel according to a modification for realizing the third mode.Figs. 15A to 15C are diagrams for describing charge transfer in the first to the third modes.Fig. 16 is a diagram for describing a photodetection device according to a fourth embodiment.Figs. 17A and 17B are a longitudinal cross-sectional view and a transverse cross-sectional view of a photodetection device according to a fifth embodiment.Figs. 18A and 18B are a longitudinal cross-sectional view and a transverse cross-sectional view of a photodetection device according to a first modification of the fifth embodiment.Figs. 19A and 19B are a longitudinal cross-sectional view and a transverse cross-sectional view of a photodetection device according to a second modification of the fifth embodiment.Figs. 20A and 20B are a longitudinal cross-sectional view and a transverse cross-sectional view of a photodetection device according to a third modification of the fifth embodiment.Figs. 21A and 21B are a longitudinal cross-sectional view and a transverse cross-sectional view of a photodetection device according to a fourth modification of the fifth embodiment.Figs. 22A and 22B are a longitudinal cross-sectional view and a transverse cross-sectional view of a photodetection device according to a fifth modification of the fifth embodiment.Figs. 23A and 23B are a longitudinal cross-sectional view and a transverse cross-sectional view of a photodetection device according to a sixth modification of the fifth embodiment.Figs. 24A and 24B are a longitudinal cross-sectional view and a plan layout view of a photodetection device according to a comparative example in Figs. 23A and 23B.Fig. 25A is a manufacturing process diagram for sequentially describing a manufacturing process of each pixel of the photodetection device according to the first embodiment.Fig. 25B is a manufacturing process diagram subsequent to Fig. 25A.Fig. 25C is a manufacturing process diagram subsequent to Fig. 25B.Fig. 25D is a manufacturing process diagram subsequent to Fig. 25C.Fig. 25E is a manufacturing process diagram subsequent to Fig. 25D.Fig. 25F is a manufacturing process diagram subsequent to Fig. 25E.Fig. 25G is a manufacturing process diagram subsequent to Fig. 25F.Fig. 25H is a manufacturing process diagram subsequent to Fig. 25G.Fig. 25I is a manufacturing process diagram subsequent to Fig. 25H.Fig. 25J is a manufacturing process diagram subsequent to Fig. 25I.Fig. 25K is a manufacturing process diagram subsequent to Fig. 25J.Fig. 25L is a manufacturing process diagram subsequent to Fig. 25K.Fig. 25M is a manufacturing process diagram subsequent to Fig. 25L.Fig. 25N is a manufacturing process diagram subsequent to Fig. 25M.Fig. 25O is a manufacturing process diagram subsequent to Fig. 25N.Fig. 25P is a manufacturing process diagram subsequent to Fig. 25O.Fig. 26 is a block diagram illustrating an example of a schematic configuration of a vehicle control system.Fig. 27 is an explanatory view illustrating an example of installation positions of an outside-vehicle information detecting section and imaging sections.

[0030] Hereinafter, embodiments of a photodetection device according to the present disclosure will be described with reference to the drawings. Hereinafter, a main component portion of the photodetection device according to the present disclosure will be mainly described. However, components and functions that are not illustrated or described may exist in the photodetection device according to the present disclosure. The following description does not exclude the components and the functions that are not illustrated or described.

[0031] (First Embodiment) (Overall Configuration of Photodetection Device) Fig. 1 is a block diagram illustrating an overall configuration of a photodetection device 1 according to a first embodiment of the present disclosure.

[0032] The photodetection device 1 according to the first embodiment is a so-called global shutter method back-illuminated image sensor. The photodetection device 1 receives light from a subject, photoelectrically converts the light, and generates an image signal to capture an image.

[0033] The global shutter method is basically a method of performing global exposure in which exposure is started simultaneously for all pixels and exposure is terminated simultaneously for all pixels. Here, all the pixels mean all the pixels in a portion appearing in the image, and dummy pixels and the like are excluded. In addition, if a time difference and distortion of the image are sufficiently small so as not to cause a problem, a method of moving a region where global exposure is performed while performing global exposure in units of a plurality of rows (for example, several tens of rows) instead of all pixels at the same time is also included in the global shutter method. Furthermore, the global shutter method also includes a method of performing the global exposure on pixels in a predetermined region instead of all the pixels in a portion appearing in the image.

[0034] The back-illuminated image sensor refers to an image sensor having a configuration in which a photoelectric conversion section such as a photoelectric conversion section that receives light from a subject and converts the light into an electric signal is provided between a light incident surface where the light from the subject enters and a wiring layer provided with wiring such as a transistor that drives each pixel.

[0035] The photodetection device 1 includes, for example, a pixel array section 2, a vertical drive section 3, a column processing section 4, a data storage section 5, a horizontal drive section 6, a system control section 7, and a signal processing section 8.

[0036] In the photodetection device 1, the pixel array section 2 is formed on a semiconductor substrate. Peripheral circuits such as the vertical drive section 3, the column processing section 4, the data storage section 5, the horizontal drive section 6, the system control section 7, or the signal processing section 8 are formed on the same semiconductor substrate as the pixel array section 2, for example.

[0037] The pixel array section 2 includes a plurality of sensor pixels 10 including a photoelectric conversion section 11 that generates and accumulates charges corresponding to an amount of light incident from the subject. Hereinafter, the sensor pixel 10 is simply referred to as a pixel 10.

[0038] As illustrated in Fig. 1, the pixels 10 are arrayed in each of a first direction (for example, row direction) X and a second direction (for example, column direction) Y. In the pixel array section 2, a pixel 10 driving line 9 is wired along the first direction (for example, row direction) X, for each pixel row including the pixels 10 arrayed in the first direction (for example, row direction) X in a line, and a vertical signal line VSL is wired along the second direction (for example, column direction) Y, for each pixel column including the pixels 10 arrayed in the second direction (for example, column direction) Y in a line.

[0039] The vertical drive section 3 includes a shift register, an address decoder, or the like. The vertical drive section 3 supplies a signal or the like to each of the plurality of pixels 10 via the plurality of pixel 10 driving lines 9, thereby driving all of the plurality of pixels 10 in the pixel array section 2 at the same time or in units of pixel rows.

[0040] A signal output from each unit pixel 10 in the pixel row selectively scanned by the vertical drive section 3 is supplied to the column processing section 4 through each vertical signal line VSL. The column processing section 4 performs predetermined signal processing on the signal output from each unit pixel 10 of the selected row through the vertical signal line VSL for each pixel column of the pixel array section 2, and temporarily holds the pixel signals after the signal processing.

[0041] Specifically, the column processing section 4 includes, for example, a shift register, an address decoder, or the like, performs noise removal processing, correlated double sampling processing, analog / digital (A / D) conversion processing of an analog pixel signal, or the like, and generates a digital pixel signal. The column processing section 4 supplies the generated pixel signal to the signal processing section 8.

[0042] The horizontal drive section 6 includes a shift register, an address decoder, and the like, and sequentially selects a unit circuit corresponding to the pixel column of the column processing section 4. The selective scanning is performed by the horizontal drive section 6 so that the pixel signals subjected to the signal processing for each unit circuit in the column processing section 4 are sequentially output to the signal processing section 8.

[0043] The system control section 7 includes a timing generator and the like that generate various timing signals. The system control section 7 performs drive control of the vertical drive section 3, the column processing section 4, the horizontal drive section 6, on the basis of the timing signal generated by the timing generator.

[0044] The signal processing section 8 performs signal processing such as arithmetic processing on the pixel signal supplied from the column processing section 4 while temporarily storing data in the data storage section 5 as necessary, and outputs an image signal including each pixel signal. As described later, the signal processing section 8 may incorporate a defocus amount calculation section that calculates a defocus amount on the basis of an image plane phase difference signal detected in each pixel 10. Alternatively, the defocus amount calculation section may be provided separately from the signal processing section 8.

[0045] At the time of signal processing by the signal processing section 8, the data storage section 5 temporarily stores data necessary for the signal processing,,

[0046] (Cross-Sectional Structure of Photodetection Device 1) Fig. 2A is a cross-sectional view of one pixel of the photodetection device 1 according to the first embodiment. In Fig. 2A, a cross-sectional structure of a main component portion for one pixel is illustrated. The photodetection device 1 according to the first embodiment includes the plurality of photoelectric conversion sections 11 for each pixel 10. Here, an example will be described in which the two photoelectric conversion sections 11 are included for each pixel 10. However, the three or more photoelectric conversion sections 11 may be provided for each pixel 10. Here, the two photoelectric conversion sections 11 provided for each pixel 10 are referred to as a first photoelectric conversion section PD1 and a second photoelectric conversion section PD2.

[0047] Each pixel 10 of the photodetection device 1 according to the present embodiment has, for example, a laminated structure in which a first substrate and a second substrate are laminated. The first substrate is arranged in a light incident direction, and the second substrate is arranged in a direction opposite to the light incident direction. Fig. 2A illustrates a cross-sectional structure of the first substrate. Here, the light incident surface of the first substrate is referred to as a back surface, and a surface opposite to a contact surface of the second substrate with the first surface is referred to as a front surface. On the first substrate, the pixel array section 2 in Fig. 1 is mainly arranged. Peripheral circuits or the like other than the pixel array section 2 in Fig. 1 are arranged on the second substrate. Here, circuits arranged on the second substrate may be collectively referred to as logic circuits, the first substrate may be referred to as a sensor chip, and the second substrate may be referred to as a logic chip. The first substrate and the second substrate are bonded, for example, with a couper couper connection (CCC), a via, a bump, or the like.

[0048] The first substrate is, for example, a P-type silicon substrate 12, and includes the two photoelectric conversion sections 11 and a charge holding section MEM, for each pixel. The photoelectric conversion section 11 and the charge holding section MEM are, for example, semiconductor regions including N-type impurities.

[0049] The plurality of pixels 10 in the pixel array section 2 is arranged on the first substrate, a color filter 14 is arranged on the light incident surface of the photoelectric conversion section 11 of each pixel 10, and an on-chip lens 15 is arranged on the color filter 14.

[0050] A pixel separation section 16 is provided along a boundary portion between the two photoelectric conversion sections 11. The pixel separation section 16 includes a light shielding material such as tungsten. The pixel separation section 16 includes a vertical light shielding portion 16V extending in a depth direction of the photoelectric conversion section 11 and a horizontal light shielding portion 16H extending in a direction substantially parallel to the light incident surface of the photoelectric conversion section 11. One end portion of the vertical light shielding portion 16V is bonded to the horizontal light shielding portion 16H, and a longitudinal cross-sectional shape of the pixel separation section 16 is a T-like shape. The horizontal light shielding portion 16H is arranged, for example, along a crystal plane of a silicon layer represented by a plane index (111). The vertical light shielding portion 16V and the horizontal light shielding portion 16H have a laminated structure, for example, including an inner layer portion 16a and an outer layer portion 16b. The inner layer portion 16a includes, for example, a material containing at least one of a single metal having a light shielding property, a metal alloy, a metal nitride, or a metal silicide. More specifically, the constituent material of the inner layer portion 16a may be aluminum (Al), copper (Cu), cobalt (Co), tungsten (W), titanium (Ti), tantalum (Ta), nickel (Ni), molybdenum (Mo), chromium (Cr), iridium (Ir), platinum iridium, a titanium nitride (TiN), a tungsten silicon compound, or the like. Among them, aluminum (Al) is the most optically preferable constituent material. Note that the inner layer portion 16a may include graphite or an organic material. The outer layer portion 16b includes, for example, an insulating material such as a silicon oxide (SiOx). The outer layer portion 16b ensures electrical insulation between the inner layer portion 16a and the silicon substrate 12.

[0051] A surface of the boundary portion of the pixel 10 may be covered with a fixed charge film 17. The fixed charge film 17 has a negative fixed charge in order to prevent occurrence of a dark current caused by an interface state of a back surface 12B that is the light incident surface of the silicon substrate 12. A hole accumulation layer is formed near the back surface 12B of the silicon substrate 12, by an electric field induced by the fixed charge film 17. This hole accumulation layer prevents generation of electrons from the back surface 12B. The fixed charge film 17 includes an insulating material such as HfO.

[0052] The charge holding section MEM is arranged on a side of a front surface 12S than the horizontal light shielding portion 16H. Although the charge holding section MEM is arranged across the first photoelectric conversion section PD1 and the second photoelectric conversion section PD2, a size of the charge holding section MEM is arbitrary. The charge holding section MEM is desirably arranged immediately below the horizontal light shielding portion 16H.

[0053] Both of the charge holding section MEM and the photoelectric conversion section 11 are N-type semiconductor regions, and a semiconductor region including P-type impurities is arranged around the photoelectric conversion section 11. The charge holding section MEM according to the present embodiment is arranged on a side opposite to the light incident surfaces of the first photoelectric conversion section PD1 and the second photoelectric conversion section PD2 and is arranged at a place where at least a part overlaps the horizontal light shielding portion 16H in plan view, and holds accumulated charges of the first photoelectric conversion section PD1 and the second photoelectric conversion section PD2.

[0054] The charge holding section MEM is connected to a wiring layer 19 via a contact or a via. A pixel transistor 36 is arranged around the wiring layer 19. A TRZ transistor that is a part of the pixel transistor includes a vertical gate electrode extending to the photoelectric conversion section 11. Vicinity of the wiring layer 19 and the pixel transistor is covered with an insulating layer 20. The second substrate is bonded by the CCC via Cu wiring (not illustrated) arranged on the insulating layer 20 (lowermost surface in Fig. 2A).

[0055] Fig. 2B is a cross-sectional view according to a modification of Fig. 2A. In Fig. 2B, the size of the charge holding section MEM is smaller than that in Fig. 2A. When the size of the charge holding section MEM is reduced, it is possible to completely cover a top surface of the charge holding section MEM with the horizontal light shielding portion 16H, and a parasitic light sensitivity (PLS) can be reduced or suppressed. Furthermore, even if the size of the charge holding section MEM is reduced, the charge holding section MEM has a sufficient size that is arranged across the first photoelectric conversion section PD1 and the second photoelectric conversion section PD2. Therefore, a saturation charge amount Qs to the extent that imaging quality can be maintained can be ensured.

[0056] Fig. 3 is a cross-sectional view of one pixel of the photodetection device 1 according to a comparative example. In the comparative example illustrated in Fig. 3, the two photoelectric conversion sections 11 and the two charge holding sections MEM are included in each pixel 10. The pixel separation section 16 is arranged between the two photoelectric conversion sections 11 and the two charge holding sections MEM. Therefore, each charge holding section MEM can hold only a charge photoelectrically converted by the corresponding photoelectric conversion section 11. Therefore, when the size of the charge holding section MEM is reduced, an amount of the charge held by the charge holding section MEM decreases, the saturation charge amount Qs is lowered.

[0057] In order to increase the saturation charge amount Qs, it is conceivable to reduce an area of the horizontal light shielding portion 16H. However, when the size of the horizontal light shielding portion 16H is reduced, a possibility that incident light directly enters the charge holding section MEM increases, noise increases, and the parasitic light sensitivity increases or deteriorates.

[0058] In the first embodiment, as illustrated in Figs. 2A and 2B, since the single charge holding section MEM is provided across the two photoelectric conversion sections 11. Therefore, it is not necessary to perform a process for dividing the charge holding section MEM into two, and in addition, the saturation charge amount Qs can be increased, and the parasitic light sensitivity can be reduced or suppressed.

[0059] (Circuit Configuration of Pixel 10) Fig. 4 is a circuit diagram of one pixel of the photodetection device 1 according to the first embodiment. Here, at least a part of the pixel 10 may be referred to as a pixel circuit. Furthermore, a plurality of transistors included in the pixel circuit may be collectively referred to as a pixel transistor.

[0060] As illustrated in Fig. 4, the pixel 10 according to the first embodiment includes the two photoelectric conversion sections 11 (hereinafter, first photoelectric conversion section PD1 and second photoelectric conversion section PD2) corresponding to the first photoelectric conversion section PD1 and the second photoelectric conversion section PD2, two TRZ transistors 21 (hereinafter, first TRZ transistor 21a and second TRZ transistor 21b), an OFG transistor 22, a TRX transistor 23, a TRG transistor 24, an RST transistor 25, an AMP transistor 26, an SEL transistor 27, the charge holding section MEM, and a floating diffusion region FD.

[0061] The first photoelectric conversion section PD1 and the second photoelectric conversion section PD2 are, for example, photodiodes. Charges photoelectrically converted by the first photoelectric conversion section PD1 are sent to the TRX transistor 23 via the first TRZ transistor 21a. Charges photoelectrically converted by the second photoelectric conversion section PD2 are sent to the TRX transistor 23 via the second TRZ transistor 21b. The OFG transistor 22 switches whether or not to discharge the accumulated charges of at least one of the first photoelectric conversion section PD1 or the second photoelectric conversion section PD2 to an overflow drain region (hereinafter, OFD).

[0062] The TRX transistor 23 switches whether or not to hold the charges photoelectrically converted by the first photoelectric conversion section PD1 and the second photoelectric conversion section PD2 in the charge holding section MEM. The TRG transistor 24 switches whether or not to transfer the held charges of the charge holding section MEM to the floating diffusion region FD. The RST transistor 25 switches whether or not to discharge accumulated charges of the floating diffusion region FD to a power supply voltage VDD node. The AMP transistor 26 and the SEL transistor 27 configure a source follower circuit and generate a pixel signal at a voltage level according to the accumulated charge of the floating diffusion region FD and output the pixel signal to a vertical signal line.

[0063] The first photoelectric conversion section PD1 and the second photoelectric conversion section PD2 may have the same exposure time or may have exposure times different from each other. It is also possible to switch lengths of the exposure times of the first photoelectric conversion section PD1 and the second photoelectric conversion section PD2, depending on a time and a case. Hereinafter, an example will be described where the exposure time of the first photoelectric conversion section PD1 is longer than the exposure time of the second photoelectric conversion section PD2. Here, the first photoelectric conversion section PD1 may be referred to as a long-accumulating PD, and the second photoelectric conversion section PD2 may be referred to as a short-accumulating PD. Accumulated charges of the long-accumulating PD are transferred to the floating diffusion region FD after being held by the charge holding section MEM, whereas accumulated charges of the short-accumulating PD are transferred to the floating diffusion region FD without being held by the charge holding section MEM.

[0064] (Procedure of Charge Transfer in Pixel 10) Fig. 5 is a diagram schematically illustrating charge transfer in the pixel 10 according to the first embodiment. A cube in Fig. 5 indicates an on / off state of each pixel transistor, and a case where a height of the cube is high indicates off, and a case where the height of the cube is low indicates on. A PD short in Fig. 5 indicates the short-accumulating PD, and a PD long indicates the long-accumulating PD.

[0065] Figs. 6A to 6F are diagrams for describing a procedure of the charge transfer using a schematic diagram same as Fig. 5, and Fig. 7 is a timing chart illustrating a timing when the accumulated charges of the long-accumulating PD and the short-accumulating PD in each pixel 10 are transferred. In Fig. 7, timings when voltages of a gate of the first TRZ transistor 21a (referred to as TRZ short), a gate of the second TRZ transistor 21b (referred to as TRZ long), a gate OFG of the OFG transistor 22, a gate TRX of the TRX transistor 23, a gate TRG of the TRG transistor 24, a gate RST of the RST transistor 25, and a gate SEL of the SEL transistor 27 change.

[0066] As illustrated in Fig. 7, in an initial state before exposure of each pixel 10 is started, the first TRZ transistor 21a, the second TRZ transistor 21b, the OFG transistor 22, and the RST transistor 25 are turned on, and the TRX transistor 23, the TRG transistor 24, and the SEL transistor 27 are turned off.

[0067] When the first TRZ transistor 21a is turned off at a time t1, as illustrated in Fig. 6A, exposure of the long-accumulating PD (first photoelectric conversion section PD1) is started. On the other hand, the accumulated charges of the short-accumulating PD (second photoelectric conversion section PD2) are discharged to the OFD via the second TRZ transistor 21b and the OFG transistor 22. Therefore, at this time point, exposure of the short-accumulating PD is not started.

[0068] Thereafter, when the second TRZ transistor 21b is turned off at a time t2, as illustrated in Fig. 6B, the exposure of the short-accumulating PD (second photoelectric conversion section PD2) is started. In this state, all of the first TRZ transistor 21a, the second TRZ transistor 21b, the TRX transistor 23, and the TRG transistor 24 are turned off, and the OFG transistor 22 and the RST transistor 25 are turned on. Thereafter, the OFG transistor 22 is turned off at a time t3.

[0069] Thereafter, the second TRZ transistor 21b, the TRX transistor 23, and the TRG transistor 24 are turned on, at a time t4. As a result, as illustrated in Fig. 6C, the accumulated charges of the short-accumulating PD (second photoelectric conversion section PD2) are transferred to the floating diffusion region FD via the second TRZ transistor 21b, the TRX transistor 23, and the TRG transistor 24.

[0070] Thereafter, the second TRZ transistor 21b and the TRG transistor 24 are turned off, at a time t5. As a result, the charge transfer from the short-accumulating PD to the floating diffusion region FD ends.

[0071] Thereafter, the first TRZ transistor 21a is turned on at a time t6. As a result, as illustrated in Fig. 6D, the accumulated charges of the long-accumulating PD (first photoelectric conversion section PD1) are transferred to the charge holding section MEM via the first TRZ transistor 21a and the TRX transistor 23. Thereafter, the first TRZ transistor 21a and the TRX transistor 23 are turned off at a time t7. As a result, the charge transfer from the long-accumulating PD to the charge holding section MEM ends.

[0072] Thereafter, the SEL transistor 27 is turned on at a time t8. As a result, as illustrated in Fig. 6E, a pixel signal according to the accumulated charge of the short-accumulating PD held in the floating diffusion region FD is output to the vertical signal line via the AMP transistor 26 and the SEL transistor 27. Thereafter, the RST transistor 25 is turned on at a time t9. As a result, the held charge of the floating diffusion region FD is discharged to the power supply voltage VDD node via the RST transistor 25, and a potential of the floating diffusion region FD is set to a reset level. At this time, since the SEL transistor 27 is turned on, the pixel signal at the reset level is output to the vertical signal line via the AMP transistor 26 and the SEL transistor 27. Thereafter, the RST transistor 25 is turned off at a time t10.

[0073] Thereafter, the TRG transistor 24 is turned on at a time t11. As a result, as illustrated in Fig. 6F, the accumulated charge of the long-accumulating PD held by the charge holding section MEM is transferred to the floating diffusion region FD. At this time, since the SEL transistor 27 is turned on, a pixel signal according to the accumulated charge of the long-accumulating PD transferred to the floating diffusion region FD is output to the vertical signal line via the AMP transistor 26 and the SEL transistor 27. Thereafter, the TRG transistor 24 is turned off at a time t12, and charge transfer from the charge holding section MEM to the floating diffusion region FD ends. Thereafter, the SEL transistor 27 is turned off at a time t13.

[0074] (Reading Timing of Pixel Signal for One Frame) Figs. 8A and 8B are reading timing charts of a pixel signal for one frame corresponding to the procedure of the charge transfer illustrated in Figs. 6A to 6F. Fig. 8A is a plan view of the pixel array section 2, and Fig. 8B is a timing chart for one frame. For simplification, in Fig. 8A, the pixel array section 2 has eight rows and eight columns. However, the number of rows and the number of columns of the pixel array section 2 are arbitrary. In the timing chart in Figs. 8A and 8B, each pixel 10 is divided into two including upper and lower regions. The upper divided region is the second photoelectric conversion section PD2 (short-accumulating PD), and the lower divided region is the first photoelectric conversion section PD1 (long-accumulating PD).

[0075] When a new frame starts at a time t21, the long-accumulating PD positioned in the lower divided region of each pixel 10 starts to exposure at the same time. At a time t22, the short-accumulating PD positioned in the upper divided region of each pixel 10 starts to exposure at the same time.

[0076] At a time t23, the short-accumulating PD positioned in the upper divided region of each pixel 10 transfers the accumulated charge of the short-accumulating PD to the floating diffusion region FD at the same time.

[0077] At a time t24, the long-accumulating PD positioned in the lower divided region of each pixel 10 transfers the accumulated charge of the long-accumulating PD to the charge holding section MEM at the same time.

[0078] At a time t25, a pixel signal according to the accumulated charge of the short-accumulating PD in a first row is output from the floating diffusion region FD to the vertical signal line. Subsequently, at a time t26, a pixel signal according to the accumulated charge of the long-accumulating PD in the first row is transferred from the charge holding section MEM to the floating diffusion region FD, and a pixel signal according to the accumulated charge of the floating diffusion region FD is output to the vertical signal line.

[0079] Thereafter, for each pixel row, sequentially, after the pixel signal according to the accumulated charge of the short-accumulating PD is output to the vertical signal line, the pixel signal according to the accumulated charge of the long-accumulating PD is output to the vertical signal line.

[0080] In this way, in the first embodiment, the two photoelectric conversion sections 11 and the single charge holding section MEM are provided for each pixel 10, and the charge holding section MEM is arranged immediately below the horizontal light shielding portion 16H. Therefore, it is possible to reduce or suppress the parasitic light sensitivity while increasing the saturation charge amount Qs. Furthermore, by setting one of the two photoelectric conversion sections 11 as the long-accumulating PD and setting the other photoelectric conversion section 11 as the short-accumulating PD, for each pixel 10, a global shutter operation can be performed for the long-accumulating PD, and a rolling shutter operation can be performed for the short-accumulating PD. Furthermore, since the short-accumulating PD has the longer exposure time than the short-accumulating PD, by reading the pixel signal by the long-accumulating PD and reading the pixel signal by the short-accumulating PD for each pixel 10, a high dynamic range (HDR) can be realized.

[0081] (Second Embodiment) At the times t8 to t10 in Fig. 7, after the pixel signal according to the accumulated charge of the short-accumulating PD is read, reading at the reset level of the floating diffusion region FD is performed. Pixel signals at a signal level read in a period from the time t8 to the time t9 include a kTC noise of a previous frame. On the other hand, pixel signals at the reset level read in a period from the time t9 to the time t10 include a kTC noise of a current frame. Since these kTC noises are not necessarily the same, it is not possible to completely cancel the kTC noise when a signal processing section 8 at a subsequent stage performs correlated double sampling (CDS) processing. Therefore, in a second embodiment, the kTC noises included in the pixel signal at the signal level read at the times t8 and t9 are fed back to the floating diffusion region FD.

[0082] Fig. 9 is a circuit diagram of each pixel 10 included in a photodetection device 1 according to the second embodiment. In Fig. 9, a component common to that in Fig. 4 is denoted with the common reference numeral, and differences will be mainly described below.

[0083] A pixel 10 according to the second embodiment illustrated in Fig. 9 includes an RST transistor 25 connected to a place different from that in Fig. 4, a reference voltage switching circuit 28, and a current source switching circuit 29.

[0084] One of a drain and a source of the RST transistor 25 is connected to the floating diffusion region FD, and another one is connected to a vertical signal line. Hereinafter, an example will be described where the drain of the RST transistor 25 is connected to the vertical signal line and the source is connected to the floating diffusion region FD.

[0085] The reference voltage switching circuit 28 switches whether a drain of an AMP transistor 26 is connected to a power supply voltage VDD node or a ground voltage node. More specifically, the reference voltage switching circuit 28 includes a first switch SW1 that switches whether or not to connect the power supply voltage VDD node to the drain of the AMP transistor 26 and a second switch SW2 that switches whether or not to connect the ground voltage node to the drain of the AMP transistor 26.

[0086] The current source switching circuit 29 switches a direction of a current flowing in the vertical signal line. More specifically, the current source switching circuit 29 includes a third switch SW3 that switches whether or not to cause the current of the vertical signal line to flow into a first current source 30a and a fourth switch SW4 that switches whether or not to cause a current from a second current source 30b to flow into the vertical signal line.

[0087] The RST transistor 25 is turned on / off and the first to fourth switches SW1 to SW4 are turned on / off in conjunction with each other. For example, in a case where the RST transistor 25 is turned on, the second switch SW2 and the fourth switch SW4 are turned on, and the first switch SW1 and the third switch SW3 are turned off. In a case where the RST transistor 25 is turned off, the second switch SW2 and the fourth switch SW4 are turned off, and the first switch SW1 and the third switch SW3 are turned on.

[0088] In this way, while the RST transistor 25 is turned off, the AMP transistor 26 and an SEL transistor 27 configure a source follower circuit, and the vertical signal line has a voltage level according to a voltage level of the floating diffusion region FD. On the other hand, when the RST transistor 25 is turned on, the AMP transistor 26 and the SEL transistor 27 configure a source ground circuit, and a change direction of the voltage level of the vertical signal line is opposite to a change direction of the voltage level of the floating diffusion region FD.

[0089] Fig. 10 is a diagram illustrating a correspondence relationship between a voltage VVSL of the vertical signal line and a voltage VFD of the floating diffusion region FD. A curve w1 in Fig. 10 indicates characteristics of the source ground circuit, and a straight line w2 indicates input / output characteristics when the RST transistor 25 is turned on and input / output of the source ground circuit is short-circuited and indicates a relationship of VFD = VVSL. By turning off the RST transistor 25 after turning on the RST transistor 25, the voltage level of the floating diffusion region FD is set to be a voltage level of an intersection between the curve w1 and the straight line w2, and the kTC noise included in the pixel signal according to the signal level can be reduced to 1 / gain of the source ground circuit.

[0090] In this way, in the second embodiment, since whether or not to configure the AMP transistor 26 and the SEL transistor 27 that are at a final stage of a pixel circuit as the source follower circuit or the source ground circuit at a timing when the RST transistor 25 is turned on or off, the kTC noise included in the pixel signal at the signal level can be accurately removed.

[0091] (Third Embodiment) A photodetection device 1 according to a third embodiment has a circuit configuration similar to that of the pixel 10 in Fig. 4 or Fig. 9.

[0092] The photodetection device 1 according to the third embodiment alternatively selects a first mode in which exposure is started in all pixels 10 at the same time and a global shutter operation for making exposure periods be the same is performed and a second mode in which exposure is started by a second photoelectric conversion section PD2 of each pixel 10 at the same time and the global shutter operation is performed, after the exposure is started by a first photoelectric conversion section PD1 of each pixel 10 at the same time and the global shutter operation for making the exposure period be the same is performed. The first mode and the second mode are selected, for example, by the system control section 7 in Fig. 1.

[0093] Figs. 11A to 11C are diagrams for describing the first mode and the second mode. More specifically, Fig. 11A is a diagram for describing the first mode. When the first mode is selected, the first photoelectric conversion section PD1 and the second photoelectric conversion section PD2 of each pixel 10 simultaneously start the exposure and perform the exposure for the same exposure period. Charges photoelectrically converted by the first photoelectric conversion section PD1 and the second photoelectric conversion section PD2 of each pixel 10 are held by a charge holding section MEM. In Fig. 11A, the held charges of the charge holding section MEM simultaneously transferred from the first photoelectric conversion section PD1 and the second photoelectric conversion section PD2 are described as “A” for convenience.

[0094] In the charge holding section MEM, the charge photoelectrically converted by the first photoelectric conversion section PD1 and the charge photoelectrically converted by the second photoelectric conversion section PD2 are held. Thereafter, for each pixel row, the held charge of the charge holding section MEM is transferred to a floating diffusion region FD, and a pixel signal according to the held charge of the floating diffusion region FD is sequentially output to a vertical signal line for each pixel row.

[0095] Fig. 11B is a diagram for describing a first example of the second mode, and Fig. 11C is a diagram for describing a second example of the second mode. In a case where the second mode is selected, one of the first example and the second example is further selected.

[0096] In the first example, a reading order of the first photoelectric conversion section PD1 and the second photoelectric conversion section PD2 is reversed between an odd-numbered pixel row and an even-numbered pixel row. In Figs. 11B and 11C, transferring accumulated charges of the first photoelectric conversion section PD1 to the charge holding section MEM is described as “A”, and transferring accumulated charges of the second photoelectric conversion section PD2 to the charge holding section MEM is described as “B”. “AB” means that the accumulated charges of the second photoelectric conversion section PD2 are transferred to the charge holding section MEM after the accumulated charges of the first photoelectric conversion section PD1 are transferred to the charge holding section MEM. Similarly, “BA” means that the accumulated charges of the first photoelectric conversion section PD1 are transferred to the charge holding section MEM after the accumulated charges of the second photoelectric conversion section PD2 are transferred to the charge holding section MEM.

[0097] In the odd-numbered pixel row, the charges photoelectrically converted by the first photoelectric conversion section PD1 of each pixel 10 are transferred to the floating diffusion region FD after being held by the charge holding section MEM, and thereafter, the charges photoelectrically converted by the second photoelectric conversion section PD2 of each pixel 10 are transferred to the floating diffusion region FD after being held by the charge holding section MEM. In the even-numbered pixel row, the charges photoelectrically converted by the second photoelectric conversion section PD2 of each pixel 10 are transferred to the floating diffusion region FD after being held by the charge holding section MEM, and thereafter, the charges photoelectrically converted by the first photoelectric conversion section PD1 of each pixel 10 are transferred to the floating diffusion region FD after being held by the charge holding section MEM.

[0098] In the second example, in both of the odd-numbered pixel row and the even-numbered pixel row, the charges photoelectrically converted by the first photoelectric conversion section PD1 of each pixel 10 are transferred to the floating diffusion region FD after being held by the charge holding section MEM, and thereafter, the charges photoelectrically converted by the second photoelectric conversion section PD2 of each pixel 10 are transferred to the floating diffusion region FD after being held by the charge holding section MEM.

[0099] Note that, in the second example, the charges photoelectrically converted by the second photoelectric conversion section PD2 of each pixel 10 may be transferred to the floating diffusion region FD after being held by the charge holding section MEM, and thereafter, the charges photoelectrically converted by the first photoelectric conversion section PD1 of each pixel 10 may be transferred to the floating diffusion region FD after being held by the charge holding section MEM.

[0100] In this way, in Figs. 11A to 11C, when the first mode is selected, a global shutter operation is performed once for each pixel 10, whereas when the second mode is selected, the global shutter operation is performed twice for each pixel 10.

[0101] Instead of the second mode, a third mode in which image plane phase difference detection is performed may be selected.

[0102] Figs. 12A to 12C are diagrams for describing that the first mode or the third mode in which image plane phase difference detection is performed is alternatively selected. More specifically, Fig. 12A is a diagram for describing the first mode that is the same as the first mode in Fig. 11A. Fig. 12B is a diagram for describing a first example of the third mode, and Fig. 12C is a diagram for describing a second example of the third mode.

[0103] In the first example of the third mode illustrated in Fig. 12B, although the accumulated charges are read from the first photoelectric conversion section PD1 and the second photoelectric conversion section PD2 in the same order as that in the first example of the second mode illustrated in Fig. 11B, the accumulated charges are transferred to the floating diffusion region FD without being held by the charge holding section MEM.

[0104] In the second example of the third mode illustrated in Fig. 12B, although the accumulated charges are read from the first photoelectric conversion section PD1 and the second photoelectric conversion section PD2 in the same order as that in the second example of the second mode illustrated in Fig. 11C, the accumulated charges are transferred to the floating diffusion region FD without being held by the charge holding section MEM.

[0105] In both of the first example and the second example of the third mode, after the charge obtained by starting the exposure by the first photoelectric conversion section PD1 in each of the plurality of pixels is transferred to the floating diffusion region FD without holding the charge by the charge holding section MEM, the charge obtained by starting the exposure by the second photoelectric conversion section PD2 is transferred to the floating diffusion region FD without holding the charge by the charge holding section MEM. The signal processing section 8 or a defocus amount calculation section in Fig. 1 detects an image plane phase difference signal on the basis of the pixel signal according to the charge that is photoelectrically converted by the first photoelectric conversion section PD1 and transferred to the floating diffusion region FD and the pixel signal according to the charge that is photoelectrically converted by the second photoelectric conversion section PD2 and transferred to the floating diffusion region FD, in the second mode.

[0106] Figs. 12A to 12C illustrate an example in which the first mode or the third mode is alternatively selected. However, the second mode or the third mode may be alternatively selected by combining Figs. 11A to 12C. Alternatively, any one of the first to third modes may be alternatively selected.

[0107] Fig. 13 is a circuit diagram of the pixel 10 for realizing the third mode. Unlike the pixel 10 in Figs. 2A and 2B, the pixel 10 in Fig. 13 includes a first TRG transistor 24a, a first RST transistor 25a, a first AMP transistor 26a, a first SEL transistor 27a, and a first floating diffusion region FD1 for the first photoelectric conversion section PD1 and a second TRG transistor 24b, a second RST transistor 25b, a second AMP transistor 26b, a second SEL transistor 27b, and a second floating diffusion region FD for the second photoelectric conversion section PD2.

[0108] When all of the first TRZ transistor 21a, the TRX transistor 23, and the first TRG transistor 24a are turned on, the accumulated charge of the first photoelectric conversion section PD1 is transferred to the first floating diffusion region FD1 via the first TRZ transistor 21a, the first TRG transistor 24a, and the charge holding section MEM.

[0109] When all of the second TRZ transistor 21b, the TRX transistor 23, and the second TRG transistor 24b are turned on, the accumulated charge of the second photoelectric conversion section PD2 is transferred to the second floating diffusion region FD via the second TRZ transistor 21b, the second TRG transistor 24b, and the charge holding section MEM.

[0110] Fig. 14 is a circuit diagram of a pixel 10 according to a modification for realizing the third mode. Unlike the pixel 10 in Figs. 2A and 2B, the pixel 10 in Fig. 14 includes the first RST transistor 25a, the first floating diffusion region FD1, and a first switching transistor 18a for the first photoelectric conversion section PD1 and the second RST transistor 25b, the second floating diffusion region FD, and a second switching transistor 18b for the second photoelectric conversion section PD2.

[0111] When all of the first TRZ transistor 21a, the TRX transistor 23, and the first TRG transistor 24a are turned on, the accumulated charge of the first photoelectric conversion section PD1 is held in the first floating diffusion region FD1 via the first TRZ transistor 21a, the TRX transistor 23, the charge holding section MEM, and the first TRG transistor 24a. By turning on the first switching transistor 18a, the held charge of the first floating diffusion region FD1 is output from a source follower circuit including an AMP transistor 26 and an SEL transistor 27 to a vertical signal line VSL.

[0112] When all of the second TRZ transistor 21b, the TRX transistor 23, and the second TRG transistor 24b are turned on, the accumulated charge of the second photoelectric conversion section PD2 is held in the second floating diffusion region FD via the second TRZ transistor 21b, the TRX transistor 23, the charge holding section MEM, and the second TRG transistor 24b. By turning on the second switching transistor 18b, the held charge of the second floating diffusion region FD2 is output from the source follower circuit including the AMP transistor 26 and the SEL transistor 27 to the vertical signal line VSL.

[0113] Figs. 15A to 15C are diagrams for describing charge transfer in the first to third modes described above. Fig. 15A is a diagram for describing the charge transfer in the first mode. In the first mode, the first photoelectric conversion section PD1 and the second photoelectric conversion section PD2 in each pixel 10 simultaneously start exposure and simultaneously end the exposure. The accumulated charges of the first photoelectric conversion section PD1 and the second photoelectric conversion section PD2 are transferred to the floating diffusion region FD after being transferred to the charge holding section MEM.

[0114] Fig. 15B is a diagram for describing the second mode. In the second mode, the accumulated charges of the first photoelectric conversion section PD1 and the second photoelectric conversion section PD2 in each pixel 10 are transferred to the floating diffusion region FD after being alternately transferred to the charge holding section MEM.

[0115] Fig. 15C is a diagram for describing the third mode. In the third mode, the accumulated charges of the first photoelectric conversion section PD1 and the second photoelectric conversion section PD2 in each pixel 10 are alternately transferred to the floating diffusion region FD. In the third mode, the charge holding section MEM is not used.

[0116] In this way, in the third embodiment, the first mode in which the global shutter operation for aligning the exposure start time and the exposure period of the first photoelectric conversion section PD1 and the second photoelectric conversion section PD2 of each pixel 10 is performed and the second mode in which the exposure is alternately performed by the first photoelectric conversion section PD1 and the second photoelectric conversion section PD2 of each pixel 10 and the global shutter operation is performed can be alternatively selected. Alternatively in the third embodiment, by providing the third mode in which the first photoelectric conversion section PD1 and the second photoelectric conversion section PD2 of each pixel 10 alternately perform the exposure and perform the phase difference detection, it is possible to alternately select the first mode or the third mode. Alternatively, any one of the first to third modes can be alternatively selected. As a result, the global shutter operations with different resolutions can be switched and performed, and it is possible to perform the image plane phase difference detection as necessary. The photodetection device 1 with high utility value can be realized.

[0117] (Fourth Embodiment) Fig. 16 is a diagram for describing a photodetection device 1 according to a fourth embodiment. The photodetection device 1 according to the fourth embodiment includes a pixel 10 having a circuit configuration illustrated in Fig. 4, for example. In the fourth embodiment, as in the second mode illustrated in Fig. 15B, an operation for transferring accumulated charges of a first photoelectric conversion section PD1 in each pixel 10 to a charge holding section MEM and an operation for transferring accumulated charges of a second photoelectric conversion section PD2 to the charge holding section MEM are alternately performed.

[0118] After the accumulated charges of the first photoelectric conversion section PD1 are transferred to the charge holding section MEM, the second photoelectric conversion section PD2 can perform exposure while held charges of the charge holding section MEM are transferred to a floating diffusion region FD and a pixel signal is read for each pixel row.

[0119] At the time of low illuminance, it is necessary to increase an exposure period as long as possible. According to the fourth embodiment, as illustrated in Fig. 16, since the exposure and the charge reading of the first photoelectric conversion section PD1 and the second photoelectric conversion section PD2 are alternately performed, it is possible to extend exposure periods of the first photoelectric conversion section PD1 and the second photoelectric conversion section PD2 to 1 / 30 seconds that is twice of the normal period in a state where a frame rate is set to 1 / 60 seconds that is the same as the normal time.

[0120] As a result, even at the time of low illuminance, an image imaged in a double exposure period can be generated without changing the frame rate. As a result, image quality of the imaged image at the time of low illuminance can be improved without changing the frame rate.

[0121] (Fifth embodiment) Various variations of a structure of the photodetection device 1 according to the first to fourth embodiments are conceivable. Figs. 17A and 17B are a longitudinal cross-sectional view and a transverse cross-sectional view of a photodetection device 1 according to a fifth embodiment. Fig. 17A is a longitudinal cross-sectional view of the photodetection device 1 according to the fourth embodiment, and Fig. 17B includes transverse cross-sectional views taken along an A-A line, a B-B line, and a C-C line in Fig. 17A.

[0122] As illustrated in the transverse cross-sectional view taken along the B-B line in Fig. 1B, an example including a horizontal light shielding portion 16H having a rhombic transverse cross-sectional shape is illustrated. However, the horizontal light shielding portion 16H may have any transverse cross-sectional shape. The transverse cross-sectional shape of the horizontal light shielding portion 16H depends on a crystal plane direction of a photoelectric conversion section 11, an etching time when a trench for the horizontal light shielding portion 16H is formed, an arrangement place of an etch stop layer, or the like.

[0123] As illustrated in the transverse cross-sectional view taken along the C-C line in Fig. 17B, a first TRZ transistor 21a, a second TRZ transistor 21b, a TRX transistor 23, a TRG transistor 24, a floating diffusion region FD, or the like are arranged, immediately below a charge holding section MEM. A wiring layer not illustrated in Fig. 17A is arranged immediately below the C-C line in Fig. 17B.

[0124] In Figs. 17A and 17B, the plurality of horizontal light shielding portions 16H may be respectively provided at different depths of first and second photoelectric conversion sections PD1 and PD2.

[0125] Figs. 18A and 18B are a longitudinal cross-sectional view and a transverse cross-sectional view of the photodetection device 1 according to a first modification of the fifth embodiment. Fig. 18A is a longitudinal cross-sectional view of the photodetection device 1 according to the first modification, and Fig. 18B includes transverse cross-sectional views taken along an A-A line, a B-B line, a C-C line, and a D-D line in Fig. 18A.

[0126] In Figs. 18A and 18B, the two horizontal light shielding portions 16H are included at different depths of the first and second photoelectric conversion sections PD1 and PD2. The three or more horizontal light shielding portions 16H may be provided. Furthermore, each horizontal light shielding portion 16H may have any shape and any size. Since the two horizontal light shielding portions 16H are included in Figs. 18A and 18B, a possibility that incident light directly enters the charge holding section MEM is further reduced.

[0127] Figs. 19A and 19B are a longitudinal cross-sectional view and a transverse cross-sectional view of the photodetection device 1 according to a second modification of the fifth embodiment. Fig. 19A is a longitudinal cross-sectional view of the photodetection device 1 according to the second modification, and Fig. 19B includes transverse cross-sectional views taken along an A-A line, a B-B line, and a C-C line in Fig. 19A. The photodetection device 1 according to the second modification includes a vertical support portion 16V1 that supports the horizontal light shielding portion 16H, instead of a vertical light shielding portion 16V in Figs. 17A and 17B or 18A and 18B. A material of the vertical support portion 16V1 includes an oxide of which at least one of a light absorptivity or a light reflectance is lower than a light shielding member such as tungsten (W), polysilicon, or the like. Since the vertical support portion 16V1 does not include the light shielding member, it is possible to prevent absorption of light by the vertical support portion 16V1, to improve sensitivity, and prevent light reflection. Therefore, a flare can be prevented.

[0128] Figs. 20A and 20B are a longitudinal cross-sectional view and a transverse cross-sectional view of the photodetection device 1 according to a third modification of the fifth embodiment. Fig. 20A is a longitudinal cross-sectional view of the photodetection device 1 according to the third modification, and Fig. 20B includes transverse cross-sectional views taken along an A-A line, a B-B line, a C-C line, and a D-D line in Fig. 20A. In the photodetection device 1 according to the third modification, the two horizontal light shielding portions 16H are included at different depths of the first and second photoelectric conversion sections PD1 and PD2. The photodetection device 1 according to the third modification includes the vertical support portion 16V1 that does not include a light shielding member, as in Figs. 19A and 19B. As a result, an effect similar to that of the second modification can be obtained. Furthermore, since the two horizontal light shielding portions 16H are included, the possibility that the incident light directly enters the charge holding section MEM is further reduced. The vertical support portion 16V1 includes, for example, an insulating material, a metal material, polysilicon, a metal oxide, a carbon-containing material, or an electrochromic material.

[0129] Figs. 21A and 21B are a longitudinal cross-sectional view and a transverse cross-sectional view of the photodetection device 1 according to a fourth modification of the fifth embodiment. Fig. 21A is a longitudinal cross-sectional view of the photodetection device 1 according to the fourth modification, and Fig. 21B includes transverse cross-sectional views taken along an A-A line, a B-B line, and a C-C line in Fig. 21A.

[0130] In Figs. 17A to 20B described above, an example is illustrated in which a volume of the first photoelectric conversion section PD1 and a volume of the second photoelectric conversion section PD2 of each pixel 10 are the same. However, in the photodetection device 1 according to the fourth modification, the volume of the first photoelectric conversion section PD1 of each pixel 10 is different from the volume of the second photoelectric conversion section PD2. Specifically, by shifting an arrangement place of the vertical light shielding portion 16V extending in a depth direction in the pixel 10 from the center of the pixel 10, each of the volumes of the first photoelectric conversion section PD1 and the second photoelectric conversion section PD2 can be adjusted to have an arbitrary volume ratio.

[0131] In Figs. 21A and 21B, an example is illustrated in which the volume of the first photoelectric conversion section PD1 is larger than the volume of the second photoelectric conversion section PD2. However, the volume of the second photoelectric conversion section PD2 may be larger than the volume of the first photoelectric conversion section PD1.

[0132] Since the first photoelectric conversion section PD1 having the larger volume can accumulate more charges than the second photoelectric conversion section PD2 having the smaller volume, it is convenient to use the first photoelectric conversion section PD1 as a long-accumulating PD, for example.

[0133] In this way, in a case where the long-accumulating PD and a short-accumulating PD are provided for each pixel 10, by increasing the volume of the long-accumulating PD and decreasing the volume of the short-accumulating PD, the charges does not overflow from each photoelectric conversion section 11 even at the time of high illuminance, and image quality of an imaged image can be improved.

[0134] Figs. 22A and 22B are a longitudinal cross-sectional view and a transverse cross-sectional view of the photodetection device 1 according to a fifth modification of the fifth embodiment. Fig. 22A is a longitudinal cross-sectional view of the photodetection device 1 according to the fifth modification, and Fig. 22B includes transverse cross-sectional views taken along an A-A line, a B-B line, a C-C line, and a D-D line in Fig. 22A.

[0135] In the fifth modification, as in the fourth modification, in addition to that the volumes of the first photoelectric conversion section PD1 and the second photoelectric conversion section PD2 are different from each other, the two horizontal light shielding portions 16H are included at the different depths of the first and second photoelectric conversion sections PD1 and PD2.

[0136] Figs. 23A and 23B are a longitudinal cross-sectional view and a plan layout view of the photodetection device 1 according to a sixth modification of the fifth embodiment. Fig. 23A is a longitudinal cross-sectional view of two pixels of the photodetection device 1 according to the sixth modification, and Fig. 23B is a plan layout view of four pixels.

[0137] The photodetection device 1 according to the sixth modification includes a back-surface illuminated pixel separation section 16 along a boundary of the pixels 10. The photoelectric conversion section 11 of each pixel 10 is divided into two photoelectric conversion sections 11 (hereinafter, referred to as first photoelectric conversion section PD1 and second photoelectric conversion section PD2) by the pixel separation section 16. The pixel separation section 16 includes the vertical light shielding portion 16V and the horizontal light shielding portion 16H. The charge holding section MEM is arranged between the two adjacent pixels 10. The periphery of the charge holding section MEM is covered with the horizontal light shielding portion 16H and the vertical light shielding portion 16V.

[0138] As illustrated in Fig. 23A, the charge holding section MEM is shared by the first photoelectric conversion section PD1 of one of the two pixels 10 adjacent in one direction and the second photoelectric conversion section PD2 of the other pixel 10.

[0139] Figs. 24A and 24B are a longitudinal cross-sectional view and a plan layout view of the photodetection device 1 according to a comparative example in Figs. 23A and 23B. Fig. 24A is a longitudinal cross-sectional view of two pixels of the photodetection device 1 according to the comparative example, and Fig. 24B is a plan layout view of four pixels.

[0140] In each pixel 10 according to the comparative example, the photoelectric conversion section 11 is not divided into two, and the charge holding section MEM is provided for each photoelectric conversion section 11.

[0141] In this way, the photodetection device 1 according to the first to fifth embodiments can be applied to the pixels 10 having various cross-sectional structures. Note that, the photodetection devices 1 according to the first to fifth embodiments can be applied to the pixel 10 having a cross-sectional structure other than those illustrated in Figs. 17A to 23B.

[0142] (Manufacturing Process) Each pixel 10 of the photodetection devices 1 according to the first to fifth embodiments described above can be manufactured by a similar manufacturing process, although there is a slight difference in the cross-sectional structure. Hereinafter, as a representative example, a manufacturing process of each pixel 10 of the photodetection device 1 according to the first embodiment will be sequentially described.

[0143] Figs. 25A to 25P are manufacturing process diagrams for sequentially describing the manufacturing process of each pixel 10 of the photodetection device 1 according to the first embodiment. In Figs. 25A to 25P, a light incident surface is assumed as a top surface, the top surface is referred to as a back surface, and a lower surface is referred to as a front surface.

[0144] First, as illustrated in Fig. 25A, the photoelectric conversion section 11 including an N-type silicon layer 11S is formed on a P-type silicon substrate 12. In Fig. 25A, the silicon layer 11S formed on the silicon substrate 12 is illustrated on a lower side.

[0145] Next, as illustrated in Fig. 25B, a P-type silicon layer 31 is epitaxially grown on the silicon layer 11S (lower surface of silicon layer 11S in Fig. 25B).

[0146] Next, as illustrated in Fig. 25C, a trench 32 includes the P-type silicon layer 31 toward a depth direction of the photoelectric conversion section 11. The trench 32 is arranged along a boundary portion of the pixels 10. The trench 32 is formed, for example, to a depth where the trench 32 penetrates the photoelectric conversion section 11. The trench 32 is formed, for example, by dry etching using a hard mask. The hard mask includes an insulating material such as a silicon nitride (SiN) or a silicon oxide (SiO2).

[0147] Next, as illustrated in Fig. 25D, for example, by implanting an impurity element such as boron (B) or hydrogen ions in the trench 32 or filling the trench 32 with an insulating material such as an oxide, a sacrificial layer 33 is formed. The sacrificial layer 33 functions as an etching stopper of the horizontal light shielding portion 16H.

[0148] Next, as illustrated in Fig. 25E, the charge holding section MEM including an N-type semiconductor region is formed in the P-type silicon layer 31.

[0149] Next, as illustrated in Fig. 25F, a deep trench 34 that penetrates the P-type silicon layer 31 and reaches the photoelectric conversion section 11 and a shallow trench 35 are formed. The deep trench 34 is for forming a vertical gate electrode 21V for a TRZ transistor 21. The shallow trench 35 is for forming the floating diffusion region FD.

[0150] Next, as illustrated in Fig. 25G, the floating diffusion region FD including the N-type semiconductor region is formed in the shallow trench 35. Furthermore, the deep trench 34 is filled with, for example, polysilicon so as to form the vertical gate electrode 21V.

[0151] Next, as illustrated in Fig. 25H, a pixel transistor 36, a wiring layer 19, and an insulating layer 20 are formed on the P-type silicon layer 31.

[0152] Next, as illustrated in Fig. 25I, a back surface side of the silicon substrate 12 is polished and thinned by chemical mechanical polishing (CMP) or the like. As a result, the back surface side of the photoelectric conversion section 11 is exposed.

[0153] Next, as illustrated in Fig. 25J, a trench 39 includes the photoelectric conversion section 11 on the back surface side of the silicon substrate 12 toward the depth direction. The trench 39 is arranged along a boundary position of the pixel 10. The trench 39 is for forming the pixel separation section 16. A method for forming the trench 39 is similar to that of the trench 32 formed in Fig. 25C.

[0154] Next, as illustrated in Fig. 25K, a sidewall 39S is formed to cover a side surface and a bottom surface of the trench 39. The sidewall 39S includes, for example, an insulation film including SiN, SiO2, or the like. Next, as illustrated in Fig. 25L, the insulation film on the bottom surface is removed while leaving the insulation film on the side surface portion of the trench 39, for example, by dry etching.

[0155] Next, as illustrated in Fig. 25M, a space 39Z extending in a horizontal direction is formed by performing anisotropic etching by injecting a predetermined alkali aqueous into the trench 39. The space 39Z has two crystal planes represented by a plane index (111). As a result, a shape of the space 39Z is a rhombic shape as illustrated in Fig. 17B in plan view.

[0156] Next, as illustrated in Fig. 25N, the hard mask and the sidewall used to form the trench 39 are removed, for example, by wet etching. Furthermore, the sacrificial layer 33 is removed, and the trench 32 for element isolation is formed along the boundary portion of the pixel 10.

[0157] Next, as illustrated in Fig. 25O, on the side surfaces of the trench 32 and the trench 39 and an inner surface of the space, the vertical light shielding portion 16V and the horizontal light shielding portion 16H including the outer layer portion 16b including an insulating material and the inner layer portion 16a including a metal material are formed.

[0158] Next, as illustrated in Fig. 25P, after a color filter 14 is arranged on the back surface side of the photoelectric conversion section 11, an on-chip lens 15 is arranged thereon.

[0159] (Example of Application to Mobile Body) The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be implemented as a device mounted on any type of mobile body such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility, an airplane, a drone, a ship, or a robot.

[0160] Fig. 26 is a block diagram illustrating a schematic configuration example of a vehicle control system as an example of a mobile body control system to which the technology according to the present disclosure may be applied.

[0161] The vehicle control system 12000 includes a plurality of electronic control units connected to each other via a communication network 12001. In the example illustrated in Fig. 26, the vehicle control system 12000 includes a driving system control unit 12010, a body system control unit 12020, an outside-vehicle information detecting unit 12030, an in-vehicle information detecting unit 12040, and an integrated control unit 12050. In addition, a microcomputer 12051, a sound / image output section 12052, and a vehicle-mounted network interface (I / F) 12053 are illustrated as a functional configuration of the integrated control unit 12050.

[0162] The driving system control unit 12010 controls the operation of devices related to the driving system of the vehicle in accordance with various kinds of programs. For example, the driving system control unit 12010 functions as a control device for a driving force generating device for generating the driving force of the vehicle, such as an internal combustion engine, a driving motor, or the like, a driving force transmitting mechanism for transmitting the driving force to wheels, a steering mechanism for adjusting the steering angle of the vehicle, a braking device for generating the braking force of the vehicle, and the like.

[0163] The body system control unit 12020 controls the operation of various kinds of devices provided to a vehicle body in accordance with various kinds of programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various kinds of lamps such as a headlamp, a backup lamp, a brake lamp, a turn signal, a fog lamp, or the like. In this case, radio waves transmitted from a mobile device as an alternative to a key or signals of various kinds of switches can be input to the body system control unit 12020. The body system control unit 12020 receives these input radio waves or signals, and controls a door lock device, the power window device, the lamps, or the like of the vehicle.

[0164] The outside-vehicle information detecting unit 12030 detects information about the outside of the vehicle including the vehicle control system 12000. For example, the outside-vehicle information detecting unit 12030 is connected with an imaging section 12031. The outside-vehicle information detecting unit 12030 makes the imaging section 12031 image an image of the outside of the vehicle, and receives the imaged image. On the basis of the received image, the outside-vehicle information detecting unit 12030 may perform processing of detecting an object such as a human, a vehicle, an obstacle, a sign, a character on a road surface, or the like, or processing of detecting a distance thereto.

[0165] The imaging section 12031 is an optical sensor that receives light, and which outputs an electric signal corresponding to a received light amount of the light. The imaging section 12031 can output the electric signal as an image, or can output the electric signal as information about a measured distance. In addition, the light received by the imaging section 12031 may be visible light, or may be invisible light such as infrared rays or the like.

[0166] The in-vehicle information detecting unit 12040 detects information about the inside of the vehicle. The in-vehicle information detecting unit 12040 is, for example, connected with a driver state detecting section 12041 that detects the state of a driver. The driver state detecting section 12041, for example, includes a camera that images the driver. On the basis of detection information input from the driver state detecting section 12041, the in-vehicle information detecting unit 12040 may calculate a degree of fatigue of the driver or a degree of concentration of the driver, or may determine whether the driver is dozing.

[0167] The microcomputer 12051 can calculate a control target value for the driving force generating device, the steering mechanism, or the braking device on the basis of the information about the inside or outside of the vehicle which information is obtained by the outside-vehicle information detecting unit 12030 or the in-vehicle information detecting unit 12040, and output a control command to the driving system control unit 12010. For example, the microcomputer 12051 can perform cooperative control intended to implement functions of an advanced driver assistance system (ADAS) which functions include collision avoidance or shock mitigation for the vehicle, following driving based on a following distance, vehicle speed maintaining driving, a warning of collision of the vehicle, a warning of deviation of the vehicle from a lane, or the like.

[0168] In addition, the microcomputer 12051 can perform cooperative control intended for automated driving, which makes the vehicle to travel automatedly without depending on the operation of the driver, or the like, by controlling the driving force generating device, the steering mechanism, the braking device, or the like on the basis of the information about the outside or inside of the vehicle which information is obtained by the outside-vehicle information detecting unit 12030 or the in-vehicle information detecting unit 12040.

[0169] In addition, the microcomputer 12051 can output a control command to the body system control unit 12020 on the basis of the information about the outside of the vehicle obtained by the outside-vehicle information detecting unit 12030. For example, the microcomputer 12051 can perform cooperative control intended to prevent a glare by controlling the headlamp so as to change from a high beam to a low beam, for example, in accordance with the position of a preceding vehicle or an oncoming vehicle detected by the outside-vehicle information detecting unit 12030.

[0170] The sound / image output section 12052 transmits an output signal of at least one of a sound and an image to an output device capable of visually or auditorily notifying an occupant of the vehicle or the outside of the vehicle, of information. In the example in Fig. 26, as the output device, an audio speaker 12061, a display section 12062, and an instrument panel 12063 are illustrated. The display section 12062 may, for example, include at least one of an on-board display and a head-up display.

[0171] Fig. 27 is a diagram illustrating an example of installation positions of the imaging sections 12031.

[0172] In Fig. 27, the imaging section 12031 includes imaging sections 12101, 12102, 12103, 12104, and 12105.

[0173] The imaging sections 12101, 12102, 12103, 12104, and 12105 are, for example, disposed at positions on a front nose, sideview mirrors, a rear bumper, and a back door of the vehicle 12100 as well as a position on an upper portion of a windshield within the interior of the vehicle. The imaging section 12101 provided to the front nose and the imaging section 12105 provided to the upper portion of the windshield within the interior of the vehicle obtain mainly an image of the front of the vehicle 12100. The imaging sections 12102 and 12103 provided to the sideview mirrors obtain mainly an image of the sides of the vehicle 12100. The imaging section 12104 provided to the rear bumper or the back door obtains mainly an image of the rear of the vehicle 12100. The imaging section 12105 provided to the upper portion of the windshield within the interior of the vehicle is used mainly to detect a preceding vehicle, a pedestrian, an obstacle, a signal, a traffic sign, a lane, or the like.

[0174] Note that, Fig. 27 illustrates an example of image capturing ranges of the imaging sections 12101 to 12104. An imaging range 12111 represents the imaging range of the imaging section 12101 provided to the front nose. Imaging ranges 12112 and 12113 respectively represent the imaging ranges of the imaging sections 12102 and 12103 provided to the sideview mirrors. An imaging range 12114 represents the imaging range of the imaging section 12104 provided to the rear bumper or the back door. A bird's-eye image of the vehicle 12100 as viewed from above is obtained by superimposing image data imaged by the imaging sections 12101 to 12104, for example.

[0175] At least one of the imaging sections 12101 to 12104 may have a function of obtaining distance information. For example, at least one of the imaging sections 12101 to 12104 may be a stereo camera constituted of a plurality of imaging elements, or may be an imaging element having pixels for phase difference detection.

[0176] For example, the microcomputer 12051 can determine a distance to each three-dimensional object within the imaging ranges 12111 to 12114 and a temporal change in the distance (relative speed with respect to the vehicle 12100) on the basis of the distance information obtained from the imaging sections 12101 to 12104, and thereby extract, as a preceding vehicle, a nearest three-dimensional object in particular that is present on a traveling path of the vehicle 12100 and which travels in substantially the same direction as the vehicle 12100 at a predetermined speed (for example, equal to or more than 0 km / hour). Further, the microcomputer 12051 can set a following distance to be maintained in front of a preceding vehicle in advance, and perform automatic brake control (including following stop control), automatic acceleration control (including following start control), or the like. It is thus possible to perform cooperative control intended for automated driving that makes the vehicle travel automatedly without depending on the operation of the driver or the like.

[0177] For example, the microcomputer 12051 can classify three-dimensional object data on three-dimensional objects into three-dimensional object data of a two-wheeled vehicle, a standard-sized vehicle, a large-sized vehicle, a pedestrian, a utility pole, and other three-dimensional objects on the basis of the distance information obtained from the imaging sections 12101 to 12104, extract the classified three-dimensional object data, and use the extracted three-dimensional object data for automatic avoidance of an obstacle. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 as obstacles that the driver of the vehicle 12100 can recognize visually and obstacles that are difficult for the driver of the vehicle 12100 to recognize visually. Then, the microcomputer 12051 determines a collision risk indicating a risk of collision with each obstacle. In a situation in which the collision risk is equal to or higher than a set value and there is thus a possibility of collision, the microcomputer 12051 outputs a warning to the driver via the audio speaker 12061 or the display section 12062, and performs forced deceleration or avoidance steering via the driving system control unit 12010. The microcomputer 12051 can thereby assist in driving to avoid collision.

[0178] At least one of the imaging sections 12101 to 12104 may be an infrared camera that detects infrared rays. The microcomputer 12051 can, for example, recognize a pedestrian by determining whether or not there is a pedestrian in imaged images of the imaging sections 12101 to 12104. Such recognition of a pedestrian is, for example, performed by a procedure of extracting characteristic points in the imaged images of the imaging sections 12101 to 12104 as infrared cameras and a procedure of determining whether or not it is the pedestrian by performing pattern matching processing on a series of characteristic points representing the contour of the object. When the microcomputer 12051 determines that there is a pedestrian in the imaged images of the imaging sections 12101 to 12104, and thus recognizes the pedestrian, the sound / image output section 12052 controls the display section 12062 so that a square contour line for emphasis is displayed so as to be superimposed on the recognized pedestrian. The sound / image output section 12052 may also control the display section 12062 so that an icon or the like representing the pedestrian is displayed at a desired position.

[0179] An example of the vehicle control system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure may be applied to the imaging section 12031 or the like, for example, among the configurations described above. Specifically, the photodetection device 1 according to the present disclosure can be applied to the imaging section 12031. By applying the technology of the present disclosure to the imaging section 12031 or the like, a more easily viewable captured image with higher image quality can be obtained, by which fatigue of the driver can be reduced.

[0180] Note that the present disclosure may also have the following configurations. (1)　　　　　　A light detecting device comprising: a plurality of photoelectric conversion regions; a memory region shared by the plurality of photoelectric conversion regions; a light shielding portion that separates the two photoelectric conversion regions and is disposed above the memory. (2)　　　　　　The light detecting device according to (1), further comprising: a first transistor; a second transistor that is arranged between the first transistor and an overflow drain; a third transistor that is arranged between the first transistor and the memory region; and a fourth transistor that is arranged between the memory region and a floating diffusion. (3)　　　　　　The light detecting device according to (1), wherein a first photoelectric conversion region and a second photoelectric conversion region of the plurality of photoelectric conversion regions have a same exposure time. (4)　　　　　　The light detecting device according to (1), wherein a first photoelectric conversion region has a first exposure time and a second photoelectric conversion region has a second exposure time different from the first exposure time. (5)　　　　　　The light detecting device according to (1), wherein at least a part of the light shielding portion overlaps the plurality of photoelectric conversion regions. (6)　　　　　　The light detecting device according to (1), wherein exposure of the plurality of photoelectric conversion regions is simultaneous, and wherein read out from each of the plurality of photoelectric conversion regions is sequential. (7)　　　　　　The light detecting device according to (1), wherein the memory region overlaps a center line between a first photoelectric conversion region and a second photoelectric conversion region. (8)　　　　　　The light detecting device according to (1), further comprising a reset transistor connected to a floating diffusion (FD) and a vertical signal line (VSL). (9)　　　　　　The light detecting device according to (1), further comprising a reference voltage switching circuit between a VDD and GND. (10)　　　　　The light detecting device according to (9), further comprising a second switching circuit that switches between a first current source and a second current source. (11)　　　　　The light detecting device according to (1), wherein the light shielding portion comprises a first portion and a second portion, and wherein the first portion is at a first depth and the second portion is at a second depth different from the first depth. (12)　　　　　The light detecting device according to (1), wherein a first photoelectric conversion region has a size larger than a size of a second photoelectric conversion region. (13)　　　　　The light detecting device according to (1), wherein the light shielding portion comprises a first portion and a second portion, and wherein the first portion is at a first depth and the second portion is at a second depth different from the first depth, wherein the plurality of photoelectric conversion regions comprises a first photoelectric conversion region and a second photoelectric conversion region, and wherein the first photoelectric conversion region has a size larger than a size of the second photoelectric conversion region. (14)　　　　　The light detecting device according to (1), wherein the memory region is shared by a first photoelectric conversion region in a first pixel and a second photoelectric conversion region in a second pixel. (15)　　　　　The light detecting device according to (1), further comprising: a first switching circuit that switches connection between an amp drain and GND or VDD. (16)　　　　　The light detecting device according to (1), further comprising a second switching circuit that switches between a current source and to VSL. (17)　　　　　The light detecting device according to (1), further comprising: a control unit that select an operation mode. (18)　　　　　The light detecting device according to (17), wherein a first operation mode comprises starting exposure in a first photoelectric conversion region and a second photoelectric conversion region at a same time and a global shutter operation for making exposure periods the same. (19)　　　　　The light detecting device according to (18), wherein a second operation mode comprises starting exposure by a second photoelectric conversion section of each pixel at a same time and the global shutter operation is performed, after exposure is started by a first photoelectric conversion section of each pixel at a same time and the global shutter operation for making the exposure period be the same is performed. (20)　　　　　The light detecting device according to (19), wherein a third operation mode comprises image plane phase difference detection and a charge is directly transferred to a floating diffusion.

[0181] Aspects of the present disclosure are not limited to the above-described individual embodiments, but include various modifications that can be conceived by those skilled in the art, and the effects of the present disclosure are not limited to the above-described contents. That is, various additions, modifications, and partial deletions are possible without departing from the conceptual idea and spirit of the present disclosure derived from the matters defined in the claims and equivalents thereof.

[0182] It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and alterations may occur depending on design requirements and other factors insofar as they are within the scope of the appended claims or the equivalents thereof.

[0183] 1　　　　　　Photodetection device 2　　　　　　Pixel array section 3　　　　　　Vertical drive section 4　　　　　　Column processing section 5　　　　　　Data storage section 6　　　　　　Horizontal drive section 7　　　　　　System control section 8　　　　　　Signal processing section 9　　　　　　Drive line 10　　　　　　Pixel 11　　　　　　Photoelectric conversion section 11S　　　　　　Silicon layer 12　　　　　　Silicon substrate 12B　　　　　　Back surface 12S　　　　　　Front surface 14　　　　　　Color filter 15　　　　　　On-chip lens 16　　　　　　Pixel separation section 16a　　　　　　Inner layer portion 16b　　　　　　Outer layer portion 16H　　　　　　Horizontal light shielding portion 16V　　　　　　Vertical light shielding portion 16V1　　　　　Vertical support portion 17　　　　　　Fixed charge film 18a　　　　　　First switching transistor 18b　　　　　　Second switching transistor 19　　　　　　Wiring layer 20　　　　　　Insulating layer 21　　　　　　TRZ transistor 21a　　　　　　First TRZ transistor 21b　　　　　　Second TRZ transistor 21V　　　　　　Vertical gate electrode 22　　　　　　OFG transistor 23　　　　　　TRX transistor 24　　　　　　TRG transistor 24a　　　　　　First TRG transistor 24b　　　　　　Second TRG transistor 25　　　　　　RST transistor 25a　　　　　　First RST transistor 25b　　　　　　Second RST transistor 26　　　　　　AMP transistor 26　　　　　　Second AMP transistor 26a　　　　　　First AMP transistor 26b　　　　　　Second AMP transistor 27　　　　　　SEL transistor 27a　　　　　　First SEL transistor 27b　　　　　　Second SEL transistor 28　　　　　　Reference voltage switching circuit 29　　　　　　Current source switching circuit 30a　　　　　　First current source 30b　　　　　　Second current source 31　　　　　　Silicon layer 32　　　　　　Trench 33　　　　　　Sacrificial layer 34　　　　　　Trench 35　　　　　　Trench 36　　　　　　Pixel transistor 39　　　　　　Trench 39S　　　　　　Sidewall

Claims

1. A light detecting device comprising: a plurality of photoelectric conversion regions; a memory region shared by the plurality of photoelectric conversion regions; a light shielding portion that separates the two photoelectric conversion regions and is disposed above the memory.

2. The light detecting device according to claim 1, further comprising: a first transistor; a second transistor that is arranged between the first transistor and an overflow drain; a third transistor that is arranged between the first transistor and the memory region; and a fourth transistor that is arranged between the memory region and a floating diffusion.

3. The light detecting device according to claim 1, wherein a first photoelectric conversion region and a second photoelectric conversion region of the plurality of photoelectric conversion regions have a same exposure time.

4. The light detecting device according to claim 1, wherein a first photoelectric conversion region has a first exposure time and a second photoelectric conversion region has a second exposure time different from the first exposure time.

5. The light detecting device according to claim 1, wherein at least a part of the light shielding portion overlaps the plurality of photoelectric conversion regions.

6. The light detecting device according to claim 1, wherein exposure of the plurality of photoelectric conversion regions is simultaneous, and wherein read out from each of the plurality of photoelectric conversion regions is sequential.

7. The light detecting device according to claim 1, wherein the memory region overlaps a center line between a first photoelectric conversion region and a second photoelectric conversion region.

8. The light detecting device according to claim 1, further comprising a reset transistor connected to a floating diffusion (FD) and a vertical signal line (VSL).

9. The light detecting device according to claim 1, further comprising a reference voltage switching circuit between a VDD and GND.

10. The light detecting device according to claim 9, further comprising a second switching circuit that switches between a first current source and a second current source.

11. The light detecting device according to claim 1, wherein the light shielding portion comprises a first portion and a second portion, and wherein the first portion is at a first depth and the second portion is at a second depth different from the first depth.

12. The light detecting device according to claim 1, wherein a first photoelectric conversion region has a size larger than a size of a second photoelectric conversion region.

13. The light detecting device according to claim 1, wherein the light shielding portion comprises a first portion and a second portion, and wherein the first portion is at a first depth and the second portion is at a second depth different from the first depth, wherein the plurality of photoelectric conversion regions comprises a first photoelectric conversion region and a second photoelectric conversion region, and wherein the first photoelectric conversion region has a size larger than a size of the second photoelectric conversion region.

14. The light detecting device according to claim 1, wherein the memory region is shared by a first photoelectric conversion region in a first pixel and a second photoelectric conversion region in a second pixel.

15. The light detecting device according to claim 1, further comprising: a first switching circuit that switches connection between an amp drain and GND or VDD.

16. The light detecting device according to claim 1, further comprising a second switching circuit that switches between a current source and to VSL.

17. The light detecting device according to claim 1, further comprising: a control unit that select an operation mode.

18. The light detecting device according to claim 17, wherein a first operation mode comprises starting exposure in a first photoelectric conversion region and a second photoelectric conversion region at a same time and a global shutter operation for making exposure periods the same.

19. The light detecting device according to claim 18, wherein a second operation mode comprises starting exposure by a second photoelectric conversion section of each pixel at a same time and the global shutter operation is performed, after exposure is started by a first photoelectric conversion section of each pixel at a same time and the global shutter operation for making the exposure period be the same is performed.

20. The light detecting device according to claim 19, wherein a third operation mode comprises image plane phase difference detection and a charge is directly transferred to a floating diffusion.

Images