Packet forwarding method, network interface card, gateway device, storage medium, and program

Abstract

Embodiments of the present disclosure relate to the technical field of networks, and provide a packet forwarding method, a network interface card, a gateway device, a storage medium, and a program. The method comprises: in response to a first packet sent by a source end device, determining a packet forwarding mode of the first packet on the basis of feature information of the first packet; if the packet forwarding mode is a dynamic load balancing mode, allocating a target packet sequence number of the first packet in an order-preserving queue corresponding to a target service; generating first metadata, and inserting the first metadata into the first packet to obtain a second packet; sending, in a polling manner, the second packet to a first processor core running a driver; and in response to a first processed packet fed back by the first processor core, determining a sending order of the first processed packet on the basis of the first metadata contained in the first processed packet, so as to send the first processed packet to a corresponding destination end device in the sending order. The present solution can ensure the forwarding performance of the gateway device.

Description

Message forwarding methods, network interface cards (NICs), gateway devices, storage media, and programs Technical Field

[0001] This disclosure relates to the field of network technology, and in particular to a message forwarding method, network interface card, gateway device, storage medium, and program. Background Technology

[0002] The communication traffic carried on the internet is constantly growing and changing, among which elephant flows consume more network resources. Elephant flows refer to network traffic that lasts a long time and involves large amounts of data. For example, an elephant flow, which accounts for about 5% of the total packets, may consume about 40% of the network bandwidth. Common examples of elephant flows include virtual machine migration, data migration, and data processing in distributed databases. In scenarios such as data centers, there is often a need to forward elephant flows. For instance, a gateway device in a data center might forward an elephant flow received from a switch to a corresponding cloud server.

[0003] Many gateway devices employ network interface card (NIC) multi-queue technology. As the name suggests, a high-speed NIC has multiple Direct Memory Access (DMA) queues. The NIC has an allocation mechanism based on these multiple DMA queues, and each DMA queue can be bound to a single processor core (usually a CPU core) within the gateway device. Currently, because Receive Side Scaling (RSS) mode inherently preserves packet order, it is commonly used for packet distribution. When a gateway device receives a packet, it calculates a hash value based on a specific area of ​​the packet header, such as the five-tuple (source IP, source port, destination IP, destination port, and protocol number). Based on the least significant bits of the hash value, it queries the forwarding table (indirection table) to determine the corresponding CPU core number, thus allocating the packet to the appropriate CPU core for processing. It's important to note that the packets forwarded by the gateway device include both data packets corresponding to applications (i.e., services) and control packets corresponding to the kernel protocol stack. All of these packets are forwarded using RSS mode. Understandably, different packets within the same network flow under a certain service, because they share the same specific header area (e.g., the same 5-tuple), will be distributed to the same CPU core for processing in RSS mode, regardless of the packet type. This is especially true if the network flow is an "elephant flow" (a high-volume, high-volume flow). This can easily overload a single CPU core, ultimately impacting the gateway device's forwarding performance. Summary of the Invention

[0004] This disclosure provides a message forwarding method, a network interface card (NIC), a gateway device, a storage medium, and a program, which can guarantee the forwarding performance of the gateway device.

[0005] In a first aspect, embodiments of this disclosure provide a packet forwarding method applied to a programmable chip in a network interface card (NIC). The NIC is located in a gateway device, which includes a first processor core and a second processor core communicatively connected to the NIC. The method includes: responding to a first packet sent by a source device; determining a packet forwarding mode for the first packet based on feature information of the first packet, wherein the first packet corresponds to a target service; if the packet forwarding mode is a dynamic load balancing mode, allocating a target packet sequence number for the first packet in the order-keeping queue corresponding to the target service; generating first metadata and filling the first metadata into the first packet to obtain a second packet, wherein the first metadata includes the dynamic load balancing mode... The system includes the first identifier information corresponding to the formula, the queue number of the order-keeping queue, and the target message sequence number; the second message is sent to the first processor core running the driver in a polling manner, so that the first processor core sends the second message to the second processor core for processing based on the first metadata, to obtain a first processed message, and the second processor core runs the message processing program of the target service; in response to the first processed message fed back by the first processor core, the system determines the sending order of the first processed message according to the first metadata contained in the first processed message, so as to send the first processed message to the corresponding destination device according to the sending order, and deletes the target message sequence number from the order-keeping queue.

[0006] Secondly, embodiments of this disclosure provide a packet forwarding device applied to a programmable chip in a network interface card (NIC). The NIC is located in a gateway device, which includes a first processor core and a second processor core communicatively connected to the NIC. The device includes: a determining module, configured to determine a packet forwarding mode of the first packet based on characteristic information of the first packet in response to a first packet sent by a source device, wherein the first packet corresponds to a target service; an allocation module, configured to allocate a target packet sequence number of the first packet in the order-keeping queue corresponding to the target service if the packet forwarding mode is a dynamic load balancing mode; and a filling module, configured to generate first metadata and fill the first metadata into the first packet to obtain a second packet, wherein the first metadata includes the dynamic load balancing mode. The system includes: a first identifier corresponding to the balanced mode, the queue number of the order-keeping queue, and the target message sequence number; a processing module, configured to send the second message to a first processor core running a driver in a polling manner, so that the first processor core sends the second message to a second processor core for processing based on the first metadata, to obtain a first processed message, and the second processor core runs the message processing program of the target service; and a sending module, configured to respond to the first processed message fed back by the first processor core, determine the sending order of the first processed message based on the first metadata contained in the first processed message, send the first processed message to the corresponding destination device according to the sending order, and delete the target message sequence number from the order-keeping queue.

[0007] Thirdly, this disclosure provides a packet forwarding method applied to a first processor core running a driver in a gateway device. The first processor core is any processor core running the driver. The gateway device also includes a network interface card (NIC) containing a programmable chip. The method includes: responding to a first packet corresponding to a target service sent by a source device; receiving a second packet sent by the programmable chip in a polling manner. The second packet is obtained by filling the first packet with first metadata, wherein the first metadata includes first identification information corresponding to a dynamic load balancing mode, a queue number of the order-keeping queue corresponding to the target service, and a target packet sequence number corresponding to the first packet in the order-keeping queue. The dynamic load balancing mode is the packet forwarding mode of the first packet determined by the programmable chip based on the characteristic information of the first packet; the second packet is sent to the second processor core for processing based on the first metadata to obtain the first processed packet, and the second processor core runs the packet processing program of the target service; in response to the first processed packet fed back by the second processor core, the first processed packet is sent to the programmable chip, so that the programmable chip determines the sending order of the first processed packet based on the first metadata contained in the first processed packet, and sends the first processed packet to the corresponding destination device according to the sending order, and then deletes the target packet sequence number from the order-keeping queue.

[0008] Fourthly, this disclosure provides a packet forwarding device applied to a first processor core running a driver in a gateway device. The first processor core is any processor core running the driver. The gateway device also includes a network interface card (NIC) containing a programmable chip. The device includes: a receiving module, configured to receive a second packet sent by the programmable chip in a polling manner in response to a first packet sent by a source device corresponding to a target service. The second packet is obtained by filling the first packet with first metadata, wherein the first metadata includes first identification information corresponding to a dynamic load balancing mode, a queue number of the ordering queue corresponding to the target service, and a target packet sequence number corresponding to the first packet in the ordering queue. The load balancing mode is the packet forwarding mode of the first packet determined by the programmable chip based on the feature information of the first packet; the processing module is used to send the second packet to the second processor core for processing based on the first metadata to obtain a first processed packet, and the second processor core runs the packet processing program of the target service; the sending module is used to send the first processed packet to the programmable chip in response to the feedback of the first processed packet from the second processor core, so that the programmable chip determines the sending order of the first processed packet based on the first metadata contained in the first processed packet, and sends the first processed packet to the corresponding destination device according to the sending order, and then deletes the target packet sequence number from the order-keeping queue.

[0009] Fifthly, this disclosure provides a network interface card (NIC) including a programmable chip. The NIC is communicatively connected to a first processor core and a second processor core in a gateway device. The programmable chip is configured to respond to a first packet sent by a source device, determine a packet forwarding mode for the first packet based on the characteristic information of the first packet, wherein the first packet corresponds to a target service. If the packet forwarding mode is a dynamic load balancing mode, the chip allocates a target packet sequence number for the first packet in the order-keeping queue corresponding to the target service. It also generates first metadata and fills the first metadata into the first packet to obtain a second packet, wherein the first metadata includes a first... The system includes: identification information, the queue number of the order-keeping queue, and the target message sequence number; sending the second message to a first processor core running a driver in a polling manner, so that the first processor core sends the second message to a second processor core for processing based on the first metadata, obtaining a first processed message; the second processor core runs the message processing program of the target service; in response to the first processed message fed back by the first processor core, determining the sending order of the first processed message according to the first metadata contained in the first processed message, sending the first processed message to the corresponding destination device according to the sending order, and deleting the target message sequence number from the order-keeping queue.

[0010] In a sixth aspect, embodiments of this disclosure provide a gateway device, the gateway device comprising: multiple processor cores, including a first processor core running a driver and a second processor core running a packet processing program for a target service; a network interface card (NIC), the NIC including a programmable chip, the NIC being communicatively connected to the first processor core and the second processor core respectively; the programmable chip being configured to: respond to a first packet sent by a source device, determine a packet forwarding mode for the first packet based on the characteristic information of the first packet, the first packet corresponding to a target service; if the packet forwarding mode is a dynamic load balancing mode, allocate a target packet sequence number for the first packet in the order-keeping queue corresponding to the target service; generate first metadata, and fill the first metadata into the first packet to obtain a second packet, wherein... In the first metadata, the first identifier information corresponding to the dynamic load balancing mode, the queue number of the order-keeping queue, and the target packet sequence number are included. The second packet is sent to the first processor core in a round-robin manner. The first processor core is used to: send the second packet to the second processor core for processing based on the first metadata to obtain a first processed packet, and send the first processed packet to the programmable chip. The programmable chip is also used to: respond to the first processed packet fed back by the first processor core, determine the sending order of the first processed packet according to the first metadata contained in the first processed packet, send the first processed packet to the corresponding destination device according to the sending order, and delete the target packet sequence number from the order-keeping queue.

[0011] In a seventh aspect, embodiments of this disclosure provide a non-transitory machine-readable storage medium storing executable code. When the executable code is executed by a programmable chip in a gateway device, the programmable chip performs the packet forwarding method as described in the first aspect. When the executable code is executed by a processor core in the gateway device, the processor core performs the packet forwarding method as described in the third aspect.

[0012] Eighthly, this disclosure provides a computer program product comprising: a computer program that, when executed by a programmable chip in a gateway device, causes the programmable chip to execute the packet forwarding method as described in the first aspect; and when the executable code is executed by a processor core in the gateway device, causes the processor core to execute the packet forwarding method as described in the third aspect.

[0013] The message forwarding method provided in this embodiment responds to a first message sent by a source device. It determines the message forwarding mode of the first message based on its characteristic information, thus classifying the first message and determining whether it belongs to a service-related message or a kernel protocol stack-related message, enabling subsequent targeted processing based on the message's category. If the message forwarding mode of the first message is determined to be dynamic load balancing mode, it indicates that the first message belongs to a service-related message. In this case, a target message sequence number is allocated to the first message in the order-keeping queue corresponding to the target service. First metadata, composed of the first identifier information corresponding to the dynamic load balancing mode, the queue number of the order-keeping queue, and the target message sequence number, is then filled into the first message to obtain a second message. This is equivalent to marking the first message with a sequence number. When the first processed message fed back by the first processor core is subsequently sent to the destination device, the sending order of the first message can be determined solely by this mark, ensuring that the first message is sent sequentially.

[0014] Then, the second message is sent to the first processor core running the driver in a polling manner. In other words, when the gateway device receives different messages, these messages are sent to different processor cores in a polling manner. This avoids the processor core being overloaded due to continuously receiving too many messages (i.e., excessive load will lead to increased message processing delay), thus ensuring the forwarding performance of the gateway device.

[0015] Furthermore, since the first message belongs to the service-related message, the second message can be sent to the second processor core running the message processing program of the target service for processing. The first processor core obtains the first processed message sent by the second processor core, and the sending order of the first processed message is determined according to the first metadata contained in the first processed message. The first processed message is then sent to the corresponding destination device in the sending order, and the target message sequence number is deleted from the order-keeping queue. In this way, the first processed message can be sent in order, and the storage space in the queue can be freed up after the target message is sent in order. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 is a flowchart of a message forwarding method provided in an embodiment of this disclosure;

[0018] Figure 2 is a schematic diagram illustrating the application of a message forwarding method provided in an embodiment of this disclosure.

[0019] Figure 3 is a schematic diagram of the composition of the second message provided in an embodiment of this disclosure;

[0020] Figure 4 is a flowchart of another message forwarding method provided in an embodiment of this disclosure;

[0021] Figure 5 is a flowchart of a message forwarding method provided in an embodiment of this disclosure;

[0022] Figure 6 is a schematic diagram of the composition of the first metadata provided in an embodiment of this disclosure;

[0023] Figure 7 is a flowchart of obtaining the first processed message provided in an embodiment of this disclosure;

[0024] Figure 8 is a flowchart of sending a first processed message to a programmable chip according to an embodiment of this disclosure;

[0025] Figure 9 is a flowchart of another message forwarding method provided in an embodiment of this disclosure;

[0026] Figure 10 is a schematic diagram of a message forwarding device provided in an embodiment of this disclosure;

[0027] Figure 11 is a schematic diagram of another message forwarding device provided in an embodiment of this disclosure. Detailed Implementation

[0028] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.

[0029] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this disclosure are all information and data authorized by the user or fully authorized by all parties. Furthermore, the collection, use and processing of related data must comply with the relevant laws, regulations and standards of the relevant countries and regions, and corresponding operation entry points are provided for users to choose to authorize or refuse.

[0030] The following detailed description of some embodiments of this disclosure is provided in conjunction with the accompanying drawings. Where there is no conflict between the embodiments, the following embodiments and features can be combined with each other. Furthermore, the timing of the steps in the following method embodiments is merely an example and not a strict limitation.

[0031] First, the terms or concepts involved in the embodiments of this disclosure will be explained.

[0032] Gateway device: This can be a gateway-type forwarding node in application scenarios such as data centers, serving as a traffic aggregation point. In this embodiment, the gateway device can also be a network device capable of packet forwarding, such as a switch or router.

[0033] Field-Programmable Gate Array (FPGA): A programmable chip, an integrated circuit that can be reconfigured at the hardware level.

[0034] Currently, the packets forwarded by the gateway device include both service-related packets and kernel protocol stack-related packets, all of which are forwarded using RSS mode. Although RSS mode has the inherent advantage of preserving packet order, packet forwarding in RSS mode will continuously send packets from the same network flow (especially when the network flow is an elephant flow) to the same processor core, resulting in excessive load on the processor core, large packet processing latency, and ultimately affecting the forwarding performance of the gateway device.

[0035] In view of this, this disclosure provides a message forwarding method. This method can determine the message forwarding mode of a first message based on its feature information. This is equivalent to pre-classifying the first message based on its feature information, determining whether the first message belongs to a service-related message or a kernel protocol stack-related message. When it is determined that the first message belongs to a service-related message, its message forwarding mode can be determined to be Dynamic Load Balancer (DLB). In this DLB mode, a pre-order queue is introduced to maintain message order during forwarding. Specifically, first metadata, including the first identifier information corresponding to the DLB mode, the queue number of the pre-order queue, and the target message sequence number, is filled into the first message to obtain a second message. The second message is then sent to the first processor core running the driver in a round-robin manner. It should be understood that when the gateway device receives different messages, these messages are sent to different processor cores in a round-robin fashion. This avoids excessive load on a single processor core due to continuously receiving too many messages, increasing message processing latency and ensuring the forwarding performance of the gateway device. Subsequently, since the first message belongs to the message corresponding to the service, in order to successfully complete the processing of the message, the first processor core can send the second message to the second processor core running the message processing program of the target service based on the first metadata for processing, and obtain the first processed message.

[0036] After processing the second message, the second processor core sends the resulting processed first message to the programmable chip via the first processor. At this point, the programmable chip can determine the sending order of the processed first message based on the first metadata contained within it. The processed first message is then sent to the corresponding destination device in the correct order, and the target message sequence number is deleted from the order-keeping queue. This ensures that the processed first message is sent in order and frees up storage space in the queue after the target message has been sent in order.

[0037] Figure 1 is a flowchart of a message forwarding method provided in an embodiment of this disclosure. The method is applied to a programmable chip in a network interface card (NIC). The NIC is located in a gateway device, which includes a first processor core and a second processor core that are communicatively connected to the NIC. As shown in Figure 1, the method includes the following steps.

[0038] 101. The programmable chip responds to the first message sent by the source device, determines the message forwarding mode of the first message based on the feature information of the first message, and the first message corresponds to the target service.

[0039] 102. If the message forwarding mode is dynamic load balancing mode, the programmable chip allocates the target message sequence number of the first message in the order-keeping queue corresponding to the target service.

[0040] 103. The programmable chip generates first metadata and fills it into the first message to obtain the second message. The first metadata includes the first identification information corresponding to the dynamic load balancing mode, the queue number of the order-keeping queue, and the target message sequence number.

[0041] 104. The programmable chip sends the second message to the first processor core running the driver in a polling manner, so that the first processor core sends the second message to the second processor core for processing based on the first metadata, and obtains the first processed message. The second processor core runs the message processing program of the target service.

[0042] 105. The programmable chip responds to the first processed message fed back by the first processor core, determines the sending order of the first processed message according to the first metadata contained in the first processed message, and sends the first processed message to the corresponding destination device in the sending order, and deletes the target message sequence number in the order-keeping queue.

[0043] It should be noted that the target service can be a live streaming application service, a game application service, etc., which will not be listed here. The source device and the destination device refer to two devices that need to communicate through the gateway device, such as a terminal device using the target service and a cloud server providing the target service. Multiple processor cores are typically multiple CPU cores, such as CPU core 1, CPU core 2…CPU core n in the gateway device shown in Figure 2. The programmable chip can be the FPGA chip shown in Figure 2, but it is not limited to this; other dedicated integrated chips are also acceptable. The following explanation uses CPU cores as the processor cores and FPGA chips as the programmable chip as an example. As shown in Figure 2, the gateway device will have a network interface card (NIC). The FPGA chip is located in the NIC. The NIC is a multi-queue NIC, which can include multiple DMA receive queues and multiple corresponding DMA send queues as shown in the figure.

[0044] In practical applications, the programmable chip receives a first message corresponding to the target service sent by the source device and determines the message forwarding mode of the first message based on its characteristic information. The specific process is as follows: It obtains the matching rule corresponding to the receiver scaling mode (i.e., RSS mode). If the matching rule is met, the message forwarding mode of the first message is determined to be receiver scaling mode. If the characteristic information of the first message does not meet the matching rule, the message forwarding mode of the first message is determined to be dynamic load balancing mode. The matching rule includes the message characteristic information that requires message forwarding according to receiver scaling mode.

[0045] It should be noted that a typical packet header area includes the following five-tuple information: source IP, destination IP, source port, destination port, and protocol type. This means that a gateway device may include one or more network interface cards (NICs), and different packets may be received by different NICs. In this process, the IP address of the NIC receiving the packet is the destination IP, and the port of the NIC receiving the packet is the destination port. Similarly, the IP address of the source device sending the packet is the source IP, and the port of the source device sending the packet is the source port.

[0046] In specific implementation, the packet characteristic information used to determine the packet forwarding mode of the first packet can be the destination IP and protocol type from the aforementioned five-tuple information. When determining the packet forwarding mode of the first packet, it is determined whether the protocol type carried in the first packet corresponds to the matching rule, that is, whether the protocol type carried in the first packet is consistent with the protocol type set in the matching rule. If they are consistent, the packet forwarding mode of the first packet is determined to be Receiver Scaling (RSS) mode. If they are inconsistent, the packet forwarding mode of the first packet is determined to be Dynamic Load Balancing (DLB) mode. The set protocol type can be Link Layer Discovery Protocol (LLDP), Address Resolution Protocol (ARP), etc., and can be set according to actual needs, without limitation here. In addition, it can also be determined whether the destination IP carried in the first packet corresponds to the matching rule, that is, whether the destination IP carried in the first packet is consistent with the destination IP set in the matching rule. If they are consistent, the packet forwarding mode of the first packet is determined to be RSS mode. If there is no discrepancy, the forwarding mode of the first packet is determined to be DLB mode. By judging whether the feature information of the first packet conforms to the matching rules, the forwarding mode of the first packet can be determined. This allows the processor core to be determined for processing the first packet based on the forwarding mode, laying the foundation for the successful forwarding of the first packet.

[0047] If, after the above matching rules, the packet forwarding mode of the first packet is determined to be DLB mode, then subsequent packet forwarding will be performed in DLB mode. DLB mode refers to sending packets corresponding to the target service to different processor cores for processing via polling, to avoid excessive load on a single processor core due to continuously receiving too many packets, thus preventing increased packet processing latency. In this DLB mode, a pre-order queue is introduced to maintain packet order during forwarding. Specifically, if the packet forwarding mode of the first packet is determined to be DLB mode, a target packet sequence number (PSN) can be allocated to the first packet in the pre-order queue corresponding to the target service through a programmable chip. First metadata is then generated based on the first identifier information corresponding to the dynamic load balancing mode, the queue number of the pre-order queue, and the target packet sequence number.

[0048] Optionally, in practical applications, the target service can correspond to an order-keeping queue. Based on this, the programmable chip allocates the target message sequence number of the first message in the order-keeping queue corresponding to the target service as follows: Determine the message sequence numbers already allocated in the order-keeping queue; based on the allocated message sequence numbers, sequentially allocate the corresponding target message sequence number to the first message. For ease of understanding, for example, suppose that nine message sequence numbers (numbers 1-9) have been consecutively allocated before the first message. Then, the target message sequence number corresponding to the first message in the order-keeping queue would be 10. It is important to emphasize that the message sequence numbers stored in the order-keeping queue will not be duplicated. Specifically, suppose the order-keeping queue can hold a maximum of 1000 message sequence numbers. The message sequence numbers could be consecutive integers starting from 1, and when the number reaches 1000, they are reassigned starting from 1 again.

[0049] Subsequently, the programmable chip fills the generated first metadata into the end of the first message to obtain the second message, as shown in Figure 3. It should be understood that although the first metadata can also be filled into the header or middle of the first message, regardless of whether it's placed in the header or middle, the first metadata must be processed first when processing the first message. By filling the first metadata into the end of the first message, the second processor core, which processes the first message, is unaware of the existence of the first metadata when parsing and encapsulating the first message (because message processing generally starts from the header, ignoring the first metadata at the end), ensuring the forwarding speed of the first message. It should be noted that if, after filling the first metadata into the end of the first message, further data needs to be appended to the end, a new interface for appending data can be created. The first and second processor cores can be the same or different; this is not limited here.

[0050] After receiving the second message, the programmable chip sends the second message to the first processor core running the driver in a polling manner. The specific process is as follows: poll the network card receive queue (i.e., DMA receive queue) corresponding to the target service to store the second message in the currently polled target network card receive queue, so as to upload the second message to the first processor core bound to the target network card receive queue through the target network card receive queue.

[0051] In practical applications, each network interface card (NIC) receive queue corresponding to the target service has a defined correspondence with the processor core. For ease of understanding, please refer to Figure 2, which is a schematic diagram of the application of a packet forwarding method provided in this embodiment. In Figure 2, queue 1 in the DMA receive queue corresponds to CPU core 1, queue 2 in the DMA receive queue corresponds to CPU core 2, and so on, queue n in the DMA receive queue corresponds to CPU core n. Assuming that the currently polled target NIC receive queue is queue 1, the second packet is sent through queue 1 to the first processor core bound to the target NIC receive queue.

[0052] Furthermore, the programmable chip stores the first processed message fed back by the first processor core into the target network card transmit queue (i.e., DMA transmit queue) corresponding to the target network card receive queue, so as to read the first processed message from the target network card transmit queue.

[0053] It should be noted that the network card transmit queue and the network card receive queue are in one-to-one correspondence. In specific implementation, the second packet uploaded through the target network card receive queue will be processed by the second processor core and then sent to the corresponding target network card transmit queue through the first processor core. For easier understanding, please refer to Figure 2. In Figure 2, queue 1 in the DMA transmit queue corresponds to CPU core 1, queue 2 in the DMA transmit queue corresponds to CPU core 2, and so on, queue n in the DMA transmit queue corresponds to processor core n. Assuming that the second packet is sent to the first processor core through queue 1, the first processed packet it receives will be stored in DMA transmit queue 1 corresponding to DMA receive queue 1. Subsequently, the programmable chip reads the first processed packet from DMA transmit queue 1, performs "order preservation processing" according to the queue number of the order preservation queue and the target packet sequence number contained in the first processed packet, and then sends it.

[0054] Subsequently, in response to the first processed message fed back by the first processor core, the programmable chip can determine the transmission order of the first processed message based on the first metadata contained in the first processed message. The specific process is as follows: If the target message sequence number in the first metadata is the smallest message sequence number currently stored in the order-keeping queue, then it is determined that the first processed message will be sent directly. If there is a message sequence number smaller than the target message sequence number in the currently stored message sequence number, then the first processed message is buffered, and the transmission order of the first processed message is determined to be after the processed message corresponding to the message sequence number smaller than the target message sequence number.

[0055] To facilitate understanding, let's take an example and assume the target message sequence number is 3. If the currently stored message sequence numbers in the order-keeping queue include 3, 4, and 5, it means the target message sequence number is the smallest among the currently stored sequence numbers. In this case, the first processed message can be sent directly to the destination device. However, if the currently stored message sequence numbers in the order-keeping queue include 1 and 2, it means there is a message sequence number smaller than the target message sequence number. In this case, the first processed message is buffered, and after confirming that the messages corresponding to 1 and 2 have been sent, the first processed message is then sent to the destination device. This method ensures that the first message is sent smoothly and accurately to the destination device according to the set sending order.

[0056] After sending the first processed message to the corresponding destination device in the order of transmission, the target message sequence number is deleted from the order-keeping queue to free up storage space in the order-keeping queue, so that other messages corresponding to the target service can store their corresponding message sequence numbers in the order-keeping queue.

[0057] The message forwarding method provided in this disclosure can determine the message forwarding mode of the first message based on its characteristic information. This is equivalent to classifying the first message and determining whether it belongs to a service-related message or a kernel protocol stack-related message, so that subsequent targeted processing can be performed based on the category of the first message. If the message forwarding mode of the first message is determined to be a dynamic load balancing mode, it means that the first message belongs to a service-related message. At this time, an order-preserving queue is introduced to implement the message order preservation function during message forwarding. In specific implementation, first metadata containing the first identifier information corresponding to the dynamic load balancing mode, the queue number of the order-preserving queue, and the target message sequence number is filled into the first message to obtain the second message. This is equivalent to marking the first message with a sequence number. When the first processed message fed back by the first processor core is subsequently sent to the destination device, the sending order of the first message can be determined simply by this mark, ensuring that the first message is sent in sequence. Then, the second message is sent to the first processor core running the driver in a polling manner, which avoids the processor core being overwhelmed by receiving too many messages continuously, thus ensuring the forwarding performance of the gateway device.

[0058] Figure 4 is a flowchart of another message forwarding method provided in an embodiment of this disclosure. The gateway device also includes a third processor core. As shown in Figure 4, the method includes the following steps.

[0059] 401. The programmable chip responds to the first message sent by the source device, determines the message forwarding mode of the first message based on the feature information of the first message, and the first message corresponds to the target service.

[0060] 402. If the message forwarding mode is receiver scaling mode, the programmable chip generates second metadata and fills the second metadata into the first message to obtain the third message. The second metadata includes the second identification information corresponding to the receiver scaling mode.

[0061] 403. The programmable chip determines the target network interface card (NIC) receiving queue corresponding to the third message based on the five-tuple information of the third message in the NIC receiving queue corresponding to the target service.

[0062] 404. The programmable chip uploads the third message to the first processor core running the driver program bound to the target network card receiving queue through the target network card receiving queue. This allows the first processor core to remove the second metadata and restore the first message. The first message is then sent to the third processor core for processing to obtain the second processed message. The third metadata corresponding to the receiver scaling mode is added to the second processed message to obtain the third processed message. The third processor core runs a kernel protocol stack, and the third metadata contains the second identification information.

[0063] 405. In response to the third processed message fed back by the first processor core, the programmable chip sends the third processed message to the corresponding destination device according to the second identification information contained in the third metadata.

[0064] In practical applications, the programmable chip receives the first message corresponding to the target service sent by the source device, and determines the message forwarding mode of the first message based on the feature information of the first message. The specific process can be found in the above embodiments, and will not be repeated here.

[0065] If the programmable chip determines that the message forwarding mode corresponding to the first message is receiver scaling mode (i.e., RSS mode), the programmable chip generates second metadata containing the second identifier information corresponding to the receiver scaling mode, and fills the second metadata into the first message to obtain the third message. It is understood that the second metadata can also be filled into the end of the first message; the specific reasons can be found in the above embodiments, and will not be repeated here.

[0066] Subsequently, in the network interface card (NIC) receive queue corresponding to the target service, the programmable chip determines the target NIC receive queue corresponding to the third packet based on the 5-tuple information of the third packet. Specifically, the NIC receive queue is determined by calculating a hash value based on the 5-tuple in the third packet, and then querying the indirect index table using the low-significant bits of this hash value to determine the corresponding target NIC receive queue. The third packet is then uploaded to the first processor core bound to the target NIC receive queue, which is running the driver program. This allows the first processor core to remove the second metadata and reconstruct the first packet. The first packet is then sent to the kernel protocol stack in the third processor core for processing to obtain the second processed packet. It should be noted that, optionally, the kernel protocol stack and the packet processing program can be located in different processor cores, while the processor core running the driver program and the processor core running the packet processing program can be the same processor core. The configuration method for the processor core is not limited here.

[0067] It should be noted that since the forwarding mode of the first message is receiver scaling mode, it indicates that it belongs to the kernel protocol stack. However, the kernel protocol stack cannot recognize the second metadata. Therefore, in this embodiment, the second metadata is removed from the third message to restore the first message, and the first message is sent to the third processor core for processing to obtain the second processed message. After that, the second processed message is sent to the first processor core.

[0068] Upon receiving the second processed message, the first processor core identifies that the second processed message lacks valid metadata, thus determining that it corresponds to the receiver scaling mode. It then adds third metadata corresponding to the receiver scaling mode to the second processed message to obtain the third processed message, and sends the third processed message to the programmable chip. It should be noted that the third metadata added by the first processor core may differ from the second metadata added by the programmable chip, but both will contain the second identification information corresponding to the receiver scaling mode. The process of the first processor core adding the third metadata will be described in subsequent embodiments.

[0069] After receiving the third-processed message, the programmable chip parses it to obtain the second identifier information corresponding to the receiver scaling mode. Based on this second identifier information, the third-processed message is directly sent to the destination device. In this way, the inherent order-preserving function of the receiver scaling mode can be used to achieve in-order forwarding of messages, quickly sending the third-processed message to the destination device and improving message forwarding speed.

[0070] Based on the above, from another perspective, when forwarding packets through a gateway device, it is often packets from the target service (which can be considered data packets) that cause processor cores to be overloaded due to high traffic volume, while non-service packets (which can be considered control or management packets) do not cause processor cores to be overloaded due to low traffic volume. Therefore, this embodiment first determines the packet forwarding mode of the first packet based on its characteristic information, essentially classifying the first packet according to its type. If the first packet is a data packet, then the corresponding packet forwarding mode is Dynamic Load Balancing (DLB) mode. This mode can reduce the risk of a processor core being overloaded due to continuously receiving too many packets from the same network traffic, effectively solving the problem of single processor core overload easily caused by the current RSS mode. If the first packet is a control packet, then the first packet ultimately needs to be sent to the kernel protocol stack for processing, which does not cause single processor core overload. In this case, the corresponding packet forwarding mode can be RSS mode. In other words, this embodiment uses DLB mode to handle data packets that are prone to overloading a single processor core, while using RSS mode to handle control packets that are not prone to overloading a single processor core. This ensures smooth forwarding of all types of packets and avoids a processor core being overloaded due to continuously receiving too many packets, resulting in better forwarding performance of the gateway device.

[0071] Figure 5 is a flowchart of a message forwarding method provided in an embodiment of this disclosure. The method is applied to a first processor core running a driver in a gateway device. The first processor core is any processor core running a driver. The gateway device also includes a network interface card (NIC), which contains a programmable chip. As shown in Figure 5, the method includes the following steps.

[0072] 501. The first processor core responds to the first message corresponding to the target service sent by the source device and receives the second message sent by the programmable chip in a polling manner. The second message is obtained by filling the first metadata into the first message. The first metadata includes the first identification information corresponding to the dynamic load balancing mode, the queue number of the order-keeping queue corresponding to the target service, and the target message sequence number corresponding to the first message in the order-keeping queue. The dynamic load balancing mode is the message forwarding mode of the first message determined by the programmable chip based on the feature information of the first message.

[0073] 502. The first processor core sends the second message to the second processor core for processing based on the first metadata to obtain the first processed message. The second processor core runs the message processing program of the target service.

[0074] 503. The first processor core responds to the first processed message fed back by the second processor core and sends the first processed message to the programmable chip, so that the programmable chip determines the sending order of the first processed message according to the first metadata contained in the first processed message, and sends the first processed message to the corresponding destination device according to the sending order, and then deletes the target message sequence number in the order-keeping queue.

[0075] The execution process of message forwarding in this embodiment will not be described in detail here; please refer to the descriptions in the other embodiments mentioned above.

[0076] In this embodiment of the disclosure, the first metadata also includes: a first metadata protocol version number supported by the programmable chip and a valid bit field, as shown in Figure 6. Figure 6 is a schematic diagram of the composition of the first metadata, in which the first metadata includes the following.

[0077] VER: Represents the first metadata protocol version number, which is usually 6 bits.

[0078] I: Represents the valid bit field, typically 1 bit. When its value is 1, it indicates that the first metadata is valid; when its value is 0, it indicates that the first metadata is invalid. It should be noted that under normal circumstances, the value of the valid bit field is generally 1 (i.e., the first metadata is valid). However, if there is an abnormality in the circuitry within the network card, the value of the valid bit field may change from 1 to 0 (i.e., the first metadata is invalid).

[0079] D: Represents the deletion flag. If its value is 1, it means that the first packet needs to be deleted. This usually occurs when: the processor core experiences some fault, and received packets cannot be processed in time; or, the first packet received by the programmable chip hits a packet loss rule, etc.

[0080] R: Represents the first identifier information. If its value is 1, it indicates RSS mode; if its value is 0, it indicates DLB mode.

[0081] Reord_q: Represents the queue number of the order-keeping queue corresponding to the first message, which is generally 8 bits.

[0082] PSN: Represents the sequence number of the first message in the order-keeping queue, typically 16 bits.

[0083] Figure 7 is a flowchart of obtaining the first processed message. As shown in Figure 7, the second message is sent to the second processor core for processing based on the first metadata to obtain the first processed message. The specific steps include the following.

[0084] S1. The first processor core parses the first metadata to obtain the first metadata protocol version number, valid bit field and first identification information.

[0085] S2. The first processor core determines whether the version number of the first metadata protocol matches the version number of the second metadata protocol supported by the first processor core. If yes, proceed to S3; otherwise, delete the first metadata.

[0086] S3. The first processor core determines whether the value of the valid bit field indicates that the first metadata is valid. If yes, proceed to S4; otherwise, delete the first metadata.

[0087] S4. The first processor core sends the second message to the second processor core for processing based on the first identification information to obtain the first processed message.

[0088] In specific implementation, assume that the first metadata protocol version number obtained by the first processor core parsing the first metadata is version 2, the value of the valid bit field is 1, and the value of the first identification information is 0. At this time, the first processor core determines whether the first metadata protocol version number (version 2) matches the second metadata protocol version number supported by the first processor core (assuming it is also version 2). Since both are version 2, they match. Afterwards, since the value of the valid bit field obtained by the first processor core parsing the first metadata is 1, the first metadata can be determined to be valid. During this process, if the first metadata protocol version number does not match the second metadata protocol version number supported by the first processor core (i.e., the first metadata protocol version number is different from or incompatible with the second metadata protocol version number supported by the first processor core), or if the first metadata is invalid, then the first metadata is deleted.

[0089] Based on the above, if the first metadata protocol version number matches the second metadata protocol version number supported by the first processor core, and the value of the valid bit field indicates that the first metadata is valid, then the first metadata can be used normally. In this case, the first processor core sends the second packet to the second processor core for processing based on the first identifier information to obtain the first processed packet. By ensuring that the first metadata protocol version number matches the second metadata protocol version number supported by the first processor core, the problem of the first processor core being unable to process the second packet carrying the first metadata due to protocol version incompatibility can be avoided. Furthermore, by judging the validity of the first metadata, it is possible to prevent the first processor core or network card from suddenly malfunctioning and thus being unable to process the second packet normally.

[0090] Figure 8 is a flowchart of sending the first processed message to the programmable chip. As shown in Figure 8, sending the first processed message to the programmable chip specifically includes the following steps: the first processor core parses the first metadata contained in the first processed message to obtain the valid bit field; the first processor core determines whether the value of the valid bit field indicates that the first metadata is valid; if the value of the valid bit field indicates that the first metadata is valid, the first processor core sends the first processed message to the programmable chip; if the value of the valid bit field indicates that the first metadata is invalid, the first processor core adds new first metadata to the first processed message.

[0091] It should be understood that in the first processed message sending process, by verifying the validity of the first metadata, it can be ensured that the programmable chip can accurately obtain the queue number and message sequence number of the order-keeping queue in the first metadata, laying the foundation for accurately sending the first message to the destination device in the set sending order.

[0092] Figure 9 is a flowchart of another message forwarding method provided in an embodiment of this disclosure. As shown in Figure 9, the method includes the following steps.

[0093] 901. The first processor core responds to the first message corresponding to the target service sent by the source device, and receives the third message sent by the programmable chip through the target network card receive queue corresponding to the target service. The third message is obtained by filling the first message with second metadata. The second metadata includes second identification information corresponding to the receiver scaling mode. The receiver scaling mode is the message forwarding mode of the first message determined by the programmable chip based on the feature information of the first message. The target network card receive queue is bound to the first processor core.

[0094] 902. The first processor core removes the second metadata contained in the third message to restore the first message, and sends the first message to the third processor core for processing to obtain the second processed message. The third processor core runs a kernel protocol stack.

[0095] 903. The first processor core responds to the second processed message fed back by the third processor core, adds the third metadata corresponding to the receiver scaling mode to the second processed message to obtain the third processed message, and sends the third processed message to the programmable chip so that the programmable chip sends the third processed message to the corresponding destination device according to the third metadata contained in the third processed message. The third metadata contains the second identification information.

[0096] The execution process of message forwarding in this embodiment will not be described in detail here; please refer to the descriptions in the other embodiments mentioned above.

[0097] Furthermore, the second metadata also includes: the first metadata protocol version number supported by the programmable chip and a valid bit field. The first processor core removes the second metadata contained in the third message to restore the first message, including: the first processor core parses the second metadata contained in the third message to obtain the first metadata protocol version number, the valid bit field, and the second identification information. If the first metadata protocol version number matches the second metadata protocol version number supported by the first processor core, and the value of the valid bit field indicates that the second metadata is valid, then the first processor core removes the second metadata from the third message according to the second identification information to restore the first message.

[0098] It should be noted that the composition of the second and third metadata can be referenced from the composition of the first metadata shown in Figure 6. The difference between the second and third metadata and the first metadata is that the second and third metadata do not contain "Reord_q" and "PSN". It should be understood that RSS mode has a natural order preservation function and does not use an order preservation queue. Since the second and third metadata are applied in RSS mode, they do not contain parameters related to the order preservation queue.

[0099] In practical applications, assume that the first metadata protocol version number obtained by the first processor core from parsing the second metadata is version 2, the value of the valid bit field is 1, and the value of the first identification information is 0. At this point, it is determined whether the first metadata protocol version number (version 2) matches the second metadata protocol version number supported by the first processor core (assuming it is version 2). Both are version 2, indicating a match. Since the value of the valid bit field obtained from parsing the first metadata is 1, it can be determined that the second metadata is valid. Based on the above, if the first metadata protocol version number matches the second metadata protocol version number supported by the first processor core, and the value of the valid bit field indicates that the second metadata is valid, then the second metadata can be used normally. At this point, the first processor core removes the second metadata from the third message based on the second identification information to restore the first message. It is understandable that since the third message needs to be sent to the third processor core running a kernel protocol stack, and the kernel protocol stack does not recognize the second metadata in the third message, the second metadata needs to be removed from the third message to restore the first message before sending the third message to the third processor core for processing.

[0100] It should be noted that the matching of the above version numbers can not only mean that they are the same, but also other "mutually compatible" situations. For example, although the version number supported by the programmable chip is vi, the version number supported by the first processor core is vj. The two are different, but if vj is compatible with vi, then they are also matched.

[0101] By verifying the validity of the second metadata, we can prevent the third processor core or network card from suddenly malfunctioning and thus failing to process the third packet correctly. When it is determined that the first metadata protocol version number matches the second metadata protocol version number supported by the first processor core, and the value of the valid bit field indicates that the second metadata is valid, removing the second metadata from the third packet to restore the first packet ensures that the third processor core can successfully complete the processing of the first packet.

[0102] Furthermore, after parsing the second processed message by the first processor core, if the metadata containing the second identification information is not parsed from the second processed message, the first processor core adds third metadata corresponding to the receiver scaling mode to the second processed message to obtain the third processed message. The third metadata also includes the second metadata protocol version number supported by the first processor core and the value of the valid bit field indicating the validity of the third metadata. By adding the third metadata corresponding to the receiver scaling mode to the second processed message to obtain the third processed message, it is ensured that the corresponding message forwarding mode can be accurately identified during the subsequent transmission of the third processed message to the destination device. It is also possible to verify the third processed message by using the second metadata protocol version number supported by the first processor core and the value of the valid bit field indicating the validity of the third metadata obtained from parsing the third metadata, ensuring that the third processed message can be successfully forwarded to the destination device.

[0103] Understandably, regardless of whether it's DLB mode or RSS mode, during the transmission of processed messages, the programmable chip receives processed messages (such as the first processed message and the third processed message) that contain metadata. In practice, the programmable chip determines the message forwarding mode by parsing the metadata in the received processed messages (using the identification information in the metadata). It also verifies the version validity and metadata validity by using the parsed metadata protocol version number and validity bit field. Only if both verifications pass is the processed message sent to the destination device according to its corresponding message forwarding mode.

[0104] The message forwarding apparatus of one or more embodiments of this disclosure will be described in detail below. Those skilled in the art will understand that these apparatuses can be configured using commercially available hardware components through the steps taught in this solution.

[0105] Figure 10 is a schematic diagram of a message forwarding device provided in an embodiment of this disclosure. The device is applied to a programmable chip in a network interface card (NIC). The NIC is located in a gateway device. The gateway device includes multiple processor cores that are communicatively connected to the NIC, including a first processor core and a second processor core. The device includes: a determination module 11, an allocation module 12, a filling module 13, a processing module 14, and a sending module 15.

[0106] The determination module 11 is used to respond to a first message sent by the source device, determine the message forwarding mode of the first message based on the feature information of the first message, and the first message corresponds to the target service.

[0107] The allocation module 12 is used to allocate the target packet sequence number of the first packet in the order-keeping queue corresponding to the target service if the packet forwarding mode is dynamic load balancing mode.

[0108] The filling module 13 is used to generate first metadata and fill the first metadata into the first message to obtain a second message. The first metadata includes the first identification information corresponding to the dynamic load balancing mode, the queue number of the order-keeping queue, and the target message sequence number.

[0109] Processing module 14 is used to send the second message to the first processor core running the driver in a polling manner, so that the first processor core sends the second message to the second processor core for processing based on the first metadata to obtain the first processed message, and the second processor core runs the message processing program of the target service.

[0110] The sending module 15 is configured to respond to the first processed message fed back by the first processor core, determine the sending order of the first processed message according to the first metadata contained in the first processed message, send the first processed message to the corresponding destination device according to the sending order, and delete the target message sequence number from the order-keeping queue.

[0111] Optionally, the processing module 14 is specifically used to: poll the network card receiving queue corresponding to the target service to store the second packet in the currently polled target network card receiving queue; and upload the second packet to the first processor core bound to the target network card receiving queue through the target network card receiving queue.

[0112] Optionally, the sending module 15 is specifically configured to: if the target message sequence number in the first metadata is the smallest message sequence number among the currently stored message sequence numbers in the order-keeping queue, then determine to directly send the first processed message; if there is a message sequence number smaller than the target message sequence number among the currently stored message sequence numbers, then cache the first processed message, and determine that the sending order of the first processed message is after the processed message corresponding to the message sequence number smaller than the target message sequence number.

[0113] Optionally, the gateway device further includes a third processor core. The filling module 13 is further configured to generate second metadata if the packet forwarding mode is receiver scaling mode, and fill the second metadata into the first packet to obtain a third packet, wherein the second metadata includes second identification information corresponding to the receiver scaling mode. The processing module 14 is further configured to determine the target network interface card (NIC) receiving queue corresponding to the third packet based on the five-tuple information of the third packet in the NIC receiving queue corresponding to the target service; and upload the third packet to the first processor core running the driver bound to the target NIC receiving queue through the target NIC receiving queue, so that the first processor core removes the second metadata to restore the first packet, sends the first packet to the third processor core for processing to obtain a second processed packet, and adds the third metadata corresponding to the receiver scaling mode to the second processed packet to obtain a third processed packet, wherein the third processor core runs a kernel protocol stack, and the third metadata includes the second identification information.

[0114] Therefore, the sending module 15 is further configured to: in response to the third processed message fed back by the first processor core, send the third processed message to the corresponding destination device according to the second identification information contained in the third metadata.

[0115] Optionally, the determining module 11 is specifically used to: obtain a matching rule corresponding to the receiver scaling mode, wherein the matching rule includes packet feature information that needs to be forwarded according to the receiver scaling mode; if the feature information of the first packet conforms to the matching rule, then the packet forwarding mode of the first packet is determined to be the receiver scaling mode; if the feature information of the first packet does not conform to the matching rule, then the packet forwarding mode of the first packet is determined to be the dynamic load balancing mode.

[0116] The device shown in Figure 10 can perform the steps provided in the foregoing embodiments. For detailed execution process and technical effects, please refer to the description in the foregoing embodiments, which will not be repeated here.

[0117] Figure 11 is a schematic diagram of another message forwarding device provided in an embodiment of this disclosure. The device is applied to a first processor core running a driver in a gateway device. The first processor core is any processor core running the driver. The gateway device also includes a network card, which contains a programmable chip. The device includes a receiving module 21, a processing module 22, and a sending module 23.

[0118] The receiving module 21 is configured to receive a second message sent by the programmable chip in a polling manner in response to a first message sent by the source device corresponding to the target service. The second message is obtained by filling the first metadata into the first message. The first metadata includes a first identifier information corresponding to the dynamic load balancing mode, a queue number of the order-keeping queue corresponding to the target service, and a target message sequence number corresponding to the first message in the order-keeping queue. The dynamic load balancing mode is a message forwarding mode of the first message determined by the programmable chip based on the feature information of the first message.

[0119] Processing module 22 is used to send the second message to the second processor core for processing based on the first metadata to obtain the first processed message, and the second processor core runs the message processing program of the target service.

[0120] The sending module 23 is configured to respond to the first processed message fed back by the second processor core, send the first processed message to the programmable chip, so that the programmable chip determines the sending order of the first processed message according to the first metadata contained in the first processed message, and sends the first processed message to the corresponding destination device according to the sending order, and then deletes the target message sequence number from the order-keeping queue.

[0121] Optionally, the first metadata may further include: a first metadata protocol version number and a valid bit field supported by the programmable chip; the processing module 22 is specifically used to: parse the first metadata to obtain the first metadata protocol version number, the valid bit field, and the first identification information; if the first metadata protocol version number matches the second metadata protocol version number supported by the first processor core, and the value of the valid bit field indicates that the first metadata is valid, then the second message is sent to the second processor core for processing according to the first identification information to obtain the first processed message.

[0122] Optionally, the sending module 23 is specifically used to: parse the first metadata contained in the first processed message to obtain the valid bit field; if the value of the valid bit field indicates that the first metadata is valid, then send the first processed message to the programmable chip.

[0123] Optionally, the gateway device further includes a third processor core. The receiving module 21 is also used to receive a third message sent by the programmable chip through the target network card receiving queue corresponding to the target service. The third message is obtained by filling the first message with second metadata, wherein the second metadata includes second identification information corresponding to the receiver scaling mode. The receiver scaling mode is the message forwarding mode of the first message determined by the programmable chip based on the feature information of the first message. The target network card receiving queue is bound to the first processor core.

[0124] Therefore, the processing module 22 is further configured to remove the second metadata contained in the third message to restore the first message, and send the first message to the third processor core for processing to obtain the second processed message, wherein the third processor core runs a kernel protocol stack.

[0125] The sending module 23 is further configured to respond to the second processed message fed back by the third processor core, add third metadata corresponding to the receiver scaling mode to the second processed message to obtain a third processed message, and send the third processed message to the programmable chip, so that the programmable chip sends the third processed message to the corresponding destination device according to the third metadata contained in the third processed message, wherein the third metadata contains the second identification information.

[0126] Optionally, the second metadata may further include: a first metadata protocol version number and a valid bit field supported by the programmable chip; the processing module 22 is specifically used to: parse the second metadata contained in the third message to obtain the first metadata protocol version number, the valid bit field and the second identification information; if the first metadata protocol version number matches the second metadata protocol version number supported by the first processor core, and the value of the valid bit field indicates that the second metadata is valid, then the second metadata is removed from the third message according to the second identification information to restore the first message.

[0127] Optionally, the sending module 23 is specifically used to: if the metadata containing the second identification information is not parsed in the second processed message, then add the third metadata corresponding to the receiver scaling mode to the second processed message to obtain a third processed message, wherein the third metadata also includes the second metadata protocol version number supported by the first processor core and the value of the valid bit field indicating the validity of the third metadata.

[0128] The device shown in Figure 11 can perform the steps provided in the foregoing embodiments. For detailed execution process and technical effects, please refer to the description in the foregoing embodiments, which will not be repeated here.

[0129] Additionally, this disclosure provides a gateway device, comprising: multiple processor cores, including a first processor core running a driver and a second processor core running a packet processing program for a target service; a network interface card (NIC), which includes a programmable chip and is communicatively connected to the first and second processor cores; the programmable chip is used to: respond to a first packet sent by a source device, determine a packet forwarding mode for the first packet based on the characteristic information of the first packet, wherein the first packet corresponds to a target service; if the packet forwarding mode is a dynamic load balancing mode, allocate a target packet sequence number for the first packet in the order-keeping queue corresponding to the target service; generate first metadata and fill the first metadata into the first packet. The system receives a second message, wherein the first metadata includes the first identifier information corresponding to the dynamic load balancing mode, the queue number of the order-keeping queue, and the target message sequence number; the second message is sent to the first processor core in a round-robin manner; the first processor core is used to: send the second message to the second processor core for processing based on the first metadata to obtain a first processed message, and send the first processed message to the programmable chip; the programmable chip is also used to: respond to the first processed message fed back by the first processor core, determine the sending order of the first processed message according to the first metadata contained in the first processed message, so as to send the first processed message to the corresponding destination device in the sending order, and delete the target message sequence number in the order-keeping queue.

[0130] Optionally, the multiple processor cores also include a third processor core running the kernel protocol stack; the programmable chip is further configured to: if the packet forwarding mode is receiver scaling mode, generate second metadata and fill the second metadata into the first packet to obtain a third packet, wherein the second metadata includes second identification information corresponding to the receiver scaling mode; determine the target network interface card (NIC) receiving queue corresponding to the third packet in the NIC receiving queue corresponding to the target service based on the five-tuple information of the third packet; upload the third packet to the first processor core bound to the target NIC receiving queue through the target NIC receiving queue; the first processor core is further configured to: remove the second metadata to restore the first packet, send the first packet to the third processor core for processing to obtain a second processed packet, and add the third metadata corresponding to the receiver scaling mode to the second processed packet to obtain a third processed packet, and send the third processed packet to the programmable chip; the programmable chip is further configured to: send the third processed packet to the corresponding destination device according to the second identification information contained in the third metadata.

[0131] The gateway device can perform the steps provided in the foregoing embodiments. For details of the execution process and technical effects, please refer to the description in the foregoing embodiments, which will not be repeated here.

[0132] In addition, this disclosure provides a non-transitory machine-readable storage medium storing executable code. When the executable code is executed by a programmable chip in a gateway device, the programmable chip can at least implement the packet forwarding method provided in the foregoing embodiments.

[0133] In addition, this disclosure provides a computer program product, which includes a computer program that, when executed by a programmable chip in a gateway device, enables the programmable chip to at least implement the message forwarding method provided in the foregoing embodiments.

[0134] The device embodiments described above are merely illustrative, and the units described as separate components may or may not be physically separate. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0135] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of a necessary general-purpose hardware platform, or by a combination of hardware and application programs. Based on this understanding, the above technical solutions, in essence or the part that contributes to the related technology, can be embodied in the form of a computer product. This disclosure can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0136] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this disclosure, and are not intended to limit them. Although this disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this disclosure.

Claims

1. A message forwarding method applied to a programmable chip in a network interface card (NIC), the NIC being located in a gateway device, the gateway device including a first processor core and a second processor core communicatively connected to the NIC, the method comprising: In response to a first message sent by the source device, the message forwarding mode of the first message is determined based on the feature information of the first message, and the first message corresponds to the target service; If the packet forwarding mode is dynamic load balancing mode, then the first packet is assigned a target packet sequence number in the order-keeping queue corresponding to the target service; Generate first metadata and fill it into the first message to obtain the second message. The first metadata includes the first identifier information corresponding to the dynamic load balancing mode, the queue number of the order-keeping queue, and the target message sequence number. The second message is sent to the first processor core running the driver in a polling manner, so that the first processor core sends the second message to the second processor core for processing based on the first metadata, and obtains the first processed message. The second processor core runs the message processing program of the target service. In response to the first processed message fed back by the first processor core, the sending order of the first processed message is determined according to the first metadata contained in the first processed message, so as to send the first processed message to the corresponding destination device in the order of sending, and delete the target message sequence number from the order-keeping queue.

2. The method according to claim 1, wherein, Sending the second message to the first processor core running the driver in a polling manner includes: Poll the network interface card (NIC) receive queue corresponding to the target service to store the second packet into the currently polled target NIC receive queue; The second packet is uploaded to the first processor core bound to the target network interface card (NIC) receiving queue through the target NIC receiving queue.

3. The method according to claim 1, wherein, Determining the sending order of the first processed message based on the first metadata contained in the first processed message includes: If the target message sequence number in the first metadata is the smallest message sequence number among the message sequence numbers currently stored in the order-keeping queue, then it is determined that the first processed message will be sent directly. If there is a message sequence number in the currently stored message sequence number that is smaller than the target message sequence number, then the first processed message is cached, and the sending order of the first processed message is determined to be after the processed message corresponding to the message sequence number smaller than the target message sequence number.

4. The method according to claim 1, wherein, The gateway device also includes a third processor core, and the method further includes: If the message forwarding mode is receiver scaling mode, then second metadata is generated and filled into the first message to obtain a third message, wherein the second metadata includes second identification information corresponding to the receiver scaling mode; In the network interface card (NIC) receiving queue corresponding to the target service, the target NIC receiving queue corresponding to the third message is determined based on the five-tuple information of the third message; The third packet is uploaded to the first processor core with the driver program bound to the target network card receiving queue through the target network card receiving queue. This allows the first processor core to remove the second metadata and restore the first packet. The first packet is then sent to the third processor core for processing to obtain the second processed packet. The third metadata corresponding to the receiver scaling mode is added to the second processed packet to obtain the third processed packet. The third processor core runs a kernel protocol stack, and the third metadata contains the second identification information. In response to the third processed message fed back by the first processor core, the third processed message is sent to the corresponding destination device according to the second identification information contained in the third metadata.

5. The method according to any one of claims 1-4, wherein, Determining the message forwarding mode of the first message based on its characteristic information includes: Obtain the matching rule corresponding to the receiver scaling mode, wherein the matching rule includes message feature information that needs to be forwarded according to the receiver scaling mode; If the feature information of the first message matches the matching rule, then the message forwarding mode of the first message is determined to be receiver scaling mode. If the feature information of the first message does not match the matching rule, then the message forwarding mode of the first message is determined to be dynamic load balancing mode.

6. A packet forwarding method, applied to a first processor core running a driver in a gateway device, wherein the first processor core is any processor core running the driver, the gateway device further includes a network interface card (NIC), the NIC containing a programmable chip, the method comprising: In response to a first message corresponding to a target service sent by a source device, the programmable chip receives a second message sent in a polling manner. The second message is obtained by filling the first metadata into the first message. The first metadata includes a first identifier corresponding to a dynamic load balancing mode, a queue number of the order-keeping queue corresponding to the target service, and a target message sequence number of the first message in the order-keeping queue. The dynamic load balancing mode is a message forwarding mode of the first message determined by the programmable chip based on the feature information of the first message. Based on the first metadata, the second message is sent to the second processor core for processing to obtain the first processed message. The second processor core runs the message processing program of the target service. In response to the first processed message fed back by the second processor core, the first processed message is sent to the programmable chip, so that the programmable chip determines the sending order of the first processed message according to the first metadata contained in the first processed message, and sends the first processed message to the corresponding destination device according to the sending order, and then deletes the target message sequence number from the order-keeping queue.

7. The method according to claim 6, wherein, The first metadata also includes: the first metadata protocol version number and valid bit field supported by the programmable chip; The step of sending the second message to the second processor core based on the first metadata for processing to obtain the first processed message includes: Parse the first metadata to obtain the first metadata protocol version number, the valid bit field, and the first identification information; If the first metadata protocol version number matches the second metadata protocol version number supported by the first processor core, and the value of the valid bit field indicates that the first metadata is valid, then the second message is sent to the second processor core for processing according to the first identification information to obtain the first processed message.

8. The method according to claim 7, wherein, Sending the first processed message to the programmable chip includes: Parse the first metadata contained in the first processed message to obtain the valid bit field; If the value of the valid bit field indicates that the first metadata is valid, then the first processed message is sent to the programmable chip.

9. The method according to claim 6, further comprising: The programmable chip receives a third message sent by the target network card receiving queue corresponding to the target service. The third message is obtained by filling the first message with second metadata. The second metadata includes second identification information corresponding to the receiver scaling mode. The receiver scaling mode is the message forwarding mode of the first message determined by the programmable chip based on the feature information of the first message. The target network card receiving queue is bound to the first processor core. The second metadata contained in the third message is removed to restore the first message, and the first message is sent to the third processor core for processing to obtain the second processed message. The third processor core runs a kernel protocol stack. In response to the second processed message fed back by the third processor core, third metadata corresponding to the receiver scaling mode is added to the second processed message to obtain a third processed message, and the third processed message is sent to the programmable chip so that the programmable chip sends the third processed message to the corresponding destination device according to the third metadata contained in the third processed message, wherein the third metadata contains the second identification information.

10. The method according to claim 9, wherein, The second metadata also includes: the first metadata protocol version number and valid bit field supported by the programmable chip; The step of removing the second metadata contained in the third message to restore the first message includes: Parse the second metadata contained in the third message to obtain the first metadata protocol version number, the valid bit field, and the second identification information; If the first metadata protocol version number matches the second metadata protocol version number supported by the first processor core, and the value of the valid bit field indicates that the second metadata is valid, then the second metadata is removed from the third message according to the second identification information to restore the first message.

11. The method according to claim 10, wherein, The step of adding the third metadata corresponding to the receiver scaling mode to the second processed message to obtain the third processed message includes: If the metadata containing the second identification information is not parsed in the second processed message, then the third metadata corresponding to the receiver scaling mode is added to the second processed message to obtain the third processed message. The third metadata also includes the second metadata protocol version number supported by the first processor core and the value of the valid bit field indicating the validity of the third metadata.

12. A network interface card (NIC), wherein, The network interface card (NIC) includes a programmable chip, and the NIC is communicatively connected to the first processor core and the second processor core in the gateway device it is located in. The programmable chip is configured to respond to a first message sent by a source device, determine the message forwarding mode of the first message based on the feature information of the first message, wherein the first message corresponds to a target service; if the message forwarding mode is a dynamic load balancing mode, then allocate a target message sequence number for the first message in the order-keeping queue corresponding to the target service. First metadata is generated and filled into the first message to obtain a second message. The first metadata includes first identification information corresponding to the dynamic load balancing mode, the queue number of the order-keeping queue, and the target message sequence number. The second message is sent to a first processor core running a driver in a round-robin manner, so that the first processor core sends the second message to a second processor core for processing based on the first metadata to obtain a first processed message. The second processor core runs the message processing program of the target service. In response to the first processed message fed back by the first processor core, the sending order of the first processed message is determined according to the first metadata contained in the first processed message, so that the first processed message is sent to the corresponding destination device according to the sending order, and the target message sequence number is deleted from the order-keeping queue.

13. The network interface card according to claim 12, wherein, The gateway device further includes a third processor core. The programmable chip is also used for: if the packet forwarding mode is receiver scaling mode, generating second metadata and filling the second metadata into the first packet to obtain a third packet, wherein the second metadata includes second identification information corresponding to the receiver scaling mode; determining the target network interface card (NIC) receiving queue corresponding to the third packet based on the five-tuple information of the third packet in the NIC receiving queue corresponding to the target service; uploading the third packet to the first processor core running the driver bound to the target NIC receiving queue through the target NIC receiving queue, so that the first processor core removes the second metadata to restore the first packet, sends the first packet to the third processor core for processing to obtain a second processed packet, and adds the third metadata corresponding to the receiver scaling mode to the second processed packet to obtain a third processed packet, wherein the third processor core runs a kernel protocol stack, and the third metadata contains the second identification information; responding to the third processed packet fed back by the first processor core, sending the third processed packet to the corresponding destination device according to the second identification information contained in the third metadata.

14. A gateway device, comprising: Multiple processor cores, including a first processor core that runs the driver and a second processor core that runs the message processing program for the target service; A network interface card (NIC), which includes a programmable chip, and the NIC is communicatively connected to the first processor core and the second processor core, respectively. The programmable chip is used to: respond to a first message sent by a source device, determine the message forwarding mode of the first message based on the feature information of the first message, wherein the first message corresponds to a target service; if the message forwarding mode is a dynamic load balancing mode, then allocate a target message sequence number for the first message in the order-keeping queue corresponding to the target service; First metadata is generated and filled into the first message to obtain a second message. The first metadata includes first identification information corresponding to the dynamic load balancing mode, the queue number of the order-keeping queue, and the target message sequence number. The second message is sent to the first processor core in a round-robin manner. The first processor core is configured to: send the second message to the second processor core for processing based on the first metadata to obtain a first processed message, and send the first processed message to the programmable chip; The programmable chip is further configured to: respond to the first processed message fed back by the first processor core, determine the sending order of the first processed message according to the first metadata contained in the first processed message, send the first processed message to the corresponding destination device according to the sending order, and delete the target message sequence number from the order-keeping queue.

15. The gateway device according to claim 14, wherein, The plurality of processor cores also includes a third processor core that runs the kernel protocol stack; The programmable chip is further configured to: if the packet forwarding mode is receiver scaling mode, generate second metadata and fill the second metadata into the first packet to obtain a third packet, wherein the second metadata includes second identification information corresponding to the receiver scaling mode; determine the target network interface card (NIC) receiving queue corresponding to the third packet in the NIC receiving queue corresponding to the target service based on the five-tuple information of the third packet; and upload the third packet to the first processor core bound to the target NIC receiving queue through the target NIC receiving queue. The first processor core is further configured to: remove the second metadata to restore the first message, send the first message to the third processor core for processing to obtain a second processed message, add the third metadata corresponding to the receiver scaling mode to the second processed message to obtain a third processed message, and send the third processed message to the programmable chip. The programmable chip is also used to: send the third processed message to the corresponding destination device according to the second identification information contained in the third metadata.

16. A non-transitory machine-readable storage medium storing executable code, wherein, When the executable code is executed by the programmable chip in the gateway device, the programmable chip performs the packet forwarding method as described in any one of claims 1-5. When the executable code is executed by the processor core in the gateway device, the processor core performs the packet forwarding method as described in any one of claims 6-11.

17. A computer program product comprising: A computer program, wherein when the computer program is executed by a programmable chip in a gateway device, the programmable chip performs the packet forwarding method as described in any one of claims 1-5, and when the executable code is executed by a processor core in the gateway device, the processor core performs the packet forwarding method as described in any one of claims 6-11.

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