Method and apparatus for digital-to-analog converter through dithering

Abstract

A transmitter for converting a digital input signal to an analog signal and outputting the analog signal by performing dithering, in a wireless communication system, comprises: a filter; and at least one processor, wherein the at least one processor may be configured to: measure the intensity of the digital input signal; measure the frequency of the digital input signal; if the intensity of the digital input signal is less than a threshold value, add, as a dithering signal, at least one tone signal having an out-of-band frequency other than a frequency band used by the digital input signal and having the intensity greater than the intensity of the digital input signal to the digital input signal; convert the digital input signal to the analog signal according to a sampling frequency; and input the analog signal to the filter.

Description

Method and apparatus of a digital-to-analog converter through dithering

[0001] The present disclosure relates to a digital-to-analog converter, and more specifically, to a method and apparatus for improving the linearity of a digital-to-analog converter through dithering.

[0002] The 5G (fifth generation) mobile communication currently in use is faster and has reduced latency compared to the existing 4G (fourth generation), making it a core technology for realizing ultra-high-speed and ultra-high-capacity services. Currently, the development of RF (radio frequency) transceiver ICs (integrated chips) for 5G mobile communication is proceeding competitively worldwide. Unlike the heterodyne structure using intermediate frequency (IF), the direct sampling structure, which directly samples and digitizes RF signals, is attracting attention. Since the aforementioned direct sampling method does not require changing the frequency of the analog signal, the overall hardware design is much simpler compared to the heterodyne structure, allowing for a reduction in form factor and lower design costs.

[0003] A key component of the direct sampling structure may be a data converter, such as a digital-to-analog converter (DAC). Such data converters must be able to operate in various frequency bands of 5G.

[0004] Figure 1 is a diagram illustrating the global status of the 5G spectrum.

[0005] Referring to Figure 1, it is observed that there are various frequency bands used in 5G mobile communication. To cover the requirements of all frequency bands, high-resolution data converters with 12 bits or more and high speeds of giga sampling per second (Gs) are required, and among these data converters, a DAC can be an essential component of the transmitter. Until recently, direct sampling structures were not practical due to limitations in the sampling speed and resolution of DACs, but with the advancement of semiconductor processes and the utilization of various techniques to reduce noise within the data converter, direct sampling transmitters have been able to achieve excellent resolution at higher sampling frequencies.

[0006] Figure 2 is an example diagram of the configuration of a direct sampling transmitter.

[0007] Referring to FIG. 2, the direct sampling transmitter may include at least one of an FPGA (field programmable gate array, 201), a DAC (digital-analogue converter, 202), a CLK (clock signal generator, 203), an RF amplifier (radio frequency amplifier, 204), an RF BPF (radio frequency band pass filter, 205), or an antenna (206).

[0008] The above FPGA (201) is programmable hardware responsible for digital signal processing and can generate a desired signal by processing input data. The generated digital signal can be converted into an analog signal through the DAC (202). The analog signal converted by the DAC (202) can be amplified by the RF amplifier (204) and transmitted to the RF BPF (205). The RF BPF (205) can remove unnecessary frequency components from the transmitted signal and leave only the signal of the desired frequency band. The analog signal that has passed through the RF BPF (205) can be transmitted through the antenna (206), and through at least one of these processes, the digital signal can be converted into an analog signal, processed into a desired form, and output.

[0009] One of the performance indicators of the DAC (202) in this digital-to-analog conversion process is linearity. Linearity is an indicator of how accurately the DAC (202) can convert a digital signal into an analog signal. This linearity deteriorates as the sampling frequency of the DAC (202) and the frequency and bandwidth of the digital input signal to be processed increase, or as the strength of the digital input signal decreases.

[0010] Static errors of the DAC (202), such as mismatch between current sources due to manufacturing errors, can cause linearity degradation. Dynamic errors of the DAC (202), such as switching glitches (transient noise occurring during the switching process) and timing mismatches (time errors caused by mismatching operating speeds of each component), can also cause linearity degradation. In particular, as the strength of the input signal decreases, it becomes more susceptible to the influence of dynamic or static errors, which can further degrade linearity. The linearity of the DAC (202) can be visually verified through a graph showing the relationship between the digital input signal and the output signal.

[0011] Figure 3 is a diagram showing the nonlinearity of an actual DAC compared to an ideal DAC.

[0012] Referring to Fig. 3, you can see a dotted line representing the ideal case and a solid line representing the actual case. The horizontal axis represents the DAC input, i.e., the digital input, and the vertical axis represents the DAC output, i.e., the analog output.

[0013] In Figure 3, the dotted line represents an ideal case, which may be a situation where the digital input signal and the output signal maintain a linear relationship. That is, it may represent a state where the analog output increases proportionally as the digital input increases.

[0014] In Fig. 3, the solid line represents the actual case and demonstrates nonlinearity. The solid line does not correspond to the ideal dotted line and has curves in certain sections. This indicates that, unlike an ideal DAC, the actual DAC fails to provide a linear output for the input.

[0015] This nonlinearity of the DAC can be measured in various ways, one of which is the measurement of IMD3 (intermodulation distortion, 3rd order). IMD3 is an indicator that quantitatively represents the nonlinearity of the DAC.

[0016] Figure 4 is a diagram illustrating the IMD3 performance of the DAC according to the input signal strength.

[0017] P on the X-axis of Fig. 4 out / tone (dBFS, decibels relative to full scale) represents the relative strength of the DAC digital input signal. The Y-axis is IMD3 (dBc, decibels relative to the carrier). f at the bottom of Fig. 4 DAC = 11796.48 MSPS means that the DAC samples at a rate of 11796.48 mega samplings per second. Interleave mode refers to a technique that combines multiple DACs to achieve a high sampling rate. f CENTER =0.85GHz means that the center frequency of the two tones is 0.85GHz. f SPACING =20MHz means that the interval between the two input tones is 20MHz. 1TX, 2TX, 3TX, and 4TX represent the number of the transmission path (TX path), respectively.

[0018] As shown in the ideal curve (402) indicated by the dotted line in FIG. 4, in the ideal case, as the strength of the DAC digital input signal decreases in the left direction on the X-axis, the strength of IMD3 also decreases proportionally in the downward direction on the Y-axis. However, in reality, as the strength of the digital input signal decreases, the ratio of static and dynamic errors relative to the strength of the digital input signal increases, and thus the impact of errors becomes significant, so the value of IMD3 may not decrease proportionally. Rather, as shown in the dotted box (404), as the strength of the DAC digital input signal decreases, the value of IMD3 increases, and accordingly, the nonlinearity of the DAC is intensified, which may limit the performance of the DAC.

[0019] Dynamic Element Matching (DEM) technology has been widely used to eliminate non-linearity and minimize the impact of mismatches in the analog components of a DAC (e.g., manufacturing errors in analog components, capacitors, resistors, or transistors). To reduce the influence of analog component mismatches, the DEM technique randomizes non-linear noise by rearranging the current sources used in the DAC (via an arbitrary algorithm). Even if the DAC outputs the same value, the switch randomizes the non-linear noise by turning the current source on or off differently each time. This DEM technology is easy to implement in circuits and requires no error correction or additional costs.

[0020] There are considerations when using such DEM technology. As the speed and resolution of the DAC increase, the complexity of the DEM algorithm required to randomize the nonlinear noise of the current source becomes very high. The increased complexity at high speeds is due to higher switching speeds and shorter operation timeouts, while the increased complexity at high resolutions is due to the need for more bit operations to support high resolutions. This necessitates complex algorithms to meet the DAC requirements for 5G mobile communication, leading to increased power consumption and area usage. As the strength of the digital input signal to the DAC decreases, the number of cases available to randomize the nonlinear noise of the current source diminishes. Consequently, the current source fails to sufficiently randomize the noise, making the design of high-resolution DACs difficult.

[0021] Dithering techniques are used in a manner similar to DEM. Dithering is a method that adds noise of low intensity to the input signal to spread the periodic noise spectrum caused by the nonlinearity of the DAC across the entire frequency band at a low volume level. The main component of DAC noise is quantization (digitization) noise, which appears strongly at specific locations periodically according to the step (the minimum unit of voltage that the DAC can output) based on the DAC's resolution. When a dithering signal in the form of white noise is added to the input signal, the dithering signal has the effect of spreading the unwanted quantization noise across the entire band. During this spreading process, the intensity of each tone of the quantization noise is reduced, thereby improving SFDR (spurious-free dynamic range) performance.

[0022] Dithering techniques are more effective when used in conjunction with sigma-delta modulation techniques. Sigma-delta modulation is a widely used method for designing high-resolution DACs and is also referred to as an oversampled converter architecture. This oversampled converter architecture shapes noise generated during the quantization (digitization) process, shapes it into a high-frequency band, and then generates an analog output signal through filtering. Idle tones generated during this process have an undesirable effect on the DAC output and can limit SFDR performance. Therefore, research is being conducted on techniques to suppress idle tone noise by adding a dithering signal to the input of the quantizer to prevent the quantizer output from remaining statically fixed at a constant pattern value.

[0023] There are also considerations when using such dithering techniques. First, the signal-to-noise ratio (SNR) may decrease due to the increase in white noise and the reduction in the strength of input signal components caused by dithering. This makes the design of high-speed and high-resolution DACs difficult. Second, as the input signal of the DAC becomes smaller, the linearity improvement effect of dithering may diminish. Generally, a low-intensity dithering signal is applied to the input signal to minimize the increase in white noise; therefore, when the input signal is small, a low-intensity dithering signal may not provide a sufficient dithering effect.

[0024] Accordingly, for the design of high-speed and high-resolution DACs, it is desirable to reduce nonlinearity caused by static and dynamic errors.

[0025] The present disclosure provides a method and apparatus that enable the design of a high-speed and high-resolution DAC capable of resolving the reduction in the signal-to-noise ratio caused by an increase in white noise due to dithering and a decrease in the strength of input signal components.

[0026] The present disclosure provides a method and apparatus capable of obtaining a sufficient dithering effect even when the input signal is small.

[0027] A transmitter according to various embodiments of the present disclosure comprises a filter; and at least one processor, wherein the at least one processor measures the strength of the digital input signal and measures the frequency of the digital input signal, and when the strength of the digital input signal is less than a threshold value, adds at least one tone signal having an out-band frequency other than the frequency band used by the digital input signal and a strength greater than the strength of the digital input signal to the digital input signal as a dithering signal, converts the signal into an analog signal according to the sampling frequency, and inputs the converted analog signal to the filter.

[0028] According to various embodiments of the present disclosure, the at least one processor may be configured to measure the frequency of the digital input signal in real time or at a set time and to transmit the measured frequency to the filter.

[0029] According to various embodiments of the present disclosure, the filter may be configured to filter the dithering signal using the measured frequency in the converted analog signal.

[0030] According to various embodiments of the present disclosure, the at least one processor may be configured to measure the strength of the digital input signal in real time or at a set time.

[0031] According to various embodiments of the present disclosure, the filter may include at least one of a bandstop filter or a bandpass filter.

[0032] According to various embodiments of the present disclosure, the at least one processor may be configured to determine the intensity corresponding to the difference between the intensity of the measured digital input signal and the threshold value as the intensity of the dithering signal.

[0033] According to various embodiments of the present disclosure, the out-of-band frequency of the dithering signal may be determined outside the frequency band used by the digital input signal and an additional margin band.

[0034] According to various embodiments of the present disclosure, the out-of-band frequency may be half of the sampling frequency when the frequency of the measured digital input signal is at least one-sixteenth of the sampling frequency and less than one-fourth.

[0035] A method for a transmitter to perform dithering on a digital input signal and convert and output it as an analog signal in a wireless communication system according to various embodiments of the present disclosure may include: an operation of measuring the strength of the digital input signal; an operation of measuring the frequency of the digital input signal; an operation of adding at least one tone signal, which has an out-of-band frequency other than the frequency band used by the digital input signal and has a strength greater than the strength of the digital input signal, to the digital input signal as a dithering signal when the strength of the digital input signal is less than a threshold value, and converting it into an analog signal according to a sampling frequency; and an operation of inputting the converted analog signal to a filter.

[0036] A transmitter according to various embodiments of the present disclosure may measure the frequency of the digital input signal in real time or at a set time; and transmit the measured frequency to the filter.

[0037] A transmitter according to various embodiments of the present disclosure can measure the strength of the digital input signal in real time or at a set time.

[0038] According to various embodiments of the present disclosure, the filter may include at least one of a bandstop filter or a bandpass filter.

[0039] In various embodiments of the present disclosure, a transmitter may further include an operation of determining the strength of the dithering signal as the strength corresponding to the difference between the strength of the measured digital input signal and the threshold value.

[0040] The out-of-band frequency of the dithering signal according to various embodiments of the present disclosure may be determined outside the frequency band used by the digital input signal and an additional margin band.

[0041] The out-of-band frequency according to various embodiments of the present disclosure may be characterized as being half of the sampling frequency when the frequency of the measured digital input signal is at least one-sixteenth of the sampling frequency and less than one-fourth.

[0042] According to the present disclosure, the digital input signal is dithered by adding a large single-tone or multi-tone signal out of the band when the strength of the digital input signal is small, and the out-of-band signal within the analog output signal is effectively removed, thereby randomizing non-linear noise between current sources even with a small digital input signal and improving the linearity of the DAC.

[0043] According to the present disclosure, a DAC design capable of meeting the requirements of 5G mobile communication becomes possible.

[0044] The present disclosure has the effect of improving the linearity of a DAC by using an out-of-band signal having a frequency spaced at a certain interval from the frequency of a digital input signal, without using conventional complex methods such as DEM or dithering techniques.

[0045] Unlike DEM, the present disclosure does not require complex algorithms to randomize the nonlinear noise of a current source.

[0046] The embodiments of the present disclosure are free from the increase in white noise occurring during the dithering process and do not cause a loss in the signal-to-noise ratio.

[0047] Figure 1 is a diagram illustrating the global status of the 5G spectrum.

[0048] Figure 2 is an example diagram of the configuration of a direct sampling transmitter.

[0049] Figure 3 is a diagram showing the nonlinearity of an actual DAC compared to an ideal DAC.

[0050] Figure 4 is a diagram illustrating the IMD3 performance of the DAC according to the input signal strength.

[0051] FIG. 5 is an example of a formula for calculating the total error due to the differential nonlinearity (DNL) of a DAC according to one embodiment of the present disclosure.

[0052] FIG. 6 is a diagram showing the waveform of a code according to the digital input strength of a DAC according to one embodiment of the present disclosure.

[0053] FIG. 7 is a graph showing DNL values ​​according to code values ​​and probability density functions according to two input intensities according to one embodiment of the present disclosure.

[0054] Figure 8 is a diagram showing a glitch phenomenon in an intermediate code.

[0055] FIG. 9 is an example diagram of the configuration of a transmitter using dithering according to one embodiment of the present disclosure.

[0056] FIG. 10 is an example diagram of an operation method of a transmitter using dithering according to one embodiment of the present disclosure.

[0057] FIG. 11 is a diagram comparing the output waveform of a DAC according to whether or not the input signal of an ideal 12-bit DAC is dithered, according to one embodiment of the present disclosure.

[0058] FIG. 12 is a diagram comparing the input waveforms of a DAC according to whether or not the input signal of an ideal 12-bit DAC is dithered, according to one embodiment of the present disclosure.

[0059] Figure 13 is a diagram showing the performance of IMD3 before dithering was applied in a computer simulation.

[0060] FIG. 14 is a diagram showing the performance of IMD3 after applying dithering in a computer simulation according to one embodiment of the present disclosure.

[0061] FIG. 15 is a diagram showing the performance of IMD3 before and after the application of actual dithering according to an embodiment of the present disclosure.

[0062] FIG. 16 shows the structure of a transmitter according to an embodiment of the present disclosure.

[0063] In describing the embodiments, technical details that are well known in the art to which this disclosure belongs and are not directly related to this disclosure are omitted. This is intended to convey the essence of this disclosure more clearly without obscuring it by omitting unnecessary explanations.

[0064] For the same reason, some components in the attached drawings have been exaggerated, omitted, or schematically depicted. Additionally, the size of each component does not entirely reflect its actual dimensions.

[0065] The advantages and features of the present disclosure and the methods for achieving them will become clear by referring to the embodiments described below in detail together with the accompanying drawings. However, the present disclosure is not limited to the embodiments disclosed below but may be implemented in various different forms. These embodiments are provided merely to ensure that the disclosure of the present disclosure is complete and to fully inform those skilled in the art of the scope of the disclosure, and the present disclosure is defined only by the scope of the claims. Throughout the specification, like reference numerals refer to like components.

[0066] The present disclosure proposes a dithering method in which a separate signal is applied outside the band having a frequency that is separated by a certain value from the frequency of the digital input signal to eliminate non-linear noise of a current source. The method and apparatus according to the present disclosure can perform dithering using a single (or multiple) tone signal instead of a white signal during dithering. The signal used for dithering can be removed by a filter after the DAC output.

[0067] FIG. 5 is an example of a formula for calculating the total error due to the differential nonlinearity (DNL) of a DAC according to one embodiment of the present disclosure.

[0068] DNL is a representative performance indicator that represents the linearity of a DAC. DNL is a value indicating how much the output value differs from the ideal value when the digital input of the DAC is increased by one code (the binary value of the digital input). The DNL value varies for each code, and the total error due to each DNL value can be calculated as shown in Fig. 5.

[0069] Referring to FIG. 5(a), P(I) is the probability of occurrence for each code (the Ith code) expressed by a sine function. Due to the characteristics of the sine function, the slope is greatest at the intermediate code (e.g., 2047 in FIG. 5(a)) and decreases as it approaches the minimum or maximum code (e.g., 0 or 4095 in FIG. 5(a) respectively), so the probability of occurrence at the intermediate code is the lowest and the probability of occurrence at the minimum or maximum code is the highest. The phenomenon in which the probability of occurrence is greatest at the minimum or maximum code (0 or 4095) and smallest at the intermediate code (2047) can also be observed in FIG. 7(b).

[0070] FIG. 6 is a diagram showing the waveform of a code according to the digital input strength of a DAC according to one embodiment of the present disclosure.

[0071] As shown in Fig. 6(a), when the input intensity is full scale (i.e., 0 dBFS), all codes of the DAC from 0 to 4095 can be used, but as the input power decreases, the range of codes used may decrease accordingly. As shown in Fig. 6(b), when the input is -30 dBFS, only about 3% (10^(-30 / 20)) of the total code range can be used. As shown in Fig. 6(c), when the input is -60 dBFS, only 0.1% (10^(-60 / 20)) of the total code range can be used.

[0072] FIG. 7 is a graph showing DNL values ​​according to code values ​​and probability density functions according to two input intensities according to one embodiment of the present disclosure.

[0073] In Fig. 7(a), the horizontal axis represents the code and the vertical axis represents the least significant bit (LSB) value, and in Fig. 7(b), the horizontal axis represents the code and the vertical axis represents the probability of occurrence (%).

[0074] Looking at Fig. 7(a), it is observed that when the code is 1985, the DNL error is +1.5 LSB. In Fig. 7(b), when comparing the input intensity to -30 dB (703b) relative to the full scale (701b), it can be seen that the probability distribution graph for each code in Fig. 7(b) is narrow relative to the code axis (x-axis) and positioned above relative to the occurrence probability axis (y-axis). In other words, it is interpreted that as the input intensity decreases from the full scale (701b) to -30 dB (703b), the range of codes used decreases, and the probability of occurrence for each code within the range increases.

[0075] Looking at Fig. 7(b), it is observed that the probability of an error in the 1985 code is greater when the input intensity is -30dB than when it is full scale. In other words, when the input intensity is -30dB, the errors in the code used have a greater impact on the overall error, which can lead to an overall deterioration in the linearity of the DAC.

[0076] More specifically, based on the formula in Fig. 5, a 12-bit DAC (i.e., 2 12 Assuming a case where the DNL value of the 1985 code is +1.5 LSB (least significant bit) in a high-resolution DAC capable of representing 4096 codes, when the DAC input is at full scale (0 dBFS), the error of the 1985 code is reflected in the total error by only P(1985) * DNL(1985) = 0.0001555 * 1.5 = 0.00023325 LSBs. However, when the input is at -30 dBFS, it is reflected by 0.03 * 1.5 = 0.045 LSBs, indicating that DNL(1985) affects the total error by approximately 200 times compared to the previous value. As such, as the input decreases, the proportion of DNL for each code within the input range increases, and the linearity of the DAC may deteriorate overall. Therefore, to reduce this degradation of linearity, maintaining a high input strength of the DAC can improve the overall linearity of the DAC.

[0077] However, the fact that linearity generally deteriorates as the input decreases as explained earlier applies only when the error-causing code is within the range of the code being used. When the input becomes smaller than -30dB, the 1985 code goes out of the range of the code being used, so P(1985)=0 and the DNL(1985) value does not affect the overall error.

[0078] Figure 8 is a diagram showing a glitch phenomenon in an intermediate code.

[0079] When a code value changes, the corresponding switches should turn on / off simultaneously; however, due to issues such as switch mismatch (a phenomenon where switches that should move at the same time move at different times) and timing skew (a phenomenon where timing signals from a single clock reach the switches at different times), the switches may not operate simultaneously. When switches do not operate simultaneously in this manner, a phenomenon occurs where the change in the DAC output value temporarily becomes greater than the change in the code value (e.g., 1); this is called a switching glitch. The switching glitch can be most pronounced in intermediate codes where all bit values ​​change (e.g., where the bit value of 2047 changes from "011111111111" to the bit value of 2048 "100000000000").

[0080] The y-axis of FIG. 8 represents the output voltage, and the x-axis represents time. The shaded area is the glitch region and can be denoted as G1 (glitch-impulse region). G1 represents the area under the graph of the section where the glitch occurred on FIG. 8, and this area is the energy of the glitch. When the digital code is switched from the binary number `011111111111` (code 2047 in FIG. 8) to the binary number `100000000000` (code 2048 in FIG. 8), a glitch phenomenon may be caused in the analog output.

[0081] As the strength of the digital input signal decreases, the range of available codes becomes smaller, and the probability of code change occurring near intermediate codes also increases (see explanation of Fig. 7). Therefore, as the strength of the input signal decreases, it is more affected by glitch phenomena, and linearity may deteriorate further.

[0082] FIG. 9 is an example diagram of the configuration of a transmitter using dithering according to one embodiment of the present disclosure.

[0083] A transmitter according to one embodiment of the present disclosure may include at least one of a large signal generating unit (910) or an analog output generating unit (920) for dithering as shown in FIG. 9.

[0084] The above-mentioned signal generation unit (910) may include at least one of a signal strength measuring unit (911), a frequency measuring unit (913), or a preset signal generator (915).

[0085] The signal strength measuring unit (911), the frequency measuring unit (913), or the preset signal generator (915) may be implemented by a single processor.

[0086] The signal strength measuring unit (911) can receive a digital input signal in real time or at a set time and measure the strength of the digital input signal, and can transmit the strength of the digital input signal to the preset signal generator (915).

[0087] The frequency measuring unit (913) can receive a digital input signal in real time or at a set time, measure the frequency of the digital input signal, and transmit the measured frequency information to the preset signal generator (915) or filter unit (923).

[0088] The preset signal generator (915) receives the strength of the digital input signal or the frequency information from the signal strength measuring unit (911) or the frequency measuring unit (913), selects a frequency that can be used as an out-of-band signal among preset single tone signals (a single sinusoidal signal having only one frequency), and outputs a tone signal having the selected frequency as a digital output. Alternatively, the preset signal generator (915) may receive external control as input and output a tone signal having a specific frequency as a digital output. In this case, as long as the DAC output is within a range where it is not saturated, the preset signal generator (915) may output multiple tones having different frequencies (i.e., two or more tone signals) as a digital output.

[0089] In the present disclosure, an out-of-band signal is defined as a signal having a frequency that is separated by a certain value from the frequency of a digital input signal, and the out-of-band signal may have a frequency lower than or higher than the frequency of the digital input signal. In this case, since harmonic tones caused by the out-of-band signal may be generated during the dithering process described later, the frequency, intensity, or number of signals to be added to the digital input signal during dithering may be determined by taking into account the harmonic tones.

[0090] In the present disclosure, out-band refers to the area outside the frequency bandwidth intended for use by the DAC. For example, assuming that the 5G frequency band used in Korea is 3.42 GHz to 3.7 GHz and that the digital input signal uses that band, the portion excluding that band (i.e., 3.42 GHz to 3.7 GHz) may be the out-band. Assuming that the filter unit (923) cannot accurately filter the desired band, additional margin bands on both sides of the usage bandwidth of the digital input signal may be additionally considered in determining the out-band. The margin bands considered in determining the out-band may be determined according to the performance of the filter unit (923). The margin bands may be determined by considering country-specific requirements and international standard specifications during actual use, and may, for example, occupy about 1% to 5% of the usage band. That is, the margin band can be set to have a band of about 0.5% to 2.5% at the bottom and top of the usage band, respectively.

[0091] The frequency of the dithering signal (i.e., the signal to be added to the digital input signal during dithering) can be determined by taking into account harmonic signals (signals having frequencies that are integer multiples of the frequency of the dithering signal). For example, considering the frequency folding phenomenon, it can be classified as follows according to the band of the DAC's sampling frequency (Fs, sampling frequency: the frequency at which a digital signal value is converted to an analog signal value). The frequency folding phenomenon is a phenomenon in which the entire frequency signal component is centered around the frequency of Fs / 2, and frequency signal components greater than Fs / 2 are symmetrically shifted to the region smaller than Fs / 2 and superimposed. In other words, when frequency folding occurs, the entire frequency signal component folds around the frequency point of Fs / 2, so that frequency signal components greater than Fs / 2 can be superimposed on frequency signal components less than Fs / 2.

[0092] When the bandwidth of the digital input signal is located in the band between Fs / 4 and Fs / 2, i.e., the high frequency band, a direct current (DC) signal may be designated as the dithering signal. When the bandwidth of the digital input is located in the band between Fs / 16 and Fs / 4, i.e., the intermediate frequency band, a DC signal or a signal with a frequency of Fs / 2 may be designated as the dithering signal. When the bandwidth of the digital input is located in the band between 0 and Fs / 16, i.e., the low frequency band, a signal with a frequency of Fs / 8 may be designated as the dithering signal. When the dithering signal is determined according to the above criteria, the influence of the dithering signal and its harmonic components can be minimized.

[0093] The strength of the signal for dithering is a reference strength (P) determined as an arbitrary value. TH It can be determined based on ). For example, if the strength of the digital input signal is smaller than the reference strength, the strength of the signal for dithering can be determined as the difference between the reference strength and the strength of the digital input signal. The reference strength (PTH An operation for determining ) may be performed in advance. That is, the transmitter according to the present disclosure performs DAC operations multiple times while changing the strength of the input signal for dithering, and the strength of the digital input signal with the best performance is the reference strength (P TH Can be decided by )

[0094] The above analog output generating unit (920) may include at least one of the DAC (921) and the filter unit (923).

[0095] The above DAC (921) or the filter unit (923) may be implemented by at least one processor. The filter unit (923) may be implemented as an independent filter device rather than by the at least one processor. The filter unit (923) may be a bandpass filter or a bandstop filter.

[0096] The above DAC (921) can convert the signal obtained by adding the input signal generated by the preset signal generator (915) and the digital input signal into a corresponding analog voltage. In this process, the input signal generated by the preset signal generator (915) (i.e., the dithering signal) can dither the digital input signal with sufficient strength. The method for determining the strength of the dithering signal is as described above.

[0097] The analog voltage generated by the DAC (921) may include information of both the digital input signal and the dithering signal generated by the preset signal generator (915). In order to remove the information of the generated dithering signal from the generated analog voltage, the signal output from the DAC (921) is input to the filter unit (923). The filter unit (923) can filter (remove) the frequency components of the out-of-band signals used for dithering based on the frequency information received from the frequency measurement unit (913). For the purpose of filtering out-of-band signals, the filter unit (923) may be configured as at least one of a bandstop filter or a bandpass filter.

[0098] FIG. 10 is an example diagram of an operation method of a transmitter using dithering according to one embodiment of the present disclosure.

[0099] The signal strength measuring unit (911) of the transmitter according to the present disclosure can receive a digital input signal in real time or at a set time and measure the strength of the digital input signal, and can transmit the strength of the digital input signal to the preset signal generator (915). At this time, the signal strength measuring unit (911) of the transmitter measures the strength (P) of the digital input signal. IN ) power threshold (P TH It can be compared with ). This comparison is intended to prevent distortion of the output signal when the dithered signal exceeds the DAC's dynamic range, that is, the maximum output intensity, and P IN This P TH The proposed dithering can be applied only when it drops below the power threshold. The distortion of the output signal is due to the power threshold (P TH This is because it can occur by adding a dithering signal to a digital input signal greater than ). In other words, the power threshold (P THSince digital input signals of greater strength than ) can operate in the region where linearity of the DAC is guaranteed without dithering, additional dithering signals can distort the output signal and increase nonlinearity.

[0100] The frequency measuring unit (913) of the above transmitter receives a digital input signal in real time or at a set time, measures the frequency of the digital input signal, and transmits the measured frequency information to the preset signal generator (915) of the above transmitter or the filter unit (923) of the above transmitter.

[0101] The preset signal generator (915) of the transmitter may receive the strength or frequency information of a digital input signal from the signal strength measuring unit (911) or the frequency measuring unit (913) of the transmitter, select a frequency that can be used as an out-of-band signal among preset single tone signals (a single sinusoidal signal having only one frequency), and transmit a tone signal having the selected frequency as a digital output. Alternatively, the preset signal generator (915) may receive external control as input and output a tone signal having a specific frequency as a digital output. In this case, if the DAC output is within a range where it is not saturated, the preset signal generator (915) may output multiple tones having different frequencies (i.e., two or more tone signals) as a digital output.

[0102] In the present disclosure, an out-of-band signal is defined as a signal having a frequency that is separated by a certain value from the frequency of a digital input signal, and the out-of-band signal may have a frequency lower than or higher than the frequency of the digital input signal. In this case, since harmonic tones caused by the out-of-band signal may be generated during the dithering process described later, the frequency, intensity, or number of signals to be added to the digital input signal during dithering may be determined by taking into account the harmonic tones.

[0103] The above analog output generating unit (920) may include at least one of the DAC (921) and the filter unit (923).

[0104] The above DAC (921) or the filter unit (923) may be implemented by at least one processor. The filter unit (923) may be implemented as an independent filter device rather than by the at least one processor. The filter unit (923) may be a bandpass filter or a bandstop filter.

[0105] The DAC (921) of the transmitter can convert the signal obtained by adding the input signal generated by the preset signal generator (915) and the digital input signal into a corresponding analog voltage. In this process, the input signal generated by the preset signal generator (915) of the transmitter (i.e., the dithering signal) can dither the digital input signal with sufficient strength. The method for determining the strength of the dithering signal is as described above.

[0106] The analog voltage generated by the DAC (921) of the transmitter may include both the digital input signal and the dithering signal generated by the preset signal generator (915) of the transmitter. To remove the generated dithering signal from the generated analog voltage, the signal output from the DAC (921) of the transmitter is input to the filter unit (923) of the transmitter. The filter unit (923) of the transmitter can filter (remove) the frequency components of the out-of-band signals used for dithering based on frequency information received from the frequency measurement unit (913) of the transmitter. The filter unit (923) of the transmitter may be configured as at least one of a bandstop filter or a bandpass filter for the purpose of filtering out-of-band signals.

[0107] FIG. 11 is a diagram comparing the output waveform of a DAC according to whether or not the input signal of an ideal 12-bit DAC is dithered, according to one embodiment of the present disclosure.

[0108] Regardless of the strength of the digital input signal, especially for small digital input signals, the dithering signal can diffuse non-linear noise between current sources by dithering the digital input signal with sufficient strength. The said sufficient strength is as described above in the method for determining the strength of the dithering signal.

[0109] For example, in FIG. 11(a) and (c), when there are only two DAC input signals, single-tone signal Fin1 (3.48GHz, -40dBFS) and single-tone signal Fin2 (3.58GHz, -40dBFS), the strength of the DAC output signal is not randomized.

[0110] On the other hand, in Fig. 11(b) and (d), a single tone signal Fin3 (5.98 GHz, -25 dBFS) is added (dithered) and randomized.

[0111] FIG. 12 is a diagram comparing the input waveforms of a DAC according to whether or not the input signal of an ideal 12-bit DAC is dithered, according to one embodiment of the present disclosure.

[0112] In Fig. 12(a) and (b), when there are only two tones, 1201a (3.48 GHz, -40 dBFS) and 1203a (3.58 GHz, -40 dBFS), the range of codes used is relatively narrow, with 2000-2100 codes.

[0113] On the other hand, in Figs. 12(c) and (d), Fin3 (5.98GHz, -25dBFS) is added, i.e., dithered, so the range of codes used is relatively wide, from 1900 to 2200 codes.

[0114] In other words, if the strength of the digital input signal of the DAC is maintained at a constant large value through dithering, and when comparing FIG. 12(b) and FIG. 12(d), the graph is evenly spread up and down, so the probability of occurrence per code is also uniformized (randomized), thereby improving the linearity of the DAC.

[0115] Figure 13 is a diagram showing the performance of IMD3 before dithering was applied in a computer simulation.

[0116] Figure 13 shows the results of a two-tone test performed to evaluate linearity using a computer simulation program (e.g., Matlab). To verify the performance improvement effect for small digital input signals, the digital input signal was set to -40dBFS. Then, non-linear noise modeling each current source of the DAC was applied to the DAC output.

[0117] FIG. 13(a) is the spectrum of the output after a digital input signal is applied to a DAC containing nonlinear noise, showing that the IMD3 component due to nonlinearity has an intensity of -71.4768 dBFS. FIG. 13(b) is an enlarged view of the graph in FIG. 13(a) centered on the frequency domain where the digital input signal is located.

[0118] FIG. 14 is a diagram showing the performance of IMD3 after applying dithering in a computer simulation according to one embodiment of the present disclosure.

[0119] FIG. 14(a) is the output spectrum when a signal having a single tone with a frequency lower than the DAC input is added (dithered) to the DAC input and applied to the DAC input.

[0120] FIG. 14(b) is an enlarged view of the graph of FIG. 14(a) centered on the frequency range where the digital input signal is located.

[0121] FIG. 14(c) is the output spectrum when a signal having a single tone with a frequency higher than the DAC input is added to the DAC input and applied to the DAC as an input.

[0122] FIG. 14(d) is an enlarged view of the graph in FIG. 14(c) centered on the frequency range where the input signal is located.

[0123] In Fig. 14(b), it is confirmed that the IMD3 components due to nonlinearity have intensities of -99.0675 dBFS and -107.307 dBFS, respectively.

[0124] In Fig. 14(d), it is confirmed that the IMD3 components due to nonlinearity have intensities of -88.8854 dBFS and -95.3817 dBFS, respectively.

[0125] FIG. 15 is a diagram showing the performance of IMD3 before and after the application of actual dithering according to an embodiment of the present disclosure.

[0126] FIG. 15 is the result of a two-tone test for evaluating linearity when using a DAC according to one embodiment of the present disclosure. FIG. 15(a) shows the result of first applying input signals (Po_F1, Po_F2) each having an intensity of -47dBFS to verify the performance improvement effect for small digital input signals. FIG. 15(b) is the spectrum of the output after applying an out-of-band signal (Po_F3) for dithering to the DAC.

[0127] Comparing Figures 15(a) and 15(b), IMD3_L improved by 27.5dB from -23.55dB to -51.05dB, and IMD3_R improved by 21.59dB from -22.20dB to -43.79dB. Additionally, IMD5_L improved by 23.40dB from -26.84dB to -50.24dB, and IMD5_R improved by 20.73dB from -27.75dB to -48.46dB. In other words, when comparing the values ​​before and after dithering, both IMD3(IMD3_L, IMD3_R) and IMD5(IMD5_L, IMD5_R) were lowered by more than 20dB, confirming that linearity is improved.

[0128] Meanwhile, it is confirmed in FIG. 15(b) that the harmonic tone (P3_HD6) of the dithering large signal appears in the output spectrum. To resolve the issue of this harmonic tone, it may be necessary to process it together through a filter at the output stage or to input the dithering large signal at an appropriate frequency and intensity. Specific determinations regarding the frequency and intensity of the dithering signal were described in relation to FIG. 5.

[0129] FIG. 16 shows the structure of a transmitter according to an embodiment of the present disclosure.

[0130] The transmitter described with reference to FIGS. 9 through 15 may correspond to the transmitter (1600) of FIG. 16. Referring to FIG. 16, the transmitter (1600) may be composed of at least one of a memory (1601), a processor (1603), and a filter (1605).

[0131] According to the operation method of the transmitter (1600) described above, the memory (1601), the processor (1603), and the filter (1605) of the transmitter (1600) may be operated. However, the components of the transmitter (1600) are not limited to the examples described above. For example, the transmitter (1600) may include more components or fewer components than the components described above. Furthermore, the memory (1601), the processor (1603), and the filter (1605) may be implemented in the form of a single chip. The filter (1605) may also be implemented in a separate form. Additionally, the processor (1603) may include one or more processors.

[0132] The memory (1601) can store programs and data necessary for the operation of the transmitter (1600). Additionally, the memory (1601) can store control information or data included in the signal obtained from the transmitter (1600). The memory (1601) may be composed of a storage medium or a combination of storage media, such as ROM, RAM, a hard disk, a CD-ROM, and a DVD.

[0133] Methods according to the embodiments described in the claims or specification of the present disclosure may be implemented in the form of hardware, software, or a combination of hardware and software.

[0134] When implemented as software, a computer-readable storage medium may be provided for storing one or more programs (software modules). One or more programs stored on the computer-readable storage medium are configured for execution by one or more processors within an electronic device. One or more programs may include instructions that cause the electronic device to execute methods according to the embodiments described in the claims or specification of this disclosure.

[0135] These programs (software modules, software) may be stored in random access memory, non-volatile memory including flash memory, ROM (Read Only Memory), EEPROM (Electrically Erasable Programmable Read Only Memory), magnetic disc storage devices, CD-ROM (Compact Disc-ROM), Digital Versatile Discs (DVDs), or other forms of optical storage devices, magnetic cassettes. Alternatively, they may be stored in memory composed of some or all of these. Additionally, each constituent memory may include multiple units.

[0136] Additionally, the above program may be stored on an attachable storage device that can be accessed via a communication network such as the Internet, Intranet, Local Area Network (LAN), Wide LAN (WLAN), or Storage Area Network (SAN), or a combination thereof. Such a storage device may be connected to a device performing an embodiment of the present disclosure through an external port. Additionally, a separate storage device on a communication network may be connected to a device performing an embodiment of the present disclosure.

[0137] In the specific embodiments of the present disclosure described above, the components included in the disclosure are expressed in a singular or plural form according to the specific embodiments presented. However, the singular or plural expression is selected to suit the situation presented for convenience of explanation, and the present disclosure is not limited to singular or plural components; even if a component is expressed in the plural form, it may be composed of a singular form, and even if a component is expressed in the singular form, it may be composed of a plural form.

[0138] Meanwhile, although specific embodiments have been described in the detailed description of the present disclosure, it is understood that various modifications are possible within the scope of the present disclosure. Therefore, the scope of the present disclosure should not be limited to the described embodiments, but should be defined by the claims set forth below as well as equivalents thereof.

Claims

1. In a transmitter that performs dithering on a digital input signal in a wireless communication system to convert and output an analog signal, Filter; and It includes at least one processor, The above at least one processor is: A transmitter configured to measure the strength of a digital input signal, measure the frequency of the digital input signal, and when the strength of the digital input signal is less than a threshold value, add at least one tone signal having an out-band frequency other than the frequency band used by the digital input signal and a strength greater than the strength of the digital input signal to the digital input signal as a dithering signal to convert it into an analog signal according to a sampling frequency, and input the converted analog signal to the filter.

2. In Paragraph 1, The above at least one processor Measure the frequency of the digital input signal in real time or at a set time, and A transmitter characterized by being configured to transmit the measured frequency to the filter.

3. In Paragraph 2, A transmitter characterized by the filter being configured to filter the dithering signal using the measured frequency in the converted analog signal.

4. In Paragraph 1, The above at least one processor A transmitter characterized by being configured to measure the strength of the digital input signal in real time or at a set time.

5. In Paragraph 1, A transmitter characterized by the filter comprising at least one of a bandstop filter or a bandpass filter.

6. In Paragraph 1, A transmitter characterized in that at least one processor is configured to determine the strength of the dithering signal as the strength corresponding to the difference between the strength of the measured digital input signal and the threshold value.

7. In Paragraph 1, A transmitter characterized in that the out-of-band frequency of the dithering signal is determined outside the frequency band used by the digital input signal and an additional margin band.

8. In Paragraph 1, A transmitter characterized in that the out-of-band frequency is half of the sampling frequency when the frequency of the measured digital input signal is at least one-sixteenth of the sampling frequency and less than one-fourth.

9. A method in which a transmitter in a wireless communication system performs dithering on a digital input signal to convert it into an analog signal and outputs it, wherein Operation of measuring the strength of the above digital input signal; Operation of measuring the frequency of the above digital input signal; When the strength of the digital input signal is less than a threshold value, the operation of adding at least one tone signal as a dithering signal to the digital input signal, the tone signal having an out-band frequency other than the frequency band used by the digital input signal and having a strength greater than that of the digital input signal, and converting it into an analog signal according to the sampling frequency; and A method including the operation of inputting the above-mentioned converted analog signal to a filter.

10. In Paragraph 9, The operation of measuring the frequency of the digital input signal in real time or at a set time; A method further comprising the operation of transmitting the measured frequency to the filter.

11. In Paragraph 9, A method further comprising the operation of measuring the strength of the digital input signal in real time or at a set time.

12. In Paragraph 9, A method characterized in that the filter comprises at least one of a bandstop filter or a bandpass filter.

13. In Paragraph 9, A method further comprising the operation of determining the intensity corresponding to the difference between the intensity of the measured digital input signal and the threshold value as the intensity of the dithering signal.

14. In Paragraph 9, A method characterized in that the out-of-band frequency of the dithering signal is determined outside the frequency band used by the digital input signal and an additional margin band.

15. In Paragraph 9, A method characterized in that the out-of-band frequency is half of the sampling frequency when the frequency of the measured digital input signal is at least one-sixteenth of the sampling frequency and less than one-fourth.

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