Boost and buck charge pump, voltage management chip, device and method

Abstract

The present invention discloses a voltage-boosting and voltage-buckling charge pump, a voltage management chip, a device and a method. The voltage-boosting and voltage-buckling charge pump only needs one charging and discharging circuit and five groups of switches to realize the functions of voltage boosting and voltage bucking, thereby simplifying the structure of the charge pump, greatly saving costs, reducing system power consumption, improving system efficiency, and increasing the use and standby time of a battery (group), thereby overcoming the technical problems of low efficiency when the power supply voltage is high and failure to work when the power supply voltage is low, which exist in existing power management applications using linear regulators.

Description

Technical Field

[0001] The present invention relates to the field of analog integrated circuit technology, and in particular to a voltage step-up and step-down charge pump, a voltage management chip, a device and a method. Background Art

[0002] Many applications in the current motor drive industry are powered by batteries (groups). When the battery (group) is fully charged, the output voltage is high. As the battery (group) storage capacity decreases, the power supply voltage will also decrease accordingly, and can even drop to less than 50%. Existing voltage management chips use linear regulators to achieve DC-to-DC step-down output, which has two disadvantages: First, when the battery (group) is fully charged, the difference between the input voltage and the output voltage is relatively large, the linear regulator has large losses and low efficiency, which reduces the battery (group) service time and standby time; second, when the battery (group) is low, the input voltage is lower than the output voltage, and the linear regulator cannot provide sufficient output.

[0003] With the widespread use of charge pumps in battery-required systems such as cellular phones, pagers, Bluetooth systems, and portable electronic devices, the output power and efficiency of charge pumps have also been developed. The main applications of charge pumps include driving white LEDs for mobile phone backlights and digital processors in the milliwatt range. However, in existing intelligent power management (power manager) applications, both boost and buck charge pumps are required, and each charge pump requires a flying capacitor and four sets of switches.

[0004] How to achieve both the functions of voltage boost and voltage reduction while making the structure of the charge pump simple has become a technical problem that needs to be solved urgently in existing intelligent power management applications. Summary of the invention

[0005] The purpose of the present invention is to provide a boost and buck charge pump, a voltage management chip, a device and a method to address the technical problems existing in the prior art, which can realize the functions of boost and buck with only a small number of components, simplify the structure of the charge pump and reduce system power consumption.

[0006] To achieve the above-mentioned objectives, the present invention provides a boost-buck charge pump, which is used to receive a boost mode control signal to switch to a boost mode or receive a buck mode control signal to switch to a buck mode; in the boost mode, the boost-buck charge pump receives a target boost voltage, bootstraps the target boost voltage to obtain a second reference voltage and outputs it; in the buck mode, the boost-buck charge pump receives an input power supply voltage, steps down the input power supply voltage to obtain a first reference voltage and outputs it.

[0007] To achieve the above object, the present invention further provides a voltage management chip, wherein the voltage management chip comprises the step-up and step-down charge pump described in the present invention.

[0008] To achieve the above objective, the present invention further provides a voltage management device, which includes the step-up and step-down charge pump described in the present invention.

[0009] To achieve the above-mentioned purpose, the present invention also provides a voltage management method, which includes the following steps: (1) a boost / buck charge pump receives a boost mode control signal and switches to a boost mode, or receives a buck mode control signal and switches to a buck mode; (2) in the boost mode, the boost / buck charge pump receives a target boost voltage, performs bootstrap boost on the target boost voltage, obtains a second reference voltage and outputs it; (3) in the buck mode, the boost / buck charge pump receives an input power supply voltage, performs buck on the input power supply voltage, obtains a first reference voltage and outputs it.

[0010] The advantages of the present invention are as follows: the present invention introduces a boost and buck charge pump, when the power supply voltage is low, the boost and buck charge pump works in a boost mode to output a voltage by self-boosting, and when the power supply voltage is high, the boost and buck charge pump works in a buck mode to output a voltage by bucking, thereby overcoming the technical problems of low efficiency when the power supply voltage is high and failure to work when the power supply voltage is low in the linear regulator used in the existing power management application; and the boost and buck charge pump provided by the present invention only needs one charging and discharging circuit and five sets of switches to realize the functions of boosting and bucking, thus simplifying the structure of the charge pump, greatly saving costs, reducing system power consumption, improving system efficiency, and increasing the use and standby time of the battery (group). The present invention can also realize closed-loop buck control, and can adjust the size of the output voltage by controlling the duty cycle of the switch control signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 , a schematic diagram of the architecture of the step-up and step-down charge pump according to the present invention;

[0012] Figure 2 , a circuit diagram of an embodiment of the step-up and step-down charge pump of the present invention;

[0013] Figure 3A , simplified circuit diagram of the step-up and step-down charge pump in boost mode;

[0014] Figure 3B for Figure 3A Schematic diagram of waveforms of some nodes in the circuit shown;

[0015] Figure 4A , simplified circuit diagram of the step-up and step-down charge pump in buck mode;

[0016] Figure 4B for Figure 4A Schematic diagram of waveforms of some nodes in the circuit shown;

[0017] Figure 5 , a flow chart of the voltage management method of the present invention. DETAILED DESCRIPTION

[0018] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and are not to be construed as limiting the present invention. In addition, the present invention repeats reference numbers and / or reference letters in different examples, and such repetition is for the purpose of simplification and clarity, and does not itself indicate the relationship between the various embodiments and / or settings discussed.

[0019] The boost / buck charge pump of the present invention switches to the boost mode by receiving a boost mode control signal or switches to the buck mode by receiving a buck mode control signal; in the boost mode, the boost / buck charge pump receives a target boost voltage, performs a self-boosting boost on the target boost voltage to obtain a second reference voltage and outputs it; in the buck mode, the boost / buck charge pump receives an input power supply voltage, performs a bucking on the input power supply voltage to obtain a first reference voltage and outputs it. The input power supply voltage is greater than the target boost voltage and less than the withstand voltage of the intelligent power management device; the target boost voltage can be, for example, a 5V voltage in the intelligent power supply.

[0020] The boost / buck charge pump provided by the present invention operates in a boost mode to perform self-boosting to output a voltage when the power supply voltage is low, and operates in a buck mode to perform bucking to output a voltage when the power supply voltage is high, thereby overcoming the technical problems of low efficiency when the power supply voltage is high and failure to work when the power supply voltage is low in the linear regulator used in the existing power management application.

[0021] refer to Figure 1 , a schematic diagram of the structure of the boost and buck charge pump of the present invention. The boost and buck charge pump comprises a switch control circuit 11, a switch array 12 and a charge and discharge circuit 13.

[0022] The switch control circuit 11 is used to receive a boost mode control signal through the fourth port Port-D of the boost-buck charge pump to switch to the boost mode or receive a buck mode control signal to switch to the buck mode, and is used to receive a clock signal CLK to control the switching state of the switches in the switch array 12 according to the phase sequence time reference of the clock signal CLK.

[0023] In the boost mode, the switch control circuit 11 controls the switches of the switch array 12 to close or open according to the phase sequence time reference, so as to control the charge and discharge circuit 13 to receive the target boost voltage V1 through the second port Port-B of the boost-buck charge pump, and to bootstrap the target boost voltage, so as to obtain the second reference voltage V2 and output it from the third port Port-C of the boost-buck charge pump.

[0024] In the buck mode, the switch control circuit 11 controls the switch of the switch array 12 to close or open according to the phase sequence time reference, so as to control the charge and discharge circuit 13 to receive the input power supply voltage VIN through the first port Port-A of the boost-buck charge pump, and to buck the input power supply voltage VIN, and obtain the first reference voltage V1 and output it from the second port Port-B. The target boost voltage V1 and the first reference voltage V1 can be the same voltage value.

[0025] The step-up and step-down charge pump provided by the present invention only requires a charge and discharge circuit and a switch array to achieve the functions of step-up and step-down, thereby simplifying the structure of the charge pump, greatly saving costs, reducing system power consumption, improving system efficiency, and increasing the use and standby time of the battery (group).

[0026] The charging and discharging circuit 13 can realize the function of the capacitor in a digital way (ie, remove the capacitor), so that the charging and discharging circuit 13 can be integrated in the chip. The charging and discharging circuit 13 can also include a capacitor, which is connected to the step-up and step-down charge pump through the switch array 12.

[0027] Optionally, the step-up and step-down charge pump further includes a clock generating unit 14; the clock generating unit 14 is used to output a clock signal CLK to provide a phase sequence time reference for controlling the switch state of the switches in the switch array. The clock generating unit 14 can be an oscillator. In other embodiments, the clock signal CLK can also be generated by an external circuit.

[0028] Preferably, the boost-buck charge pump further includes a first voltage comparator CP1; the first input end of the first voltage comparator CP1 is electrically connected to the second port Port-B of the boost-buck charge pump, the second input end thereof is used to receive a reference voltage VREF, and the output end thereof is electrically connected to the switch control circuit 11. The first voltage comparator CP1 is used to receive the first reference voltage V1 obtained by the second port Port-B in the buck mode and compare it with the reference voltage VREF, and output a first control signal to turn off the switch control circuit 11 based on the first comparison result; and output a second control signal to start the switch control circuit 11 based on the second comparison result, so as to realize closed-loop control and make the first reference voltage V1 and the reference voltage VREF dynamically equal. Specifically, when the first reference voltage V1 is greater than or equal to the reference voltage VREF, the first voltage comparator CP1 obtains the first comparison result; when the first reference voltage V1 is less than the reference voltage VREF, the first voltage comparator CP1 obtains the second comparison result; by introducing the first voltage comparator CP1, the present invention can also realize closed-loop buck control.

[0029] refer to Figure 2 , Figure 3A-3B as well as Figure 4A-4B ,in, Figure 2 is a circuit diagram of an embodiment of the step-up and step-down charge pump of the present invention, Figure 3A This is a simplified circuit diagram of the boost and buck charge pump in boost mode. Figure 3B for Figure 3A The waveform diagram of some nodes in the circuit shown is as follows. Figure 4A This is a simplified circuit diagram of the boost and buck charge pump in buck mode. Figure 4B for Figure 4A Schematic diagram of waveforms of some nodes in the circuit shown. In this embodiment, the boost and buck charge pump has four ports (pins), namely, a first port Port-A, a second port Port-B, a third port Port-C and a fourth port Port-D; the boost and buck charge pump can realize the functions of boosting and bucking through a charge and discharge circuit and five sets of switches.

[0030] Specifically, the switch control circuit 11 is used to receive the boost mode control signal Low through the fourth port Port-D of the boost-buck charge pump to switch to the boost mode or receive the buck mode control signal High to switch to the buck mode, and is used to receive a clock signal CLK to control the switch state of the switch in the switch array 12 according to the phase sequence time reference of the clock signal CLK. Among them, the input power supply voltage VIN is compared with a mode switching voltage VTH, and the boost mode control signal or the buck mode control signal is output based on the comparison result. Specifically, when the input power supply voltage VIN is less than the mode switching voltage VTH, the boost mode control signal High is output; when the input power supply voltage VIN is greater than or equal to the mode switching voltage VTH, the buck mode control signal Low is output.

[0031] Specifically, the switch array 12 includes five groups of switches S1-S5: one end of the first switch S1 is electrically connected to the first port Port-A, and the other end thereof is electrically connected to the first node P1 of the switch array 12; one end of the second switch S2 is electrically connected to the first node P1, and the other end thereof is electrically connected to the second port Port-B; one end of the third switch S3 is grounded, and the other end thereof is electrically connected to the second node P2 of the switch array 12; one end of the fourth switch S4 is electrically connected to the second node P2, and the other end thereof is electrically connected to the second port Port-B; one end of the fifth switch S0 is electrically connected to the first node P1, and the other end thereof is electrically connected to the third port Port-C.

[0032] The charge and discharge circuit 13 is connected in series between the first node P1 and the second node P2. Specifically, the charge and discharge circuit 13 uses a capacitor C1 to charge and discharge the input voltage, and the upper plate of the capacitor C1 is electrically connected to the first node P1, and the lower plate thereof is electrically connected to the second node P2.

[0033] Specifically, the clock generating unit 124 (optional component) may be an oscillator, which outputs a high-frequency clock CLK to provide a phase sequence time reference for the switches S0 - S4 .

[0034] In the boost mode, the switch control circuit 11 controls the first switch S1 to be always disconnected, and at the same time controls the fifth switch S0, the second switch S2, the third switch S3, and the fourth switch S4 to be disconnected or closed according to the phase sequence time reference, so that the charge and discharge circuit 13 receives the target boost voltage through the second port Port-B, and performs a bootstrap boost on the target boost voltage, and obtains the second reference voltage V2 and outputs it from the third port Port-C. That is, when the power supply voltage is low, the boost and buck charge pump operates in the bootstrap boost mode, the switch S1 is always disconnected, the target boost voltage V1 is input from the Port-B port, and the boosted voltage V2 is output from the Port-C end. The simplified circuit diagram of the boost and buck charge pump in the boost mode is as follows: Figure 3A shown.

[0035] Specifically, the phase sequence time reference includes a first boost phase sequence and a second boost phase sequence. In the first boost phase sequence, the switch control circuit 11 controls the second switch S2 and the third switch S3 to be closed, and controls the fifth switch S0 and the fourth switch S4 to be disconnected, so that the charge and discharge circuit 13 is connected in series between the second port Port-B and the ground terminal GND through the second switch S2 and the third switch S3 to receive the target boost voltage V1 for charging. In the second boost phase sequence, the switch control circuit 11 controls the second switch S2 and the third switch S3 to be disconnected, and controls the fifth switch S0 and the fourth switch S4 to be closed, so that the charge and discharge circuit 13 is connected in series between the second port Port-B and the third port Port-C through the fifth switch S0 and the fourth switch S4 to perform self-boosting to obtain the second reference voltage V2 and output it through the third port Port-C. Among them, the time of the first boost phase sequence and the second boost phase sequence is a first preset ratio. By changing the time ratio of the first boosting phase sequence and the second boosting phase sequence, the duty cycle of the switch control signal controlling the switch array can be adjusted, thereby obtaining boosted output voltages of different magnitudes.

[0036] Preferably, the step-up and step-down charge pump further includes a second diode D2; an anode of the second diode D2 is electrically connected to the fifth switch S0, a cathode of the second diode D2 is electrically connected to the third port Port-C, and the second diode D2 is used to block current backflow of the third port Port-C.

[0037] Preferably, the step-up and step-down charge pump further includes a third diode D3, an anode of the third diode D3 is electrically connected to the first switch S1, a cathode of the third diode D3 is electrically connected to the first node P1, and the third diode D3 is used to block the current backflow of the first node P1 (on the capacitor C1).

[0038] Depend on Figure 3B It can be seen from the node waveforms shown that: in the first boost phase sequence Phase11 of the clock signal CLK, switches S2 and S3 are closed, and switches S0 and S4 are opened; the upper plate of capacitor C1 is connected to Port-B, and the lower plate is connected to GND, and the voltage difference therebetween is V1; in the second boost phase sequence Phase12, switches S2 and S3 are opened, and switches S0 and S4 are closed; the upper plate of capacitor C1 is connected to Port-C through diode D1, and the lower plate is connected to Port-B, and the forward conduction voltage drop of diode D1 is ignored, and the voltage difference across capacitor C1 is V2-V1. When the time of the first boost phase sequence Phase11 and the second boost phase sequence Phase12 are equal, since the voltage protection on the capacitor C1 remains unchanged, V1=V2-V1, that is, V2=2V1, that is, the output voltage V2 is one times the input voltage V1; the time ratio of the first boost phase sequence Phase11 and the second boost phase sequence Phase12 is different, and the multiple ratio of the boosted output voltage V2 to the input target boost voltage V1 is different. Among them, the diode D1 is used to prevent the current from flowing back when the V2 voltage is higher than the upper plate voltage of the capacitor C1 during the second boost phase sequence Phase12. Among them, the voltage input to Port-B is not the input power supply voltage VIN, but the first reference voltage V1 of the target boost (for example, 5V in the smart power supply), which needs to be distinguished from the voltage input to Port-A in the buck mode (that is, the input power supply voltage VIN). The voltage input to Port-A is the input power supply voltage VIN of the smart power supply, which needs to be greater than the first reference voltage V1 input to Port-B and less than the withstand voltage of the smart power supply.

[0039] Continue to refer Figure 2 In the buck mode, the switch control circuit 11 controls the fifth switch S0 to be always disconnected, and controls the first switch S1, the second switch S2, the third switch S3, and the fourth switch S4 to be disconnected or closed according to the phase sequence time reference, so that the charge and discharge circuit 13 receives the input power supply voltage VIN through the first port Port-A, and steps down the input power supply voltage VIN, obtains the first reference voltage V1 and outputs it from the second port Port-B. That is, when the power supply voltage is high, the boost-buck charge pump operates in the buck mode, the switch S0 is always disconnected, the input power supply voltage VIN is input from the Port-A port, and the stepped-down voltage V1 is output from the Port-B end. The simplified circuit diagram of the boost-buck charge pump in the buck mode is as follows: Figure 4A shown.

[0040] Specifically, the phase sequence time reference also includes a first step-down phase sequence and a second step-down phase sequence. In the first step-down phase sequence, the switch control circuit 11 controls the first switch S1 and the fourth switch S4 to be closed, and controls the second switch S2 and the third switch S3 to be disconnected, so that the charge-discharge circuit 13 is connected in series between the first port Port-A and the second port Port-B through the first switch S1 and the fourth switch S4, so as to receive the input power supply voltage VIN through the first port Port-A for discharge. In the second step-down phase sequence, the switch control circuit 11 controls the first switch S1 and the fourth switch S4 to be disconnected, and controls the second switch S2 and the third switch S3 to be closed, so that the charge-discharge circuit 13 is connected in series between the ground terminal GND and the second port Port-B through the second switch S2 and the third switch S3, so as to perform step-down to obtain the first reference voltage V1 and output it through the second port Port-B. Among them, the time of the first step-down phase sequence and the second step-down phase sequence is a first preset ratio. By changing the time ratio of the first step-down phase sequence and the second step-down phase sequence, the duty cycle of the switch control signal controlling the switch array can be adjusted, thereby obtaining output voltages after step-down of different magnitudes.

[0041] Depend on Figure 4B It can be seen from the node waveforms shown that: in the first step-down phase sequence Phase21 of the clock signal CLK, switches S1 and S4 are closed, switches S2 and S3 are disconnected, the upper plate of capacitor C1 is connected to Port-A through diode D3, and the lower plate is connected to Port-B. Ignoring the forward conduction voltage drop of diode D3, the voltage difference on capacitor C1 is VIN-V1; in the second step-down phase sequence Phase22, switches S1 and S4 are disconnected, switches S2 and S3 are closed, the upper plate of capacitor C1 is connected to Port-B, and the lower plate is connected to GND, and the voltage difference on capacitor C1 is V1. When the time of the first step-down phase sequence Phase21 and the second step-down phase sequence Phase22 is equal, since the voltage protection on capacitor C1 remains unchanged, VIN-V1=V1, that is, VIN=2V1, that is, the output voltage V1 is half of the input voltage VIN. The time ratios of the first step-down phase sequence Phase 21 and the second step-down phase sequence Phase 22 are different, and the multiple ratios of the output voltage V1 after step-down and the input power supply voltage VIN are different. The diode D3 is used to prevent the current from flowing back when the upper plate voltage of the capacitor C1 is higher than the VIN voltage in the first step-down phase sequence Phase 21.

[0042] Continue to refer Figure 4AIn the buck mode, the output voltage VOUT (i.e., the first reference voltage V1) of the second port PortB is received by the voltage comparator CP1 and compared with the reference voltage VREF. When VOUT is higher than VREF, the voltage comparator CP1 outputs the first control signal (low-level enable signal EN) to turn off the switch control circuit 11, so that S1 to S4 are all turned off, which is called the third buck phase sequence Phase23 (such as Figure 4B As shown). In the third step-down phase sequence Phase23, ​​the VOUT voltage will drop until it is lower than the VREF voltage, and the voltage comparator CP1 outputs a second control signal (a high-level enable signal EN) to start the switch control circuit 11. The switch control circuit 11 controls the closing and closing of the switches S1 to S4 according to the first step-down phase sequence and the second step-down phase sequence according to the clock signal CLK. Through closed-loop control, the output voltage VOUT and the reference voltage VREF are dynamically equal.

[0043] The present invention also provides a voltage management chip, wherein the voltage management chip integrates the boost-buck charge pump of the present invention. Among them, the charging and discharging circuit of the boost-buck charge pump is also integrated in the voltage management chip, and the function of the capacitor is realized in a digital manner (i.e., the capacitor is removed). In other embodiments, the charging and discharging circuit of the boost-buck charge pump may also include a capacitor, which is arranged outside the voltage management chip and connected to the boost-buck charge pump through the switch array of the boost-buck charge pump. Specifically, the boost-buck charge pump can refer to the above-mentioned embodiment of the present invention. Figure 2 , Figure 3A-3B , Figure 4A-4B The above description will not be repeated here.

[0044] The present invention further provides a voltage management device, the voltage management device comprising the boost and buck charge pump of the present invention. Figure 2 , Figure 3A-3B , Figure 4A-4B The above description will not be repeated here.

[0045] Figure 5 , a flow chart of the voltage management method of the present invention. The present invention also provides a voltage management method, using the boost-buck charge pump of the present invention, the method comprising the following steps: S51: the boost-buck charge pump receives a boost mode control signal and switches to a boost mode, or receives a buck mode control signal and switches to a buck mode; S52: in the boost mode, the boost-buck charge pump receives a target boost voltage, performs a bootstrap boost on the target boost voltage, obtains a second reference voltage and outputs it; S53: in the buck mode, the boost-buck charge pump receives an input power supply voltage, performs a buck on the input power supply voltage, obtains a first reference voltage and outputs it.

[0046] Please refer to Figure 2 , Figure 3A-3B Preferably, step S52 further includes: in the boost mode, the boost buck charge pump receives the clock signal CLK, and controls the switch state of the switch in the switch array 12 of the boost buck charge pump according to the phase sequence time reference of the clock signal CLK, so as to control the charge and discharge circuit 13 of the boost buck charge pump to bootstrap the target boost voltage V1, obtain the second reference voltage V2 and output it. Specifically, in the boost mode, the switch control circuit 11 controls the first switch S1 to be always disconnected, and controls the fifth switch S0, the second switch S2, the third switch S3, and the fourth switch S4 to be disconnected or closed according to the phase sequence time reference, so that the charge and discharge circuit 13 receives the target boost voltage through the second port Port-B, bootstraps the target boost voltage, obtains the second reference voltage V2 and outputs it from the third port Port-C. That is, when the power supply voltage is low, the boost and buck charge pump works in the bootstrap boost mode, the switch S1 is always off, the target boost voltage V1 is input from the Port-B port, and the boosted voltage V2 is output from the Port-C terminal. The simplified circuit diagram of the boost and buck charge pump in the boost mode is as follows: Figure 3A shown.

[0047] Preferably, the phase sequence time reference includes a first boost phase sequence and a second boost phase sequence. In the first boost phase sequence, the boost-buck charge pump controls the charge-discharge circuit 13 to receive the target boost voltage V1 for charging; in the second boost phase sequence, the boost-buck charge pump obtains the second reference voltage V2 and outputs it. Wherein, the time of the first boost phase sequence and the second boost phase sequence is in a first preset ratio. By changing the time ratio of the first boost phase sequence and the second boost phase sequence, the duty cycle of the switch control signal of the control switch array 12 can be adjusted to obtain different boosted output voltages (that is, the output second reference voltage V2 is adjustable). Specifically, in the first boost phase sequence, the switch control circuit 11 controls the second switch S2 and the third switch S3 to close, and controls the fifth switch S0 and the fourth switch S4 to open, so that the charge-discharge circuit 13 is connected in series between the second port Port-B and the ground terminal GND through the second switch S2 and the third switch S3 to receive the target boost voltage V1 for charging. In the second boost phase sequence, the switch control circuit 11 controls the second switch S2 and the third switch S3 to be disconnected, and controls the fifth switch S0 and the fourth switch S4 to be closed, so that the charge and discharge circuit 13 is connected in series between the second port Port-B and the third port Port-C through the fifth switch S0 and the fourth switch S4, so as to perform self-boosting to obtain the second reference voltage V2 and output it through the third port Port-C. Among them, the time of the first boost phase sequence and the second boost phase sequence is in a first preset ratio. By changing the time ratio of the first boost phase sequence and the second boost phase sequence, the duty cycle of the switch control signal controlling the switch array can be adjusted, so as to obtain boosted output voltages of different sizes.

[0048] Please refer to Figure 2 , Figure 4A-4BPreferably, step S53 further includes: in buck mode, the boost-buck charge pump receives the clock signal CLK, and controls the switch state of the switch in the switch array 12 of the boost-buck charge pump according to the phase sequence time reference of the clock signal CLK, so as to control the charge-discharge circuit 13 of the boost-buck charge pump to step down the input power supply voltage VIN, obtain the first reference voltage V1 (i.e., the target boost voltage in the boost mode) and output it. Specifically, in buck mode, the switch control circuit 11 controls the fifth switch S0 to be always disconnected, and controls the first switch S1, the second switch S2, the third switch S3, and the fourth switch S4 to be disconnected or closed according to the phase sequence time reference, so that the charge-discharge circuit 13 receives the input power supply voltage VIN through the first port Port-A, steps down the input power supply voltage VIN, obtains the first reference voltage V1 and outputs it from the second port Port-B. That is, when the power supply voltage is high, the boost-buck charge pump operates in the buck mode, the switch S0 is always off, the input power supply voltage VIN is input from the Port-A port, and the stepped-down voltage V1 is output from the Port-B terminal. The simplified circuit diagram of the boost-buck charge pump in the buck mode is as follows: Figure 4A shown.

[0049] Preferably, the phase sequence time reference also includes a first step-down phase sequence and a second step-down phase sequence. In the first step-down phase sequence, the boost-buck charge pump controls the charge-discharge circuit 13 to receive the input power supply voltage VIN for discharge; in the second step-down phase sequence, the boost-buck charge pump obtains the first reference voltage V1 and outputs it. Among them, the time of the first step-down phase sequence and the second step-down phase sequence is in a second preset ratio. By changing the time ratio of the first step-down phase sequence and the second step-down phase sequence, the duty cycle of the switch control signal of the control switch array 12 can be adjusted to obtain output voltages after step-down of different sizes (that is, the output first reference voltage V1 is adjustable). Specifically, in the first step-down phase sequence, the switch control circuit 11 controls the first switch S1 and the fourth switch S4 to close, and controls the second switch S2 and the third switch S3 to open, so that the charge-discharge circuit 13 is connected in series between the first port Port-A and the second port Port-B through the first switch S1 and the fourth switch S4, so as to receive the input power supply voltage VIN through the first port Port-A for discharge. In the second step-down phase sequence, the switch control circuit 11 controls the first switch S1 and the fourth switch S4 to be disconnected, and controls the second switch S2 and the third switch S3 to be closed, so that the charge-discharge circuit 13 is connected in series between the ground terminal GND and the second port Port-B through the second switch S2 and the third switch S3, so as to step down the voltage and obtain the first reference voltage V1 to be output through the second port Port-B. Among them, the time of the first step-down phase sequence and the second step-down phase sequence is in a first preset ratio. By changing the time ratio of the first step-down phase sequence and the second step-down phase sequence, the duty cycle of the switch control signal of the control switch array can be adjusted, so as to obtain output voltages of different sizes after step-down.

[0050] Please refer to Figure 4A Preferably, step S53 further includes: in the buck mode, the step-up buck charge pump compares its output voltage VOUT (i.e., the first reference voltage V1) with a reference voltage VREF, and outputs a first control signal based on the first comparison result to control all switches in the switch array 12 to be turned off. Specifically, when VOUT is higher than VREF, a high-level enable signal EN is output to turn off S1 to S4 of the switch array 12, which is called the third buck phase sequence Phase23 (e.g., Figure 4BAs shown). The step-up / step-down charge pump further outputs a second control signal based on the second comparison result to control the switches in the switch array 12 to operate according to the first step-down phase sequence and the second step-down phase sequence, thereby realizing closed-loop control and making the output voltage VOUT and the reference voltage VREF dynamically equal. Specifically, in the step-down mode, the output voltage VOUT (i.e., the first reference voltage V1) of the second port PortB is received by the voltage comparator CP1 and compared with the reference voltage VREF. When VOUT is higher than VREF, the voltage comparator CP1 outputs a first control signal (a low-level enable signal EN) to turn off the switch control circuit 11, so that S1 to S4 are all turned off, which is called the third step-down phase sequence Phase23 (as shown). Figure 4B As shown). In the third step-down phase sequence Phase23, ​​the VOUT voltage will drop until it is lower than the VREF voltage, and the voltage comparator CP1 outputs a second control signal (a high-level enable signal EN) to start the switch control circuit 11. The switch control circuit 11 controls the closing and closing of the switches S1 to S4 according to the first step-down phase sequence and the second step-down phase sequence according to the clock signal CLK. Through closed-loop control, the output voltage VOUT and the reference voltage VREF are dynamically equal.

[0051] The above is only a preferred embodiment of the present invention. It should be pointed out that ordinary technicians in this technical field can make several improvements and modifications without departing from the principle of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A step-up and step-down charge pump, characterized in that: The boost and buck charge pump is used to receive a boost mode control signal to switch to a boost mode or receive a buck mode control signal to switch to a buck mode; In the boost mode, the boost and buck charge pump receives a target boost voltage, performs a bootstrap boost on the target boost voltage to obtain a second reference voltage and outputs the second reference voltage; In the buck mode, the step-up / step-down charge pump receives an input power supply voltage, steps down the input power supply voltage to obtain a first reference voltage and outputs the first reference voltage; By comparing the input power supply voltage with a mode switching voltage, and outputting a boost mode control signal or a buck mode control signal based on the comparison result; The boost-buck charge pump includes a first port, a second port and a third port. In the boost mode, the charge and discharge circuit of the boost-buck charge pump receives the target boost voltage through the second port, and bootstraps the target boost voltage to obtain the second reference voltage, and outputs it from the third port; in the buck mode, the charge and discharge circuit of the boost-buck charge pump receives the input power supply voltage through the first port, and steps down the input power supply voltage to obtain the first reference voltage, and outputs it from the second port, wherein the target boost voltage has a preset value and the target boost voltage is less than the input power supply voltage.

2. The step-up and step-down charge pump according to claim 1, characterized in that: The step-up and step-down charge pump comprises a switch control circuit, a switch array and a charge and discharge circuit; The switch control circuit is used to receive the boost mode control signal through the fourth port of the boost-buck charge pump to switch to the boost mode or receive the buck mode control signal to switch to the buck mode, and is used to receive a clock signal to control the switch state of the switch in the switch array according to the phase sequence time reference of the clock signal; In the boost mode, the switch control circuit controls the switches of the switch array to close or open according to the phase sequence time reference, so as to control the charge and discharge circuit to receive the target boost voltage through the second port of the boost and buck charge pump, and to bootstrap the target boost voltage, and obtain the second reference voltage to be output from the third port of the boost and buck charge pump; In the buck mode, the switch control circuit controls the switches of the switch array to close or open according to the phase sequence time reference, so as to control the charge and discharge circuit to receive the input power supply voltage through the first port of the boost-buck charge pump, and to step down the input power supply voltage, so as to obtain the first reference voltage and output it from the second port.

3. The step-up and step-down charge pump according to claim 2, characterized in that: The step-up and step-down charge pump further comprises a clock generating unit; the clock generating unit is used to output the clock signal to provide a phase sequence time reference for controlling the switching states of the switches in the switch array.

4. The step-up and step-down charge pump according to claim 2, characterized in that: The switch array includes five groups of switches: One end of the first switch is electrically connected to the first port, and the other end of the first switch is electrically connected to the first node of the switch array; One end of the second switch is electrically connected to the first node, and the other end thereof is electrically connected to the second port; One end of the third switch is grounded, and the other end thereof is electrically connected to the second node of the switch array; One end of the fourth switch is electrically connected to the second node, and the other end of the fourth switch is electrically connected to the second port; One end of the fifth switch is electrically connected to the first node, and the other end of the fifth switch is electrically connected to the third port; The charging and discharging circuit is connected in series between the first node and the second node; In the boost mode, the switch control circuit controls the first switch to be always disconnected, and controls the fifth switch, the second switch, the third switch, and the fourth switch to be disconnected or closed according to the phase sequence time reference, so that the charge and discharge circuit receives the target boost voltage through the second port, performs bootstrap boost on the target boost voltage, and obtains the second reference voltage and outputs it from the third port; In the buck mode, the switch control circuit controls the fifth switch to be always open, and controls the first switch, the second switch, the third switch, and the fourth switch to be opened or closed according to the phase sequence time reference, so that the charge and discharge circuit receives the input power supply voltage through the first port, steps down the input power supply voltage, and obtains the first reference voltage and outputs it from the second port.

5. The step-up and step-down charge pump according to claim 4, characterized in that: The phase sequence time reference includes a first boost phase sequence and a second boost phase sequence; In the first boost phase sequence, the switch control circuit controls the second switch and the third switch to be closed, and controls the fifth switch and the fourth switch to be opened, so that the charge and discharge circuit is connected in series between the second port and the ground through the second switch and the third switch to receive the target boost voltage for charging; In the second boost phase sequence, the switch control circuit controls the second switch and the third switch to be disconnected, and controls the fifth switch and the fourth switch to be closed, so that the charge and discharge circuit is connected in series between the second port and the third port through the fifth switch and the fourth switch, so as to perform bootstrap boosting to obtain the second reference voltage and output it through the third port; Wherein, the time of the first boost phase sequence and the time of the second boost phase sequence are in a first preset ratio.

6. The step-up and step-down charge pump according to claim 4, characterized in that: The step-up / step-down charge pump further includes a second diode, an anode of the second diode is electrically connected to the fifth switch, and a cathode of the second diode is electrically connected to the third port.

7. The step-up and step-down charge pump according to claim 4, characterized in that: The step-up / step-down charge pump further includes a third diode, an anode of the third diode is electrically connected to the first switch, and a cathode of the third diode is electrically connected to the first node.

8. The step-up and step-down charge pump according to claim 4, characterized in that: The phase sequence time reference also includes a first step-down phase sequence and a second step-down phase sequence; In the first step-down phase sequence, the switch control circuit controls the first switch and the fourth switch to be closed, and controls the second switch and the third switch to be opened, so that the charge-discharge circuit is connected in series between the first port and the second port through the first switch and the fourth switch, so as to receive the input power supply voltage through the first port for discharge; in the second step-down phase sequence, the switch control circuit controls the first switch and the fourth switch to be opened, and controls the second switch and the third switch to be closed, so that the charge-discharge circuit is connected in series between the ground terminal and the second port through the second switch and the third switch, so as to step down the voltage and obtain the first reference voltage to be output through the second port; Wherein, the time of the first voltage reduction phase sequence and the time of the second voltage reduction phase sequence are in a second preset ratio.

9. The step-up and step-down charge pump according to claim 2, characterized in that: The step-up and step-down charge pump further includes a first voltage comparator; The first input terminal of the first voltage comparator is electrically connected to the second port, the second input terminal thereof is used to receive a reference voltage, and the output terminal thereof is electrically connected to the switch control circuit. The first voltage comparator is used to receive the first reference voltage obtained by the second port in the buck mode and compare it with the reference voltage, and output a first control signal based on the first comparison result to turn off the switch control circuit.

10. The step-up and step-down charge pump according to claim 9, characterized in that: The first voltage comparator is further used to output a second control signal based on a second comparison result to start the switch control circuit, thereby realizing closed-loop control and making the first reference voltage dynamically equal to the reference voltage.

11. The step-up and step-down charge pump according to claim 4, characterized in that: The charge and discharge circuit includes a capacitor, an upper plate of the capacitor is electrically connected to the first node, and a lower plate of the capacitor is electrically connected to the second node.

12. A voltage management chip, characterized in that: The voltage management chip includes the step-up and step-down charge pump according to any one of claims 1-10.

13. The voltage management chip according to claim 12, characterized in that: The charging and discharging circuit includes a capacitor, which is arranged outside the voltage management chip and connected to the boost and buck charge pump through the switch array of the boost and buck charge pump.

14. A voltage management device, characterized in that: The voltage management device comprises a step-up or step-down charge pump as described in any one of claims 1-10.

15. A voltage management method, characterized in that: The method comprises the following steps: (1) By comparing the input power supply voltage with a mode switching voltage, and outputting a boost mode control signal or a buck mode control signal based on the comparison result; (2) The boost / buck charge pump receives a boost mode control signal and switches to a boost mode, or receives a buck mode control signal and switches to a buck mode; (3) The boost / buck charge pump comprises a first port, a second port and a third port. In the boost mode, the charge / discharge circuit of the boost / buck charge pump receives a target boost voltage through the second port, performs a bootstrap boost on the target boost voltage, obtains a second reference voltage, and outputs the second reference voltage from the third port; (4) In the buck mode, the charge and discharge circuit of the boost-buck charge pump receives an input power supply voltage through a first port, steps down the input power supply voltage, obtains a first reference voltage, and outputs it from the second port, wherein the target boost voltage has a preset value and the target boost voltage is less than the input power supply voltage.

16. The voltage management method according to claim 15, characterized in that: Step (3) further includes: in the boost mode, the boost-buck charge pump receives a clock signal, and controls the switching state of the switches in the switch array of the boost-buck charge pump according to the phase sequence time reference of the clock signal, so as to control the charge and discharge circuit of the boost-buck charge pump to bootstrap the target boost voltage, obtain the second reference voltage and output it.

17. The voltage management method according to claim 16, wherein: The phase sequence time reference includes a first boost phase sequence and a second boost phase sequence; In the first boost phase sequence, the boost and buck charge pump controls the charge and discharge circuit to receive the target boost voltage for charging; In the second boost phase sequence, the boost and buck charge pump obtains and outputs the second reference voltage; The time of the first boost phase sequence and the time of the second boost phase sequence are in a first preset ratio.

18. The voltage management method according to claim 15, characterized in that: Step (4) further includes: in the buck mode, the boost-buck charge pump receives a clock signal, and controls the switching state of the switches in the switch array of the boost-buck charge pump according to the phase sequence time reference of the clock signal, so as to control the charge and discharge circuit of the boost-buck charge pump to step down the input power supply voltage, obtain the first reference voltage and output it.

19. The voltage management method according to claim 18, wherein: The phase sequence time reference also includes a first step-down phase sequence and a second step-down phase sequence; In the first step-down phase sequence, the step-up and step-down charge pump controls the charge-discharge circuit to receive the input power supply voltage VIN for discharge; In the second step-down phase sequence, the step-up and step-down charge pump acquires and outputs the first reference voltage; The time of the first voltage reduction phase sequence and the time of the second voltage reduction phase sequence are in a second preset ratio.

20. The voltage management method according to claim 19, wherein: Step (4) further includes: in the buck mode, the step-up / step-down charge pump compares the first reference voltage obtained by it with a reference voltage, and outputs a first control signal based on a first comparison result to control all switches in the switch array to be disconnected.

21. The voltage management method according to claim 20, characterized in that: Step (4) further includes: the step-up and step-down charge pump further outputs a second control signal based on the second comparison result to control the switches in the switch array to operate according to the first step-down phase sequence and the second step-down phase sequence, thereby realizing closed-loop control and making the first reference voltage dynamically equal to the reference voltage.

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