Lossless synchronous absorption circuit, boost and buck switching power supply circuit
By using the charging and discharging loops in the lossless synchronous absorption circuit, the problem of peak voltage when the switching device is turned off is solved, achieving lossless absorption and common-mode interference suppression, thereby improving the efficiency and layout flexibility of the switching power supply.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- NINGBO BEILUN LINYU ELECTRONIC TECH CO LTD
- Filing Date
- 2018-11-05
- Publication Date
- 2026-05-29
Smart Images
Figure CN109167511B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of switching power supply technology, and in particular to a lossless synchronous absorption circuit, a boost switching power supply circuit, and a buck switching power supply circuit. Background Technology
[0002] In the field of switching power supply technology, the main component of a switching power supply is a switching device. Since the switching device needs to be connected to other components and circuits through wires in the power supply circuit, and the wires and even the pins of the switching device have parasitic inductance, the length and width of the wires in the connection circuit of the switching device affect the magnitude of the parasitic inductance. At the same time, the layout and routing of the wires on the printed circuit board also affect the magnitude of the parasitic inductance. Figure 1 This is a simplified schematic diagram of the output circuit of a switching device. Please refer to it. Figure 1 Switching device Q1 forms a current loop with capacitor C1 through a wire. Due to the parasitic inductance of the wire, the pins of switching device Q1, and even the pins of capacitor C1. Figure 2 The diagram shows the equivalent circuit diagram of the parasitic inductance in the output circuit of a switching device. The series circuit of switching device Q1 includes parasitic inductors Ls1 and Ls2, and the parasitic capacitance Coss of switching device Q1 is connected across its terminals. When switching device Q1 is off, due to the characteristic that the current across parasitic inductors Ls1 and Ls2 cannot change abruptly, the current i of the parasitic inductors charges the parasitic capacitance Coss of switching device Q1. This charging causes a voltage spike at the output terminal of switching device Q1. If the high voltage spike exceeds the rated voltage of switching device Q1, it will cause switching device Q1 to break down and be damaged. The switching on or off of switching device Q1 is controlled by a pulse drive signal.
[0003] To suppress the voltage spikes generated when the switching device is off, an absorption circuit needs to be connected in parallel at the output of the switching device. Figure 3 This is a schematic diagram of a parallel absorption circuit at the output of a switching device. Figure 4 This is a schematic diagram of the current loop of the equivalent circuit of the parasitic inductance in the output circuit of the switching device when the switching device is turned on. Figure 5 This is a schematic diagram of the current loop of the equivalent circuit of the parasitic inductance in the output circuit of the switching device when the switching device is off. Please refer to it. Figure 4 The working principle of switching device Q1 is as follows: When switching device Q1 is turned on, the current i passes through the parasitic inductance Ls1, switching device Q1, and parasitic inductance Ls2 to form a conducting loop. Please refer to [reference needed]. Figure 5When the switching device Q1 is turned off, the circuit is opened. Since the currents across the parasitic inductors Ls1 and Ls2 cannot change abruptly, the current forms a conduction loop through the absorption circuit of parasitic inductor Ls1 and parasitic inductor Ls2, without passing through the switching device Q1. Thus, the voltage spikes caused by the parasitic inductors are suppressed by the absorption circuit.
[0004] Commonly used snubber circuits in existing technologies are RC snubber circuits and RCD snubber circuits. The basic working principle of these snubber circuits is to provide bypass commutation for the switching device when it is off, absorbing the energy stored in the parasitic inductance and clamping the voltage at the output of the switching device, thereby suppressing voltage spikes. While this approach has some effect in reducing the amplitude of voltage spikes in the switching power supply, the energy of the reduced spikes needs to be converted into a large amount of heat by the resistors in the circuit, reducing the switching efficiency of the power supply. In other words, the presence of resistors constitutes a lossy snubber circuit. Furthermore, to avoid increasing the losses in the snubber circuit, the selection of the snubber capacitor's capacitance is limited, thus restricting the ability to suppress voltage spikes.
[0005] Therefore, in some switching power supply topologies, based on the advantages of device size and layout, resistors can be removed and capacitors can be used as lossless absorption circuits, such as in boost switching power supply circuits. Figure 6 This is the circuit schematic for a Boost switching power supply. Please refer to it. Figure 6 The Boost switching power supply includes an input terminal Vi and an output terminal Vo. A filter capacitor C1 and a switching device Q1 are connected in parallel at the input terminal Vi. A power inductor L1 is connected between the positive terminal of the input terminal Vi and the positive output terminal of the switching device Q1. A freewheeling diode D1 is connected in a forward direction between the positive terminal of the output terminal Vo and the positive output terminal of the switching device Q1. A snubber capacitor Cs is connected in parallel between the output terminals of the switching device Q1, with its positive terminal connected to the cathode of the freewheeling diode D1. A bus capacitor Cbus is connected in parallel between the output terminals Vo. When the switching device Q1 is off, the diode D1 and the snubber capacitor Cs form a snubber circuit.
[0006] The working principle of a Boost switching power supply is as follows: Figure 7 This is a schematic diagram of the current loop in a Boost switching power supply when the switching device is turned on. Please refer to it. Figure 7 When the switching device Q1 is turned on, the current in the power inductor L1 flows through the positive and negative terminals of the output of the switching device Q1 back to the negative terminal of the filter capacitor C1, thus storing energy in the power inductor L1. At this time, the absorption circuit is not connected.
[0007] Figure 8 This is a schematic diagram of the charging current loop of a Boost switching power supply when the switching devices are off. Please refer to it. Figure 8When switching device Q1 is open, it is in an open-circuit state. The freewheeling diode D1 and the absorption capacitor Cs form a charging circuit, where the arrow indicates the current direction. The current i from the power inductor L1 returns to the negative terminal of the input Vi via the freewheeling diode D1 and the absorption capacitor Cs, forming a conducting loop. At this time, the energy of the spike voltage generated by the equivalent parasitic inductance and / or power inductor L1 when switching device Q1 is open is absorbed by the absorption capacitor Cs, thus suppressing the spike voltage generated across switching device Q1. Simultaneously, the freewheeling diode D1 and the bus capacitor Cbus form a power circuit. Please refer to [reference needed]. Figure 8 The power inductor L1 charges the bus capacitor Cbus after commutation through diode D1. Therefore, the freewheeling diode D1 is shared in both the absorption and power circuits, requiring good reverse recovery characteristics and low junction voltage to ensure circuit performance and reliability. Specifically, this circuit configuration requires that the switching device Q1 and diode D1 be placed close together in the structural layout, and the parasitic inductance from the device packaging must be small; otherwise, lossless absorption cannot be achieved using this circuit.
[0008] Figure 9 This is a schematic diagram of the current loop when the snubber capacitor in a Boost switching power supply discharges. Please refer to it. Figure 9 Because the connection between the absorption capacitor Cs and the bus capacitor Cbus forms a charging and discharging circuit, when the voltage VCs across the absorption capacitor is greater than the voltage VCbus across the bus capacitor Cbus due to the peak voltage energy obtained by the absorption capacitor during charging (i.e., VCs>VCbus), the absorption capacitor Cs discharges to charge the bus capacitor Cbus, so that the voltage energy of the absorption capacitor is fed back to the bus capacitor, realizing the lossless absorption of voltage energy, as shown by the arrow in the figure indicating the direction of current.
[0009] Figure 10 yes Figure 9 For the equivalent diagram of common-mode interference in the charging circuit, please refer to [reference needed]. Figure 10The equivalent capacitances of the switching device Q1 to ground are CY1 and CY2, respectively. The equivalent capacitances of the absorption capacitor Cs to ground are CY3 and CY4, respectively. The junction capacitance of the freewheeling diode D1 is Cd1. Since the reference ground of the absorption capacitor Cs is the system ground, and the potential between the system ground and the ground is fixed, the potential of the absorption capacitor Cs to ground will not change. That is, the voltages of capacitors CY3 and CY4 are constant values and will not change with time. Therefore, the current flowing through capacitors CY3 and CY4 to ground is 0, i.e., i3 = i4 = 0. VCY2 = VCY3 is also a constant value, so the current flowing through capacitor CY2 is i2 = -i3 = 0. For the loop of capacitor CY1, freewheeling diode D1, and capacitor CY4, we get VCY1 + VD1(VCd1) + VCY4 = 0. Since VCY4 is a constant value, i1 = CY1 × d(VD1) / dt = -CY1 × d(VD1) / dt. Since d(VD1)≠0 during the switching process of switching device Q1, i1≠0, i1+i2=i1≠0, therefore, there is a current to ground when switching device Q1 is switching, that is, there is common-mode interference. Summary of the Invention
[0010] The technical problem to be solved by the present invention is to overcome the above-mentioned shortcomings and provide a lossless synchronous absorption circuit to suppress the spike voltage generated when the switching device is turned off, so as to achieve lossless absorption and suppression of common-mode interference.
[0011] To address the aforementioned technical problems, this invention provides a lossless synchronous absorption circuit, comprising a first diode, a bus capacitor, and a second diode connected in series with a switching device. An absorption capacitor is connected between the common intersection of the cathode of the first diode and the bus capacitor, and the common intersection of the anode of the second diode and the bus capacitor. The switching device is controlled by a pulse drive signal to turn on or off. When the switching device is off, the first diode, the absorption capacitor, and the second diode form a charging circuit, which allows the absorption capacitor to absorb the spike voltage energy generated by the switching device through the first and second diodes. The absorption capacitor and the bus capacitor form a discharging circuit, which discharges the bus capacitor when the voltage absorbed by the absorption capacitor is higher than the voltage of the bus capacitor, so that the voltage energy of the absorption capacitor is fed back to the bus capacitor, achieving lossless absorption of voltage energy.
[0012] Furthermore, in the lossless synchronous absorption circuit provided by the present invention, a resistor and / or an inductor are connected in series in the discharge circuit.
[0013] Furthermore, in the lossless synchronous absorption circuit provided by the present invention, the charging circuit is connected in series with a switching device.
[0014] Furthermore, in the lossless synchronous absorption circuit provided by the present invention, the switching device is a junction field-effect transistor, a bipolar transistor, an insulated gate bipolar transistor, a metal-oxide-semiconductor field-effect transistor, a V-groove field-effect transistor, a diode, a transformer, a thyristor, or an optocoupler.
[0015] Furthermore, in the lossless synchronous absorption circuit provided by the present invention, at least one diode in the charging circuit is replaced by a junction field-effect transistor, a bipolar transistor, an insulated-gate bipolar transistor, a metal-oxide-semiconductor field-effect transistor, or a V-groove field-effect transistor. When replacing at least one diode in the charging circuit, the conduction direction of the junction field-effect transistor, bipolar transistor, insulated-gate bipolar transistor, metal-oxide-semiconductor field-effect transistor, or V-groove field-effect transistor is the same as the current direction of the charging circuit.
[0016] Furthermore, in the lossless synchronous absorption circuit provided by the present invention, the insulated gate bipolar transistor or metal-oxide-semiconductor field-effect transistor integrates a diode.
[0017] Furthermore, in the lossless synchronous absorption circuit provided by the present invention, when at least one diode in the charging circuit is replaced by an insulated-gate bipolar transistor (IGBT) or a metal-oxide-semiconductor field-effect transistor (MOSFET) with an integrated diode, the conduction direction of the IGBT or MOSFET is the same as the current direction of the charging circuit when using the conduction characteristics of the IGBT or MOSFET; and when using the unidirectional conduction characteristics of the diode, the conduction direction of the diode integrated in the IGBT or MOSFET is the same as the current direction of the charging circuit.
[0018] Furthermore, the lossless synchronous absorption circuit provided by the present invention, when the switching device is turned off, the first diode, the bus capacitor and the second diode form a blocking loop to prevent the main power current from being shunted through the blocking loop to charge the bus capacitor.
[0019] To address the aforementioned technical problems, this invention also provides a boost switching power supply circuit, including an input terminal and an output terminal. A filter capacitor and a switching device are connected in parallel between the input terminals, and a bus capacitor is connected in parallel between the output terminals. A power inductor is connected between the positive terminal of the input terminal and the positive terminal of the switching device's output terminal. The circuit also includes a fifth diode forward-biased between the positive terminal of the switching device's output terminal and the positive terminal of the bus capacitor, and a lossless synchronous absorption circuit as described above is connected in parallel between the switching device and the bus capacitor. When the switching device is off, the power inductor, the fifth diode, and the bus capacitor form a power loop, which allows the main power current to charge the bus capacitor through the fifth diode.
[0020] To address the aforementioned technical problems, this invention also provides a step-down switching power supply circuit, including an input terminal and an output terminal. The negative terminal of the input terminal is connected to the negative terminal of the output terminal. A bus capacitor is connected in parallel between the input terminals, and a filter capacitor is connected in parallel between the output terminals. A switching device and a power inductor are connected in series between the positive terminal of the input terminal and the positive terminal of the output terminal. The positive terminal of the switching device is connected to the positive terminal of the input terminal, and the negative terminal of the switching device is connected to the power inductor. The circuit also includes a fifth diode connected in reverse between the common intersection of the negative terminal of the switching device and the power inductor and the negative terminal of the output terminal, and a lossless synchronous absorption circuit as described above connected in parallel between the switching device and the bus capacitor. When the switching device is off, the fifth diode, the power inductor, and the filter capacitor form a power loop, which is used to charge the filter capacitor through the power inductor with the main power current.
[0021] The lossless synchronous absorption circuit, boost switching power supply circuit, and buck switching power supply circuit provided by this invention have charging and discharging circuits that occur simultaneously when the switching device is turned off, and the peak voltage energy absorbed by the absorption capacitor is fed back to the bus capacitor, hence the name lossless synchronous absorption circuit.
[0022] In this invention, a lossless synchronous absorption circuit is connected in parallel between the output terminal of the switching device and the bus capacitor. When the switching device is open, a charging circuit is formed by the first diode, the absorption capacitor, and the second diode. This circuit allows the absorption capacitor to absorb the spike voltage energy generated when the switching device is open and to suppress common-mode interference generated by the switching device. Compared with existing technologies, the current direction of this charging circuit is unidirectional. When the switching device is open, due to the characteristic that the current across the inductor cannot change abruptly, the parasitic inductance of the switching device and the main power inductance current flow through the first diode, the absorption capacitor, and the second diode to form a circuit, thereby charging the absorption capacitor to absorb the spike voltage energy. This effectively suppresses the voltage value of the spike voltage energy and prevents high spike voltage from damaging the switching device. The charging circuit of this invention adopts a symmetrical dual-diode structure, which can effectively suppress common-mode interference generated by the switching device. Since this invention is a lossless absorption method, there are no restrictions on the value of the absorption capacitor in the charging circuit. The larger the capacitance value, the stronger the ability to suppress the spike voltage of the switching device, thus effectively solving the problem of spike voltage. The absorption circuit of the present invention is designed independently for each switching device, thus breaking through the limitation that the switching devices must be laid out in a compact layout, thereby making the layout of each switching device more flexible and more conducive to the design of diversified product layouts.
[0023] The lossless synchronous absorption circuit and switching power supply circuit provided by the present invention form a discharge circuit consisting of an absorption capacitor and a bus capacitor when the switching device is turned off. When the voltage absorbed by the absorption capacitor is higher than the voltage of the bus capacitor, the absorption capacitor discharges to the bus capacitor so that the voltage energy of the absorption capacitor is fed back to the bus capacitor, thereby achieving lossless absorption of voltage energy. Attached Figure Description
[0024] Figure 1 It is a simplified schematic diagram of the output circuit of a switching device;
[0025] Figure 2 It is a schematic diagram of the equivalent circuit of the parasitic inductance of the output circuit of the switching device;
[0026] Figure 3 This is a schematic diagram of a parallel absorption circuit at the output of a switching device;
[0027] Figure 4 This is a schematic diagram of the current loop of the parasitic inductance equivalent circuit of the output circuit of the switching device when the switching device is turned on.
[0028] Figure 5 This is a schematic diagram of the current loop of the parasitic inductance equivalent circuit of the output circuit of the switching device when the switching device is turned off.
[0029] Figure 6 This is the schematic diagram of a Boost switching power supply circuit.
[0030] Figure 7 This is a schematic diagram of the current loop of a Boost switching power supply when the switching device is turned on.
[0031] Figure 8 This is a schematic diagram of the charging current loop of a Boost switching power supply when the switching device is turned off.
[0032] Figure 9 This is a schematic diagram of the discharge current loop of a Boost switching power supply when the switching device is turned off;
[0033] Figure 10 This is the equivalent circuit diagram of common-mode interference to ground in a traditional absorption circuit.
[0034] Figure 11 This is a schematic diagram of the absorption circuit according to an embodiment of the present invention;
[0035] Figure 12 This is a schematic diagram of the current loop of the absorption circuit in an embodiment of the present invention when the switching device is turned on;
[0036] Figure 13 This is a schematic diagram of the charging current loop of the absorption circuit in an embodiment of the present invention when the switching device is turned off;
[0037] Figure 14 This is a schematic diagram of the discharge current loop of the absorption circuit in an embodiment of the present invention when the switching device is turned off;
[0038] Figure 15 This is a schematic diagram of the blocking loop of the absorption circuit in an embodiment of the present invention when the switching device is turned off;
[0039] Figure 16 This is a schematic diagram of the boost switching power supply circuit according to an embodiment of the present invention;
[0040] Figure 17 This is a schematic diagram of the step-down switching circuit according to an embodiment of the present invention;
[0041] Figures 18 to 20 This is a schematic diagram of the charging circuit of the absorption circuit in an embodiment of the present invention, in which an insulated gate bipolar transistor or a metal-oxide-semiconductor field-effect transistor is used instead of a diode.
[0042] Figure 21 This is a schematic diagram of the series diode in the charging circuit of the absorption circuit in an embodiment of the present invention;
[0043] Figure 22 This is a schematic diagram of the discharge circuit of the absorption circuit in an embodiment of the present invention, which uses an inductor.
[0044] Figure 23 This is a schematic diagram of the discharge circuit of the absorption circuit of the present invention, which uses a resistor.
[0045] Figure 24 This is an equivalent circuit diagram of the common-mode interference to ground in the charging circuit of an embodiment of the present invention. Detailed Implementation
[0046] The present invention will now be described in detail with reference to the accompanying drawings:
[0047] Example 1
[0048] Please refer to Figure 11 Embodiment 1 of the present invention provides a lossless synchronous absorption circuit, including a first diode Ds1, a bus capacitor Cbus, and a second diode Ds2 connected in series with a switching device Q1. An absorption capacitor Cs1 is connected between the common intersection of the cathode of the first diode Ds1 and the bus capacitor Cbus and the common intersection of the anode of the second diode Ds2 and the bus capacitor Cbus. The switching device is controlled by a pulse drive signal to turn on or off. That is, the lossless synchronous absorption circuit composed of the first diode Ds1, the bus capacitor Cbus, the second diode Ds2, and the absorption capacitor Cs1 is connected in parallel across the two ends of the switching device Q1.
[0049] Please refer to Figure 11The switching device Q1 can be a field-effect transistor. Its specific connection relationship is as follows: the drain of the switching device Q1 is connected to the anode of the first diode Ds1, the first diode Ds1 is connected to one end of the bus capacitor Cbus, the other end of the bus capacitor Cbus is connected to the anode of the second diode Ds2, the cathode of the second diode Ds2 is connected to the source of the switching device Q1, and the gate of the switching device Q1 is connected to the pulse drive signal.
[0050] Please refer to Figure 12 When the switching device Q1 is turned on, the current i forms a conduction loop through the switching device Q1.
[0051] Please refer to Figure 13 When the switching device Q1 is turned off, the first diode Ds1, the absorption capacitor Cs1, and the second diode Ds2 form a charging circuit to allow the absorption capacitor Cs1 to absorb the voltage spike energy generated when the switching device Q1 is turned off. In this embodiment of the invention, the current direction of the charging circuit is unidirectional. When the switching device Q1 is turned off, due to the characteristic that the current across the inductor cannot change abruptly, the parasitic inductance of the switching device Q1 and the main power inductance are charged through the circuit formed by the first diode Ds1, the absorption capacitor Cs1, and the second diode Ds2, thereby charging the absorption capacitor Cs1 to absorb the voltage spike energy, thus suppressing the voltage spike energy and preventing high voltage spikes from damaging the switching device Q1. Compared with the prior art, the charging circuit of this invention is a symmetrical dual-diode structure, that is, the first diode Ds1 and the second diode Ds2 are symmetrically arranged, and the specifications of the first diode Ds1 and the second diode Ds2 are the same. This not only suppresses voltage spikes, but the dual-diode structure also effectively suppresses common-mode interference generated by the switching device. Secondly, by selecting the energy storage capacity of the absorption capacitor Cs1, the charging circuit of this embodiment can effectively limit the peak voltage value to a safer range. Thirdly, because the absorption circuit is implemented individually for each switching device and is lossless, the limitation of requiring compact layout and wiring between the switching devices can be overcome.
[0052] Please refer to Figure 14 When the switching device Q1 is off, the absorption capacitor Cs1 and the bus capacitor Cbus form a discharge circuit. When the voltage absorbed across the absorption capacitor Cs1 is higher than the voltage across the bus capacitor Cbus (i.e., VCs1 > VCbus), the absorption capacitor Cs1 discharges onto the bus capacitor Cbus, allowing the voltage energy of the absorption capacitor Cs1 to be fed back to the bus capacitor Cbus, achieving lossless absorption of voltage energy while reducing the voltage energy of the absorption capacitor. Therefore, the lossless synchronous absorption circuit provided in Embodiment 1 of this invention has a better effect on absorbing peak voltage energy.
[0053] Please refer to Figure 15When switching device Q1 is open, the first diode Ds1, the bus capacitor Cbus, and the second diode Ds2 form a blocking loop to prevent the main power current from being shunted through the blocking loop to charge the bus capacitor Cbus. The impedance, inductive reactance, or loop voltage drop of the blocking loop is greater than the impedance, inductive reactance, or loop voltage drop of the corresponding main power current loop. Because the blocking loop and the main power current loop are connected in parallel, the function of the blocking loop is to prevent the main power current from entering the bus capacitor through the absorption loop. For example, in this embodiment of the invention, two identical diodes are used, and their total voltage drop is greater than the voltage drop of a freewheeling diode in a conventional power loop. Therefore, the voltage drop of the blocking loop in this embodiment of the invention is greater than the loop voltage drop of the main power loop, thus achieving the blocking effect. In other words, for the blocking loop to be inactive, a voltage value greater than the sum of the voltage drops of the two diodes must be present when switching device Q1 is open to trigger the blocking loop to conduct. Therefore, in order to avoid triggering the conduction of the blocking loop, the impedance, inductive reactance, or loop voltage drop of the blocking loop must be greater than the impedance, inductive reactance, or loop voltage drop of the main power current loop.
[0054] Compared with the prior art, the present invention separates the main power circuit and the absorption circuit through the barrier circuit. The main power current circuit and the absorption circuit are independent of each other and do not share the freewheeling diode to charge the absorption capacitor Cs1 and the bus capacitor Cbus at the same time. The absorption circuit does not bear a large power, avoiding the influence of the high power circuit on the absorption circuit. At the same time, due to the circuit separation, the selection of main power devices is more flexible and is not affected by the function of the absorption circuit, thus protecting the reliability of the absorption circuit.
[0055] The lossless synchronous absorption circuit provided in Embodiment 1 of the present invention has a charging circuit and a discharging circuit that are performed simultaneously when the switching device Q1 is turned off, and the peak voltage energy absorbed by the absorption capacitor is fed back to the bus capacitor, hence it is called a lossless synchronous absorption circuit.
[0056] In Embodiment 1 of this invention, the switching device Q1 can be a junction field-effect transistor (JFET), a bipolar transistor (BJT), an insulated-gate bipolar transistor (IGBT), a metal-oxide-semiconductor field-effect transistor (MOSFET), or a vertical metal-oxide-semiconductor field-effect transistor (V-groove MOSFET).
[0057] The switching device Q1 can be one or more of the following: a junction field-effect transistor (JFET), a bipolar junction transistor (BJT), an insulated-gate bipolar transistor (IGBT), a metal-oxide-semiconductor field-effect transistor (MOSFET), or a vertical metal-oxide-semiconductor (VMOS). Its substrate can be silicon, germanium, or even gallium nitride or similar substrates. A diode can also be integrated in reverse between the drain and source of the IGBT or the collector and emitter of the IGBT or MOSFET. In this case, the base or gate of the IGBT or MOSFET is controlled by a pulse drive signal to turn the IGBT or MOSFET on or off. When the switching device is a junction field-effect transistor (JFET), bipolar junction transistor (BJT), insulated-gate bipolar transistor (IGBT), metal-oxide-semiconductor field-effect transistor (MOSFET), or vertical metal-oxide-semiconductor field-effect transistor (VMOS), its conduction state is the on state, and its cutoff state is the off state. Taking a metal-oxide-semiconductor field-effect transistor as an example, the drain of the MOSFET is connected to the cathode of the integrated diode, and the source of the MOSFET is connected to the anode of the integrated diode. When a metal-oxide-semiconductor field-effect transistor without an integrated diode is selected as the switching device, a diode can be connected in reverse parallel between the output terminals of the MOSFET. In other words, a metal-oxide-semiconductor field-effect transistor with an integrated diode can be a single semiconductor device or two discrete semiconductor devices connected by wires. When the switching device Q1 is a metal-oxide-semiconductor field-effect transistor (MOSFET) with a reverse integrated diode, the related circuitry does not require separate placement and wiring of the reverse integrated diode during printed circuit board (PCB) layout. Therefore, it offers advantages such as simplified layout and wiring, reduced component count, and reduced soldering processes. Since the purpose of the switching device Q1 is a MOSFET is to achieve on / off switching characteristics, any MOSFET with switching characteristics can be used. For example, the gate and source pins of the MOSFET can be shorted, using the switching characteristics of a diode as the switching device.For example, a metal-oxide-semiconductor field-effect transistor (MOSFET) with an integrated reverse diode, as described above, utilizes the unidirectional conduction characteristic of a diode as a switch. The integrated diode in a MOSFET is chosen partly because the unidirectional conduction characteristic of a diode might be required, and partly to accommodate more device designs. When the switching device Q1 is a reverse-biased MOSFET with an integrated diode, it can have two conduction directions. Please refer to the relevant documentation to select which direction to conduct based on the current flow direction. Figure 11 When the switching device Q1 is turned on downwards, the conduction characteristics of a metal-oxide-semiconductor field-effect transistor are used. When the switching device Q1 is turned on upwards, the unidirectional conduction characteristics of a reverse-integrated diode are used.
[0058] As a variation, the lossless synchronous absorption circuit provided in Embodiment 1 of the present invention may include a resistor, an inductor, and / or a diode connected in series in the charging circuit. Please refer to... Figure 21 , Figure 21 The example illustrates a scheme where two diodes are connected in series in the charging circuit, i.e., an additional diode is added to connect with... Figure 11 The schemes in the diagram are distinguished by the two diodes connected in series, denoted as Ds11 and Ds12, respectively. In this embodiment of the invention, the components in the charging circuit must be positioned close together on the printed circuit board (PCB), and the wires must be as short as possible to reduce parasitic inductance in the charging circuit, thereby reducing peak voltage energy. When resistors, inductors, and / or diodes are connected in series in the charging circuit, the same close proximity is required.
[0059] As another variation, the discharge circuit can also have a resistor and / or inductor connected in series. The inductor can be the parasitic inductance of the wire connection. In the discharge circuit, the positional relationship between the components is unaffected and close proximity is not required. Please refer to [reference needed]. Figure 11 , Figure 22 and Figure 23 An inductor L2 or a resistor R1 is connected in series in the discharge circuit. At this time, the inductor L2 and the resistor R1 act as a connection to form a current loop.
[0060] The above modifications can be performed individually or in combination, with the aim of expanding and supplementing the lossless synchronous absorption circuit of the embodiments of the present invention.
[0061] Please refer to Figure 16This invention also provides a boost switching power supply circuit, including an input terminal Vi and an output terminal Vo. A filter capacitor C1 and a switching device Q1 are connected in parallel between the input terminals Vi and Vo. A bus capacitor Cbus is connected in parallel between the output terminals Vo. A power inductor L1 is connected between the positive terminal of the input terminal Vi and the positive terminal of the output terminal Vo of the switching device Q1. The circuit also includes a fifth diode D5 forward-biased between the positive terminal of the output terminal Vo of the switching device Q1 and the positive terminal of the bus capacitor Cbus. Furthermore, it includes a lossless synchronous absorption circuit as described above, connected in parallel between the switching device Q1 and the bus capacitor Cbus. When the switching device Q1 is off, the power inductor L1, the fifth diode D5, and the bus capacitor Cbus form a complete circuit. The power circuit is used to charge the bus capacitor Cbus through the fifth diode D5. When the switching device Q1 is open, the first diode Ds1, the absorption capacitor Cs1, and the second diode Ds2 form a charging circuit, which allows the absorption capacitor Cs1 to absorb the peak voltage energy generated when the switching device Q1 is open. When the switching device Q1 is open, the absorption capacitor Cs1 and the bus capacitor Cbus form a discharging circuit. When the voltage absorbed across the absorption capacitor Cs1 is higher than the voltage across the bus capacitor Cbus (i.e., VCs1 > VCbus), the absorption capacitor Cs1 discharges the bus capacitor Cbus, so that the voltage energy of the absorption capacitor Cs1 is fed back to the bus capacitor Cbus, achieving lossless absorption of voltage energy. At this time, the first diode Ds1, the bus capacitor Cbus, and the second diode Ds2 form an obstacle circuit, preventing the main power current of the power circuit from being shunted through the obstacle circuit to charge the bus capacitor Cbus.
[0062] Please refer to Figure 17This invention also provides a buck switching power supply circuit, including an input terminal Vi and an output terminal Vo. The negative terminal of the input terminal Vi is connected to the negative terminal of the output terminal Vo. A bus capacitor Cbus is connected in parallel between the input terminals Vi, and a filter capacitor C1 is connected in parallel between the output terminals Vo. A switching device Q1 and a power inductor L1 are connected in series between the positive terminal of the input terminal Vi and the positive terminal of the output terminal Vo. The positive terminal of the output terminal Vo of the switching device Q1 is connected to the positive terminal of the input terminal Vi. The output terminal Vo of switch Q1 is connected to the power inductor L1. It also includes a fifth diode D5 connected in reverse between the common intersection of the output terminal Vo of switch Q1 and the power inductor L1 and the output terminal Vo of switch Q1, and a lossless synchronous absorption circuit as described above connected between switch Q1 and bus capacitor Cbus. When switch Q1 is turned off, the fifth diode D5, power inductor L1 and filter capacitor C1 form a power loop to charge filter capacitor C1 through power inductor L1. At this time, the first diode Ds1, the bus capacitor Cbus, and the second diode Ds2 form an obstruction circuit, preventing the main power current of the power circuit from being shunted through the obstruction circuit to charge the bus capacitor Cbus. When the switching device Q1 is open, the first diode Ds1, the absorption capacitor Cs1, and the second diode Ds2 form a charging circuit, which is used to allow the absorption capacitor Cs1 to absorb the peak voltage energy generated when the switching device Q1 is open. When the switching device Q1 is open, the absorption capacitor Cs1 and the bus capacitor Cbus form a discharge circuit. When the voltage absorbed across the absorption capacitor Cs1 is higher than the voltage across the bus capacitor Cbus, i.e., VCs1>VCbus, the absorption capacitor Cs1 discharges the bus capacitor Cbus, so that the voltage energy of the absorption capacitor Cs1 is fed back to the bus capacitor Cbus, realizing lossless absorption of voltage energy.
[0063] As a preferred embodiment, the lossless synchronous absorption circuit provided in Embodiment 1 of the present invention uses a non-inductive capacitor Cs1 and a non-inductive diode. A non-inductive capacitor is defined as a capacitor with no leads or very short leads. A non-inductive diode is defined as a diode with no leads or very short leads. The use of non-inductive capacitors or diodes is to reduce parasitic inductance in the current loop and lower peak voltage energy.
[0064] Example 2
[0065] Embodiment 2 of the present invention is an improvement on Embodiment 1. The difference lies in that at least one of the first diode Ds1 and the second diode Ds2 in the charging circuit is replaced by a junction field-effect transistor, a bipolar transistor, an insulated-gate bipolar transistor, a metal-oxide-semiconductor field-effect transistor, or a V-groove field-effect transistor. When replacing at least one diode in the charging circuit, the conduction direction of the junction field-effect transistor, bipolar transistor, insulated-gate bipolar transistor, metal-oxide-semiconductor field-effect transistor, or V-groove field-effect transistor is the same as the current direction of the charging circuit.
[0066] The insulated-gate bipolar transistor (IGBT) or metal-oxide-semiconductor field-effect transistor (MOSFET) may integrate a diode. When at least one diode in the charging circuit is replaced by an IGBT or MOSFET with an integrated diode, the conduction direction of the IGBT or MOSFET is the same as the current direction of the charging circuit when using the conduction characteristics of the IGBT or MOSFET; when using the unidirectional conduction characteristics of the diode, the conduction direction of the diode integrated in the IGBT or MOSFET is the same as the current direction of the charging circuit. Please refer to [reference needed]. Figure 11 , Figure 18 and Figure 19 In Embodiment 2 of the present invention, the first diode Ds1 in Embodiment 1 is replaced by a first insulated gate bipolar transistor or a metal-oxide-semiconductor field-effect transistor Qs1 that integrates a diode. Figure 18 The diode in the first insulated-gate bipolar transistor (IGBT) or metal-oxide-semiconductor field-effect transistor (MOSFET) Qs1, which integrates a diode, is used to achieve unidirectional conduction, ensuring that the conduction direction of the diode in Qs1 is the same as the current direction of the charging circuit. At this time, the base or gate of the first IGBT or MOSFET Qs1 can be left floating or connected to a low level. Figure 19 When using the switching characteristics of an insulated-gate bipolar transistor (IGBT) or metal-oxide-semiconductor field-effect transistor (MOSFET) with an integrated diode, the conduction direction of the IGBT or MOSFET is the same as the current direction of the charging circuit. At this time, the base or gate of the first IGBT or MOSFET Qs1 with the integrated diode is controlled by an external pulse drive signal to turn the IGBT or MOSFET Qs1 on or off.
[0067] Please refer to Figure 20In Embodiment 2 of the present invention, the first diode Ds1 and the first diode Ds2 in Embodiment 1 can be completely replaced. For example, a first insulated-gate bipolar transistor or metal-oxide-semiconductor field-effect transistor Qs1 with an integrated diode can be used to replace the first diode Ds1, and a second insulated-gate bipolar transistor or metal-oxide-semiconductor field-effect transistor Qs2 with an integrated diode can be used to replace the second diode Ds2. In this case, the conduction direction of the replaced insulated-gate bipolar transistor or metal-oxide-semiconductor field-effect transistor must be the same as the current direction of the charging circuit.
[0068] In this embodiment of the invention, the bus capacitor Cbus, also known as the bus capacitor Cbus, includes input type and output type. The input type refers to being connected in parallel at the input terminal, and the output type refers to being connected in parallel at the output terminal.
[0069] This invention primarily addresses bridge arm transistors. A bridge arm transistor refers to a closed loop consisting of at least two switching devices and at least one voltage source; in this loop structure, the switching devices are called bridge arm transistors. Please refer to [reference needed]. Figure 6 Switching device Q1 is connected to diode D1 and bus capacitor Cbus (which is essentially a voltage source) to form a closed loop. This loop consists of only two switching devices (Q1 and D1) and one voltage source (Cbus), satisfying the definition requirements for a bridge arm transistor loop. Therefore, both Q1 and D1 are bridge arm transistors. Similarly, please refer to [the relevant documentation]. Figure 11 This is the absorption circuit mentioned in this invention. The switching device Q1 is connected to the bus capacitor Cbus (which is essentially a voltage source) through the first diode Ds1 and the second diode Ds2 to form a loop, which also meets the requirements of the bridge arm transistor loop definition. Therefore, these transistors (Q1, Ds1 and Ds2) also belong to the bridge arm transistors.
[0070] Figure 24 This is an equivalent circuit diagram of the common-mode interference to ground in the charging circuit of this invention embodiment. Please refer to it. Figure 24 The equivalent capacitances of the switching device Q1 to ground are CY1 and CY2, respectively. The equivalent capacitances of the absorption capacitor Cs to ground are CY3 and CY4, respectively. The junction capacitance of the first diode Ds1 is Cd1, and the junction capacitance of the second diode Ds2 is Cd2. Since the absorption capacitor Cs is referenced to ground at the system ground level, and the potential between the system ground and the earth is relatively constant, that is, the voltages of capacitors CY3 and CY4 are fixed, the current flowing through capacitors CY3 and CY4 to ground is 0, i.e., i3 = i4 = 0. For the loop of capacitor CY2, the second diode Ds2, and capacitor CY3, based on the loop voltage being 0, we get:
[0071] VCY2-VDs2-VCY3=0 (Formula 1).
[0072] For the loop consisting of capacitor CY1, first diode Ds1, and capacitor CY4, the loop voltage is 0, resulting in:
[0073] VCY1+VDs1-VCY4=0 (Formula 2).
[0074]
[0075]
[0076] Substituting Formula 1 into Formula 4 and Formula 2 into Formula 3, we get the following results:
[0077]
[0078]
[0079] Since the voltages of CY3 and CY4 are constant, d(VCY3) = 0 and d(VCY4) = 0. Simplifying equations 5 and 6 respectively, we get:
[0080]
[0081]
[0082] Since the currents in Ds1 and Ds2 are the same in the absorption loop, if Ds1 and Ds2 use the same type of device, their parasitic parameters will be the same, and the voltage drop generated under the same current will also be the same, i.e., VDs1 = VDs2. The parasitic capacitance to ground will also be the same, i.e., CY1 = CY2. Therefore, we get:
[0083]
[0084] As can be seen from Formula 9, the charging circuit of this embodiment of the invention uses a symmetrical diode structure, which can suppress common-mode interference generated by the two ends of the switching device to the ground.
[0085] The lossless synchronous absorption circuit provided in this embodiment of the invention is applicable to uninterruptible power supplies (UPS), inverters, wireless charging and other switching or non-switching power supplies.
[0086] This invention is not limited to the specific embodiments described above. All variations and modifications made within the spirit and scope of the claims of this invention are within the protection scope of this invention.
Claims
1. A lossless synchronous absorption circuit, characterized in that, The system includes a first diode, a bus capacitor, and a second diode connected in series with a switching device. An absorption capacitor is connected between the common intersection of the cathode of the first diode and the bus capacitor, and the common intersection of the anode of the second diode and the bus capacitor. The switching device is controlled by a pulse drive signal. The first diode Ds1 and the second diode Ds2 are symmetrically arranged and have the same specifications. When the switching device is off, the first diode, the absorption capacitor, and the second diode form a charging circuit, which allows the absorption capacitor to absorb the peak voltage energy generated by the switching device through the first and second diodes. The absorption capacitor and the bus capacitor form a discharging circuit, which discharges the bus capacitor when the voltage absorbed by the absorption capacitor is higher than the voltage of the bus capacitor, so that the voltage energy of the absorption capacitor is fed back to the bus capacitor, achieving lossless absorption of voltage energy. The first diode, the bus capacitor, and the second diode form a blocking loop to prevent the main power current from being shunted through the blocking loop to charge the bus capacitor. The impedance, inductive reactance, or loop voltage drop of the blocking loop is greater than the impedance, inductive reactance, or loop voltage drop of the main power current loop.
2. The lossless synchronous absorption circuit as described in claim 1, characterized in that, A resistor and / or an inductor are connected in series in the discharge circuit.
3. The lossless synchronous absorption circuit as described in claim 1, characterized in that, The charging circuit is connected in series with a switching device.
4. The lossless synchronous absorption circuit as described in claim 1 or 3, characterized in that, The switching device is a junction field-effect transistor, a bipolar transistor, an insulated gate bipolar transistor, a metal-oxide-semiconductor field-effect transistor, a V-groove field-effect transistor, a diode, a transformer, a thyristor, or an optocoupler.
5. The lossless synchronous absorption circuit as described in claim 4, characterized in that, At least one diode in the charging circuit is replaced by a junction field-effect transistor, bipolar transistor, insulated-gate bipolar transistor, metal-oxide-semiconductor field-effect transistor, or V-groove field-effect transistor. When replacing at least one diode in the charging circuit, the conduction direction of the junction field-effect transistor, bipolar transistor, insulated-gate bipolar transistor, metal-oxide-semiconductor field-effect transistor, or V-groove field-effect transistor is the same as the current direction of the charging circuit.
6. The lossless synchronous absorption circuit as described in claim 5, characterized in that, The insulated gate bipolar transistor or metal-oxide-semiconductor field-effect transistor integrates a diode.
7. The lossless synchronous absorption circuit as described in claim 6, characterized in that, When at least one diode in the charging circuit is replaced by an insulated-gate bipolar transistor (IGBT) or a metal-oxide-semiconductor field-effect transistor (MOSFET) with an integrated diode, the conduction direction of the IGBT or MOSFET is the same as the current direction of the charging circuit when using the conduction characteristics of the IGBT or MOSFET; when using the unidirectional conduction characteristics of the diode, the conduction direction of the diode integrated in the IGBT or MOSFET is the same as the current direction of the charging circuit.
8. A boost switching power supply circuit, characterized in that, The device includes an input terminal and an output terminal. A filter capacitor and a switching device are connected in parallel between the input terminals, and a bus capacitor is connected in parallel between the output terminals. A power inductor is connected between the positive terminal of the input terminal and the positive terminal of the output terminal of the switching device. The device also includes a fifth diode forward connected between the positive terminal of the output terminal of the switching device and the positive terminal of the bus capacitor. Furthermore, it includes a lossless synchronous absorption circuit as described in any one of claims 1 to 7 connected in parallel between the switching device and the bus capacitor. When the switching device is off, the power inductor, the fifth diode, and the bus capacitor form a power loop to charge the bus capacitor through the fifth diode using the main power current.
9. A step-down switching power supply circuit, characterized in that, The device includes an input terminal and an output terminal, with the negative terminals of the input and output terminals connected together. A bus capacitor is connected in parallel between the input terminals, and a filter capacitor is connected in parallel between the output terminals. A switching device and a power inductor are connected in series between the positive terminals of the input and output terminals, wherein the positive terminal of the output terminal of the switching device is connected to the positive terminal of the input terminal, and the negative terminal of the output terminal of the switching device is connected to the power inductor. It also includes a fifth diode connected in reverse between the common intersection of the negative terminal of the output terminal of the switching device and the power inductor and the negative terminal of the output terminal, and a lossless synchronous absorption circuit as described in any one of claims 1 to 7 connected in parallel between the switching device and the bus capacitor. When the switching device is off, the fifth diode, the power inductor, and the filter capacitor form a power loop, used to charge the filter capacitor through the power inductor with the main power current.