Encapsulation structure and manufacturing method thereof
By using semiconductor dies, molded compounds, rewiring layers and conductive balls in electronic packaging structures, especially designing joints with pads and ridges, the reliability and efficiency of the packaging structure in the prior art are solved, and efficient chip packaging is achieved.
Patent Information
- Application Number
- CN201810044369.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2017-11-08
- Filing Date
- 2018-01-17
- Publication Date
- 2025-06-24
- Estimated Expiration
- 2039-10-12
AI Technical Summary
Modern electronic packaging requires reliable internal connections between chip-to-package and chip-to-substrate, but the prior art is difficult to achieve efficient process and material use.
A package structure is provided, including a semiconductor die, a molded compound, a rewiring layer and a conductive ball. The rewiring layer includes a joint, at least one of the joints includes a joint pad portion and a ridge portion surrounding the joint pad portion, and the conductive ball contacts the ridge portion protruding from the first surface of the rewiring layer.
Through this package structure, reliable electrical connection and packaging of semiconductor dies are realized, and the reliability and efficiency of packaging are improved.
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Figure CN109755203B_ABST
Abstract
Description
Technical Field
[0001] Embodiments of the present invention relate to a packaging structure and a method of manufacturing the packaging structure. Background Art
[0002] Modern electronic packaging requires reliable interconnections between chip-to-package and chip-to-substrate and requires advanced processes and materials. Summary of the Invention
[0003] Some embodiments of the present invention provide a packaging structure. The packaging structure includes a semiconductor die, a molding compound, a redistribution layer, and conductive balls. The molding compound encapsulates the semiconductor die. The redistribution layer is disposed on and above the semiconductor die and is electrically connected to the semiconductor die. The conductive balls are disposed on a first surface of the redistribution layer and are electrically connected to the semiconductor die. Wherein the redistribution layer includes joints, at least one of the joints includes a pad portion and a ridge portion surrounding the pad portion, and the conductive ball contacts the ridge portion protruding from the first surface of the redistribution layer. Brief Description of the Drawings
[0004] The various aspects of the present disclosure will be best understood by reading the following detailed description in conjunction with the accompanying drawings. It should be noted that, in accordance with standard practice in the industry, the various features are not drawn to scale. In fact, for clarity of discussion, the dimensions of the various features may be arbitrarily increased or decreased.
[0005] Figures 1A to 1F is a schematic cross-sectional view of the stages in a method of manufacturing a connection structure according to some exemplary embodiments of the present disclosure.
[0006] Figures 2A to 2C is a schematic cross-sectional view of the stages in a method of manufacturing a connection structure in a packaging structure according to some exemplary embodiments of the present disclosure.
[0007] Figure 2D is a schematic enlarged top view showing Figure 2B a part of the structure shown.
[0008] Figure 3A is a schematic cross-sectional view of an exemplary packaging structure according to some exemplary embodiments of the present disclosure.
[0009] Figure 3B is a schematic enlarged cross-sectional view of a part of an exemplary packaging structure according to some exemplary embodiments of the present disclosure.
[0010] Figures 4A to 4HIs a schematic cross-sectional view of each stage in a manufacturing method of a connection structure according to some exemplary embodiments of the present disclosure.
[0011] Figures 5A to 5C Is a schematic cross-sectional view of each stage in a manufacturing method of a connection structure in a packaging structure according to some exemplary embodiments of the present disclosure.
[0012] Figure 5D Shows Figure 5B A schematic enlarged top view of a part of the structure shown.
[0013] Figure 6A Is a schematic cross-sectional view of an exemplary packaging structure according to some exemplary embodiments of the present disclosure.
[0014] Figure 6B Is a schematic enlarged cross-sectional view of a part of an exemplary packaging structure according to some exemplary embodiments of the present disclosure.
[0015] Figures 7A to 7I Is a schematic cross-sectional view of each stage in a manufacturing method of a connection structure according to some exemplary embodiments of the present disclosure.
[0016] Figure 8 Is a schematic cross-sectional view of an exemplary packaging structure according to some exemplary embodiments of the present disclosure.
[0017] Figures 9A to 9H Is a schematic cross-sectional view of each stage in a manufacturing method of a connection structure in a packaging structure according to some exemplary embodiments of the present disclosure.
[0018] Figure 10 Is a schematic cross-sectional view of an exemplary packaging structure according to some exemplary embodiments of the present disclosure.
[0019] Figure 11 Is an exemplary flowchart showing the process steps of a manufacturing method for forming a connection structure according to some embodiments of the present disclosure. Detailed Description
[0020] The following disclosure provides many different embodiments or examples for implementing different features of the provided subject matter. Specific examples of components, values, operations, materials, arrangements, etc. are set forth below to simplify the present disclosure. Of course, these are merely examples and are not intended to be limiting. Other components, values, operations, materials, arrangements, etc. are contemplated. For example, forming a first feature "on" or "above" a second feature in the following description may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features such that the first and second features may not be in direct contact. Additionally, the present disclosure may repeat reference numerals and / or letters in various examples. This repetition is for the purpose of simplicity and clarity and does not in itself indicate a relationship between the various embodiments and / or configurations discussed.
[0021] In addition, for ease of illustration, spatially relative terms such as "beneath", "below", "lower", "above", "upper", etc. may be used herein to describe the relationship of one element or feature shown in the figures to another (other) element or feature. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may have other orientations (rotated 90 degrees or other orientations), and the spatially relative terms used herein may be interpreted accordingly.
[0022] Figures 1A to 1F is a schematic cross-sectional view of each stage in a method of manufacturing a connection structure according to some exemplary embodiments of the present disclosure. As Figure 1A shown, a carrier C is provided, and a first dielectric layer 110 is formed on the carrier C. In some embodiments, the carrier C is a semiconductor carrier or a glass substrate. In some embodiments, the first dielectric layer 110 may be formed by coating, printing, or deposition (e.g., chemical vapor deposition) and has a thickness H1. In some embodiments, the thickness H1 is from about 1 micron to about 20 microns or from about 7 microns to about 9 microns. In some embodiments, for example, the first dielectric layer 110 may be a photosensitive polymer material layer made of a positive-type photosensitive polymer material. In some embodiments, for example, the polymer material may include polyimide, benzocyclobutene (BCB), polybenzoxazole (PBO), or any other suitable polymer material. In some embodiments, the carrier further has a release layer (not shown in the figures) formed on the surface of the carrier, and the release layer located between the carrier C and the first dielectric layer 110 may be a light-to-heat conversion (LTHC) release layer.
[0023] In an exemplary embodiment, as Figure 1A shown, a mask M having a pattern PA is used to perform an exposure process on the first dielectric layer 110. In some embodiments, a portion of the first dielectric layer 110 located below the pattern PA is shielded from exposure (as indicated by the dashed circle). In some embodiments, the first dielectric layer 110 is locally exposed to light.
[0024] In Figure 1B , in some embodiments, a development process is performed and the exposed portion of the first dielectric layer 110 that is exposed to light is removed. Optionally, a curing process may be performed after the development process. In some embodiments, most of the unshielded portion 110A of the first dielectric layer 110 is removed, but not completely removed, and a small thickness (about 0.25H1 to 0.35H1) remains. In some embodiments, most of the blocked portion 110B of the first dielectric layer 110 that is shielded by the pattern PA remains and has a thickness H2. In some embodiments, the thickness H2 is about 1 micron to about 12 microns (about 0.6H1 to about 0.7H1) or about 5 microns. That is, the blocked portion 110B protrudes from the surface of the portion 110A by a height of about 2 microns to about 3 microns or about 2.5 microns. In some embodiments, the pattern of the blocked portion 110B corresponds to the pattern PA ( Figure 1A shown). In some embodiments, the pattern of the blocked portion 110B may include circular blocks or rectangular blocks as dummy pad patterns.
[0025] In an exemplary embodiment, as Figure 1CAs shown, a second dielectric layer 120 having one or more openings S1 is formed over the first dielectric layer 110. In some embodiments, the opening S1 is a through hole for defining the position and shape of a subsequently formed joint, via, or pad. In some embodiments, the second dielectric layer 120 may be formed by coating, printing, or deposition (e.g., chemical vapor deposition) and has a thickness H3. In some embodiments, the thickness H3 is about 1 micron to about 20 microns or about 8 microns to about 10 microns. In some embodiments, the second dielectric layer 120 may be a polymer material layer. In some embodiments, for example, the polymer material may include polyimide, benzocyclobutene (BCB), polybenzoxazole (PBO), or any other suitable polymer material. In some embodiments, the patterned second dielectric layer 120 covers the first dielectric layer 110 but at least exposes a block portion 110B of the first dielectric layer 110. In some embodiments, the opening S1 exposes the block portion 110B of the first dielectric layer 110 and a part of the surrounding block portion 110B of the portion 110A. That is, the size of the opening S1 is larger than the block portion 110B. In some embodiments, the shape of the opening S1 may correspond to or be similar to the shape of the dummy pad pattern of the block portion 110B. In some embodiments, the shape of the opening S1 may be different from the shape of the dummy pad pattern of the block portion 110B.
[0026] In some embodiments, as Figure 1D shown, a seed layer 130 is formed over the second dielectric layer 120 to cover the opening S1 and the underlying first dielectric layer 110 exposed by the opening S1. In some embodiments, the seed layer 130 is formed to cover the second dielectric layer 120 and conformally cover the opening S1 and the underlying first dielectric layer 110 exposed by the opening S1. That is, the seed layer 130 covers at least the sidewalls of the opening S1, the top surface and sidewalls of the block portion 110B, and the top surface of the portion of the portion 110A exposed by the opening S1 (i.e., the seed layer is conformal to the profile of the opening S1 and the profile of the block portion 110B). That is, the seed layer 130 directly contacts the block portion 110B and the portion of the portion 110A located within the opening S1. In some embodiments, the seed layer 130 is formed by sputtering. In some embodiments, the material of the seed layer 130 may include titanium, tungsten, copper, gold, their alloys, and / or their combinations. In some embodiments, the seed layer 130 contains titanium, copper, and / or tungsten.
[0027] In some embodiments, in Figure 1EIn [the structure], a mask layer 140 is formed over the seed layer, and the mask layer 140 locally covers the seed layer 130 and at least does not cover the seed layer 130 located over the opening S1. In some embodiments, the mask layer 140 exposes some portions of the seed layer 130 located on the second dielectric layer 120.
[0028] In some embodiments, in Figure 1F [the structure], a metallic pattern 150 is formed over the exposed seed layer 130 on the second dielectric layer 120 to fill the opening S1 (see Figure 1E)。In some embodiments, a metallic pattern 150 is formed on the seed layer 130 not covered by the mask layer 140, and the mask layer 140 is removed. In some embodiments, the metallic pattern 150 can be formed by plating or deposition. In some embodiments, the material of the metallic pattern 150 includes, for example, copper, nickel, tungsten, titanium, silver, aluminum, gold, and / or their alloys. In certain embodiments, the metallic pattern 150 comprises copper or a copper alloy. In some embodiments, forming the metallic pattern 150 includes forming a metallic material layer (not shown in the figure) on the second dielectric layer 120 and on the seed layer 130 not covered by the mask layer 140, and filling the opening S1 by plating. In some embodiments, after stripping the mask layer 140, the seed layer 130 under the mask layer 140 (i.e., the seed layer 130 not covered by the metallic material layer) is then removed by wet etching. That is, the metallic pattern 150 is located on the seed layer 130 and on the second dielectric layer 120, and the metallic pattern 150 fills the opening S1. In some embodiments, the remaining seed layer 130 is sandwiched between the metallic pattern 150 and the second dielectric layer 120 outside the opening S1 and between the metallic pattern 150 and the first dielectric layer 110 inside the opening S1. In some embodiments, the metallic pattern 150 includes joints 150A and routing traces 150B. In some embodiments, when the metallic pattern 150 is formed as an interlayer redistribution pattern in a redistribution layer, the joint 150A can be used as a via. In some embodiments, when the metallic pattern 150 is formed as the outermost redistribution pattern of a redistribution layer, the joint 150A can be used as a pad. In some embodiments, within the opening S1, the joint 150A of the metallic pattern 150 includes a pad portion 151 located within the opening S1 and above the block portion 110B, and a ridge portion 152 surrounding the pad portion 151 and located above a part of the surrounding block portion 110B of the portion 110A. In some embodiments, within the opening S1, the remaining seed layer 130 is sandwiched between the block portion 110B and the metallic pattern 150 and between the sidewall of the opening S1 and the metallic pattern 150. In some embodiments, due to the presence of the block portion 110B, the height difference or depth at the central position or the middle position of the opening S1 can be reduced, thereby facilitating the filling of the metallic pattern into the opening S1 and improving the plating uniformity of filling the via opening. In some embodiments, due to the presence of the protruding portion, a flatter or more planar pad plane or via plane can be provided for a layer formed subsequently on the protruding portion.
[0029] In some embodiments, Figures 1A to 1FThe illustrated process may be compatible with manufacturing processes for forming a redistribution structure or a redistribution layer on a reconstructed wafer or on a package. In some embodiments, Figures 1A to 1F The illustrated process may be part of a wafer-level packaging process, and the above process may be repeated more than once to form a redistribution structure of a package structure.
[0030] Figures 2A to 2C are schematic cross-sectional views of respective stages in a method of manufacturing a connection structure in a package structure according to some exemplary embodiments of the present disclosure. After Figures 1A to 1F the illustrated process, a protective layer 160 is formed over the entire structure to cover the metallic pattern 150 and the first dielectric layer 110 and the second dielectric layer 120. Then, the entire structure is flipped and inverted. As Figure 2A shown, the carrier C is separated from the first dielectric layer 110 and then removed. In Figure 2B , the first dielectric layer 110 is removed and the seed layer 130 is also removed until the pad portion 151 is exposed. In some embodiments, the first dielectric layer 110 is completely removed by a first etching process, and the seed layer 130 and the second dielectric layer 120 are partially removed by a second etching process. In some embodiments, the seed layer 130 and the second dielectric layer 120 are etched until the top surface 151a of the pad portion 151 of the metallic pattern 150 is completely exposed. In some embodiments, the second dielectric layer 120 is partially removed, and the remaining second dielectric layer 120 has a height H4 of about 4 microns to about 6 microns or about 5 microns. As Figure 2B shown, the ridge portion 152 of the metallic pattern 150 is exposed from the second dielectric layer 120, and no seed layer 130 remains on the ridge portion 152, and the ridge portion 152 protrudes from the surface 120a of the remaining second dielectric layer 120 at a height d1 of about 2 microns to about 3 microns or about 2.5 microns. That is, the top surface 151a of the pad portion 151 is leveled with the surface 120a of the remaining second dielectric layer 120, and the top surface 152a of the ridge portion 152 is higher than the top surface 151a of the pad portion 151 by a height difference d1. In some embodiments, the ridge portion 152 is surrounded by the remaining seed layer 130 and the second dielectric layer 120. In some embodiments, the remaining seed layer 130 is sandwiched between the remaining second dielectric layer 120 and the metallic pattern 150 (except for the ridge portion 152 protruding from the second dielectric layer 120).
[0031] Figure 2D is a schematic enlarged top view showing a part of the Figure 2B illustrated structure. In Figure 2DAmong them, as an example, the joint 150A is illustrated as a circular pad, and the ridge portion 152 and the seed layer 130 surrounding the circular pad portion 151 are shown as an annular shape and arranged concentrically. However, it should be understood that the shape and the relative arrangement are not limited by the examples disclosed herein, and other shapes such as a quadrangular shape or a polygonal shape may also be applicable.
[0032] In Figure 2C Among them, one or more conductive balls 170 are disposed on the metallic pattern 150. In some embodiments, the conductive balls 170 can be disposed on the joint 150A through a ball placement process. Although only one conductive ball 170 is shown herein, the number of conductive balls is often more than one. In some embodiments, as Figure 2C shown, the conductive ball 170 is located directly above the ridge portion 152 and directly contacts the top surface 151a of the pad portion 151. That is to say, the pad portion 151 and the ridge portion 152 can be used as ball pads. In addition, a reflow process or a heating process can be performed. In some embodiments, the conductive balls 170 are attached to the metallic pattern 150 and are electrically connected to the metallic pattern 150. In some embodiments, the conductive balls can be solder balls or ball grid array (BGA) balls, and the materials of the conductive balls include Sn-based solder materials, lead-free solder materials, and / or noble metal alloys (including silver and gold). In one embodiment, the conductive ball 170 located on the ridge portion 152 of the joint 150A directly contacts the seed layer 130. In an alternative embodiment, the conductive ball 170 located on the ridge portion 152 of the joint 150A does not directly contact the seed layer 130.
[0033] In the foregoing embodiments, the joint 150A and the conductive balls 170 described herein together can be regarded as a connection structure for connecting a die or a package.
[0034] Figure 3A is a schematic cross-sectional view of an exemplary package structure according to some exemplary embodiments of the present disclosure. Figure 3B is a schematic enlarged cross-sectional view of a part of an exemplary package structure according to some exemplary embodiments of the present disclosure. In Figure 3A Among them, the package structure 30 includes at least one die 310 molded in a molding compound 320 and a plurality of molding vias 330 passing through the molding compound 320. In some embodiments, the package structure 30 includes a plurality of conductive balls 370 and a redistribution layer 350 located on the molding compound 320 and between the molding compound 320 and the conductive balls 370. The redistribution layer 350 is electrically connected to the die 310, and some or all of the conductive balls 370 are electrically connected to the die 310. In Figure 3BIn this case, the redistribution layer 350 includes a first redistribution metal pattern RDL1, a second redistribution metal pattern RDL2, and a third redistribution metal pattern RDL3 sandwiched between stacked dielectric layers PL1, PL2, PL3, and PL4. As described in the previous embodiments, Figures 1A to 1F The illustrated process can be applied to form RDL2. As described in the previous embodiments, due to the presence of the block portion 110B, unevenness or height difference at positions with large or deep vias can be reduced. At this time, the subsequently formed RDL3 with a fine pitch routing pattern can be formed on a flatter or more even plane, thereby improving the reliability of RDL3 and the redistribution layer. As Figure 3B shown, the joint 353 of RDL2 (circled by a circular dashed line) can be used as a via, and the joint 353 includes a pad portion 351 and a ridge portion 352 surrounding the pad portion 351. In some embodiments, the pad portion 351 and the ridge portion 352 are formed of the same material. In Figure 3B this case, a seed layer 3430 is sandwiched between the pad portion 351 and the dummy pad pattern, and the ridge portion 352 is connected to the underlying RDL1, and the seed layer 3430 is located between the ridge portion 352 and the underlying RDL1. Additionally, in some embodiments, RDL1 with a joint 356 can be formed according to the process for forming the joint 150A illustrated in Figures 1A to 1F and Figures 2A to 2C . In some embodiments, in Figure 3A and Figure 3B this case, conductive balls 370 are disposed on the bottom surface 350a of the redistribution layer 350. In some embodiments, the joint 356 of RDL1 (circled by a rectangular dashed line) for receiving the conductive balls 370 serves as a pad or a ball pad, and the conductive balls 370 directly contact the bottom surface 354a of the pad portion 354 of the joint 356 without a seed layer 3435 being located between the conductive balls 370 and the bottom surface 354a of the pad portion 354 of the joint 356. In some embodiments, the ridge portion 355 protrudes from the surface 350a of the redistribution layer 350 (the bottom surface of the bottommost dielectric layer PL1), and the conductive balls 370 are located on the ridge portion 355 of the joint 356.
[0035] Figures 4A to 4H is a schematic cross-sectional view of each stage in a method of manufacturing a connection structure according to some exemplary embodiments of the present disclosure. As Figure 4AAs shown, a carrier C is provided, and a first dielectric layer 410 is formed on the carrier C. In some embodiments, the carrier C further has a release layer (not shown in the figure) formed on the surface of the carrier C. In some embodiments, the first dielectric layer 410 can be formed by coating, printing, or deposition and has a thickness of about 2 micrometers to about 3 micrometers or about 2.5 micrometers. In some embodiments, the first dielectric layer 410 can be a polymer material layer. In some embodiments, for example, the polymer material can include polyimide, benzocyclobutene (BCB), polybenzoxazole (PBO), or any other suitable polymer material.
[0036] In Figure 4B it, in some embodiments, a second dielectric layer 420 having one or more openings S2 is formed over the first dielectric layer 410. In some embodiments, the opening S2 exposes a portion of the first dielectric layer 410. In some embodiments, the second dielectric layer can be formed by coating, printing, or deposition and has a thickness H5. In some embodiments, the thickness H5 is about 1 micrometer to about 20 micrometers or about 8 micrometers to about 10 micrometers. In some embodiments, for example, the second dielectric layer 420 can be a photosensitive polymer material layer made of a positive-type photosensitive polymer material. In some embodiments, for example, the polymer material can include polyimide, benzocyclobutene (BCB), polybenzoxazole (PBO), or any other suitable polymer material. In some embodiments, the opening S2 is a through hole for defining the position and shape of a subsequently formed joint, via, or pad. In an exemplary embodiment, the second dielectric layer 420 can be formed by coating as described above and then patterned by an exposure process and a development process, and more details will not be repeated herein.
[0037] In an exemplary embodiment, as Figure 4C shown, a seed layer 430 is formed over the second dielectric layer 420 to cover the opening S2 and the underlying first dielectric layer 410 exposed by the opening S2. In some embodiments, the seed layer 430 is formed to cover the second dielectric layer 420 and conformally cover the opening S2 and the underlying first dielectric layer 410 exposed by the opening S2. That is, the seed layer 430 covers at least the sidewalls and the bottom of the opening S2 (i.e., the top surface of the first dielectric layer 410 exposed by the opening S2). In some embodiments, the seed layer 430 is formed by sputtering. In some embodiments, the material of the seed layer 430 can include titanium, tungsten, copper, gold, their alloys, and / or their combinations. In some embodiments, the seed layer 430 contains titanium, copper, and / or tungsten.
[0038] In some embodiments, in Figure 4D it, a mask layer 440 is formed over the seed layer 430 to cover the seed layer 430, only exposing a portion of the seed layer 430 located on the bottom of the opening S2.
[0039] In some embodiments, in Figure 4E , a metallic block 435 is formed on the exposed seed layer 430. In some embodiments, the metallic block 435 can be formed by plating or deposition. In some embodiments, the material of the metallic block 435 includes, for example, copper, nickel, gold, and / or their alloys. In some embodiments, after the metallic block 435 is formed, the mask layer 440 ( Figure 4D ) is removed by a stripping solution and the seed layer 430 located under the mask layer 440 is exposed, and then the seed layer 430 is removed by wet etching. That is, only the seed layer 430 remains under the metallic block 435 and the seed layer 430 is directly under the metallic block 435. In Figure 4E , the metallic block 435 and the remaining seed layer 430 underlying the metallic block 435 are located within the opening S2 and on the central portion or the middle portion of the bottom of the opening S2 (i.e., on the first dielectric layer 410 in the middle of the opening S2). In some embodiments, the metallic block 435 located on the remaining seed layer 430 protrudes from the first dielectric layer 410 by a height H6. In some embodiments, the height H6 is about 5 microns to about 7 microns or about 6 microns. In some embodiments, the opening S2 exposes the protruding metallic block 435 located on the first dielectric layer 410 and a part of the first dielectric layer 410. That is, the size of the opening S2 is larger than the protruding metallic block 435. In some embodiments, the shape of the opening S2 can correspond to the shape of the metallic block 435 or be similar to the shape of the metallic block 435. In some embodiments, the shape of the opening S2 can be different from the shape of the metallic block 435. In some embodiments, the material of the metallic block 435 includes copper, nickel, tungsten, titanium, silver, aluminum, gold, and / or their alloys. In one embodiment, the material of the metallic block 435 includes copper or a copper alloy.
[0040] In some embodiments, in Figure 4FIn [the structure], another seed layer 445 is formed over the second dielectric layer 420 to cover the opening S2, the metallic block 435, and the first dielectric layer 410 that is not covered by the second dielectric layer 420 and the metallic block 435 but is exposed by the opening S2. In some embodiments, the seed layer 445 is formed to cover the second dielectric layer 420 and conformally cover the opening S2, the metallic block 435, and the exposed first dielectric layer 410. That is, the seed layer 445 covers at least the sidewalls and the top surface of the metallic block 435, the sidewalls of the opening S2, and the top surface of the exposed first dielectric layer 410. In some embodiments, the seed layer 445 is formed by sputtering. In some embodiments, the material of the seed layer 445 may include titanium, tungsten, copper, gold, their alloys, and / or their combinations. In some embodiments, the seed layer 445 contains titanium, copper, and / or tungsten. In certain embodiments, the material of the seed layer 445 is different from the material of the seed layer 430. In certain embodiments, the material of the seed layer 445 is the same as the material of the seed layer 430.
[0041] In some embodiments, in Figure 4G [the structure], another mask layer 447 is formed over the second dielectric layer 420 to locally cover the seed layer 445. In some embodiments, the mask layer 447 does not cover the seed layer 445 at positions predetermined for forming the metallic pattern. The mask layer 447 exposes at least the seed layer 445 located over the opening S2 and a portion of the seed layer 445 located on the second dielectric layer 420.
[0042] In some embodiments, as Figure 4HAs shown, a metallic pattern 450 is formed on the exposed seed layer 445 over the second dielectric layer 420 to fill the opening S2 and cover the metallic block 435. In some embodiments, the metallic pattern 450 completely covers the opening S2 and the metallic block 435. In some embodiments, the metallic pattern 450 is formed on the seed layer 445 not covered by the mask layer 447, and the mask layer 447 is removed. In some embodiments, the metallic pattern 450 can be formed by plating or deposition. In some embodiments, the material of the metallic pattern 450 includes, for example, copper, nickel, tungsten, titanium, silver, aluminum, gold, and / or their alloys. In certain embodiments, the metallic pattern 450 contains copper or a copper alloy. In one embodiment, the material of the metallic block 435 is different from the material of the metallic pattern 450. In one embodiment, the material of the metallic block 435 is the same as the material of the metallic pattern 450. In some embodiments, forming the metallic pattern 450 includes forming a metallic material layer (not shown in the figure) over the seed layer 445 not covered by the mask layer 447 and over the second dielectric layer 420 and filling the opening S2 by plating. In some embodiments, after stripping the mask layer 447, the seed layer 445 under the mask layer 447 (i.e., the seed layer 445 not covered by the metallic material layer) is then removed by wet etching. That is, the metallic pattern 450 is located on the seed layer 445 and over the second dielectric layer 420, and the metallic pattern 450 fills the opening S2. In some embodiments, the remaining seed layer 445 is sandwiched between the metallic pattern 450 and the second dielectric layer 420 outside the opening S2 and is sandwiched between the metallic pattern 450 and the second dielectric layer 420 (i.e., the sidewall of the opening S2). In some embodiments, the seed layer 445 is sandwiched between the metallic pattern 450 and the metallic block 435 and is sandwiched between the metallic pattern 450 and the first dielectric layer 410 within the opening S2. In certain embodiments, the material of the metallic pattern 450 is different from the material of the metallic block 435. In certain embodiments, the material of the metallic pattern 450 is the same as the material of the metallic block 435.
[0043] In some embodiments, on Figure 4HIn [the figure], the metallic pattern 450 includes a joint 450A and a routing trace 450B. In some embodiments, when the metallic pattern 450 is formed as an interlayer redistribution pattern within a redistribution layer, the joint 450A can be used as a via. In some embodiments, when the metallic pattern 450 is formed as the outermost redistribution pattern of a redistribution layer, the joint 450A can be used as a pad. In some embodiments, within the opening S2, the joint 450A of the metallic pattern 450 includes a pad portion 451 located within the opening S2 and above the metallic block 435, and a ridge portion 452 surrounding the pad portion 451. In some embodiments, within the opening S2, the remaining seed layer 445 is sandwiched between the pad portion 451 and the metallic block 435, and between the ridge portion 452 and the sidewalls of the first dielectric layer 410 and the opening S2. In some embodiments, within the opening S2, the seed layer 430 is located between the metallic block 435 and the first dielectric layer 410. In some embodiments, due to the presence of the metallic block 435, the gap fill depth at the central or intermediate position of the opening S2 can be reduced, thereby facilitating filling of the metallic pattern into the opening S2 and improving the plating uniformity for filling the via opening. Therefore, a flatter or more planar pad plane or via plane can be provided for the subsequent layer formed thereon.
[0044] In some embodiments, Figures 4A to 4H the illustrated process can be compatible with manufacturing processes for forming redistribution structures or redistribution layers on a reconstructed wafer or on a package. In some embodiments, Figures 4A to 4H the illustrated process can be part of a wafer-level packaging process, and the above process can be repeated more than once to form a redistribution structure.
[0045] Figures 5A to 5C is a schematic cross-sectional view of each stage in a method for manufacturing a connection structure in a packaging structure according to some exemplary embodiments of the present disclosure. In Figures 4A to 4H after the illustrated process, a protective layer 460 is formed over the entire structure to cover the metallic pattern 450 and the second dielectric layer 420. Then, the entire structure is flipped and inverted. As Figure 5A shown, the carrier C is separated from the first dielectric layer 410 and then removed. In Figure 5BTherein, the first dielectric layer 410 is removed, and also the seed layer 430 located on the metallic block 435 and the seed layer 445 are removed until the metallic block 435 and the ridge portion 452 are exposed. In some embodiments, the first dielectric layer 410 is completely removed by a first etching process. In some embodiments, the seed layer 430 is completely removed and the seed layer 445 and the second dielectric layer 420 are partially removed by a second etching process. In some embodiments, the seed layers 430, 445 and the second dielectric layer 420 are etched until the top surface 435a of the metallic block 435 and the top surface 452a of the ridge portion 452 of the metallic pattern 450 are completely exposed. In certain embodiments, the top surface 435a of the metallic block 435 and the top surface 452a of the ridge portion 452 of the metallic pattern 450 are coplanar and flush with each other. That is, the metallic block 435 and the ridge portion 452 protrude from the remaining second dielectric layer 420 at the same height. In some embodiments, the second dielectric layer 420 is partially removed, and the remaining second dielectric layer 120 has a height H7 of about 4 microns to about 6 microns or about 5 microns.
[0046] As Figure 5B shown, the ridge portion 452 of the metallic pattern 450 is exposed from the second dielectric layer 420, and no seed layer 445 remains on the ridge portion 452, and the ridge portion 452 protrudes from the surface 420a of the remaining second dielectric layer 420 at a height of about 2 microns to about 3 microns or about 2.5 microns. In one embodiment, the top surface 435a of the metallic block 435 does not have the seed layer 430. In some embodiments, the ridge portion 452 is surrounded by the remaining seed layer 445 and the second dielectric layer 120. In some embodiments, the remaining seed layer 445 includes a first portion 445A sandwiched between the metallic block 435 and the joint 450A of the metallic pattern 450 and a second portion 445B sandwiched between the remaining second dielectric layer 420 and the metallic pattern 450 (except for the ridge portion 452 protruding from the second dielectric layer 420). In some embodiments, the metallic block 435 and the first portion 445A are located on the pad portion 451 of the joint 450A, and the metallic block 435 and the first portion 445A are surrounded by the ridge portion 452. Since the first portion 445A and the second portion 445B are made of the same layer, they are made of the same material.
[0047] Figure 5D is a schematic enlarged top view showing Figure 5B a part of the structure shown in the drawing. In Figure 5DIn this example, the joint 450A is depicted as a circular pad, and the first portion 445A of the seed layer 445, the ridge portion 452 surrounding the circular pad portion 451, and the second portion 445B of the seed layer 445 are shown as circular ring shapes and arranged concentrically. That is, when viewed from a top view, the first portion 445A and the second portion 445B are shown as two concentric rings, and the annular ridge portion 452 is sandwiched between these two rings. However, it should be understood that the shape and relative arrangement are not limited by the examples disclosed herein, and other shapes such as a quadrilateral shape or a polygonal shape may also be applicable.
[0048] In Figure 5C one or more conductive balls 470 are disposed on the metallic pattern 450. In some embodiments, the conductive balls 470 may be disposed on the joint 450A by a ball mounting process. In some embodiments, as Figure 5C shown, the conductive balls 470 are located directly above the metallic block 435 and in direct contact with the ridge portion 452. That is, the metallic block 435, the pad portion 451, and the ridge portion 452 can be used as ball pads. Additionally, a reflow process or a heating process may be performed. In some embodiments, the conductive balls 470 are attached to the joint 450A of the metallic pattern 450 and electrically connected to the metallic pattern 450.
[0049] Figure 11 is an exemplary flowchart showing the process steps of a manufacturing method for forming a connection structure according to some embodiments of the present disclosure. In step S1110, a carrier is provided, and a first dielectric layer is formed on the carrier. In step S1120, a second dielectric layer having an opening is formed on the first dielectric layer. In step S1130, a block is formed on the carrier within the opening. In step S1140, a seed layer is formed on the second dielectric layer, the opening, and the block. In step S1150, a metallic pattern is formed on the seed layer, and the metallic pattern fills the opening. In step S1160, the carrier is removed to expose the first dielectric layer. In step S1170, the first dielectric layer is removed to expose the metallic pattern. In step S1180, conductive balls are formed on the exposed metallic pattern. In some embodiments, in Figures 1A to 1F , Figures 2A to 2D , Figures 4A to 4H and Figures 5A to 5D the processes depicted can be summarized as the process steps shown in Figure 11 and may be part of a wafer-level packaging process.
[0050] Figure 6A is a schematic cross-sectional view of an exemplary packaging structure according to some exemplary embodiments of the present disclosure. Figure 6B is a schematic enlarged cross-sectional view of a part of an exemplary packaging structure according to some exemplary embodiments of the present disclosure. In Figure 6AAmong them, the encapsulation structure 60 includes at least one die 610 molded in a molding compound 620 and a plurality of molding vias 630 penetrating through the molding compound 620. In some embodiments, the encapsulation structure 60 includes a plurality of conductive balls 670 and a redistribution layer 650 located on the molding compound 620 and between the molding compound 620 and the conductive balls 670. The redistribution layer 650 is electrically connected to the die 610, and some or all of the conductive balls 670 are electrically connected to the die 610. In Figure 6B Among them, the redistribution layer 650 includes a first redistribution metal pattern RDL1, a second redistribution metal pattern RDL2, and a third redistribution metal pattern RDL3 sandwiched between stacked dielectric layers PL1, PL2, PL3, and PL4. As described in the previous embodiments, Figures 4A to 4F The process shown can be applied to form RDL2. At this time, the subsequently formed RDL3 with a fine pitch routing pattern can be formed on a flatter or less uneven plane, thereby improving the reliability of RDL3 and the redistribution layer. As Figure 6B shown, the joint 653 of RDL2 (circled by a circular dashed line) and the metal block 657 together can be used as a via, and the joint 653 includes a pad portion 651 located on the metal block 657 and a ridge portion 652 surrounding the pad portion 651. In certain embodiments, the pad portion 651 and the ridge portion 652 are formed of the same material. In Figure 6B Among them, the ridge portion 652 and the metal block 657 are respectively connected to the underlying RDL1, a seed layer 6445 is located between the ridge portion 652 and the underlying RDL1, and a seed layer 6430 is located between the metal block 657 and the underlying RDL1. Additionally, in some embodiments, RDL1 with a joint 656 can be formed according to the process for forming the joint 450A shown in Figures 4A to 4H and Figures 5A to 5C shown. In some embodiments, in Figure 6A and Figure 6B Among them, the conductive balls 670 are disposed on the bottom surface 650a of the redistribution layer 650. In certain embodiments, the metal block 659 and the joint 656 of RDL1 (circled by a rectangular dashed line) for receiving the conductive balls 670 are used as pads or ball pads, and the conductive balls 670 directly contact the top surface 659a of the metal block 659 and the ridge portion 655 of the joint 656 and are located on the top surface 659a of the metal block 659 and the ridge portion 655 of the joint 656. In Figure 6BIn [the figure], the ridge portion 655 and the metallic block 659 protrude from the surface 650a of the redistribution layer 650. In some embodiments, the top surface 659a of the metallic block 659 does not have a seed layer. In some embodiments, the metallic block 659 and the seed layer 6575 are located on the bottom surface 654a of the pad portion 654 and are embedded in the ridge portion 655. In certain embodiments, the seed layer 6575 is sandwiched between the metallic block 659 and the ridge portion 655, while the seed layer 6580 is sandwiched between the joint 656 and the bottommost dielectric layer PL1 of the redistribution layer 650.
[0051] Figures 7A to 7I are schematic cross-sectional views of respective stages in a method of manufacturing a connection structure according to some exemplary embodiments of the present disclosure. In Figure 7A [the figure], a carrier C is provided, and a first dielectric layer 710 is formed on the carrier C. In some embodiments, the first dielectric layer 710 includes a plurality of openings S3. In Figure 7B [the figure], a second dielectric layer 720 having a plurality of openings S4 is formed on the first dielectric layer 710. The openings S4 expose portions of the underlying first dielectric layer 710 and the openings S3. In some embodiments, the positions of the openings S4 correspond to the positions of the openings S3, but the size of the openings S4 is larger than the size of the openings S3. In some embodiments, the openings S4 and the underlying openings S3 constitute a trench opening S5.
[0052] In some embodiments, the first dielectric layer 710 or the second dielectric layer 720 may be formed by coating, printing, or deposition. In some embodiments, the first dielectric layer 710 or the second dielectric layer 720 may be a polymer material layer. In some embodiments, for example, the polymer material may include polyimide, benzocyclobutene, polybenzoxazole, or any other suitable polymer material. In some embodiments, the opening S4 is a through-hole penetrating the second dielectric layer 720, while the opening S3 does not penetrate through the first dielectric layer 710. The openings S3, S4 will define the positions and shapes of subsequently formed joints or stud pads. In an exemplary embodiment, the first dielectric layer 710 or the second dielectric layer 720 may be formed by coating as described above and then patterned by an exposure process and a development process, and more details will not be repeated herein.
[0053] In an exemplary embodiment, as Figure 7C shown, a seed layer 730 is formed on the second dielectric layer 720 and the underlying first dielectric layer 710 to conformally cover the opening S5. In some embodiments, the seed layer 730 is formed by sputtering. In some embodiments, the material of the seed layer 730 may include titanium, tungsten, copper, gold, their alloys, and / or their combinations. In some embodiments, the seed layer 730 contains titanium, copper, and / or tungsten.
[0054] In Figure 7DIn [description], a mask layer 740 is formed on the seed layer 730 and above the second dielectric layer 720. In some embodiments, the mask layer 740 exposes at least the opening S5 and a portion of the seed layer 130 on the second dielectric layer 720.
[0055] In Figure 7E In [description], a metallic pattern 750 is formed on the seed layer not covered by the mask layer 740. In some embodiments, the metallic pattern 750 is formed on the exposed seed layer 730 above the first dielectric layer 710 and the second dielectric layer 720 to fill the opening S5. In some embodiments, the metallic pattern 750 is formed on the seed layer 730 not covered by the mask layer 740, and the mask layer 740 is removed. In some embodiments, the metallic pattern 750 can be formed by plating or deposition. In some embodiments, the material of the metallic pattern 750 includes, for example, silver, copper, nickel, titanium, aluminum, gold, and / or their alloys. In certain embodiments, the metallic pattern 750 includes copper or a copper alloy. The formation of the metallic pattern 750, the patterning of the seed layer 730, and the removal of the mask layer 740 can be similar to the processes described previously and the details will not be repeated herein. In some embodiments where the metallic pattern 750 is formed by deposition, chemical mechanical planarization (CMP) is applied to achieve a flat planar surface. In some embodiments, the remaining seed layer 730 is sandwiched between the metallic pattern 750 and the second dielectric layer 720 outside the opening S5 and between the metallic pattern 750 and the first dielectric layer 710 and the second dielectric layer 720 within the opening S5. In some embodiments, the metallic pattern 750 includes a via 750A and a routing trace 750B.
[0056] In some embodiments, when the metallic pattern 750 is formed as an interlayer redistribution pattern within a redistribution layer, the via 750A can be used as a via. In some embodiments, when the metallic pattern 750 is formed as the outermost redistribution pattern of a redistribution layer, the via 750A can be used as a stud pad.
[0057] In some embodiments, in Figure 7EIn the figure, within the opening S5, the joint 750A of the metallic pattern 750 includes a columnar portion 751 mainly located within the opening S3 and surrounded by the first dielectric layer 710, and a plug portion 752 located above the columnar portion 751 mainly within the opening S4 and surrounded by the second dielectric layer 720. If the opening S3 or S4 is a circular opening or an oval opening, the shape of the columnar portion 751 or the shape of the plug portion 752 can be a circular or oval post or block. The joint 750A further includes a pad portion 753, and the pad portion 753 is located on the plug portion 752 and on the seed layer 730, but above the second dielectric layer 720 (i.e., outside the opening S5). In one embodiment, the size (diameter) of the circular opening S3 is smaller than the size (diameter) of the circular opening S4, and the size (diameter) of the columnar portion 751 is smaller than the size (diameter) of the plug portion 752. In one embodiment, the pad portion 753 can be shaped into, for example, a circular pad, a rectangular pad, or a polygonal pad. For example, the size (diameter) of the plug portion 752 is smaller than the size (or maximum width) of the pad portion 753. In some embodiments, the joint 750A can be shaped into a three-layer cake structure. In certain embodiments, since the columnar portion 751, the plug portion 752, and the pad portion 753 are formed of the same material by the same process, the material of the columnar portion 751, the material of the plug portion 752, and the material of the pad portion 753 are the same. In some embodiments, the remaining seed layer 730 is sandwiched between the joint 750A and the second dielectric layer 720, and between the bottom and sidewalls of the opening S5 and the joint 750A of the metallic pattern 750. In some embodiments, the presence of the protruding columnar portion 751 increases the contact area between the joint 750A and the subsequently formed conductive ball, thereby improving the connection reliability.
[0058] In Figure 7F In the figure, dielectric layers 760, 762, 764 and redistribution patterns 761, 763, 765 are alternately and sequentially formed over the metallic pattern 750 and the second dielectric layer 720. In some embodiments, the layers located above the carrier C can be regarded as a redistribution layer or a redistribution structure RDL. In some embodiments, a sub-package or a package 77 can be stacked on the redistribution layer or the redistribution structure RDL.
[0059] In Figure 7G In the figure, the entire structure is flipped and inverted and then placed on the carrier film CF. As Figure 7G shown, the carrier C is separated from the first dielectric layer 710 and then removed.
[0060] In Figure 7HTherein, the first dielectric layer 710 and the second dielectric layer 720 are removed, and also the seed layer 730 located on the joint 750A is removed until the plug portion 752 of the joint 750A is exposed. In some embodiments, the first dielectric layer 710 is completely removed by etching. In some embodiments, the seed layer 730 covering the column portion 751 is completely removed to completely expose the column portion 751. In some embodiments, the seed layer 730 covering the plug portion 752 and the second dielectric layer 720 is partially removed by one or more etching processes. In some embodiments, only the second dielectric layer 720 is partially removed to reduce the thickness of the second dielectric layer 720 to expose some portions of the plug portion 752, without completely removing the second dielectric layer 720. As Figure 7H shown, a portion of the column portion 751 and the plug portion 752 is exposed from the surface 720a of the second dielectric layer 720, and no seed layer 730 remains on the exposed portions of the exposed column portion 751 and the plug portion 752, and the protrusion height H8 is measured from the surface 720a of the remaining second dielectric layer 720 to the surface 751a of the column portion 751. In one embodiment, the height H8 is about 2 micrometers to about 10 micrometers. In some embodiments, another portion of the plug portion 752 embedded in the second dielectric layer 720 is surrounded by the remaining seed layer 730 and the second dielectric layer 720.
[0061] In Figure 7I therein, conductive balls 770 are disposed on the joint 750A of the metallic pattern 750 and on the surface 720a of the second dielectric layer 720. Additionally, a reflow process or a heating process may be performed. In some embodiments, as Figure 7I shown, the conductive balls 770 are located directly above a portion of the column portion 751 and the plug portion 752 and are in direct contact with a portion of the column portion 751 and the plug portion 752. That is, the column portion 751 and the plug portion 752 of the joint 750A can be used as ball pads. In some embodiments, the conductive balls 770 are attached to the joint 750A of the metallic pattern 750 and are electrically connected to the metallic pattern 750. Thereafter, the carrier film can be removed. In some embodiments, the conductive balls can be solder balls or ball grid array (BGA) balls, and the material of the conductive balls includes tin-based solder materials, lead-free solder materials, and / or precious metal alloys containing silver and gold. In some embodiments, the protrusion height H8 is about 2% to 20% of the height H9 of the conductive balls 770. In one embodiment, the conductive balls 770 are in direct contact with the seed layer 730. In an alternative embodiment, the conductive balls 770 are not in direct contact with the seed layer 730.
[0062] In the foregoing embodiments, the joint 750A and the conductive balls 770 described herein together can be regarded as a connection structure for connecting a die or a package.
[0063] Figure 8 is a schematic cross-sectional view of an exemplary package structure in accordance with some exemplary embodiments of the present disclosure. In Figure 8 , the package structure 80 includes a first sub-package 82 and a second sub-package 84 stacked on the first sub-package 82. In Figure 8 , the package structure 80 may further include a top package 86. In some embodiments, the first sub-package 82 has at least one first die 810 molded in a first molding compound 820 and a plurality of molding vias 830 penetrating through the molding compound 820. In some embodiments, the second sub-package 84 has at least one second die 840 molded in a second molding compound 850 and a plurality of molding vias 860 penetrating through the molding compound 850. In some embodiments, the package structure 80 includes a plurality of conductive balls 870 and a redistribution layer 880 located on the molding compound 820 of the first sub-package 82 and between the molding compound 820 and the conductive balls 870. The conductive balls 870 are disposed on the bottom surface 880b of the redistribution layer 880, while the molding compound 820 and the first die 810 are disposed on the top surface 880a of the redistribution layer 880. The first die 810 of the first sub-package 82 is electrically connected to the redistribution layer 880, and the conductive balls 870 are electrically connected to the redistribution layer 880. Some of the conductive balls 870 are electrically connected to the die 810 or 840 or to the top package 86. In Figure 8 , the redistribution layer 880 includes at least a redistribution metallic pattern 750 having more than one joint 750A. As described in the previous embodiments, Figures 7A to 7I the process illustrated can be applied to form the redistribution layer 880 or the metallic pattern 750. By forming the joint 750A having at least a column portion 751, the contact area between the joint 750A and the subsequently formed conductive balls 870 is increased, thereby improving the reliability of the connection structure and the redistribution layer. As Figure 8 shown, the joint 750A directly contacts the conductive balls 870 in the form that the column portion 751 penetrates into the conductive balls 870, and the conductive balls 870 are located on the joint 750A.
[0064] Figures 9A to 9HFIG. 0 is a schematic cross-sectional view of various stages in a method of manufacturing a connection structure in a packaging structure according to some exemplary embodiments of the present disclosure. In some embodiments, a wafer 90 having a plurality of semiconductor dies 900 (only one die is shown herein) is provided. In some embodiments, the wafer 90 may be a semiconductor wafer or a reconstituted wafer. In some embodiments, each die 900 includes a semiconductor substrate 902, a contact pad 904, a conductive element 906, and a protective layer 908. In some embodiments, the semiconductor substrate 902 may be a silicon substrate that includes active components (e.g., transistors, etc.) and optional passive components (e.g., resistors, capacitors, inductors, etc.) formed in the silicon substrate. The conductive element 906 is disposed on the contact pad 904 and is electrically connected to the contact pad 904. The material of the contact pad 904 or the material of the conductive element 906 may include aluminum, copper, their alloys, or other suitable metallic materials. In some embodiments, the protective layer 908 exposes the conductive element 906.
[0065] In Figure 9B FIG. 5, a first dielectric layer 910 having an opening S6 is formed over the protective layer 908 over the active surface 900a of the semiconductor die 900 ( Figure 9A as shown) to cover the protective layer 908, and the opening S6 exposes the conductive element 906. Then, a seed layer 915 is conformally formed over the first dielectric layer 910 to cover the sidewalls of the opening S6 and the exposed conductive element 906. As described in the above embodiments, the formation and materials of the seed layer will not be repeated herein.
[0066] In Figure 9C FIG. 12, a mask layer 920 having an opening S7 is formed over the seed layer 915, and the opening S7 exposes at least the seed layer 915 located over the opening S6.
[0067] In Figure 9D FIG. 17, a metallic portion 930 is formed on the seed layer 915 not covered by the mask layer 920. In some embodiments, the metallic portion 930 at least fills the openings S6, S7 and covers a portion of the seed layer 915 surrounding the opening S6. In some embodiments, the metallic portion 930 includes a metallic plug portion 931 that fills the opening S7 ( Figure 9C as shown) and a metallic pad portion 932 that fills the opening S6. As Figure 9D shown, the metallic plug portion 931 is mainly located above the top surface 910a of the first dielectric layer 910 and protrudes from the top surface 910a of the first dielectric layer 910. In Figure 9D FIG. 23, after removing the mask layer 920, the remaining seed layer 915 obtained by removing the seed layer 915 exposed by removing the mask layer 920 is located between the metallic portion 930 and the first dielectric layer 910.
[0068] In Figure 9E , another seed layer 935 is conformally formed on the first dielectric layer 910 and the seed layer 935 conformally covers the metallic plug portion 931. That is, the seed layer 935 covers at least the sidewall 931b and the top surface 930a of the protruding metallic plug portion 931 of the metallic portion 930. In some embodiments, the material of the seed layer 935 is different from the material of the seed layer 915. In some embodiments, the material of the seed layer 935 is the same as the material of the seed layer 915.
[0069] In Figure 9F , another mask layer 940 having an opening S8 is formed over the seed layer 935, and the opening S8 exposes at least the seed layer 935 on the top surface 930a of the metallic plug portion 931 located above the position of the opening S6.
[0070] In Figure 9G , a metallic pillar portion 950 is formed on the seed layer 935 not covered by the mask layer 940. In some embodiments, the metallic pillar portion 950 at least fills the opening S8. As Figure 9G shown, the metallic pillar portion 950 is located on the top surface 930a of the metallic plug portion 931 and protrudes from the top surface 930a of the metallic plug portion 931. In Figure 9G , after the mask layer 940 is removed, the remaining seed layer 935 obtained by removing the seed layer 935 exposed by removing the mask layer 940 is located between the metallic pillar portion 950 and the metallic plug portion 931. The metallic pillar portion 950 is connected to the metallic portion 930 in a one-to-one manner and is located on the metallic portion 930. For example, the pillar portion 950 may be located near the midpoint of the top surface 930a of the plug portion 931. The formation and materials of the metallic portion 930 or the metallic pillar portion 950 are similar to those of the above embodiments, and the details will not be repeated herein. In some embodiments, since the plug portion 931 and the pad portion 932 are formed of the same material by the same process, the material of the plug portion 931 is the same as the material of the pad portion 932. In one embodiment, the material of the pillar portion 950 is the same as the material of the plug portion 931 and the material of the pad portion 932. In another embodiment, the material of the pillar portion 950 is different from the material of the plug portion 931 and the material of the pad portion 932.
[0071] In some embodiments, when the openings S6, S7, or S8 are circular openings or oval openings, the shape of the pad portion 932, the shape of the plug portion 931, or the shape of the column portion 950 may be a circular or oval column or block. In one embodiment, the size (diameter) of the circular opening S6 is smaller than the size (diameter) of the circular opening S7, and the size (diameter) of the pad portion 932 is smaller than the size (diameter) of the plug portion 931. For example, the size of the opening S8 is smaller than the size of the opening S6 and the size of the opening S7, and the size (diameter) of the column portion 950 is smaller than the size of the pad portion 932 or the size of the plug portion 931.
[0072] In Figure 9H , conductive bumps 970 are disposed on the metallic column portion 950 and the metallic plug portion 931. Additionally, a reflow process or a heating process may be performed. In some embodiments, as Figure 9H shown, the conductive bump 970 is located on the metallic plug portion 931, and the metallic column portion 950 is inserted into the conductive bump 970. That is, the conductive bump is directly above the top surface 930a of the plug portion 931 and is in direct contact with the top surface 930a of the column portion 950 and the plug portion 931. That is, the metallic column portion 950 and the metallic portion 930 can be used as bump pads. In some embodiments, the metallic column portion 950 and the metallic portion 930 form a joint 960A, and the joint 960A may be part of a connection structure of the die. In some embodiments, the joint 960A includes a seed layer 935 sandwiched between the column portion 950 and the plug portion 931 and a seed layer 915 sandwiched between the metallic portion 930 and the first dielectric layer 910. In some embodiments, the conductive bump 970 is attached to the metallic column portion 950 and the metallic plug portion 931 and is electrically connected to the joint 960A. Additionally, the joint 960A formed on the conductive element 906 is electrically connected to the semiconductor die 900. In some embodiments, the conductive bump 970 may be a solder bump, a copper bump, or a gold bump, and the material of the conductive bump includes a tin-based solder material, a lead-free solder material, copper, a copper alloy, and / or a precious metal alloy containing silver or gold.
[0073] In the foregoing embodiments, the joint 960A and the conductive bump 970 described herein together may be regarded as a connection structure for connecting a die or a package.
[0074] Figure 10 is a schematic cross-sectional view of an exemplary package structure according to some exemplary embodiments of the present disclosure. In Figure 10In this case, the encapsulation structure 100 includes a first sub-encapsulation 10A and a second sub-encapsulation 10B stacked on the first sub-encapsulation 10A. In some embodiments, the first sub-encapsulation 10A has a first die 11, a second die 12, and a third die 13 molded in a first molding compound 14. In some embodiments, the second sub-encapsulation 10B has at least one fourth die 15 molded in a second molding compound 16. In certain embodiments, at least two or all of the first die, the second die, the third die, and the fourth die are different types of dies. Optionally, the encapsulation structure 100 further includes one or more passive components 17. In some embodiments, the encapsulation structure 100 includes a plurality of conductive balls 18, a redistribution layer 1050 located on the molding compound 14 of the first sub-encapsulation 10A and between the molding compound 14 and the conductive balls 18, and a redistribution layer 1020 located between the sub-encapsulation 10A and the sub-encapsulation 10B. The redistribution layer 1020 is electrically connected to the dies 11, 12, 13, 15. The redistribution layer 1050 is electrically connected to the dies 11, 12, 13, and some or all of the conductive balls 18 are electrically connected to the dies 11, 12, or 13 through the redistribution layer 1050. In some embodiments, at least one of the first die, the second die, the third die, and the fourth die includes a joint 960A and bumps 970 as connection structures to connect to the sub-encapsulation. As described in the previous embodiments, Figures 9A to 9H The illustrated process can be applied to form the joint 960A. In Figure 10 this case, the second die 12 is connected to the second sub-encapsulation 10B through the joint 960A, the bumps 970, and the redistribution layer 1020. In some embodiments, the fourth die 15 is connected to the first sub-encapsulation 10A through the joint 960A, the bumps 970, and the redistribution layer 1020. By forming the joint 960A having at least a columnar portion 950, the contact area between the joint 960A and the subsequently formed conductive bumps 970 is increased, so that the reliability of the connection structure and the redistribution layer is greatly improved. As Figure 10 shown, the joint 960A directly contacts the conductive bump 970, and the conductive bump 970 is located on the metallic plug portion 931 in a form that the columnar portion 950 penetrates into the conductive bump 970.
[0075] In the above embodiments, the joint is formed with a protruding columnar portion to receive the conductive element, thereby achieving better connection reliability. Thus, peeling or delamination between the connection structures can be reduced and the reliability of the connection structure can be improved.
[0076] According to some embodiments of the present disclosure, a packaging structure is provided. The packaging structure includes a semiconductor die, a molding compound, a redistribution layer, and conductive balls. The molding compound encapsulates the semiconductor die. The redistribution layer is disposed on the molding compound and above the semiconductor die and is electrically connected to the semiconductor die. The conductive balls are disposed on a first surface of the redistribution layer and are electrically connected to the semiconductor die. The redistribution layer includes joints. At least one of the joints includes a pad portion and a ridge portion surrounding the pad portion. The conductive ball contacts the ridge portion protruding from the first surface of the redistribution layer.
[0077] According to some embodiments of the present disclosure, the at least one joint further includes a first seed layer located between the at least one joint and the first surface of the redistribution layer. According to some embodiments of the present disclosure, the conductive ball directly contacts the pad portion without the first seed layer being located between the conductive ball and the pad portion.
[0078] According to some embodiments of the present disclosure, the at least one joint further includes a metallic block disposed on the pad portion and embedded in the ridge portion, and the conductive ball contacts the ridge portion and the metallic block. According to some embodiments of the present disclosure, the at least one joint further includes a second seed layer sandwiched between the metallic block, the pad portion, and the ridge portion. According to some embodiments of the present disclosure, the ridge portion and the metallic block protrude from the first surface of the redistribution layer at the same height. According to some embodiments of the present disclosure, the material of the first seed layer is the same as the material of the second seed layer.
[0079] According to some embodiments of the present disclosure, the conductive ball includes a solder ball or a ball grid array (BGA) ball, and the joint is a ball pad including copper or a copper alloy.
[0080] According to another embodiment of the present disclosure, a packaging structure is provided. The packaging structure includes a semiconductor die, a molding compound, a redistribution layer, and conductive balls. The redistribution layer is disposed above the semiconductor die and is electrically connected to the semiconductor die. The redistribution layer has a first surface and a second surface opposite to the first surface. The molding compound is disposed on the first surface of the redistribution layer and encapsulates the semiconductor die. The conductive balls are disposed on the second surface of the redistribution layer and are electrically connected to the semiconductor die. The redistribution layer includes joints. At least one of the joints includes a pad portion, a plug portion disposed on the pad portion, and a column portion disposed on the plug portion. The conductive ball contacts the column portion and the plug portion protruding from the second surface of the redistribution layer.
[0081] According to some embodiments of the present disclosure, the at least one joint further includes a seed layer located between the second surface of the redistribution layer and the at least one joint. According to some embodiments of the present disclosure, the conductive ball directly contacts the columnar portion and the plug portion protruding from the second surface of the redistribution layer without the seed layer being located between the conductive ball and the columnar portion and the plug portion.
[0082] According to some embodiments of the present disclosure, the columnar portion and the plug portion protrude from the second surface of the redistribution layer by a first height, and the first height is about 2% to about 20% of the height of the conductive ball.
[0083] According to some embodiments of the present disclosure, the material of the columnar portion, the material of the plug portion, and the material of the pad portion are the same. According to some embodiments of the present disclosure, the conductive ball includes a solder ball or a ball grid array (BGA) ball, and the joint is a ball pad containing copper or a copper alloy.
[0084] According to another embodiment of the present disclosure, a method of forming a package structure is provided. A carrier is provided, and a first dielectric layer is formed on the carrier. A second dielectric layer having at least one opening is formed on the first dielectric layer. At least one block is formed on the carrier within the at least one opening. A first seed layer is formed on the second dielectric layer, the at least one opening, and the at least one block. A metallic pattern is formed on the first seed layer, and the metallic pattern fills the at least one opening. The carrier is removed to expose the first dielectric layer. The first dielectric layer is removed to expose the metallic pattern. At least one conductive ball is formed on the exposed metallic pattern.
[0085] According to some embodiments of the present disclosure, forming at least one block on the carrier within the at least one opening includes: patterning the first dielectric layer before forming the second dielectric layer to form the at least one block from the first dielectric layer, and the at least one opening exposes the at least one block. According to some embodiments of the present disclosure, the method further includes: locally removing the first seed layer during the removal of the first dielectric layer to expose the metallic pattern.
[0086] According to some embodiments of the present disclosure, forming at least one block over the carrier within the at least one opening includes: forming a second seed layer on the first dielectric layer; and forming a metallic block on the second seed layer. According to some embodiments of the present disclosure, the method further includes: forming a third seed layer on the second dielectric layer and on the metallic block before forming the metallic pattern. According to some embodiments of the present disclosure, the method further includes: removing the first seed layer and partially removing the second seed layer during removing the first dielectric layer to expose the metallic pattern.
[0087] The features of several embodiments are outlined above so that those skilled in the art may better understand various aspects of the present disclosure. Those skilled in the art should understand that they can readily use the present disclosure as a basis for designing or modifying other processes and structures to achieve the same purposes and / or realize the same advantages as the embodiments described herein. Those skilled in the art should also recognize that these equivalent structures do not depart from the spirit and scope of the present disclosure, and that they can make various changes, substitutions, and alterations thereto without departing from the spirit and scope of the present disclosure.
Claims
1. An encapsulation structure, characterized in that, Comprising: A semiconductor die; A molding compound encapsulating the semiconductor die; A redistribution layer disposed on the molding compound and above the semiconductor die and electrically connected to the semiconductor die; And A conductive ball disposed on a first surface of the redistribution layer and electrically connected to the semiconductor die, Wherein the redistribution layer includes a dielectric layer and a joint, and at least one of the joints includes a pad portion, a ridge portion surrounding the pad portion, a metallic block located on the pad portion and embedded in the ridge portion, and a second seed layer sandwiched between the metallic block, the pad portion and the ridge portion, and the conductive ball contacts the ridge portion protruding from the first surface of the redistribution layer.
2. The encapsulation structure according to claim 1, wherein The at least one joint further includes a first seed layer located between the at least one joint and the first surface of the redistribution layer, The conductive ball directly contacts the pad portion without the first seed layer being located between the conductive ball and the pad portion.
3. The encapsulation structure according to claim 2, wherein The material of the first seed layer is the same as the material of the second seed layer.
4. The encapsulation structure according to claim 1, wherein The conductive ball contacts the ridge portion and the metallic block, The ridge portion and the metallic block protrude from the first surface of the redistribution layer at the same height.
5. The encapsulation structure according to claim 1, wherein The material of the metallic block includes copper, nickel, tungsten, titanium, silver, aluminum, gold and / or an alloy thereof.
6. The encapsulation structure according to claim 1, wherein The conductive ball includes a solder ball or a ball grid array (BGA) ball, and the joint is a ball pad including copper or a copper alloy.
7. An encapsulation structure, characterized in that Comprising: A semiconductor die; A redistribution layer disposed above the semiconductor die and electrically connected to the semiconductor die, wherein the redistribution layer has a first surface and a second surface opposite to the first surface; A molding compound disposed on the first surface of the redistribution layer and encapsulating the semiconductor die; And A conductive ball disposed on the second surface of the redistribution layer and electrically connected to the semiconductor die, Wherein the redistribution layer includes a dielectric layer and a joint, and at least one of the joints includes a pad portion, a plug portion disposed on the pad portion, a column portion disposed on the plug portion, and a seed layer located between the second surface of the redistribution layer and the at least one joint, and the conductive ball contacts the column portion and the plug portion protruding from the second surface of the redistribution layer.
8. The encapsulation structure according to claim 7, characterized in that, The dielectric layer is located on the seed layer.
9. The encapsulation structure according to claim 8, wherein The conductive ball directly contacts the column portion and the plug portion protruding from the second surface of the redistribution layer without the seed layer being located between the conductive ball and the column portion and the plug portion.
10. The encapsulation structure according to claim 7, characterized in that, The column portion and the plug portion protrude from the second surface of the redistribution layer at a first height, and the first height is 2% to 20% of the height of the conductive ball.
11. The encapsulation structure according to claim 7, wherein The material of the column portion, the material of the plug portion and the material of the pad portion are the same.
12. The encapsulation structure according to claim 7, wherein, The conductive ball includes a solder ball or a ball grid array (BGA) ball, and the joint is a ball pad including copper or a copper alloy.
13. A method for forming an encapsulation structure, characterized in that, Comprising: Forming a redistribution layer, including: Provide a carrier, on which a first dielectric layer is formed; Form a second dielectric layer having at least one opening over the first dielectric layer; Form a first seed layer and a metallic block over the carrier within the at least one opening; Form a second seed layer over the second dielectric layer, the at least one opening, and the metallic block; Form a metallic pattern over the second seed layer, the metallic pattern filling the at least one opening; Remove the carrier to expose the first dielectric layer; and Remove the first dielectric layer, the first seed layer, a portion of the second seed layer, and a portion of the second dielectric layer to expose the metallic pattern and the metallic block, Form at least one via; Provide a semiconductor die and form a molding compound encapsulating the semiconductor die, wherein the semiconductor die is electrically connected to the redistribution layer; and Form at least one conductive ball over the at least one via, wherein the at least one via in the redistribution layer includes a pad portion, a ridge portion surrounding the pad portion, the metallic block located on the pad portion and embedded in the ridge portion, and the second seed layer sandwiched between the metallic block, the pad portion, and the ridge portion, and the at least one conductive ball contacts the ridge portion protruding from the redistribution layer.
14. The method for forming an encapsulation structure according to claim 13, wherein Forming the first seed layer and the metallic block over the carrier within the at least one opening includes: Forming the first seed layer over the second dielectric layer and over the first dielectric layer within the at least one opening; Forming the metallic block over the first seed layer within the at least one opening; and Locally removing the first seed layer such that only the first seed layer remains under the metallic block.
Citation Information
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