A method and structure for realizing low power consumption standby of a chip

Abstract

The present invention discloses a method and structure for realizing low-power standby of a chip. By multiplexing the modulation interface of the chip, a corresponding chip can be controlled to enter a standby mode without a separate standby enabling interface. The method has few peripheral devices and is simple to apply. When the chip of the present invention is in standby mode, a power-consuming driving module is in a power-off state and a power tube is in a shut-off state, thereby realizing ultra-low power standby.

Description

Technical Field

[0001] The present invention relates to the technical field of chip design, and in particular to a method and structure for realizing low-power standby of a chip. Background Art

[0002] With the increasing requirements for energy consumption, more and more electronic products now have low-power standby requirements. The demand for low-power standby circuits that can be added to electronic products to shut down their driver modules without disconnecting the main power input of the driver modules is increasing. The low-power standby circuit only uses a very small external current (smaller than what is usually required for an external relay) to operate the disconnect function, shutting down some or all control circuits inside the driver module, thereby achieving low standby power consumption. The existing low-power standby implementation methods are generally divided into system level and chip level. The basic principle of implementation is: by receiving the standby enable signal, after processing, most of the power consumption paths inside the driver module are turned off, thereby achieving low-power standby.

[0003] In many industrial, commercial or residential lighting systems, a low current interface is used to turn off the driver module to achieve low power standby of the system. By using low current for switching, wear on the relay mechanism can be avoided, while using less power than conventional standby voltage circuits.

[0004] The disadvantage of the implementation of system-level low-power standby is that the standby enable signal needs to be kept active by adding peripheral circuits and low-voltage power supplies, the application cost is high, and the power consumption is still high during the shutdown state of the driver module. Most of the existing chip-level low-power standby implementations require independent standby enable signals, which increases the complexity of the application, and the power consumption during standby is still high.

[0005] Therefore, how to control the drive module to enter standby mode and achieve ultra-low power standby with fewer devices and without a separate standby enable signal interface has become a technical problem that needs to be urgently solved in the development of low-power standby chips. Summary of the invention

[0006] The purpose of the present invention is to provide a method and structure for realizing low-power standby of a chip in response to the technical problems existing in the prior art. By multiplexing the modulation interface of the chip, the driving module of the corresponding chip can be controlled to enter the standby mode without a separate standby enable interface, and ultra-low power standby can be achieved.

[0007] To achieve the above-mentioned purpose, the present invention provides a method for realizing low-power standby of a chip, wherein the chip is used to control a power conversion device to supply power to a load; the chip has a modulation interface for receiving a modulation signal input from outside the chip, a power interface coupled to external electric energy and supplying power to the inside of the chip, and a drive module for controlling the output of the power conversion device; the method comprises: (1) configuring the drive module to couple with the modulation interface to receive a modulation signal input from outside the chip, and configuring the output of the drive module to control a power tube in the power conversion device, thereby controlling the output of the power conversion device; (2) configuring a standby mode in the chip module, and couple the standby mode module with the modulation interface to multiplex the modulation interface to receive the standby / wake-up signal input from the outside of the chip, and configure the standby mode module to couple with the driving module; (3) configure a first power supply coupled to the power interface to power the driving module, and the driving module controls the power tube according to the modulation signal, thereby modulating the electrical parameters output by the power conversion device; (4) through the standby mode module, according to the standby / wake-up signal, control the driving module to power off and control the power tube to turn off, or control the driving module to power on and control the power tube to turn on, so as to achieve low power consumption when the chip is in standby mode.

[0008] To achieve the above-mentioned purpose, the present invention also provides a low-power standby structure of a chip, wherein the chip is used to control a power conversion device to supply power to a load; the chip has a modulation interface for receiving a modulation signal input from the outside of the chip, a power interface coupled to external electric energy and supplying power to the inside of the chip, and a drive module for controlling the output of the power conversion device; the chip also includes: a first power supply coupled to the power interface, the first power supply being used to supply power to the drive module; the input end of the drive module is coupled to the modulation interface to receive the modulation signal through the modulation interface, and the output end of the drive module controls the power tube in the power conversion device, thereby controlling the power The output of the conversion device; the chip also includes: a standby mode module, the standby mode module is coupled to the modulation interface to multiplex the modulation interface to receive the standby / wake-up signal input from the outside of the chip, and the standby mode module is further coupled to the driving module; the standby mode module controls the driving module to power off and control the power tube to turn off, or controls the driving module to power on and control the power tube to turn on according to the standby / wake-up signal, so as to achieve low power consumption when the chip is in standby mode; when the chip is in normal working state, the first power supply supplies power to the driving module, and the driving module controls the power tube according to the modulation signal, thereby modulating the electrical parameters of the output of the power conversion device.

[0009] The advantages of the present invention are: the input of the standby / wake-up signal of the chip of the present invention is realized through a multiplexed control interface, without a separate standby enable interface, with fewer peripheral devices and simple application; when the chip of the present invention is on standby, the power-consuming driving module is in a power-off state and the power tube is in a shut-off state, thereby realizing ultra-low power standby. The present invention can be applied to driver chips of typical non-isolated buck (buck) topology, non-isolated boost (boost) topology, isolated flyback (Flyback) topology, non-isolated buck-boost (buck_boost) topology, etc. of switching power supplies, and can also be applied to driver chips of linear power supplies to realize low-power standby of power driver chips. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0011] Figure 1 , a schematic diagram of the architecture of a first embodiment of a low power standby structure of a chip of the present invention;

[0012] Figure 2A , a schematic diagram of the architecture of an implementation scheme of a standby mode module of the present invention;

[0013] Figure 2B , a schematic diagram of the architecture of an implementation scheme of a standby control unit of the present invention;

[0014] Figure 3 , a schematic diagram of the architecture of the second embodiment of the low power standby structure of the chip of the present invention;

[0015] Figure 4 , a schematic diagram of the architecture of a third embodiment of the low power standby structure of the chip of the present invention;

[0016] Figure 5 , a circuit diagram of an embodiment of a power control switch unit of the present invention;

[0017] Figure 6 , a flow chart of a method for implementing low power standby of the chip of the present invention. DETAILED DESCRIPTION

[0018] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by those skilled in the art without making creative work belong to the scope of protection of the present invention. The terms "first", "second", "third", etc. (if any) in the specification and claims of the present invention and the accompanying drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the objects described in this way can be interchanged where appropriate. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions.

[0019] The present invention provides a method and structure for realizing low-power standby of a chip. The chip is used to control a power conversion device to supply power to a load. The chip has a modulation interface for receiving a modulation signal input from the outside of the chip, a power interface coupled to external electric energy and supplying power to the inside of the chip, and a drive module for controlling the output of the power conversion device. The input end of the drive module is configured to couple with the modulation interface so as to receive the modulation signal through the modulation interface, and the output end of the drive module is configured to control the power tube in the power conversion device so as to control the output of the power conversion device. A standby mode module is configured in the chip, and the standby mode module is connected to the modulation interface. The interface is coupled to multiplex the modulation interface to receive the standby / wake-up signal input from the outside of the chip, and the standby mode module is configured to couple with the driving module; a first power supply coupled with the power supply interface is configured in the chip to power the driving module; the standby mode module controls the power-off of the driving module and controls the power tube to be turned off, or controls the power-on of the driving module and controls the power tube to be turned on according to the standby / wake-up signal, so as to achieve low power consumption when the chip is in standby; when the chip is in normal working state, the first power supply supplies power to the driving module, and the driving module controls the power tube according to the modulation signal, so as to modulate the electrical parameters output by the power conversion device. The present invention reuses the modulation interface of the chip, and when the modulation interface inputs the modulation signal, the driving module works normally; when the modulation interface inputs the standby / wake-up signal, the standby mode module controls the power-off or power-on of the driving module according to the standby / wake-up signal. The power-off refers to the failure of the electrical equipment or circuit to work normally due to power failure, power loss, or the quality of electricity not meeting the requirements.

[0020] The input of the standby / wake-up signal of the chip of the present invention is realized through a multiplexed modulation interface, without a separate standby enabling interface, with few peripheral devices and simple application; when the chip of the present invention is on standby, the power-consuming driving module is in a power-off state and the power tube is in a shut-off state, so that the ultra-low power standby of the chip itself can be realized. And the present invention can be applied to the typical non-isolated buck (buck) topology structure, non-isolated boost (boost) topology structure, isolated flyback (Flyback) topology structure, non-isolated buck-boost (buck_boost) topology structure of the switching power supply, etc. The driver chip can also be applied to the driver chip of the linear power supply to realize the low-power standby of the power driver chip; and it can be applied to the motor chip to realize the low-power standby of the motor chip.

[0021] Please also read Figure 1-2A -2B, where Figure 1 FIG. 1 is a schematic diagram of the architecture of the first embodiment of the low power standby structure of the chip of the present invention. Figure 2A FIG. 1 is a schematic diagram of the architecture of an implementation mode of a standby mode module of the present invention. Figure 2B It is a schematic diagram of the architecture of an implementation of a standby control unit of the present invention.

[0022] like Figure 1 As shown, the chip 11 is used to control the power conversion device 18 to supply power to the load 19; the chip 11 has a modulation interface Dim for receiving an input signal input from the outside of the chip, a power interface HV coupled to the external electric energy 17 and supplying power to the inside of the chip 11, a driving module 111 for controlling the output of the power conversion device 18, a first power supply VCC1 coupled to the power interface HV and supplying power to the driving module 111, and a standby mode module 112 for realizing low power standby.

[0023] The external electric energy 17 can be connected to the chip 11 through the power interface HV of the chip 11, so as to supply power to the entire chip.

[0024] Specifically, the input signal received by the modulation interface Dim includes a modulation signal for modulating the electrical parameters of the output of the power conversion device 18, and a standby signal for controlling the chip to enter the standby mode / or a wake-up signal for waking up the chip, that is, the modulation interface Dim is multiplexed to receive the modulation signal and the standby / wake-up signal input from the outside of the chip. Among them, the value of the standby signal is less than the minimum value of the modulation signal. Here, the minimum value of the modulation signal should be understood as the value corresponding to the power conversion device (full load) output being 0% when the modulation signal is lower than a certain value. In some embodiments, the modulation signal varies in a small range, for example, 0 to 320mv so that the output of the power conversion device is maintained at 0%, then the minimum value of this modulation signal should be understood as 320mv. Then the value of the standby signal should be less than 320mv.

[0025] Specifically, the input end of the driving module 111 is coupled to the modulation interface Dim to receive the modulation signal through the modulation interface Dim, and the output end of the driving module 111 controls the power tube M0 in the power conversion device 18, thereby controlling the output of the power conversion device 18. When the driving module 111 works normally, the first power supply VCC1 supplies power to the driving module 111; the driving module 111 controls the power tube M0 in the power conversion device 18 according to the modulation signal input by the modulation interface Dim, thereby modulating the electrical parameters of the output of the power conversion device 18. The modulation method of modulating the current value of the power tube M0 to modulate the electrical parameters of the output of the power conversion device 18 can refer to the existing modulation technology, which will not be repeated here.

[0026] As an optional implementation, the power tube M0 can be packaged in the same packaging structure 10 with the chip 11 and controlled by the driving module 111. The driving module 111 controls the power tube M0 to modulate the output electrical parameters of the power conversion device 18. By packaging the chip 11 and the power tube M0 in the same packaging structure 10, there is no need to separately set a power tube outside the packaging structure 10, which can simplify the peripheral circuit design of the system using the packaging structure 10 and save costs.

[0027] Specifically, the standby mode module 112 is coupled to the modulation interface Dim to multiplex the modulation interface to receive the standby / wake-up signal input from the outside of the chip, and the standby mode module 112 is coupled to the driving module 111. The standby mode module 112 receives the standby / wake-up signal, and controls the driving module 111 to power off and the power tube M0 to turn off according to a standby signal in the standby / wake-up signal, or controls the driving module 111 to power on and the power tube M0 to turn on according to a wake-up signal in the standby / wake-up signal, thereby achieving low power consumption when the chip is in standby mode.

[0028] In a further embodiment, the chip 11 also includes a second power supply VCC2 coupled to the power interface HV. The second power supply VCC2 is used to power the standby mode module 112, wherein the second power supply VCC2 is independent of the first power supply VCC1. That is, the second power supply VCC2 is in parallel with the first power supply VCC1 and is independent of each other, ensuring that the standby mode module 112 is always in a powered-on state. And the current provided by the second power supply VCC2 is much smaller than the current provided by the first power supply VCC1 to other components in the chip, that is, the power consumption of the power supply path of the standby mode module 112 is much smaller than the power consumption of the power supply path of the driving module 111. The standby mode module 112 is always in a powered-on state, which can achieve low power consumption while ensuring that the chip 11 can be awakened to enter a normal working state according to a wake-up signal input by the modulation interface Dim. In other embodiments, the second power supply VCC2 can also be coupled to the first power supply VCC1, and a small current is obtained to power the standby mode module 112 by processing the large current provided by the first power supply VCC1. The current supplied to the standby mode module 112 is much smaller than the current provided by the first power supply VCC1 to other components in the chip, thereby achieving low-power standby.

[0029] like Figure 2A As shown, in this embodiment, the standby mode module 112 includes a comparison unit 21, a standby control unit 22 and a logic output unit 23. The comparison unit 21 receives an input signal Dim_in through the modulation interface Dim, compares the input signal Dim_in with a reference signal Vref-lp, and outputs a comparison result Cmp-out; the standby control unit 22 processes the comparison result Cmp-out to output a standby signal set or output a wake-up signal reset; the logic output unit 23 performs a logic operation on the signal output by the standby control unit 22 and outputs a standby / wake-up signal Standby, so as to control the driving module 111 to power off and control the power tube M0 to turn off according to the standby signal set (for example, Standby=1) in the standby / wake-up signal Standby, or control the driving module 111 to power on and control the power tube M0 to turn on according to the wake-up signal reset (for example, Standby=0) in the standby / wake-up signal Standby, so as to achieve low power consumption when the chip is in standby. Since the voltage range of the input signal Dim_in is different when the system enters normal operation and standby state, the value of the standby signal is smaller than the minimum value of the modulation signal, so the modulation interface Dim can be reused. The comparison unit 21 can be a comparator, or a Schmitt or inverter.

[0030] In order to realize the function of the standby / wake-up signal multiplexing modulation interface, the standby signal needs to be distinguished from the normal modulation signal. If the modulation signal corresponds to a PWM signal, the reference signal Vref-lp needs to be less than the maximum value corresponding to the normal modulation signal when the power conversion device outputs 0% of the full load, so that the entire chip can enter the standby mode when receiving the standby signal; and when used as a wake-up signal, the reference signal Vref-lp can be greater than the maximum value corresponding to the normal modulation signal when the power conversion device outputs 0%. Therefore, in the above embodiment, the comparison unit 21 can be a hysteresis comparator, or the reference signal Vref-lp can use different values ​​when corresponding to the standby signal and the wake-up model. If the corresponding modulation signal is an analog signal, in order to distinguish the standby signal from the normal modulation signal, the reference signal Vref-lp needs to be less than the maximum value corresponding to the normal modulation signal when the power conversion device outputs 0% of the full load, so that the entire chip can enter the standby mode when receiving the standby signal.

[0031] In a further embodiment, the driver module 111 further includes a logic unit 28 and a driver control unit (driver) 29; the standby / wake-up signal Standby output by the logic output unit 23 after the standby mode module 112 processes the input signal received from the modulation interface Dim, and the modulation signal Dim_out output by the driver module 111 after processing the input signal received from the modulation interface Dim, are input to the driver control unit 29 to drive the power tube M0 after logical operation by the logic unit 28. By adding control logic, the control of the power tube M0 is made more stable and reliable.

[0032] like Figure 2B As shown, the standby control unit 22 includes a standby processing channel 221 and a wake-up processing channel 222. The standby processing channel 221 receives the comparison result output by the comparison unit 21 for processing and then outputs a standby signal set; the wake-up processing channel 222 receives the comparison result output by the comparison unit 21 for processing and then outputs a wake-up signal reset.

[0033] The wake-up processing channel 222 is an optional component (indicated by a dotted line in the figure) used to improve anti-interference performance. When the wake-up processing channel 222 is not set, when the comparison result Cmp-out output by the comparison unit 21 is at a certain level, it can be directly used as a wake-up signal reset; for example, a high-level comparison result Cmp-out can be directly used as a wake-up signal reset.

[0034] In a further embodiment, the standby processing channel 221 of the standby control unit 22 includes a standby delay unit 2211, the input end of the standby delay unit 2211 is coupled to the output end of the comparison unit 21, and the output of the standby delay unit 2211 is coupled to the logic output unit 23. Specifically, the standby delay unit 2211 can perform inversion processing on the comparison result and perform rising edge delay by a delay threshold, and then output the standby signal set to the logic output unit 23; or the standby delay unit 2211 can perform falling edge delay by a delay threshold and perform inversion processing on the comparison result, and then output the standby signal set to the logic output unit 23. Preferably, the delay threshold is greater than the period of the modulation signal of the electrical parameter used to modulate the output of the power conversion device 18, so that it can be well compatible with the control input using a PWM signal or an analog signal as the modulation signal.

[0035] In a further embodiment, the wake-up processing channel 222 of the standby control unit 22 includes a wake-up delay unit 2221 and a wake-up logic unit 2222; the input end of the wake-up delay unit 2221 is coupled to the output end of the comparison unit 21, the output of the wake-up delay unit 2221 is coupled to the input end of the wake-up logic unit 2222, and the output end of the wake-up logic unit 2222 is coupled to the logic output unit 23. Specifically, the wake-up delay unit 2221 can delay the comparison result, output it to the wake-up logic unit 2222 for logic operation (for example, inversion processing), and output the wake-up signal reset to the logic output unit 23. For example, for an input signal whose pulse input by the modulation interface Dim is greater than a certain threshold value (for example, 28 microseconds), the comparison result obtained by comparison by the comparison unit 21 can directly output the wake-up signal reset through delay and logic operation.

[0036] In a further embodiment, the wake-up processing channel 222 of the standby control unit 22 further includes a pulse wake-up unit 2223, the input end of the pulse wake-up unit 2223 is coupled to the output end of the comparison unit 21, and the output end of the pulse wake-up unit 2223 is coupled to the wake-up logic unit 2222. Specifically, the pulse wake-up unit 2223 can count the pulses of the comparison result and output the counting result to the wake-up logic unit 2222; the pulse wake-up unit 2223 can latch the comparison result after counting the pulses, and output the latched counting result to the wake-up logic unit 2222. The wake-up logic unit 2222 can perform a logical operation (for example, first perform a logical OR operation and then perform an inversion process) on the signal output by the wake-up delay unit 2221 and the signal output by the pulse wake-up unit 2223, and then output a wake-up signal reset. For example, for an input signal whose pulse inputted by the modulation interface Dim is smaller than a certain threshold value (eg, 28 microseconds), the comparison result obtained by the comparison unit 21 can output a wake-up signal reset through pulse counting and logic operation.

[0037] In a further embodiment, the wake-up processing channel 222 of the standby control unit 22 further includes a pulse wake-up reset unit 2224, and the pulse reset unit 2224 is coupled between the standby processing channel 221 and the pulse wake-up unit 2223, and is used to reset the pulse wake-up unit 2223 when the standby processing channel 221 outputs the standby signal set. Specifically, the pulse reset unit 2224 can use a single pulse reset method to reset the pulse wake-up unit 2223 according to the standby signal set.

[0038] Specifically, the low power consumption working principle of the present invention is described by taking the PWM dimming signal as the modulation signal as an example.

[0039] After the first power supply VCC1 is powered on, the input signal Dim_in is compared with the reference signal Vref-lp: when Dim_in>Vref-lp, the comparison result Cmp-out is a high level, the wake-up processing channel 222 works, and the standby mode module 112 outputs a wake-up signal reset (for example, Standby=0); at this time, the high current path where the driving module 111 is located is turned on, the gate of the power tube M0 is modulated by the PWM dimming signal, and the chip works normally.

[0040] When Dim_in < Vref-lp, Cmp-out is at a low level and the standby processing channel 221 operates. If the duration of Cmp-out is less than a delay threshold Tdelay, then Standby = 0; if the duration of Cmp-out is greater than Tdelay, then the standby mode module 112 outputs a standby signal set (e.g., Standby = 1). At this time, the high-current path where the driving module 111 is located is turned off, and the gate potential of the power transistor M0 is lowered and then turned off. At this time, the power consumption of the chip only remains the small-current path where the standby mode module 112 is located, and the power consumption is extremely small, thus achieving low-power standby. It should be noted that the delay threshold Tdelay must be greater than the period of Dim_in, so that the PWM signal input of Dim_in can be compatible, enabling the present invention to be applicable to the input signal Dim_in of PWM signals or analog signals.

[0041] The comparison unit 21, standby control unit 22, and logic output unit 23 described in the present invention can be composed of a circuit including logic devices. Specifically, the logic devices include but are not limited to: analog logic devices and digital logic devices. Among them, the analog logic device is a device for processing analog electrical signals, which includes but is not limited to: a comparator, Schmitt, inverter, AND gate, OR gate, etc., a combination of one or more logic devices; the digital logic device is a device for processing digital signals represented by pulse signals, which includes but is not limited to: flip-flops, gate circuits, latches, selectors, etc., a combination of one or more logic devices.

[0042] Please refer to Figure 3 , a schematic diagram of the architecture of the second embodiment of the low-power standby structure of the chip of the present invention. Different from Figure 1 the embodiment shown, in this embodiment, the driving module 111 includes at least one driving sub-module 301, and the chip 11 further includes at least one power control switch 31. The power control switch 31 is coupled between the driving sub-module 301 and the first power supply VCC1 and is controlled by the standby mode module 112. The standby mode module 112 controls the disconnection of the power control switch 31 according to the standby signal in the standby / wake-up signal to control the corresponding driving sub-module 301 to lose power; controls the closing of the power control switch 31 according to the wake-up signal in the standby / wake-up signal to control the corresponding driving sub-module 301 to power on. That is, the low-power standby structure provided by the present invention can separately control each power-consuming unit in the driving module to lose power or power on, thus achieving flexible control of low-power standby.

[0043] In this embodiment, two driving submodules 301 and two corresponding power control switches 31 are illustrated, so that the corresponding driving submodule 301 is controlled to be powered off or powered on according to the corresponding standby / wake-up signal. It should be noted that the number of driving submodules 301 can be 1, 2 or more than 2; the number of power control switches 31 can be the same as the number of driving submodules 301, or less than the number of driving submodules 301 (that is, some driving submodules 301 are still in a powered working state in low power consumption mode). The present invention does not limit the number of driving submodules 301 and its correspondence with the power control switch 31. The power control switch 31 can be composed of one or more of a MOS tube, a triode, and a thyristor.

[0044] Please also read Figure 4-Figure 5 ,in, Figure 4 FIG. 1 is a schematic diagram of the architecture of the third embodiment of the low power standby structure of the chip of the present invention. Figure 5 FIG. 4 is a circuit diagram of an embodiment of a power control switch unit of the present invention.

[0045] like Figure 4 As shown, Figure 1 The difference between the illustrated embodiments is that, in this embodiment, the chip 11 further includes a power control switch unit 41, the power control switch unit 41 is coupled between the first power supply VCC1 and the power interface HV, and is controlled by the standby mode module 112; the standby mode module 112 controls the power control switch unit 41 according to the standby / wake-up signal to control the first power supply VCC1 to be disconnected from the power interface HV to stop supplying power to the driver module 111, thereby controlling the driver module 111 to be powered off and controlling the power tube M0 to be turned off; or controlling the first power supply VCC1 to be connected to the power interface HV to supply power to the driver module 111, thereby controlling the driver module 112 to be powered on and controlling the power tube M0 to be turned on. That is, the low-power standby structure provided by the present invention can directly disconnect the power supply output to the driver module 111 from the input end of the first power supply VCC1, so that no current passes through the branch where the driver module 111 is located during standby (including the current of the first power supply VCC1 itself is also turned off), thereby reducing the power consumption of the chip during standby. At the same time, since the power tube M0 is turned off and remains in the off state before the chip is awakened, the power consumption of the chip in standby mode is reduced to the maximum extent, achieving ultra-low power standby mode.

[0046] like Figure 5As shown, the chip 11 internally includes at least one capacitor Cvcc coupled to the first power supply VCC1, and the power control switch unit 41 includes a controlled discharge branch 411 controlled by the standby mode module 112; when the standby mode module 112 outputs a standby signal set, the controlled discharge branch 411 is controlled by the standby signal set and connected to form a controlled discharge loop with the capacitor Cvcc, thereby causing the capacitor to discharge to reduce the potential of the first power supply VCC1, thereby controlling the drive module 111 to power off.

[0047] In a further embodiment, the controlled discharge branch 411 is a first MOS transistor M1, the gate of the first MOS transistor M1 is controlled by the standby mode module 112, the drain of the first MOS transistor M1 is connected to the first power supply VCC1, and the source of the first MOS transistor M1 is grounded; the first end of the capacitor Cvcc is connected to the first power supply VCC1, and the second end of the capacitor Cvcc is grounded. When the standby mode module 112 outputs a standby signal set (for example, Standby=1), the first MOS transistor M1 is turned on to provide a controlled discharge circuit for the capacitor Cvcc, thereby causing the capacitor to discharge to reduce the potential of the first power supply VCC1, thereby controlling the driver module 111 to power off.

[0048] like Figure 5 As shown, the chip further includes an adjustment tube M10 coupled between the power interface HV and the first power supply VCC1; the power control switch unit 41 includes at least one switch control branch 412, the input end of the switch control branch 412 is controlled by the standby mode module 112, and its output end controls the adjustment tube M10; when the standby mode module 112 outputs the standby signal set, the switch control branch 412 controls the adjustment tube M10 to reduce the potential of the first power supply VCC1. The adjustment tube M10 can be an anti-backflow tube. In high PF applications, the voltage provided by the power interface HV may be lower than the voltage of the first power supply VCC1. In this application, the first power supply VCC1 generally needs to add a capacitor to store electricity so that when the voltage provided by the power interface HV is lower than the voltage of the first power supply VCC1, the capacitor can power the chip. However, at the same time, the body diode of the conventional transistor will be turned on, causing the current on the capacitor to flow back to the power interface HV end with a lower potential, and the power supply of the first power supply VCC1 will be insufficient. The use of an anti-backflow tube can prevent the current from flowing back.

[0049] In a further embodiment, the switch control branch 412 includes a second MOS transistor M2, the gate of the second MOS transistor M2 is controlled by the standby mode module 112, the drain of the second MOS transistor M2 is connected to the gate of the adjustment transistor M10, and the source of the second MOS transistor M2 is grounded. When the standby mode module 112 outputs a standby signal set (for example, Standby=1), the second MOS transistor M2 is turned on, thereby lowering the gate potential of the adjustment transistor M10 to control the adjustment transistor M10 to be turned off, so as to reduce the potential of the first power supply VCC1.

[0050] Preferably, the switch control branch 412 includes at least one resistor and one switch, the resistor and the switch are connected in series, the common point of the resistor and the switch is the output end of the switch control branch 412, and the control end of the switch is the input end of the switch control branch 412 and is controlled by the standby mode module 112. The resistor is a resistor in the form of large impedance and small current (for example, greater than a preset impedance and less than a preset current), thereby reducing the current of the switch control branch 412 and thus reducing power consumption.

[0051] In a further embodiment, the switch control branch 412 includes a resistor Rvs and a second MOS tube M2 connected in series; the first end of the resistor Rvs is connected to the drain of the power tube M0, and the second end thereof is connected to the drain of the second MOS tube M2, and is also connected to the gate of the adjustment tube M10; the gate of the second MOS tube M2 is controlled by the standby mode module 112, and its source is grounded; the drain of the adjustment tube M10 further receives the high-voltage startup voltage VS-JFET provided by the power interface HV. When the standby mode module 112 outputs the standby signal set (for example, Standby=1), the second MOS tube M2 is turned on, thereby lowering the gate potential of the adjustment tube M10 to control the adjustment tube M10 to turn off. The resistor Rvs adopts a large impedance and small current form resistor, thereby reducing the current of the switch control branch 412, thereby reducing power consumption.

[0052] Specifically, the external power 17 can be connected to the chip 11 through the power interface HV of the chip 11, and through an ultra-high voltage junction field effect transistor M UHV A high voltage startup voltage VS-JFET is provided to the chip 11 .

[0053] In a further embodiment, the chip 11 further includes a standby voltage generating circuit 51, the standby voltage generating circuit 51 is coupled to the power interface HV, receives the high voltage startup voltage VS-JFET, and generates a second power supply VCC2 independent of the first power supply VCC1 to power the standby mode module 112, ensuring that the standby mode module 112 is always in a powered-on state. The standby voltage generating circuit 51 itself has low power consumption, and the current provided by the second power supply VCC2 is much smaller than the current provided by the first power supply VCC1 to other components in the chip, that is, the power consumption of the power supply path of the standby mode module 112 is much smaller than the power consumption of the power supply path of the driving module 111.

[0054] The input of the standby / wake-up signal of the chip of the present invention is realized through a multiplexed control interface, without the need for a separate standby enabling interface; when the chip of the present invention is on standby, the power-consuming driving module is in a power-off state and the power tube is in a shut-off state, thereby realizing ultra-low power consumption standby.

[0055] Based on the same inventive concept, the present invention also discloses a method for realizing low-power standby of a chip.

[0056] Please also read Figure 1-5 as well as Figure 6 ,in, Figure 6 The present invention is a flowchart of a method for realizing low-power standby of a chip. The method comprises the following steps: S61: configuring a driving module of the chip to couple with a modulation interface of the chip to receive a modulation signal input from outside the chip, and configuring the output of the driving module to control a power tube in a power conversion device, thereby controlling the output of the power conversion device; S62: configuring a standby mode module in the chip, and coupling the standby mode module with the modulation interface to multiplex the modulation interface to receive a standby / wake-up signal input from outside the chip, and configuring the standby mode module to couple with the driving module; S63: configuring a first power supply coupled with the power interface of the chip to power the driving module, and the driving module controls the power tube according to the modulation signal, thereby modulating the electrical parameters of the output of the power conversion device; S64: controlling the driving module to power off and the power tube to turn off, or controlling the driving module to power on and the power tube to turn on according to the standby / wake-up signal through the standby mode module, thereby realizing low power consumption when the chip is in standby mode.

[0057] S61: configuring the driving module of the chip to couple with the modulation interface of the chip to receive a modulation signal input from outside the chip, and configuring the output of the driving module to control a power tube in a power conversion device, thereby controlling the output of the power conversion device.

[0058] Specifically, Figure 1 As shown, the chip 11 is used to control the power conversion device 18 to supply power to the load 19; the chip 11 has a modulation interface Dim for receiving an input signal input from the outside of the chip, a power interface HV coupled to the external electric energy 17 and supplying power to the inside of the chip 11, a driving module 111 for controlling the output of the power conversion device 18, a first power supply VCC1 coupled to the power interface HV and supplying power to the driving module 111, and a standby mode module 112 for realizing low power standby.

[0059] The external electric energy 17 can be connected to the chip 11 through the power interface HV of the chip 11, so as to supply power to the entire chip.

[0060] The input signal received by the modulation interface Dim includes a modulation signal for modulating the electrical parameters of the output of the power conversion device 18, and a standby signal for controlling the chip to enter the standby mode / or a wake-up signal for waking up the chip, that is, the modulation interface Dim is multiplexed to receive the modulation signal and the standby / wake-up signal input from the outside of the chip. Among them, the value of the standby signal is less than the minimum value of the modulation signal. Here, the minimum value of the modulation signal should be understood as the value corresponding to the power conversion device (full load) output being 0% when the modulation signal is lower than a certain value. In some embodiments, the modulation signal varies in a small range, for example, 0 to 320mv so that the output of the power conversion device is maintained at 0%, then the minimum value of this modulation signal should be understood as 320mv. Then the value of the standby signal should be less than 320mv.

[0061] As an optional implementation, the power tube M0 can be packaged in the same packaging structure 10 with the chip 11 and controlled by the driving module 111. The driving module 111 controls the power tube M0 to modulate the output electrical parameters of the power conversion device 18. By packaging the chip 11 and the power tube M0 in the same packaging structure 10, there is no need to separately set a power tube outside the packaging structure 10, which can simplify the peripheral circuit design of the system using the packaging structure and save costs.

[0062] S62: configuring a standby mode module in the chip, and coupling the standby mode module to the modulation interface to multiplex the modulation interface to receive a standby / wake-up signal input from outside the chip, and configuring the standby mode module to couple to the driving module.

[0063] Specifically, Figure 1 As shown, the standby mode module 112 and the driving module 111 reuse the modulation interface Dim of the chip 11, thereby eliminating the need for a separate standby enabling interface.

[0064] In a further embodiment, step S62 further includes: configuring a second power supply coupled to the power interface to supply power to the standby module, wherein the second power supply is independent of the first power supply. Figure 1 As shown, by configuring a second power supply VCC2 independent of the first power supply VCC1 in the chip 11, the second power supply VCC2 is coupled to the power interface HV and supplies power to the standby mode module 112. That is, the second power supply VCC2 is parallel to the first power supply VCC1 and independent of each other, ensuring that the standby mode module 112 is always in a powered-on state. And the current provided by the second power supply VCC2 is much smaller than the current provided by the first power supply VCC1 to other components in the chip, that is, the power consumption of the power supply path of the standby mode module 112 is much smaller than the power consumption of the power supply path of the driving module 111. The standby mode module 112 is always in a powered-on state, which can achieve low power consumption while ensuring that the chip 11 can be awakened to enter a normal working state according to a wake-up signal input by the modulation interface Dim. In other embodiments, the second power supply VCC2 can also be coupled to the first power supply VCC1, and a small current is obtained to power the standby mode module 112 by processing the large current provided by the first power supply VCC1. The current supplied to the standby mode module 112 is much smaller than the current provided by the first power supply VCC1 to other components in the chip, thereby achieving low-power standby.

[0065] S63: configuring a first power supply coupled to the power interface of the chip, and the driving module controls the power tube according to the modulation signal, thereby modulating the output electrical parameter of the power conversion device.

[0066] When the driving module 111 is operating normally, the first power supply VCC1 supplies power to the driving module 111. The driving module 111 controls the power tube M0 according to a modulation signal input by the modulation interface Dim, thereby modulating the output electrical parameter of the power conversion device 18. The modulation method of modulating the output electrical parameter of the power conversion device 18 by modulating the current value of the power tube M0 can refer to the existing modulation technology, which will not be described here.

[0067] S64: The standby mode module controls the driving module to power off and the power tube to turn off, or controls the driving module to power on and the power tube to turn on according to the standby / wake-up signal, thereby achieving low power consumption when the chip is in standby mode.

[0068] Specifically, the standby mode module 112 controls the driving module 111 to power off and the power tube M0 to turn off according to a standby signal in the standby / wake-up signal input by the modulation interface Dim, thereby achieving low power consumption when the chip 11 is in standby mode; or the standby mode module 112 controls the driving module 111 to power on and the power tube M0 to turn on according to a wake-up signal in the standby / wake-up signal input by the modulation interface Dim, thereby waking up the chip 11 to enter a normal working state.

[0069] In a further implementation, the standby / wake-up signal output by the standby mode module 112 after processing the input signal received from the modulation interface Dim and the modulation signal output by the driving module 111 after processing the input signal received from the modulation interface Dim are output after logical operation to drive and control the power tube M0. By adding control logic, the control of the power tube M0 is made more stable and reliable.

[0070] In a further embodiment, the driving module includes at least one driving submodule; step S63 further includes: configuring a power control switch coupled between the driving submodule and the first power supply, and controlled by the standby mode module; step S64 further includes: controlling the disconnection of the power control switch according to the standby / wake-up signal by the standby mode module to control the corresponding driving submodule to power off; or controlling the closing of the power control switch to control the corresponding driving submodule to power on. Figure 3 As shown, the low-power standby structure provided by the present invention can control the power-off or power-on of each power-consuming unit in the driving module respectively, thereby realizing flexible control of low-power standby.

[0071] In a further embodiment, step S63 further includes: configuring a power control switch unit coupled between the first power supply and the power interface, and being controlled by the standby mode module; step S64 further includes: controlling the power control switch unit according to the standby / wake-up signal by the standby mode module to control the first power supply to disconnect from the power interface to stop supplying power to the driver module, or controlling the first power supply to connect to the power interface to supply power to the driver module. Figure 4 As shown, the low-power standby structure provided by the present invention can directly disconnect the power supply output to the driving module 111 from the input end of the first power supply VCC1, so that no current passes through the branch where the driving module 111 is located during standby (including the current of the first power supply VCC1 itself is also turned off), and at the same time control the power tube M0 to remain turned off, thereby minimizing the power consumption of the chip during standby and achieving ultra-low power standby.

[0072] In a further embodiment, step S63 further includes: configuring at least one capacitor coupled to the first power supply, and configuring at least one controlled discharge branch controlled by the standby mode module in the power control switch unit; step S64 further includes: when the standby mode module outputs a standby signal, the controlled discharge branch is controlled by the standby signal and connected to form a controlled discharge loop with the capacitor, so that the capacitor discharges to reduce the potential of the first power supply. Figure 5 As shown, the controlled discharge branch 411 can be a first MOS tube M1, the gate of the first MOS tube M1 is controlled by the standby mode module 112, the drain of the first MOS tube M1 is connected to the first power supply VCC1, and the source of the first MOS tube M1 is grounded; the first end of the capacitor Cvcc is connected to the first power supply VCC1, and the second end of the capacitor Cvcc is grounded. When the standby mode module 112 outputs the standby signal set (for example, Standby=1), the first MOS tube M1 is turned on to provide a controlled discharge circuit for the capacitor Cvcc, thereby causing the capacitor to discharge to reduce the potential of the first power supply VCC1, thereby controlling the driving module 111 to power off.

[0073] In a further embodiment, step S63 further includes: configuring an adjustment tube coupled between the first power supply and the power interface, and configuring at least one switch control branch in the power control switch unit, and configuring the input end of the switch control branch to be controlled by the standby mode module, and the output end of the switch control branch to control the adjustment tube; preferably, configuring at least one resistor and one switch in the switch control branch, and configuring the resistor and the switch to be connected in series, the common point of the resistor and the switch is the output end of the switch control branch, and the control end of the switch is the input end of the switch control branch and is controlled by the standby mode module. Step S64 further includes: when the standby mode module outputs a standby signal, the switch control branch controls the adjustment tube to reduce the potential of the first power supply.

[0074] like Figure 5As shown, the switch control branch 412 may include a resistor Rvs and a second MOS tube M2 connected in series; the first end of the resistor Rvs is connected to the drain of the adjustment tube M10, and the second end thereof is connected to the drain of the second MOS tube M2, and is also connected to the gate of the adjustment tube M10; the gate of the second MOS tube M2 is controlled by the standby mode module 112, and its source is grounded; the drain of the adjustment tube M10 further receives the high-voltage start-up voltage VS-JFET provided by the external power 17. When the standby mode module 112 outputs the standby signal set (for example, Standby=1), the second MOS tube M2 is turned on, thereby lowering the gate potential of the adjustment tube M10, thereby controlling the adjustment tube M10 to be turned off, so as to reduce the potential of the first power supply. The resistor Rvs adopts a large impedance and small current form resistor, thereby reducing the current of the switch control branch 412, thereby reducing power consumption.

[0075] In a further implementation, step S64 also includes: the standby mode module receives an input signal through the modulation interface, and compares the input signal with a reference signal, thereby determining that the input signal is a standby signal, or determining that the input signal is a wake-up signal. Specifically, it includes the following steps: 1) comparing the input signal with the reference signal and outputting a comparison result; 2) processing the comparison result to output a standby signal or output a wake-up signal; 3) performing a logical operation on the signal output in step 2) and outputting a standby / wake-up signal, so as to control the power-off of the drive module according to the standby signal in the standby / wake-up signal, thereby controlling the power tube to be turned off, thereby achieving low power consumption when the chip is in standby mode; or controlling the power-on of the drive module according to the wake-up signal in the standby / wake-up signal, thereby controlling the power tube to be turned on. The above implementation can refer to Figure 2 and its description, which will not be repeated here.

[0076] It should be understood that the flowcharts and block diagrams in the accompanying drawings illustrate the possible implementation architecture, functions and operations of the structures and methods according to various embodiments of the present invention. In this regard, each box in the flowchart or block diagram can represent a part of a module or component. It should also be noted that in some alternative implementations, the functions marked in the boxes can also occur in an order different from that marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved.

[0077] The above is only a preferred embodiment of the present invention. It should be pointed out that ordinary technicians in this technical field can make several improvements and modifications without departing from the principle of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A method for realizing low-power standby of a chip, wherein the chip is used to control a power conversion device to supply power to a load; the chip has a modulation interface for receiving a modulation signal input from outside the chip, a power interface coupled to external electric energy and supplying power to the inside of the chip, and a drive module for controlling the output of the power conversion device; characterized in that: The method comprises: (1) configuring the driving module to couple with the modulation interface to receive a modulation signal input from outside the chip, and configuring the output of the driving module to control the power tube in the power conversion device, thereby controlling the output of the power conversion device; (2) configuring a standby mode module in the chip, and coupling the standby mode module to the modulation interface, so as to multiplex the modulation interface to receive a standby / wake-up signal input from outside the chip, and configuring the standby mode module to couple to the driving module; (3) configuring a first power supply coupled to the power interface to supply power to the driving module, wherein the driving module controls the power tube according to the modulation signal to modulate the output electrical parameter of the power conversion device; (4) receiving the standby / wake-up signal through the standby mode module, controlling the driving module to power off and the power tube to turn off, or controlling the driving module to power on and the power tube to turn on, so as to achieve low power consumption when the chip is in standby mode; The driving module includes a logic unit and a driving control unit; the step (4) includes: performing a logic operation on the standby / wake-up signal output by the standby mode module after processing the input signal received from the modulation interface and the modulation signal output by the driving module after processing the input signal received from the modulation interface, and then inputting the result to the driving control unit; when the modulation interface inputs the modulation signal, the driving module works normally; when the modulation interface inputs the standby / wake-up signal, the standby mode module controls the driving module to power off or on according to the standby / wake-up signal to drive the power tube; The driving module includes at least one driving submodule; Step (3) further includes step (3A): configuring a power control switch coupled between the driving submodule and the first power supply and controlled by the standby mode module; Step (4) further includes step (4A): controlling the disconnection of the power control switch according to the standby / wake-up signal through the standby mode module to control the corresponding driving submodule to power off, or controlling the closing of the power control switch to control the corresponding driving submodule to power on; Alternatively, step (3) further includes step (3B): configuring a power control switch unit coupled between the first power supply and the power interface and controlled by the standby mode module; Step (4) further includes step (4B): controlling the power control switch unit according to the standby / wake-up signal through the standby mode module to control the disconnection / connection of the first power supply and the power interface so that the drive module is powered off / on.

2. The implementation method according to claim 1, characterized in that: Step (2) also includes: configuring a second power supply coupled to the power interface to power the standby mode module, wherein the second power supply is independent of the first power supply.

3. The implementation method according to claim 1, characterized in that: Step (3B) also includes: configuring at least one capacitor coupled to the first power supply, and configuring at least one controlled discharge branch controlled by the standby mode module in the power control switch unit; step (4B) further includes: when the standby mode module outputs a standby signal, the controlled discharge branch is controlled by the standby signal and connected to form a controlled discharge circuit with the capacitor, so that the capacitor discharges to reduce the potential of the first power supply.

4. The implementation method according to claim 1, characterized in that: Step (3B) further includes configuring an adjustment tube coupled between the first power supply and the power interface, configuring at least one switch control branch in the power control switch unit, and configuring the input end of the switch control branch to be controlled by the standby mode module, and the output end of the switch control branch to control the adjustment tube; Step (4B) further includes: when the standby mode module outputs a standby signal, the switch control branch controls the adjustment tube to reduce the potential of the first power supply.

5. The implementation method according to claim 4, characterized in that: Step (3B) also includes configuring at least one resistor and one switch in the switch control branch, and configuring the resistor and the switch to be connected in series, wherein the common point of the resistor and the switch is the output end of the switch control branch, and the control end of the switch is the input end of the switch control branch and is controlled by the standby mode module.

6. The implementation method according to claim 1, characterized in that: Step (4) also includes: the standby mode module receives an input signal through the modulation interface, and compares the input signal with a reference signal, thereby determining that the input signal is a standby signal, or determining that the input signal is a wake-up signal.

7. The implementation method according to claim 6, characterized in that: Step (4) further includes: (41) comparing the input signal with the reference signal and outputting a comparison result; (42) processing the comparison result to output a standby signal or a wake-up signal; (43) Performing a logical operation on the signal outputted from step (42) and outputting a standby / wake-up signal, so as to control the driving module to power off according to the standby signal in the standby / wake-up signal, thereby controlling the power tube to be turned off; or controlling the driving module to power on according to the wake-up signal in the standby / wake-up signal, thereby controlling the power tube to be turned on.

8. The implementation method according to claim 1, characterized in that: The standby signal value is smaller than the minimum value of the modulation signal.

9. A low-power standby structure of a chip, the chip is used to control a power conversion device to supply power to a load; the chip has a modulation interface for receiving a modulation signal input from outside the chip, a power interface coupled to external power and supplying power to the inside of the chip, and a drive module for controlling the output of the power conversion device; characterized in that: The chip further includes: a first power supply coupled to the power interface, the first power supply being used to supply power to the driving module; The input end of the driving module is coupled to the modulation interface to receive the modulation signal, and the driving module controls the power tube in the power conversion device based on the modulation signal to control the output of the power conversion device; The chip further includes: a standby mode module, the standby mode module is coupled to the modulation interface to multiplex the modulation interface to receive a standby / wake-up signal input from outside the chip, and the standby mode module is further coupled to the driving module; The standby mode module controls the driving module to power off and the power tube to turn off, or controls the driving module to power on and the power tube to turn on according to the standby / wake-up signal; The driving module includes a logic unit and a driving control unit; the driving module performs a logic operation on the standby / wake-up signal output by the standby mode module after processing the input signal received from the modulation interface and the modulation signal output by the driving module after processing the input signal received from the modulation interface through the logic unit, and then inputs the result to the driving control unit; when the modulation interface inputs the modulation signal, the driving module works normally; when the modulation interface inputs the standby / wake-up signal, the standby mode module controls the driving module to power off or power on according to the standby / wake-up signal to drive the power tube; The driving module includes at least one driving submodule, and the chip also includes at least one power control switch, the power control switch is coupled between the driving submodule and the first power supply, and is controlled by the standby mode module; the standby mode module controls the disconnection of the power control switch according to the standby / wake-up signal to control the corresponding driving submodule to power off, or controls the closing of the power control switch to control the corresponding driving submodule to power on; Alternatively, the chip also includes a power control switch unit, which is coupled between the first power supply and the power interface and controlled by the standby mode module; the standby mode module controls the power control switch unit according to the standby / wake-up signal to control the disconnection / connection of the first power supply and the power interface, so that the driving module is powered off / on.

10. The structure according to claim 9, characterized in that The chip and the power tube are packaged in the same plastic package.

11. The structure according to claim 9, characterized in that The chip also includes a second power supply coupled to the power interface, the second power supply is used to supply power to the standby mode module, wherein the second power supply is independent of the first power supply.

12. The structure according to claim 9, characterized in that The chip also includes at least one capacitor coupled to the first power supply, and the power control switch unit includes a controlled discharge branch controlled by the standby mode module; when the standby mode module outputs a standby signal, the controlled discharge branch is controlled by the standby signal and connected to form a controlled discharge loop with the capacitor, so that the capacitor discharges to reduce the potential of the first power supply.

13. The structure according to claim 9, characterized in that The chip also includes an adjustment tube coupled between the power interface and the first power supply, and the power control switch unit includes at least one switch control branch, the input end of the switch control branch is controlled by the standby mode module, and the output end of the switch control branch controls the adjustment tube; when the standby mode module outputs a standby signal, the switch control branch controls the adjustment tube to reduce the potential of the first power supply.

14. The structure according to claim 13, characterized in that The switch control branch includes at least one resistor and one switch, the resistor and the switch are connected in series, the common point of the resistor and the switch is the output end of the switch control branch, and the control end of the switch is the input end of the switch control branch and is controlled by the standby mode module.

15. The structure according to claim 9, characterized in that The standby mode module includes a comparison unit, a standby control unit and a logic output unit; The comparison unit receives an input signal through the modulation interface, compares the input signal with a reference signal, and outputs a comparison result; The standby control unit processes the comparison result to output a standby signal or a wake-up signal; The logic output unit performs a logic operation on the signal output by the standby control unit and outputs a standby / wake-up signal to control the driving module to power off according to the standby signal in the standby / wake-up signal, thereby controlling the power tube to be turned off; or to control the driving module to power on according to the wake-up signal in the standby / wake-up signal, thereby controlling the power tube to be turned on.

16. The structure according to claim 9, characterized in that The value of the standby signal received by the modulation interface is less than the minimum value of the modulation signal received by the modulation interface.

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