Double-sided chip packaging structure and packaging method
By designing front and back pins with electrical disconnection in the double-sided chip package structure, and combining semi-etching and ink exposure technology to form pin protrusions and sides, the problems of low product integration, high cost and poor reliability in the prior art are solved, and efficient production, low cost and good heat dissipation are achieved.
Patent Information
- Application Number
- CN201911069533.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2019-11-05
- Publication Date
- 2025-03-25
- Estimated Expiration
- 2039-11-05
AI Technical Summary
The existing double-sided chip packaging structures have low integration, high cost and poor reliability, especially the low distribution density of the outer pins on the lead frame, resulting in low production efficiency, high time and material costs, and poor mounting reliability.
A double-sided chip packaging structure is adopted, in which the front and back pins are set on the packaging substrate, and the front and back pins are electrically not connected to each other. The pin projection and side surface are formed through semi-etching and ink exposure technology. The encapsulation material covers the chip and pins, and some pins are exposed for electroplating and soldering, and combined with the windowed PCB board for patching and heat dissipation.
It improves the production efficiency of double-sided chip packaging products, reduces time and material costs, enhances the reliability of upper plate welding, and improves the heat dissipation effect of the package.
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Figure CN110690191B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor packaging manufacturing, and more specifically, to a double-sided chip packaging structure and a packaging method. Background Art
[0002] Most of the existing double-sided chip packaging structures are multi-chip packaging with a substrate as the chip carrier. Although they meet the requirements of miniaturization and high density, they are not suitable for products requiring low cost and high density due to the high cost of the substrate.
[0003] Using the lead frame as a carrier to reduce costs, there are existing products that package chips on both sides of the lead frame, such as Chinese patent CN200610029153.4, the method is as follows:
[0004] (1) Covering one side of the lead frame with a film that is not bonded to the first plastic encapsulation material;
[0005] (2) adhering the first chip to the chip seat of the lead frame by means of an adhesive on the other side of the lead frame;
[0006] (3) performing wire bonding using the wire to complete electrical connection between the first chip and the lead frame;
[0007] (4) covering the first chip, the wires on the surface where the first chip is located, and part of the inner pins with the first plastic encapsulation material;
[0008] (5) curing the first plastic packaging material;
[0009] (6) peeling off the film covering the lead frame;
[0010] (7) Pasting a second chip on one side of the lead frame using the method of step (2);
[0011] (8) completing electrical connection between the second chip and the lead frame using the method of step (3);
[0012] (9) using a second plastic encapsulation material to cover the first plastic encapsulation material, the second chip, the wires on the surface where the second chip is located, and the inner pins in the lead frame;
[0013] (10) curing the second plastic packaging material;
[0014] (11) Cutting and pin processing of the entire packaging structure.
[0015] Another example is Chinese patent CN200610029153.4, which requires punching and forming the entire packaging structure after the plastic encapsulation is completed: first, the plastic is punched, and the excess glue around the plastic encapsulation body is removed with a blade, and then the external pins are bent toward the circuit board to form a supporting shoulder and welding surface. Since the above method needs to layout this external pin structure on the lead frame layout, and this external pin occupies a large area, it is not conducive to arranging more product units on the lead frame, and the arrangement density is not high, which is not conducive to improving the product production efficiency and reducing the time cost and material cost. In addition, the external pin welding surface part has undergone the product cutting operation, and the cut surface is not covered by the tin layer, so that the subsequent product patch is not firm in the board mounting link, resulting in cold solder joints and open circuits, which reduces the mounting reliability. Summary of the invention
[0016] 1. Technical issues to be solved
[0017] In view of the problems of low integration, high cost and low reliability of existing products in the prior art, the present invention provides a double-sided chip packaging structure and packaging method, which can improve the production efficiency of double-sided chip packaging products and reduce time and material costs.
[0018] 2. Technical solution
[0019] The purpose of the present invention is achieved through the following technical solutions.
[0020] A double-sided chip packaging structure, comprising a packaging substrate, a plurality of pins arranged on two opposite sides or around the packaging substrate, the plurality of pins being divided into front pins and back pins, and the front pins and back pins being not connected to each other;
[0021] A pin side surface and a pin protrusion connected to the pin side surface are arranged on a side of the front pin and the back pin away from the chip;
[0022] The packaging substrate is provided with a front chip, and the front chip is electrically connected to the front pins through an electrical connection portion;
[0023] The packaging substrate is provided with a back chip, and the back chip is electrically connected to the back pins through an electrical connection portion;
[0024] The encapsulation material covers the front chip, the back chip, the electrical connection part, the area between the front pins and the back pins, the back of the front pins is at least partially exposed to the plastic encapsulation body, and the back of the back pins is partially exposed to the plastic encapsulation body.
[0025] Furthermore, it also includes a base island, the front chip is arranged on the front side of the base island and / or the back chip is arranged on the back side of the base island.
[0026] Furthermore, the back side pins are provided with an extension portion close to the chip.
[0027] Furthermore, the back pins are arranged inside the front pins.
[0028] Furthermore, the front chip is a ball-bonded chip or a flip chip, and the back chip is a ball-bonded chip or a flip chip.
[0029] Furthermore, the electrical connection part is a solder ball or a solder wire.
[0030] A packaging method for a double-sided chip packaging structure includes the steps of packaging a front chip, selecting a packaging substrate, half-etching the front side of the packaging substrate, installing the front chip, and completing the installation of the front chip after wire bonding and encapsulation; and also includes the following steps:
[0031] Step 1: Half-etching is performed on the back side of the packaging substrate to form a front pin connected to the front chip, a back pin connected to the back chip, a pin side surface arranged on the side of the front pin and the back pin away from the chip, and a pin protrusion connected to the pin side surface, and the front pin and the back pin are not electrically connected to each other;
[0032] Step 2: Brush ink on the back of the package substrate after the back half-etching, use film for exposure, remove all the ink in the area where the pins are located, expose the front pins, the back pins, and the metal surface where the pins protrude, and then cure and shrink the ink;
[0033] Step 3: Mount the back chip on the back of the packaging substrate that has been painted with ink, and connect it to the back pins through the electrical connection part;
[0034] Step 4: encapsulate the back side of the back chip to form a back side package, wherein a portion of the back side pins are exposed outside the package body after encapsulation, and at least a portion of the peripheral area of the front side pins are exposed outside the package body;
[0035] Step 5: After the back is encapsulated, the corresponding positions of the packaging structure are electroplated. Both the front pins and the back pins are electroplated with tin. The product is cut and formed to complete the production of the double-sided chip packaging structure.
[0036] Furthermore, in step one, the back side pins formed by etching are arranged inside the front side pins formed by etching.
[0037] Furthermore, when the ink is removed in the corresponding step 2, the ink on the side of the front pins and the back pins away from the chip is also removed, that is, the side surfaces of the pins and the protruding side portions of the pins are exposed; the corresponding side surfaces of the pins and the protruding side portions of the pins after encapsulation in step 4 are also exposed to the outside of the package, and the side surfaces of the pins and the protruding side portions of the pins are also electroplated with tin in step 5.
[0038] Furthermore, the ink in step 2 is photosensitive ink.
[0039] Furthermore, the encapsulation in step 4 is made by a corresponding encapsulation mold, and a cavity is opened on the encapsulation mold corresponding to the position of the flip chip to perform back encapsulation.
[0040] Furthermore, the front side of the packaging substrate is half-etched or can be half-etched in step one to form a base island, the ink in the area corresponding to the base island position in step two is also removed, and the back side chip in step three can be set on the back side of the base island.
[0041] Furthermore, when the front side of the package substrate is half-etched, the upper half of the back side pins can also be etched away.
[0042] 3. Beneficial effects
[0043] Compared with the prior art, the advantages of the present invention are:
[0044] The pins of the double-sided packaging structure of this scheme are at least partially exposed on the back of the packaged product. With the window PCB board patch upper plate, there is no need to bend the external pins, which reduces the arrangement area of the external pins on the lead frame, so that more product units can be arranged on the lead frame, thereby improving the production efficiency of double-sided chip packaging products and reducing time and material costs. At the same time, a tin climbing structure is designed on the side of the pin to increase the reliability of the upper plate welding. The package body can pass through the window PCB board, so that the package body can dissipate heat to both sides of the PCB board. Compared with the existing technology, the heat dissipation effect is better. BRIEF DESCRIPTION OF THE DRAWINGS
[0045] Figure 1 It is a schematic cross-sectional view of the chip after the front encapsulation step;
[0046] Figure 2 This is a top view of the front chip after installation;
[0047] Figure 3 It is a schematic cross-sectional view of the substrate after etching on the back side;
[0048] Figure 4 It is a schematic diagram of a top view of the back side of the substrate after etching;
[0049] Figure 5 It is a schematic cross-sectional view of the back of the substrate after the ink is applied;
[0050] Figure 6 A schematic diagram of a top view of the back side of the substrate after the ink on the side of the lead pins is removed;
[0051] Figure 7 It is a cross-sectional schematic diagram of a flip chip soldered on the back side of a substrate;
[0052] Figure 8 A top view schematic diagram of a flip chip soldered to the back of a substrate;
[0053] Fig. 9 It is a cross-sectional schematic diagram of the flip chip after encapsulation;
[0054] Fig.10 It is a schematic diagram of the back side top view of the flip chip after encapsulation;
[0055] Fig.11 It is a schematic diagram of the side cross section after cutting and separation;
[0056] Fig.12 This is a top view of the back side of the DFN structure chip package;
[0057] Fig.13 A schematic cross-sectional view of a structure of a half-etched back side pin embodiment;
[0058] Fig.14 A cross-sectional schematic diagram of another half-etched back side pin embodiment structure.
[0059] Description of the numbers in the figure:
[0060] 1. Front chip; 2. Front pin; 3. Back pin; 4. Pin protrusion; 5. Pin side; 6. Ink; 7. Back chip; 8. Back package; 9. Front package; 10. Connecting ribs; 11. Extension; 12. Base island. DETAILED DESCRIPTION
[0061] The present invention is described in detail below in conjunction with the accompanying drawings and specific embodiments.
[0062] The chip is packaged and manufactured on both sides through a series of steps, including metal plate → front film half-etching to form pins → front chip installation → pressure welding → front encapsulation → post-curing → back side half-etching of metal plate → ink brushing, exposure, and development (exposing back side pins) → back side chip installation → back side encapsulation → cutting → test printing → inspection → packaging → storage, thus completing the overall packaging structure of the double-sided chip. The specific embodiments are as follows;
[0063] Example 1
[0064] Install the front chip 1 according to the conventional steps. The specific steps are as follows: Figure 1 , 2As shown, it includes a packaging substrate, where the packaging substrate mainly refers to a copper plate substrate, and the copper plate substrate here can be a large-size copper plate substrate. The double-sided chip packaging structural unit product can be manufactured modularly on the copper plate substrate, so that the corresponding front pins 2, back pins 3 and base island 12 can be reasonably set. Half etching is performed on the front of the copper plate substrate to form the front pins 2, back pins 3 and the upper half of the base island 12, and the front chip 1 is installed on the base island. According to the product thickness and design requirements, the front chip 1 can be selected to be flipped or mounted. The front chip 1 is connected to the front pin 2 through an electrical connection part, and the top of the packaging substrate is encapsulated to form a front package 9 to complete the installation of the front chip 1. The front pin 2 and the back pin 3 are provided with a pin side 5 away from the chip, and a pin protrusion 4 is provided on the pin side 5, that is, the pin protrusion 4 is provided on the side of the front pin 2 and the back pin 3 away from the chip. Each double-sided chip packaging structural unit product is connected to the strip connecting rib 10 on the copper plate substrate through the pin protrusion 4 on the outside of the front pin 2 and the back pin 3. When the subsequent product is electroplated, the front pin 2 and the back pin 3 are tinned by the conduction between the pin protrusion 4 and the strip connecting rib 10.
[0065] After installing the front chip 1, the back chip 7 is installed; the specific steps are as follows: The specific embodiment here uses the FBP packaging form for example.
[0066] Step 1: Figure 3 , 4 As shown, half etching is performed on the back of the packaging substrate, and the existing etching method can be used. The front pin 2 electrically connected to the front chip 1 and the back pin 3 electrically connected to the back chip 7 are separated by half etching, and the two are not electrically connected to each other. The specific number and position of the pins can be set according to demand. In the scheme of this embodiment, the front pin 2 and the back pin 3 are arranged around the base island (or chip). The bottom of the back pin 3 extends toward the base island, and the distance between the end closest to the base island and the center of the base island 12 is closer than the distance between the front pin 2 closest to the center of the base island 12, so that when the back chip 7 is installed, the back chip 7 contacts the back pin 3 while avoiding the back chip 7 from contacting the front pin 2. Of course, the pin position can be planned and set according to design needs, for example, it can be set on two opposite sides of the packaging substrate, that is, a DFN packaging type.
[0067] Of course, it is not necessary for the back pin 3 to extend to the center of the base island. Whether it is a regular or flip chip, as long as the pin has a certain area so that the wire bonding / solder ball of the regular / flip chip can be attached, it can be achieved through corresponding design. If the chip mounted on the back is a ball solder chip, the chip mounting glue is not conductive and it is okay to contact the front pin 2. If the chip mounted on the back is a flip chip, it is not necessary. The flip chip is installed on the back pin 3 with the help of solder balls. There will be a certain distance between the flip chip 7 and the front pin 2 and it will not contact the front pin 2.
[0068] Step 2: Figure 5 , 6 As shown, ink 6 is brushed on the back of the package substrate after the back half-etching. Ink 6 is a photosensitive ink, such as green oil. The screen for ink printing adopts the whole area printing, and then uses film for exposure and development, and removes all the ink 6 in the pin surface area, exposing the metal surface of the front pin 2, the back pin 3, the base island 12, and the pin protrusion 4. The side of the front pin 2 and the back pin 3 away from the chip can also be exposed, that is, the side of the pin 5 and the side of the pin protrusion 4 are exposed, which helps to realize the tinning of the side of the product pin and improve the reliability of SMT boarding. Then the ink 6 is cured and shrunk.
[0069] Step 3: Figure 7 , 8 As shown, the back chip 7 is installed on the back of the package substrate brushed with ink, and is connected to the back pin 3 through the electrical connection part. Depending on the welding method, the back chip 7 can be mounted face up or flipped. With a flip chip, the back chip 7 can be set at a position close to the back pin 3 inside the package to ensure that at least part of the bottom surface of the front pin 2 and the back pin 3 is exposed to the package after the subsequent back encapsulation is completed. Of course, the back chip 7 here can also be connected by front mounting and ball welding, and of course other methods can also be used.
[0070] Step 4: Fig. 9 , 10 As shown, the back chip 7 is encapsulated to form a back package 8. After encapsulation, part of the back pin 3 is exposed to the package body, and at least part of the back of the front pin 2 is exposed to the package body. The pin protrusions 4 and the pin side 5 corresponding to the front pin 2 and the back pin 3 are also exposed to the package body. The encapsulation here is made by a corresponding encapsulation mold, and a cavity is opened on the encapsulation mold corresponding to the flip chip position to perform back encapsulation.
[0071] Step 5: After the back cover is encapsulated, the corresponding positions of the package structure are electroplated, and the front pin 2, the back pin 3 and the bottom surface of the pin side 5 are electroplated with tin. Then the modular double-sided chip package structure product is cut and separated into a single double-sided chip package structure, such as Fig.11As shown, the production of the double-sided chip packaging structure is completed.
[0072] Preferably, in step 1 of this embodiment, Figure 4 As shown, an extension portion 11 may be provided near the base island (or chip) on the back pin 3. The extension portion 11 may subsequently serve as a connection portion between the electrical connection portion of the back package 8 and the back pin 3 to improve the quality of the electrical connection.
[0073] When installing this product, a window suitable for the size of the back package 8 is opened on the PCB board so that the back package 8 can be set in the window and the pins are mounted on the board without taking up space.
[0074] Corresponding to this solution, a double-sided chip packaging structure is as follows:
[0075] It includes a packaging substrate, a plurality of pins are arranged around the packaging substrate, the plurality of pins are divided into a front pin 2 and a back pin 3, and the front pin 2 and the back pin 3 are not connected to each other;
[0076] The side of the front pin 2 and the back pin 3 away from the chip is provided with a pin side 5 and a pin protrusion 4 connected to the pin side;
[0077] A front chip 1 is disposed on the front side of the packaging substrate, and the front chip 1 is electrically connected to the front pin 2 via an electrical connection portion;
[0078] The back side of the packaging substrate and the back side pins 3 is mounted with a back side chip 7, and the back side chip 7 is electrically connected to the back side pins 3 via an electrical connection portion;
[0079] The encapsulation material covers the front chip 1, the back chip 7, the electrical connection part, the area between the front pin 2 and the back pin 3; the back of the front pin 2 is at least partially exposed to the plastic encapsulation body, the back of the back pin 3 is partially exposed to the plastic encapsulation body, and the pin side 5 and the back and side of the pin protrusion 4 are exposed to the plastic encapsulation body.
[0080] The chip packaging and process method of this scheme, in conjunction with the windowed PCB board patch mounting, does not require bending operations on the external pins, reduces the arrangement area of the external pins on the lead frame, and enables more product units to be arranged on the lead frame, thereby improving the production efficiency of double-sided chip packaging products and reducing time and material costs. At the same time, a tin-climbing structure is designed on the side of the pin to increase the reliability of the mounting welding. The package body can pass through the windowed PCB board so that the package body can dissipate heat to both sides of the PCB board. Compared with the existing technology, the heat dissipation effect is better.
[0081] Example 2
[0082] This embodiment is basically the same as the first embodiment, except that it can also be applied to a variety of packaging structures of different forms, such as a DFN packaging structure. Fig.12As shown, the front pins 2 and the back pins 3 are not arranged around, but are arranged on two opposite sides of the packaging substrate.
[0083] Example 3
[0084] This embodiment is basically the same as Embodiment 1, except that the base island may not be provided in this solution. In this solution, the base island does not have an exposed packaging structure, and the substrate does not serve as a conductive terminal for drawing out electrical signals, so it is only used to carry the chip. After the front side of the packaging substrate is half-etched, the front chip 1 can be arranged in the recessed central area, which can further control the thickness of the packaged product. After the back side of the packaging substrate is half-etched, the back side chip 7 can be arranged on the cured ink 6. In this way, the thickness of the overall chip can be greatly reduced. For example, the front side chip 1 can be a flip chip, and the flip chip does not require a base island, and the flip chip is directly arranged on the pin. The back side pin 3 can also be etched to remove the upper half when the front side of the packaging substrate is half-etched. The back side pin 3 only needs to ensure that it can be electrically connected to the back side chip 7, and the package body is exposed in the peripheral area where the back side of the back side pin 3 is located after the back side chip is encapsulated, so the back side pin 3 can be half-etched on the front side.
[0085] Example 4
[0086] The difference between Example 4 and Example 3 is that the back pins 3 are formed on the inner side of the front pins 2. After the back encapsulation is completed, the back side of the back pins 3 is partially exposed to the package body, and the back side of the front pins 2 is completely exposed to the package body, forming a package body structure with two circles of exposed pins, so that more pins can be reasonably arranged.
[0087] The above schematically describes the invention and its implementation methods, which is not restrictive. Without departing from the spirit or basic features of the invention, the invention can be implemented in other specific forms. What is shown in the accompanying drawings is only one of the implementation methods of the invention. The actual structure is not limited to this, and any figure mark in the claims should not limit the claims involved. Therefore, if a person of ordinary skill in the art is inspired by it, without departing from the purpose of the invention, a structural method and an embodiment similar to the technical solution are designed without creativity, which should all fall within the scope of protection of this patent. In addition, the word "including" does not exclude other elements or steps, and the word "one" before the element does not exclude the inclusion of "multiple" elements. The multiple elements stated in the product claim can also be implemented by one element through software or hardware. The words first, second, etc. are used to indicate names, and do not indicate any specific order.
Claims
1. A double-sided chip packaging structure, characterized in that: It comprises a packaging substrate, a plurality of pins are arranged on two opposite sides or around the packaging substrate, the plurality of pins are divided into front pins (2) and back pins (3), and the front pins (2) and the back pins (3) are not connected to each other; A pin side surface (5) and a pin protrusion (4) connected to the pin side surface are provided on the side of the front pin (2) and the back pin (3) away from the chip; A front chip (1) is arranged on the front side of the packaging substrate, and the front chip (1) is electrically connected to the front pin (2) via an electrical connection portion; A back chip (7) is arranged on the back side of the packaging substrate, and the back chip (7) is electrically connected to the back lead (3) via an electrical connection portion; The encapsulation material covers the front chip (1), the back chip (7), the electrical connection portion, the area between the front pin (2) and the back pin (3), the back of the front pin (2) at least partially exposes the plastic encapsulation body, and the back of the back pin (3) partially exposes the plastic encapsulation body; The back pin (3) is provided with an extension portion (11) close to the chip; the back pin (3) is arranged inside the front pin (2); The extension portion (11) serves as a connection portion between the electrical connection portion of the back packaging (8) and the back pin (3); During installation, a window of a size suitable for the back package (8) is opened on the PCB board, the back package (8) is arranged in the window, and the pins are mounted on the board.
2. The double-sided chip packaging structure according to claim 1, characterized in that: It also includes a base island (12), wherein the front chip (1) is arranged on the front side of the base island (12) and / or the back chip (7) is arranged on the back side of the base island (12).
3. The double-sided chip packaging structure according to claim 1, characterized in that: The front chip (1) is a ball-bonded chip or a flip-chip, and the back chip (7) is a ball-bonded chip or a flip-chip.
4. The double-sided chip packaging structure according to claim 1, characterized in that: The pin side surface (5) and the back and side surfaces of the pin protrusion (4) are exposed from the plastic package body.
5. A packaging method for a double-sided chip packaging structure, applied to the packaging structure according to claim 1, comprising the steps of packaging the front chip, selecting a packaging substrate, half-etching the front side of the packaging substrate, installing the front chip, and completing the installation of the front chip (1) after wire bonding and encapsulation; It also includes the following steps, Step 1: half-etching is performed on the back side of the packaging substrate to form a front pin (2) connected to the front chip (1), a back pin (3) connected to the back chip (7), a pin side surface (5) arranged on the side of the front pin (2) and the back pin (3) away from the chip, and a pin protrusion (4) connected to the pin side surface, and the front pin (2) and the back pin (3) are not electrically connected to each other; Step 2: Brush ink (6) on the back side of the packaging substrate after the back side is half-etched, use film for exposure, remove all the ink (6) in the area where the pins are located, expose the metal surfaces of the front pins (2), the back pins (3), and the pin protrusions (4), and then cure and shrink the ink (6); Step 3: Mount the back chip (7) on the back of the packaging substrate coated with ink, and connect it to the back pin (3) through the electrical connection part; Step 4: encapsulating the back side of the back chip (7) to form a back side package (8), wherein a portion of the back side pins (3) are exposed to the package body after encapsulation, and at least a portion of the back side of the front side pins (2) are exposed to the package body; Step 5: After the back side is encapsulated, the corresponding positions of the packaging structure are electroplated. The front side pins (2) and the back side pins (3) are electroplated with tin. The product is cut and formed to complete the production of the double-sided chip packaging structure.
6. The packaging method of a double-sided chip packaging structure according to claim 5, characterized in that: In step 1, the back pin (3) formed by etching is arranged inside the front pin (2) formed by etching.
7. A packaging method for a double-sided chip packaging structure according to claim 5 or 6, characterized in that: When the ink (6) is removed in the corresponding step 2, the ink (6) on the side of the front pin (2) and the back pin (3) away from the chip is also removed, that is, the side of the pin (5) and the side of the pin protrusion (4) are exposed; the corresponding side of the pin (5) and the side of the pin protrusion (4) after encapsulation in step 4 are also exposed to the outside of the package, and the side of the pin (5) and the side of the pin protrusion (4) are also electroplated with tin in step 5.
8. The packaging method of a double-sided chip packaging structure according to claim 5, characterized in that: The ink (6) in step 2 is a photosensitive ink.
9. The packaging method of a double-sided chip packaging structure according to claim 5, characterized in that: The encapsulation in step 4 is made by a corresponding encapsulation mold, and a cavity is opened on the encapsulation mold corresponding to the position of the flip chip to perform back encapsulation.
10. The packaging method of a double-sided chip packaging structure according to claim 5, characterized in that: The front side of the packaging substrate is half-etched or further half-etched in step one to form a base island (12), the ink (6) in the area corresponding to the base island (12) is also removed in step two, and the back side chip (7) in step three is arranged on the back side of the base island (12).
11. The packaging method of a double-sided chip packaging structure according to claim 5, characterized in that: When the front side of the package substrate is half-etched, the upper half of the back side lead (3) is also etched away.
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