Millimeter-Wave Band Amplifier Chip Packaging Structure and Manufacturing Method

Abstract

The present invention provides a millimeter-wave band amplifier chip packaging structure and a manufacturing method thereof, which relates to the technical field of chip packaging. The structure includes a chip, a packaging substrate, and a cover. The packaging substrate is provided with a first metal layer, a first dielectric layer, a second metal layer, a second dielectric layer, and a third metal layer that are sequentially stacked from top to bottom. The cover is disposed on the packaging substrate and is used to cover the packaging substrate. The cover is provided with an inner cavity with an opening downward. The millimeter-wave band amplifier chip packaging structure provided by the present invention adopts the form of combining the packaging substrate and the cover, and realizes the accommodation of the chip by setting an accommodation groove on the packaging substrate, effectively shortening the connection length between the chip and the packaging substrate, facilitating the reduction of parasitic inductance, and improving the transmission capacity of the chip. The cover with an inner cavity enables the connection between the DC port of the chip and the packaging substrate to directly contact the air, reducing the loss in the high-frequency band and improving the self-radio frequency performance of the chip.

Description

Technical Field

[0001] The present invention belongs to the technical field of chip packaging, and more specifically, relates to a millimeter-wave band amplifier chip packaging structure and a method for manufacturing the packaging structure. Background Art

[0002] With the development of millimeter-wave band technology, millimeter-wave communication technology has been widely applied in fields such as mobile communication, radar detection, electronic countermeasure, and precision guidance. Amplifier chips in the millimeter-wave band generally adopt the design of monolithic microwave integrated circuits, which have the advantages of good microwave performance and high integration.

[0003] Currently, microwave radio frequency chips mostly adopt plastic packaging technology. This technology first manufactures a metal packaging carrier frame, then bonds the chip on the frame, bonds the chip to the packaging pins, completes the chip injection molding through an injection molding machine, and finally forms the final packaging product through a cutting process. This packaging structure is only suitable for chip packaging in the frequency band below 10 GHz. For 5G millimeter-wave band amplifiers above 20 GHz, there is a problem of excessive parasitic loss, and the excellent performance of the chip cannot be guaranteed. Summary of the Invention

[0004] The purpose of the present invention is to provide a millimeter-wave band amplifier chip packaging structure and a method for manufacturing the packaging structure, so as to solve the technical problem in the prior art that the plastic packaging structure is prone to cause excessive loss of the millimeter-wave amplifier and it is difficult to exert its excellent performance.

[0005] To achieve the above purpose, the technical solution adopted by the present invention is: providing a millimeter-wave band amplifier chip packaging structure, including a chip, a packaging substrate, and a cover; several chip DC ports and at least two chip RF ports are provided on the outer periphery of the upper surface of the chip; the packaging substrate is provided with a first metal layer, a first dielectric layer, a second metal layer, a second dielectric layer, and a third metal layer that are sequentially stacked from top to bottom. Through holes that penetrate up and down are respectively provided in the middle of the first metal layer and the middle of the first dielectric layer. The inner walls of the first metal layer and the first dielectric layer and the second metal layer form a receiving groove for receiving the chip; the cover is arranged on the packaging substrate and is used to cover the packaging substrate, and the cover is provided with an inner cavity with an opening downward.

[0006] As another embodiment of the present application, the first metal layer includes a plurality of first DC ports corresponding to the DC ports of the chip and first RF ports corresponding to the RF ports of the chip, and adjacent two first DC ports are spaced apart; avoidance grooves are provided at positions on the second metal layer corresponding to the first DC ports and the first RF ports up and down; the third metal layer includes a plurality of third DC ports corresponding to the first DC ports one by one up and down, third RF ports corresponding to the first RF ports one by one up and down and connected to each other, and a first central layer located in the middle of the plurality of third DC ports, and adjacent two third DC ports are spaced apart, and a space is provided between the third DC ports and the first central layer.

[0007] As another embodiment of the present application, the first metal layer further includes four corner metal layers respectively disposed at the four corners of the first dielectric layer, and a plurality of ground posts are further provided between the side of the corner metal layer close to the first RF port and the third metal layer.

[0008] As another embodiment of the present application, an outward expansion port for avoiding the first RF port is further provided between the two corner metal layers on both sides of the first RF port.

[0009] As another embodiment of the present application, the second metal layer further includes a second RF port and a second DC port disposed in the avoidance groove, the second RF port corresponds to the first RF port one by one up and down, and the second DC port corresponds to the first DC port one by one up and down.

[0010] As another embodiment of the present application, a plurality of capacitors are further provided on the outer periphery of the chip in the accommodation groove, the capacitors are connected to the DC ports of the chip one by one, and the capacitors are respectively connected to the first DC ports one by one.

[0011] As another embodiment of the present application, a first semi-circular portion is provided at one end of the first RF port away from the chip, a second semi-circular portion is provided at one end of the third RF port close to the chip, and the second semi-circular portion corresponds to the first semi-circular portion up and down and is connected through a metallized through hole.

[0012] As another embodiment of the present application, a copper bar is provided between the first central layer and the second metal layer, and the length direction of the copper bar is perpendicular to the up and down direction.

[0013] As another embodiment of the present application, first ground ports for connecting to a PCB board are provided on both sides of the third RF port on the bottom surface of the third metal layer, and second ground ports are further provided on the bottom surface of the third metal layer below the accommodation groove.

[0014] A method for manufacturing a millimeter-wave band amplifier chip packaging structure includes the following steps:

[0015] Fabricating the package substrate: Through holes are formed in the first metal layer and the first dielectric layer. The first metal layer, the first dielectric layer, the second metal layer, the second dielectric layer, and the third metal layer are stacked from top to bottom. The upper and lower corresponding first RF ports and third RF ports are connected respectively. The first metal layer, the first dielectric layer, and the second metal layer form a receiving groove.

[0016] Bonding the chip to the package substrate: Place the package substrate on the bonding table, bond the chip into the receiving groove, and dry the chip and the package substrate until the bonding adhesive cures.

[0017] Connect the chip RF port to the corresponding first RF port and connect the chip DC port to the first DC port.

[0018] Installing the cover: Heat the package substrate to 125 °C; fix the cover to the package substrate, raise the temperature and keep it, and then cool it naturally.

[0019] The beneficial effects of the millimeter-wave band amplifier chip package structure provided by the present invention are as follows: Compared with the prior art, the millimeter-wave band amplifier chip package structure provided by the present invention adopts the form of combining a package substrate and a cover, and realizes the accommodation of the chip by setting a receiving groove on the package substrate, effectively shortening the connection length between the chip and the package substrate, facilitating the reduction of parasitic inductance, and effectively improving the transmission ability of the millimeter-wave amplifier chip in the high-frequency band. The cover with an inner cavity enables the connection between the chip DC port of the chip and the package substrate to be in direct contact with air, reducing the loss in the high-frequency band and improving the self-RF performance of the chip. Description of the Drawings

[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for use in the embodiments or the description of the prior art. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0021] Figure 1 It is a schematic structural diagram of Embodiment 1 of the package substrate of the millimeter-wave band amplifier chip package structure provided by the embodiment of the present invention;

[0022] Figure 2 It is a schematic structural diagram of Embodiment 2 of the package substrate of the millimeter-wave band amplifier chip package structure provided by the embodiment of the present invention;

[0023] Figure 3 It is a schematic front sectional structural diagram of the millimeter-wave band amplifier chip package structure provided by the embodiment of the present invention;

[0024] Figure 4 is Figure 3 the top - view structural schematic diagram of

[0025] Figure 5 is Figure 3 the partial sectional view structural schematic diagram of A - A in

[0026] Figure 6 is Figure 2 the structural schematic diagram of the second metal layer in

[0027] Figure 7 is Figure 1 the bottom - surface structural schematic diagram of the third metal layer in

[0028] Among them, the reference numerals in the figure are as follows:

[0029] 100, chip; 110, chip radio - frequency port; 120, chip DC port; 130, capacitor; 140, bonding wire; 210, first metal layer; 211, first radio - frequency port; 212, first DC port; 213, corner metal layer; 214, first semi - circular part; 215, outward - expanding opening; 216, grounding post; 220, second metal layer; 221, second radio - frequency port; 222, second DC port; 223, avoidance groove; 230, third metal layer; 231, third radio - frequency port; 232, third DC port; 233, first central layer; 234, second semi - circular part; 235, first grounding port; 236, second grounding port; 240, first dielectric layer; 250, second dielectric layer; 260, accommodating groove; 270, metallized via; 280, copper bar; 300, cover; 310, inner cavity. Specific embodiments

[0030] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention clearer, the present invention will be further described in detail below with reference to the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0031] Please refer to Figures 1 to 7, the millimeter-wave amplifier chip packaging structure provided by the present invention and the method for manufacturing the packaging structure will now be described. It includes a chip 100, a packaging substrate, and a cover 300; several chip DC ports 120 and two chip RF ports 110 are provided on the outer periphery of the upper surface of the chip 100; on the packaging substrate, a first metal layer 210, a first dielectric layer 240, a second metal layer 220, a second dielectric layer 250, and a third metal layer 230 are sequentially stacked from top to bottom. Through holes penetrating up and down are provided in the middle of the first metal layer 210 and the first dielectric layer 240, and the inner walls of the first metal layer 210 and the first dielectric layer 240 form a receiving groove 260 for receiving the chip 100 with the second metal layer 220. The cover 300 is disposed on the packaging substrate and is used to cover the packaging substrate. The cover 300 is provided with an inner cavity 310 with an opening facing downwards.

[0032] It should be noted that when an element is referred to as being "disposed on" another element, it can be directly on the other element or indirectly on the other element. It should be understood that the orientation or positional relationship indicated by the terms "length", "width", "upper", "lower", "front", "rear", "top", "bottom", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation to the present invention. In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features.

[0033] Compared with the prior art, the millimeter-wave amplifier chip packaging structure provided by the present invention adopts a form of combining a packaging substrate and a cover 300, and realizes the accommodation of the chip 100 by providing a receiving groove 260 on the packaging substrate, effectively shortening the connection length between the chip RF port 110 of the chip 100 and the first RF port 211 of the packaging substrate, facilitating the reduction of parasitic inductance and the loss of RF transmission, and effectively improving the transmission ability of the millimeter-wave amplifier chip in the high-frequency band. The cover 300 with the inner cavity 310 is connected to the top surface of the packaging substrate through the bottom surface of the outer periphery, so that there is a gap between the chip 100 flush with the top surface of the packaging substrate and the inner cavity 310 of the cover 300, and further enables the chip RF port 110 or the chip DC port 120 to directly contact the air, avoiding the loss caused by the need to contact the electrolyte in the traditional packaging, and effectively reducing the loss in the high-frequency band.

[0034] Further, the chip radio frequency ports 110 can be set in the form of two, three, or four, with at least two being set, and the corresponding first radio frequency ports 211 and second radio frequency ports 221 are also set in the same number as the chip radio frequency ports 110.

[0035] As a specific implementation manner of an embodiment of the present invention, please refer to Figures 1 to 7 , the first metal layer 210 includes several first DC ports 212 corresponding to the chip DC ports 120 and two first radio frequency ports 211 corresponding to the chip radio frequency ports 110, and adjacent first DC ports 212 are spaced apart; avoidance grooves 223 are provided at positions on the second metal layer 220 corresponding to the first DC ports 212 and the first radio frequency ports 211 up and down.

[0036] The third metal layer 230 includes several third DC ports 232 corresponding to the first DC ports 212 one by one up and down, two third radio frequency ports 231 corresponding to and connected to the first radio frequency ports 211 one by one up and down, and a first central layer 233 located in the middle of several third DC ports 232. Adjacent third DC ports 232 are spaced apart and the first central layer 233 is spaced apart from the third DC ports 232.

[0037] In this embodiment, the chip radio frequency ports 110 are connected to the corresponding first radio frequency ports 211 through bonding wires 140. The bonding wires 140 can be in the form of double or multiple wires, which can achieve a smaller integrated inductance and improve the packaging performance. In this embodiment, the bonding wires 140 are double 25μm gold wires and are connected by wedge bonding or ball bonding.

[0038] Further, a plating layer for bonding with the bonding wire 140 is provided on the first radio frequency port 211, and the material of the plating layer is nickel-palladium-gold. The setting of the plating layer on the first radio frequency port 211 can improve the bonding strength with the bonding wire 140 and improve the reliability of the packaging. The first radio frequency port 211 is surface-treated by electroless nickel-palladium immersion gold technology. The first radio frequency port 211 and the second radio frequency port 221 on the packaging substrate are connected by a coplanar waveguide wire. The third radio frequency ports 231 and traces on the third metal layer 230, and the first radio frequency ports 211 and traces on the first metal layer 210 are collectively referred to as the central conductor. The main reference ground of the central conductor is the same-layer metal. The width of the central conductor trace is relatively wide, and the transmission loss is relatively low, generally controllable at about 0.1 dB. The relatively wide radio frequency trace is conducive to the welding of the packaging substrate and the PCB board located below the packaging substrate, and has lower requirements for processing and subsequent assembly.

[0039] The first metal layer 210, the first dielectric layer 240, the second metal layer 220, the second dielectric layer 250, and the third metal layer 230 that are sequentially stacked from top to bottom can achieve multi-layer wiring, effectively meeting the requirements of radio frequency wiring and power supply wiring. The method of setting the receiving groove 260 on the packaging substrate for installing the chip 100 also effectively shortens the distance between the chip 100 and the bottom surface of the packaging substrate, thereby shortening the heat dissipation path of the chip 100, improving the heat dissipation efficiency, and contributing to the stable and reliable operation of the chip 100.

[0040] In this embodiment, the first dielectric layer 240 and the second dielectric layer 250 are made of a resin material with a low dielectric loss factor, which can effectively reduce losses and is suitable for millimeter-wave amplifier chips in the high-frequency band. The cover 300 is made of a high-temperature resistant plastic material, and the structure is sealed by bonding with the packaging substrate. Compared with the traditional injection molding encapsulation, the bonding operation is very simple and convenient. This structure is suitable for GaN millimeter-wave amplifier chips or GaAs millimeter-wave amplifier chips.

[0041] According to the processing requirements and actual applications, the thicknesses of the first metal layer 210, the second metal layer 220, and the third metal layer 230 are between 18um and 30um, and the thicknesses of the first dielectric layer 240 and the second dielectric layer 250 are between 60um and 100um. The first metal layer 210 serves as a radio frequency trace and a DC feed layer, and the second metal layer 220 serves as a ground layer and a trace layer. In actual production, the packaging substrate will be welded to the PCB board later, so the third metal layer 230 serves as a pad layer and is welded to the PCB pad.

[0042] The above-mentioned stacking method eliminates the cumbersome process of customizing a special plastic encapsulation frame in the plastic encapsulation process, can well meet the requirements of radio frequency wiring and power supply wiring, and is also conducive to reducing losses in the high-frequency band. The receiving groove 260 provided on the packaging substrate can more easily ensure the installation accuracy of the chip 100 and improve the installation efficiency at the same time.

[0043] In this embodiment, the first DC port 212 and the third DC port 232 are connected according to actual needs, and they are connected by a metallized through hole 270.

[0044] In this embodiment, the depth of the receiving groove 260 is the same as the thickness of the chip 100, so that the top surface of the chip 100 is flush with the top surface of the packaging substrate after the chip 100 is installed. This setting can shorten the distance between the chip radio frequency port 110 and the first radio frequency port 211, and effectively reduce the bending arc of the bonding wire 140. At the same time, the chip 100 is fixed in the receiving groove 260, and the distance between the chip 100 and the bottom surface of the packaging substrate is the sum of the thicknesses of the second metal layer 220, the second dielectric layer 250, and the third metal layer 230. Compared with the traditional method of attaching the chip 100 to the surface of the substrate, the distance between the chip 100 and the bottom surface of the packaging substrate is effectively shortened, and the thermal resistance between the chip 100 and the outside is reduced.

[0045] Further, when the chip 100 is installed in the receiving groove 260, in order to further shorten the distance between the chip radio frequency port 110 and the first radio frequency port 211, the distance between the two sides of the chip 100 where the chip radio frequency port 110 is provided and the inner wall of the receiving groove 260 should be reduced. In this embodiment, a distance range of 50-200 μm is adopted, which is convenient for shortening the length of the bonding wire 140, while the distance between the other two sides of the chip 100 and the other two side walls of the receiving groove 260 is not limited, and a larger distance can be adopted to achieve the effect of facilitating processing.

[0046] In this embodiment, an avoidance groove 223 is provided on the second metal layer 220, and a coplanar waveguide is used to connect the first radio frequency port 211 and the third radio frequency port 231. The third radio frequency port 231 and the trace on the third metal layer 230, and the first radio frequency port 211 and the trace on the first metal layer 210 mainly refer to the ground as the same-layer metal provided at the same height. The trace width of the third radio frequency port 231 on the third metal layer 230 is relatively wide, and the transmission loss is relatively low, generally controllable at about 0.1 dB. The relatively wide radio frequency trace is beneficial to the welding with the PCB board, and the requirements for processing and later assembly are relatively low.

[0047] Further, positioning metal for positioning the metallized via 270 can be provided in the avoidance groove 223. The cross-sectional area of the positioning metal is relatively small, which is convenient for positioning and installing the metallized via 270 between the first radio frequency port 211 and the third radio frequency port 231 or between the first DC port 212 and the third DC port 232.

[0048] As a specific implementation manner of the embodiment of the present invention, please refer to Figures 2 to 3, the first metal layer 210 further includes four corner metal layers 213 respectively disposed at the four corners of the first dielectric layer 240. There are also a plurality of ground posts 216 between the side of the corner metal layer 213 close to the first radio frequency port 211 and the third metal layer 230. The corner metal layer 213, the third metal layer 230 and the ground posts 216 form a reference ground plane of the waveguide system. The arrangement of the plurality of ground posts 216 can make the reference ground plane more complete. The third radio frequency port 231 and the traces on the third metal layer 230, and the first radio frequency port 211 and the traces on the first metal layer 210 are collectively referred to as the center conductor. The characteristic impedance of the center conductor is more continuous, which is convenient for reducing the reflection coefficient of the radio frequency port after packaging.

[0049] As a specific implementation manner of an embodiment of the present invention, please refer to Figures 2 to 3 , there is also an outward expansion port 215 for avoiding the first radio frequency port 211 between the two corner metal layers 213 located on both sides of the first radio frequency port 211. The outward expansion ports 215 are also provided at the positions on the second metal layer 220 and the third metal layer 230 corresponding to the first metal layer 210. The outward expansion port 215 can make the reference ground transition smoother and avoid the problem that the waveguide system is prone to high and low waveguide modes.

[0050] As a specific implementation manner of an embodiment of the present invention, please refer to Figure 2 and Figure 6 , the second metal layer 220 further includes a second radio frequency port 221 and a second DC port 222 disposed in the avoidance groove 223. The second radio frequency port 221 and the first radio frequency port 211 are vertically corresponding one by one, and the second DC port 222 and the first DC port 212 are vertically corresponding one by one. The second radio frequency port 221 is a circular metal sheet spaced from the second metal layer 220. The second radio frequency port 221 is disposed in the avoidance groove 223. The positions in the avoidance groove 223 other than the second radio frequency port 221 are covered by the second metal layer 220, and a gap is ensured between the second radio frequency port 221 and this part of the second metal layer 220.

[0051] In this embodiment, a second RF port 221 and a second DC port 222 are provided in the avoidance groove 223. For the third RF port 231 and the trace on the third metal layer 230 serving as the center conductor and the first RF port 211 and the trace on the first metal layer 210 adopting this structure, there is a relatively complete reference ground plane around them. Although the width of the RF trace is small, the RF trace loss is high, and the requirements for processing and later assembly are high, it has the advantages of smaller reflection of the waveguide system and wider transmission bandwidth. This is because in the process of the main transmission of the higher-order waveguide mode by the microstrip line, the smaller the thickness of the dielectric layer, the higher the frequency of the higher-order waveguide mode. Adopting this structure, the thickness of the dielectric layer between the center conductor and the ground plane is smaller, and the frequency of the higher-order waveguide mode is higher. Therefore, the main mode transmission bandwidth is wider, and it is more difficult to excite the higher-order mode waveguide mode.

[0052] As a specific implementation manner of the embodiment of the present invention, please refer to Figure 4 , and a plurality of capacitors 130 located on the outer periphery of the chip 100 are further provided in the accommodation groove 260. The capacitors 130 are connected to the chip DC ports 120 in one-to-one correspondence, and the capacitors 130 and the first DC ports 212 are respectively connected in one-to-one correspondence. In this embodiment, the chip DC ports 120 and the first DC ports 212 are connected through the capacitors 130. By providing the capacitors 130 here, power decoupling and filtering processing can be provided for the packaged chip 100, the RF stability parameters of the chip 100 can be improved, and the interference of external clutter on the functions of the chip 100 can be reduced.

[0053] As a specific implementation manner of the embodiment of the present invention, please refer to Figure 1 , Figure 2 , Figure 4 and Figure 5 , a first semi-circular portion 214 is provided at one end of the first RF port 211 away from the chip 100, and a second semi-circular portion 234 is provided at one end of the third RF port 231 close to the chip 100. The second semi-circular portion 234 and the first semi-circular portion 214 are vertically corresponding and connected by a metallized via 270. The connection method of the first semi-circular portion 214 and the second semi-circular portion 234 by the metallized via 270 can reduce the parasitic parameters of the third RF port 231 and the trace on the third metal layer 230, the first RF port 211 and the trace on the first metal layer 210, improve the discontinuity of the impedance in the waveguide process of the center conductor, and reduce the reflection coefficient of the chip RF port 110 after packaging.

[0054] In this embodiment, the main axis of the metallized via 270 is arranged in the up-and-down direction, that is, in a form perpendicular to the board surface of the packaging substrate. The metallized via 270 is a via for connecting the first metal layer 210 and the third metal layer 230. A plurality of grounded ground posts 216 can be fabricated around the metallized via 270 to form a coaxial transmission effect, thereby reducing the discontinuity of microwave signal transmission and reducing the transmission loss of the metallized via 270.

[0055] As a specific implementation manner of the embodiment of the present invention, please refer to Figures 1 to 3 , a copper strip 280 is provided between the first central layer 233 and the second metal layer 220, and the length direction of the copper strip 280 is arranged perpendicular to the up-and-down direction. In this embodiment, the bottom surface of the receiving groove 260 is the second metal layer 220, and the second metal layer 220 has good electrical conductivity. A conductive layer is also provided on the inner wall of the receiving groove 260. The top surface of the copper strip 280 is in contact with the bottom surface of the second metal layer 220, and the bottom surface of the copper strip 280 is in contact with the top surface of the first central layer 233. Since copper is a material with good thermal conductivity, it can quickly export the heat at the position of the chip 100.

[0056] Furthermore, the width of the copper strip 280 is between 100um and 300um, and the ratio of the width of the copper strip 280 to the distance between two adjacent copper strips 280 is 5:1 to 2:1. This parameter range can ensure good heat transfer performance. The thickness of the copper strip 280 is the same as the thickness of the second dielectric layer 250, which is used to connect the second metal layer 220 and the third metal layer 230, reducing the grounding inductance of the chip 100, forming a good grounding path, and at the same time forming a good heat conduction path.

[0057] The combined setting form of the second metal layer 220, the copper strip 280 and the first central layer 233 reduces the grounding inductance of the chip 100, forms a good grounding path, and at the same time forms a good heat conduction path. The long direction of the copper strip 280 is arranged perpendicular to the up-and-down direction, and it can be arranged in a direction parallel to the length direction of the receiving groove 260, or in a direction perpendicular to the length direction of the receiving groove 260, or in a form arranged at a certain angle to the length direction of the receiving groove 260.

[0058] Furthermore, the copper strip 280 can also be arranged in the form of a cylindrical member made of copper located below the receiving groove 260. The main axis of the cylindrical member made of copper is arranged in the up-and-down direction, with the top end extending to the second metal layer 220 and the bottom end extending to the first central layer 233, which can achieve the same heat conduction function.

[0059] As a specific implementation manner of the embodiment of the present invention, please refer to Figure 7, in this embodiment, there is a first grounding port 235 for connecting to the PCB board on each side of the third radio frequency port 231 on the third metal layer 230. A second grounding port 236 for connecting to the ground metal layer of the PCB board is provided on the bottom surface of the third metal layer 230 corresponding to the lower part of the chip 100. The third metal layer 230 is used as the ground metal layer of the packaging substrate. The settings of the first grounding port 235 and the second grounding port 236 can fully connect the ground metal layer of the packaging substrate (i.e., the third metal layer 230) to the ground metal layer of the PCB board, reducing the transmission loss when the third radio frequency port 231 is connected to the PCB.

[0060] Please refer to Figure 3 , an adhesive layer for bonding to the outer periphery of the packaging substrate is provided at the bottom edge of the cover 300, and the chip 100 and the receiving groove 260 are bonded with conductive adhesive. An adhesive layer for bonding to the outer periphery of the packaging substrate is provided at the bottom edge of the cover 300, and the chip 100 and the receiving groove 260 are bonded with conductive adhesive. The cover 300 realizes effective bonding with the packaging substrate through the adhesive layer on the outer periphery of the bottom surface. During bonding, the adhesive layer is melted by heating to achieve the effect of effectively bonding the cover 300 and the packaging substrate into a whole.

[0061] A method for manufacturing a millimeter-wave amplifier chip packaging structure includes the following steps:

[0062] 1. Manufacture the packaging substrate: The first metal layer 210, the first dielectric layer 240, the second metal layer 220, the second dielectric layer 250, and the third metal layer 230 are stacked. The first dielectric layer 240 and the second dielectric layer 250 are made of high-frequency plates with a thickness of 60 um, and the first metal layer 210, the second metal layer 220, and the third metal layer 230 are respectively made of copper layers with a thickness of 30 um. A receiving groove 260 is opened on the first dielectric layer 240, and the grooving depth is 60 um. The bottom of the receiving groove 260 exposes the second metal layer 220. The edge distance between the side of the chip 100 adjacent to the first radio frequency port 211 and the second radio frequency port 221 and the edge of the receiving groove 260 is 60 um; the surface of the first metal layer 210 is plated. The plating layer is made of nickel-palladium-gold material, and the three materials of nickel, palladium, and gold are stacked from bottom to top, with a relatively soft texture, which is convenient for improving the adhesion of the bonding wire 140 on the first metal layer 210 and helps to improve the adhesion performance.

[0063] 2. Bond the chip 100 to the packaging substrate: Place the packaging substrate on the bonding table, and bond the chip 100 into the receiving groove 260 of the packaging substrate through a conductive adhesive with high thermal conductivity; Place the packaging substrate with the bonded chip 100 into a high-temperature oven, with a drying temperature of 150 °C and a drying time of 4 hours, so that the bonding adhesive between the chip 100 and the packaging substrate is fully cured, meeting the requirements of fixing and heat conduction of the chip 100.

[0064] 3. Bond the radio frequency port 110 of the chip to the first radio frequency port 211 and bond the DC port 120 of the chip to the first DC port 212. Place the packaging substrate with the bonded chip 100 on the bonding table and heat it to the bonding temperature of 120 °C; Use 25um gold wire to bond the radio frequency port 110 of the chip to the first radio frequency port 211 and bond the DC port 120 of the chip to the first DC port 212.

[0065] 4. Install the cover 300: Heat the packaging substrate with the bonded chip 100 to 125 °C; Fix the cover 300 directly above the packaging substrate, keep the temperature of the packaging substrate and the cover 300 at 125 °C unchanged, apply a certain pressure, and keep it for 10 min - 30 min to fully melt the bonding adhesive of the cover 300, then continue to heat up to 160 °C and keep it for 1 hour; Let the packaged chip 100 cool naturally to room temperature.

[0066] Finally, conduct appearance and X-ray inspections on the packaged product to determine whether there are scratches or broken bonding wires 140, etc., and use a laser to mark the front of the packaged product.

[0067] The millimeter-wave amplifier chip packaging method provided by the present invention realizes the accommodation of the chip 100 by means of the receiving groove 260 provided on the packaging substrate, effectively shortening the length of the bonding wire 140 between the radio frequency port 110 of the chip 100 and the first radio frequency port 211 of the packaging substrate, facilitating the reduction of parasitic inductance and radio frequency transmission loss, and effectively improving the transmission ability of the millimeter-wave amplifier chip in the high-frequency band. The inner cavity 310 of the cover 300 enables there to be a gap between the chip 100 flush with the top surface of the packaging substrate and the inner cavity 310 of the cover 300, so that the radio frequency port 110 or the DC port 120 of the chip can directly contact the air, avoiding the loss caused by the need to contact the electrolyte in traditional packaging, and effectively reducing the loss in the high-frequency band.

[0068] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, and improvements made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.

Claims

1. Millimeter-wave band amplifier chip packaging structure, Characterized in that, It includes a chip, a packaging substrate and a cover; Several chip DC ports and at least two chip RF ports are provided on the outer periphery of the upper surface of the chip; The packaging substrate is provided with a first metal layer, a first dielectric layer, a second metal layer, a second dielectric layer and a third metal layer stacked in sequence from top to bottom. Through holes are respectively provided in the middle of the first metal layer and the middle of the first dielectric layer. The inner walls of the first metal layer and the first dielectric layer form a receiving groove for receiving the chip with the second metal layer; The cover is arranged on the packaging substrate and is used to cover the packaging substrate. The cover is provided with an inner cavity with an opening downward; The first metal layer includes several first DC ports corresponding to the chip DC ports and first RF ports corresponding to the chip RF ports. Adjacent two of the first DC ports are spaced apart; Avoidance grooves are provided at positions on the second metal layer corresponding to the first DC ports and the first RF ports up and down; The third metal layer includes several third DC ports corresponding to the first DC ports one by one up and down, third RF ports corresponding to and connected to the first RF ports one by one up and down, and a first central layer located in the middle of several third DC ports. Adjacent two of the third DC ports are spaced apart, and the third DC ports are spaced apart from the first central layer; One end of the first RF port away from the chip is provided with a first semi-circular part, and one end of the third RF port close to the chip is provided with a second semi-circular part. The second semi-circular part corresponds to the first semi-circular part up and down and is connected by a metallized through hole.

2. The millimeter-wave band amplifier chip packaging structure according to claim 1, Characterized in that, The first metal layer further includes four corner metal layers respectively arranged at the four corners of the upper surface of the first dielectric layer. Several grounding posts are further provided between the side of the corner metal layer close to the first RF port and the third metal layer.

3. The millimeter-wave band amplifier chip packaging structure according to claim 2, Characterized in that, An outward expansion port for avoiding the first RF port is further provided between the two corner metal layers on both sides of the first RF port.

4. The millimeter-wave band amplifier chip packaging structure according to claim 1, Characterized in that, The second metal layer further includes a second RF port and a second DC port arranged in the avoidance groove. The second RF port corresponds to the first RF port one by one up and down, and the second DC port corresponds to the first DC port one by one up and down.

5. The millimeter-wave band amplifier chip packaging structure according to claim 1, Characterized in that, Several capacitors are further provided in the receiving groove on the outer periphery of the chip. The capacitors are connected to the chip DC ports one by one, and the capacitors are respectively connected to the first DC ports one by one.

6. The millimeter-wave band amplifier chip packaging structure according to claim 1, Characterized in that, A copper bar is provided between the first central layer and the second metal layer, and the length direction of the copper bar is perpendicular to the up-down direction.

7. The millimeter-wave frequency band amplifier chip packaging structure according to any one of claims 1-6, characterized in that on the bottom surface of the third metal layer, there are first grounding ports located on both sides of the third RF port and used for connecting to the PCB board, and on the bottom surface of the third metal layer, there is also a second grounding port located below the receiving groove.

8. A method for manufacturing the millimeter-wave frequency band amplifier chip packaging structure according to any one of claims 1-7, characterized in that it includes the following steps: Manufacturing a packaging substrate: opening through holes in the first metal layer and the first dielectric layer, stacking the first metal layer, the first dielectric layer, the second metal layer, the second dielectric layer, and the third metal layer from top to bottom, respectively connecting the corresponding first RF port and the third RF port above and below, and the first metal layer, the first dielectric layer, and the second metal layer form the receiving groove; Bonding the chip to the packaging substrate: placing the packaging substrate on a bonding table, bonding the chip into the receiving groove, and drying the chip and the packaging substrate until the bonding glue is cured; Connecting the chip RF port to the corresponding first RF port and connecting the chip DC port to the first DC port; Installing the cover: heating the packaging substrate to 125 °C; fixing the cover to the packaging substrate, raising the temperature and maintaining it, and then naturally cooling.

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