Method and device for preventing undesired triggering of short circuit or overcurrent protection

Abstract

The present application relates to methods and apparatus for preventing undesired triggering of short circuit or overcurrent protection. Methods, apparatus, systems, and articles of manufacture are disclosed for preventing undesired triggering of short circuit or overcurrent protection. An example apparatus (500) includes an output terminal (108); a voltage detection device (506) coupled to a voltage detection input terminal and the output terminal (108) and including a voltage detection output (520) coupled to a first input terminal of a logic gate (508); a pulse stretcher (510) coupled between an output (526) of the logic gate (508) and a select node (528); a multiplexer (522) coupled to the select node (528) and configured to be coupled to a first protection circuit (512), a second protection circuit (514), and a driver (540); and a switch (530) coupled between an input terminal (524) and the output terminal (108) and including a switch gate terminal coupled to the driver (540).

Description

[0001] Related Applications

[0002] This application is a continuation of Indian Provisional Patent Application No. 201841027168, filed on July 20, 2018. Indian Provisional Patent Application No. 201841027168 is incorporated by reference herein in its entirety. Priority is hereby claimed to Indian Provisional Patent Application No. 201841027168. TECHNICAL FIELD

[0003] The present disclosure relates generally to circuit protection, and more specifically to preventing undesired triggering of short circuit or overcurrent protection. BACKGROUND

[0004] A short circuit is an unintended connection between a power supply network and another network, such as ground. A short circuit can damage power supply devices, as these devices are not designed to handle the large currents associated with a short circuit. Short circuit protection circuits are used to cut off the current to the short circuit by opening the contact between the power supply network and the short circuit. SUMMARY BRIEF DESCRIPTION OF DRAWINGS

[0005] Figure 1 is a timing diagram illustrating signals associated with operation of a protection device that triggers short circuit protection.

[0006] Figure 2A and Figure 2B is a block diagram illustrating an example implementation of an example power path.

[0007] Figure 3 is a block diagram illustrating an example power supply circuit that provides power to multiple loads.

[0008] Figure 4 is a signal plot illustrating a response of the example power supply circuit of FIG. 2 when one load is removed.

[0009] Figure 5A and Figure 5B is a block diagram showing additional details of the example power path of FIG. 2.

[0010] Figure 6 is a flowchart representing the functionality of the block diagram of Figure 5A

[0011] Figure 7 is a schematic diagram showing additional details of the current increase detector of Figure 5A and Figure 5B

[0012] Figure 8 is a schematic diagram showing additional details of the current increase detector of Figure 5A ​​A schematic diagram showing additional details of an example implementation of the output voltage drop detector.

[0013] Figure 9 This diagram illustrates what happens when a short circuit occurs. Figure 5A The example block diagram shows the signal curves of the component responses.

[0014] Figure 10 This diagram illustrates what happens when a transient occurs at the input. Figure 5A The example block diagram shows the signal curves of the component responses.

[0015] The accompanying drawings are not to scale. Generally, the same reference numerals will be used throughout the drawings and accompanying written description to refer to the same or similar parts. As used herein, a statement that any part (e.g., layer, film, region, area, or plate) is on top of another part in any way (e.g., positioned on top of, located on top of, set on top of, or formed on top of, etc.) indicates that the referenced part is in contact with the other part, or indicates that the referenced part is on top of the other part, wherein one or more intermediate parts are located therebetween. A statement that any part is in contact with another part means that there is no intermediate part between the two parts. Although the drawings show layers and regions with clearly defined lines and boundaries, some or all of these lines and / or boundaries may be idealized. In practice, boundaries and / or lines may be unobservable, mixed, and / or irregular.

[0016] When identifying multiple elements or components that can be individually mentioned, the descriptors “first,” “second,” “third,” etc., are used herein. Unless otherwise stated or understood based on the context of their use, such descriptors are not intended to imply any meaning of priority or ordering, but merely serve as labels for separately referring to multiple elements or components to facilitate understanding of the disclosure. In some examples, the descriptor “first” may be used to refer to an element in the detailed description, while the same element may be mentioned in the claims with different descriptors such as “second” or “third.” In such cases, it should be understood that such descriptors are used only where it is convenient to refer to multiple elements or components. Detailed Implementation

[0017] As used herein, the term "above" is used with respect to the body region of the underlying semiconductor substrate (e.g., a semiconductor wafer) on which an integrated circuit is formed. Specifically, as used herein, a first component of an integrated circuit is "above" a second component when the first component is located away from the body region of the semiconductor substrate. Similarly, as used herein, a first component is "below" another component when the first component is located closer to the body region of the semiconductor substrate. As described above, a component can be above or below another component, with other components in between or in direct contact with each other.

[0018] Modern electronic systems utilize multi-voltage power distribution to support various types of loads. Multi-voltage power distribution can utilize power paths of various types of loads to provide power to each load from a common input power source. The power paths include electrical components such as capacitors, inductors, resistors, transistors, and / or different semiconductors to make up circuits that convert voltage from one level to another, protect the loads and / or input power source from damaging currents, etc. A power path protection device is a circuit that provides power to a load while also regulating the amount of power the load is receiving in order to protect the load from transients, short circuits in the circuit, etc. For example, short circuit protection (also referred to as SCP) is a feature of a power path protection device. If the load current increases beyond its set short circuit threshold, the SCP in the power path device prevents power from being provided to the load. For example, a manufacturer of a power source can provide a maximum current limit in which the power source will be damaged, and the power path device will implement that current limit value as a threshold of the SCP to prevent power when the power path device detects that the current has reached that threshold.

[0019] In some examples, the SCP threshold is scalable (e.g., the SCP threshold can be changed) to effectively protect systems based on current limit values provided by the input power source and / or load manufacturer. Different systems can be rated for different current levels, resulting in a desire for a scalable SCP in the power path protection device. If the current exceeds the rated value, the power path protection device cuts off the current drawn by the load, protecting each of such systems. The SCP level can be programmable or settable to an expected value for various types of loads. The power path protection device applies the SCP by monitoring the current through the switch, where the current through the switch is indicative of the load current. When the current through the switch is greater than a threshold value specified by a user (e.g., a manufacturer), the switch is opened (e.g., turned off). Triggering the SCP means turning off the switch when the current through the switch is greater than the threshold value specified by the user.

[0020] In some examples, when the SCP is triggered due to an increase in current through the switch as a result of a supply transient, the result is undesirable. For example, a sudden change in an electrical device can result in a supply transient (e.g., a high voltage surge lasting for a period of time) due to stored energy contained in any circuit inductance and / or capacitance. The size and duration of the transient depend on the inductance, capacitance, and the value of the supply voltage from the power source. Triggering the SCP due to a supply transient is undesirable because the current at the load does not meet (e.g., exceed) the rated threshold, and thus the load does not need to be disconnected from the power source. When an undesirable SCP trigger occurs, an unwanted power outage occurs in the electrical system.

[0021] In some examples, a power supply transient occurs from the disconnection and connection of a load from a load system. For example, multiple servers in a rack are connected to a power distribution unit (PDU) that distributes sufficient power to each server in the rack. The servers are frequently disconnected from the PDU and connected back to the PDU, and due to parasitic inductance in the power supply path, this practice can cause a power supply transient. When the inductance is shut down in this practice, a surge voltage is generated according to the following equation:

[0022] V = L x di / dt (Equation 1) where the surge voltage (V) is equal to the inductance (L) multiplied by the change in current over time (di / dt). This surge voltage (V) increases the current through the power protection device. If the current meets (e.g., exceeds) a threshold (e.g., a through current limit setting), the SCP can be triggered and thus shut down power to the remainder of the servers connected in the rack. The surge voltage (V) can not damage the PDU or the servers, and thus, the shutdown of power to the servers results in user inconvenience, system downtime, etc., which are all undesirable.

[0023] Figure 1 A timing diagram 100 is illustrated that illustrates signals associated with the operation of a protection device when an input voltage 102 provides a power supply transient to a load via the protection device. The input voltage 102 increases at time ti, indicating a power supply transient. At time ti, the output voltage 108 of the protection device increases along with the output current 112. The output current 112 is shown as a spike, and at time t2 the spike in current meets a threshold value set by the manufacturer. But the increase in output current 112 is not due to a short circuit, and thus power should not be removed from the load due to the output current 112 spike.

[0024] The timing diagram 100 depicts the gate-source voltage (Vgs) 114 of a power MOSFET located in the protection device. The power MOSFET provides current to the load and is turned on and off depending on the load state. At time t2 the Vgs 114 is pulled down, which is a total short circuit response time after the output current 112 meets the threshold current of 36 amps. This is an undesirable trigger of the short circuit protection because the absolute current protection is not protecting the load from a short circuit in the circuit, rather the absolute current protection is protecting the load from a power supply transient that lasts for a short period of time and does not damage the load. The increase in output voltage 108 and the increase in output current 112 indicate that there is a transient in the input voltage 102. The examples disclosed herein determine when the output voltage 108 is increasing and when the current to the load is increasing and further determine to disable or stop the short circuit protection by shutting down the power MOSFET to avoid the undesirable consequences of cutting off power provided to the load.

[0025] The example methods and apparatus disclosed herein monitor the current through a switch of a power path and the input or output voltage of the power path. The example methods and apparatus also determine, based on the monitored current and input / output voltage, whether the input or output voltage is increasing or decreasing while the monitored current is increasing. Based on the results, the example methods and apparatus disclosed herein enable a scalable SCP or disable the scalable SCP and enable a maximum SCP. For example, the methods and apparatus disclosed herein include an output voltage drop detector to determine whether the voltage across the output of a switch is increasing or decreasing by sensing a high voltage signal at the output of the switch and converting the high signal to a low voltage logic signal for processing. The example methods and apparatus disclosed herein also include a current increase detector to determine whether the output current of a switch is increasing. In some examples, the output voltage drop detector and the current increase detector are compared to determine whether the current is increasing and the output voltage is increasing and to disable the scalable SCP when the maximum SCP is enabled.

[0026] The example methods and apparatus disclosed herein utilize the results between the comparison of the current increase detector and the output voltage drop detector to distinguish between a supply transient event and a shorted load event. For example, when the current increase detector determines that the current at the output of a switch is increasing and when the output voltage drop detector determines that the output voltage at the switch is dropping, then it is a shorted load event. When the current increase detector determines that the output current is increasing and the output voltage drop detector determines that the output voltage is not dropping, then it is a supply transient event. The following discussion of the results is provided in connection with Figures 1-9 These results are discussed in detail below.

[0027] As used herein, the term power path refers to a power path protection device that includes SCPs and power converters, linear regulators, power multiplexers, fuses, load switches, etc. For example, the power path distributes power to the load(s) while also providing protection for the load.

[0028] As used herein, scalable short circuit protection (SCP) refers to the ability of the SCP threshold to change based on user requirements. For example, a power path can provide service to a load between certain rated load currents, such as 1 amp to 5 amps, and depending on the user, the SCP of the power path device can be set to include a current threshold from anywhere between 1 amp to 5 amps. In some examples, a user can define the steady state current at which they want their load to operate, in which case the SCP can be designed to be a certain percentage higher than the steady state current. For example, if the steady state current of the load is 2 amps and the SCP threshold is 50% higher than the steady state current of 2 amps, then the current limit threshold is 3 amps.

[0029] As used herein, maximum short circuit protection (SCP) refers to the maximum amount of current that a power path provides to a load before the load is damaged. For example, the above-described load operating at 2 amps steady state can be a 5 amp rated device, and can handle 7.5 amps for a certain amount of time without being damaged. In this way, the maximum SCP threshold would be 7.5 amps.

[0030] As used herein, the term "steady state" refers to a balanced condition of a circuit that occurs when the effects of transients are no longer significant. For example, a circuit is in steady state when the current at every point in the circuit is constant (e.g., does not vary with time).

[0031] Turning to the figures, a block diagram of an example power path 106 for protecting a load 110 is illustrated in Figure 2A and Figure 2B . Figure 2B An example illustrates a supply transient, where the response of the power path 106 is not to trigger SCP. Figure 2A An example illustrates a load 110 with a ground short, where the response of the power path 106 is to trigger SCP. Figure 3 and Figure 4 Illustrate an example way to implement multiple power paths 106 for protecting multiple loads in one schematic. Figure 5A and Figure 5B Illustrate an example system 500 diagram for overcoming the above-described problems related to undesired triggering of SCP. The Figure 2A and Figure 2B are described in further detail below.

[0032] In Figure 2A , an example input voltage (Vin) 102 is provided to an example power path 106, where the voltage is distributed to an example load 110. The example power path 106 includes multiple functions, such as short circuit protection (SCP), voltage conversion (e.g., converting a high input voltage 102 to a low output voltage 108), and / or voltage regulation (e.g., regulating the amount of output voltage 108 provided to the load 110). The purpose of the example power path 106 is to provide a shutdown mechanism (e.g., prevent the input voltage 102 from being provided to the load 110) for the example load 110 when the example load 110 is ground shorted or when the example load 110 outputs more current than a threshold. For example, when the load 110 is ground shorted, the voltage begins to drop due to the lack of resistance between the load 110 and ground, and thus there is excess current conducted through the load due to the low impedance. In some examples, the excess current can damage the power source providing the input voltage 102 and / or the power path 106. Figure 2AThe block diagram illustration of the example load 110 of a ground short. In this way, the SCP will be triggered and the input voltage 102 will be blocked by the example power path 106 in order to protect the power source providing the input voltage 102 and / or the power path 106 from damage.

[0033] During Figure 2B , the example input current (I IN ) 104 is increasing for a short period of time, similar to a pulse. Figure 2B The input current 104 of the example load 110 indicates a power supply transient, which can cause an increase in current conducted through the example load 110. Additionally or alternatively, during the power supply transient, the input voltage 102 can also increase for a short period of time. In some examples, when the input current 104 is transient, the current conducted across the load 110 increases beyond a threshold value. In this way, the previous power path determination that the current conducted through the load 110 is increasing and thus triggers the SCP, resulting in an unwanted interruption of the supply current. Triggering the SCP during a power supply transient is undesirable because the example load 110 is not failing, and thus there is an unwanted power source interruption in the system. When there is a power supply transient, Figure 2B The example power path 106 of the example load 110 does not trigger the SCP.

[0034] Figure 3 An example power supply circuit 300 is illustrated, in which multiple power paths 106 have a common power source (Vsupply) 302. The example power supply circuit 300 includes an example power source 302, an example card A 304, an example card B 306, an example input capacitor 310, an example power path 106, an example bulk capacitor 312, and an example load 110. The example power supply circuit 300 also includes inherent or parasitic inductances Lsupply 308 and Lcard 316, which are a result of the power conducted across the connecting wires in the example power supply circuit 300. Lsupply 308A can be referred to as a distributed inductance across the example power supply circuit 300 from the positive side of the example power source 302, and Lsupply 308B can be referred to as a distributed inductance on the negative power supply side (e.g., ground reference). Lcard 316A can be referred to as a parasitic inductance (e.g., an unwanted effect of routing electrical connections on a printed circuit board) between the example card A 304 and the example card B on the positive power supply side, and Lcard 316B can be referred to as a parasitic inductance (e.g., ground reference) on the negative power supply side.

[0035] During Figure 3In the example, the example power supply circuit 300 includes an example power supply 302 that supplies power to an example card A 304 and an example card B 306. The example card A 304 generally represents a system, such as a server, where the server includes a power path 106 coupled to a motherboard (e.g., the load 110). The example card A 304 also includes components such as an example input capacitor 310 and an example bulk capacitor 312. In some examples, the input capacitor 310 is an electrical component that provides filter characteristics to the example power path 106, such as reducing ripple voltage, regulating incoming DC voltage, reducing impedance imposed by the power supply 302, and the like. In other examples, the input capacitor 310 can be a parasitic capacitor depicted that is concentrated at the input of the power path 106. The example card A 304 also includes an example bulk capacitor 312 that is intentionally coupled to the input of the example load 110 to provide further voltage ripple filtering (e.g., remove or reduce variations in voltage).

[0036] In Figure 3 The example card B 306 is a duplicate of the example card A 304, where the example card B 306 is coupled in parallel to the example card A and receives power from the example power supply 302. In some examples, the card B 306 can be a server that is different from the card A server but located in the same rack (e.g., a frame used to house multiple servers, hard drives, modems, and other electrical devices). The example input capacitor 310 of the card B 306 can be provided to determine the input voltage Vinb 102 provided to the example power path 106. In other examples, the card B 306 can be different from the card A 304, such as a different load 110, the card B 306 can include different capacitor sizes and input voltages.

[0037] Figure 4 is an example signal plot 400 that depicts the input voltage Vina 102 of the example card A 304, the input current Iin_a 304 of the example card A 304, and the input voltage Vinb 102 of the example card B 306 when the example card B 306 is removed from the example power supply 302 of the example power supply circuit 300. Referring to Figure 3 , the example card B 306 is removed from the power supply 302 at time ti, and is indicated by the open example first switch 320A and the open example second switch 320B. In some examples, when the card B 306 is removed, the current flowing into the card B 306 (i.e., Iin_b 318) is diverted to other cards connected to the rack, such as the card A 304, resulting in a transient. Turning to Figure 4At time tl, example card B 306 is removed from example power supply 302, and card B 306 input voltage decreases to zero and input current lin_a 304 increases until time t2, where the increase in input current 304 is transient. At time t2, input current 304 decreases. This decrease in input current 304 indicates that there is no short in load 110 of example card A 304, as if there was a short, load current 314 and input current 104 would remain at a high value until load 110 is removed from power supply 302.

[0038] The time between time tl and time t2 is a short period (e.g., nanoseconds), where the signal graph of example signal graph 400 illustrates the transient (e.g., increase in input current 304) and the increase in input voltage of Vina 102 and decrease in input voltage of Vinb 102 in response to removing example card B 306. For example, at time tl, Vina 102 increases until time t2, and then returns to the initial value (e.g., decreases as input current 304 decreases). Further, at time tl, Vinb 102 decreases due to the cut-off of voltage from example power supply 302.

[0039] In some examples, a previous power path such as a fuse, regulator, etc. would have sensed the input current 304 transient and determined that there is too much current being provided to load 110, and thus remove the voltage provided to load 110. In this way, there is an unwanted interruption in the supply voltage when there is no fault on load 110. Figure 5A and Figure 5B The example illustrated in FIG. 2 does not remove the voltage provided to load 110 during the input current 304 transient.

[0040] Figure 5A An example system 500 graph illustrating for determining whether current at example load 110 is increasing and voltage at the load is decreasing to enable a scalable SCP 512 is illustrated in FIG. 5. In Figure 5A In FIG. 5, example system 500 graph determines whether current at example load 110 is increasing and output voltage 108 at example load 110 is increasing to enable a maximum SCP 514. Example system 500 graph is coupled to power FET 530 via gate driver 540 and includes example current sensor 501, example current monitor 502, and example current increase detector 504, example output voltage (vout) drop detector 506, example logic gate 508, example pulse stretcher 510, example scalable SCP 512, example maximum SCP 514, and example multiplexer 522.

[0041] In Figure 5AThe example system 500 figure includes an example current sensor 501 for measuring the current to a load. The example current sensor 501 is a two-port network including sensing elements (e.g., two inputs Vin 102 and Vout 108 and two outputs). The sensing elements are any type(s) of electronic components that can be used to measure the current across the outputs. For example, the sensing element of the current sensor 501 can be a shunt resistor, a DC resistance (DCR) circuit, a Hall effect sensor, etc. The two outputs of the example current sensor 501 are coupled to an example current monitor 502 and provide a measurement of the current to the example current monitor.

[0042] exist Figure 5A In the example system 500 diagram, an example current monitor 502 is included to balance the two outputs of the example current sensor 501 to determine the current supplied to the example load 110 at the output voltage node 108 and to distinguish the voltage to determine whether the voltage is negative or positive. The example current monitor 502 includes two inputs and one output 516, which is proportional to the current through the power FET 530. The example current monitor 502 is coupled to an example current increase detector 504 to provide an output 518 indicating whether the current through the power FET 530 is increasing or not. The following is in conjunction with... Figure 7 The example current monitor is described in more detail. Alternatively, the example current monitor can be an amplifier, resistor, transistor, current sensor, etc.

[0043] exist Figure 5A In the example system 500 diagram, an example current increase detector 504 is included to determine when the current monitor output 516 is increasing or decreasing. For example, the current increase detector 504 includes a zero-crossing detector to determine when the differential of 516 crosses a positive or negative threshold. The example current increase detector 504 generates a current detection signal on a first output 518 to indicate when the current at load 110 is increasing or decreasing. For example, the current increase detector 504 can output a digital 1 to indicate that the current at load 110 is increasing, and output a digital 0 to indicate that the current at load 110 is decreasing. The example current increase detector 504 is coupled to the non-inverting input of example logic gate 508. The example current increase detector 504 is combined with the following... Figure 7 Further detailed description.

[0044] exist Figure 5AIn the example system 500 diagram, an example Vout drop detector 506 is included to determine whether the output voltage 108 is decreasing (e.g., the voltage is decreasing). For example, the Vout drop detector 506 senses the output voltage 108, which can be a high voltage (e.g., depending on the semiconductor process used to implement the circuit, greater than the voltage used for digital processing, or greater than 1-3 volts) supplying power to a load, and the Vout drop detector 506 converts the high voltage to a low voltage domain (e.g., the voltage used for digital processing according to the semiconductor process used to implement the circuit) logic signal. The example Vout drop detector 506 includes sufficiently high sensitivity to detect small movements in the output voltage 108, where sensitivity is defined as the minimum amplitude of the input signal (e.g., the output voltage 108) required to generate a specified output signal (e.g., a second output signal 520). For example, in... Figure 4 The example signal curve in Figure 400 illustrates the input voltage Vina 102 as the voltage increases, and the example output voltage drop detector 506 detects the voltage increase and outputs a logic 1 or logic 0 on the second output 520.

[0045] Example Vout drop detector 506 includes example inverter 830 coupled to second output 520. Figure 8 In some examples, when the Vout drop detector 506 detects that the output voltage 108 is dropping, the Vout drop detector 506 will output a logic 1 (e.g., logic high) at the second output 520. For example, when the output voltage 108 is dropping (e.g., decreasing), the inverter 830 receives a logic 0 and inverts it to a logic 1. The example Vout drop detector 506 is coupled to the inverting input pin of the example logic gate 508 via the example second output 520. In some examples, the second output 520 is inverted a second time by the logic gate 508. For example, when the inverter 830 outputs a logic 1, the inverting input of the logic gate 508 inverts the logic 1 to a logic 0. Additionally or alternatively, the logic gate 508 may not include an inverting input, but instead include a second non-inverting input, where a digital signal is received from the second output 520. The example Vout drop detector 506 is combined in the following... Figure 8 Further detailed description.

[0046] exist Figure 5AIn some examples, a logic 1 at the determination output 526 determines to block the scalable SCP 512. For example, when the current increase detector 504 determines that the load current 314 is increasing, it outputs a logic 1, and when the Vout drop detector 506 determines that the output voltage 108 is not decreasing (e.g., it is stable or increasing), it outputs a logic 0, which is inverted to a logic 1 by the inverting input of the logic gate 508. If the load current 314 is increasing and the output voltage 108 is increasing, then a transient can have occurred in the power path 106. In some examples, a logic 0 at the determination output 526 determines to select the scalable SCP 512. For example, when the current increase detector 504 determines that the load 110 current is increasing, it outputs a logic 1, and when the Vout drop detector 506 determines that the output voltage 108 is decreasing, it outputs a logic 1, which is inverted to a logic 0 by the inverting input of the logic gate 508. If the load current 314 is increasing and the output voltage 108 is decreasing, then the load 110 is shorted and the scalable SCP 512 is selected to protect the power supply 302 from harsh currents. Additionally or alternatively, the example logic gate 508 can be an OR gate, a NOR gate, an AND gate, an NAND gate, an XNOR gate, an XOR gate, etc., and the first and second inputs of the logic gate 508 can both be inverting inputs, both be non-inverting inputs, one be an inverting input and one be a non-inverting input, etc.

[0047] In some examples, a logic 1 at the determination output 526 determines to block the scalable SCP 512. For example, when the current increase detector 504 determines that the load current 314 is increasing, it outputs a logic 1, and when the Vout drop detector 506 determines that the output voltage 108 is not decreasing (e.g., it is stable or increasing), it outputs a logic 0, which is inverted to a logic 1 by the inverting input of the logic gate 508. If the load current 314 is increasing and the output voltage 108 is increasing, then a transient can have occurred in the power path 106. In some examples, a logic 0 at the determination output 526 determines to select the scalable SCP 512. For example, when the current increase detector 504 determines that the load 110 current is increasing, it outputs a logic 1, and when the Vout drop detector 506 determines that the output voltage 108 is decreasing, it outputs a logic 1, which is inverted to a logic 0 by the inverting input of the logic gate 508. If the load current 314 is increasing and the output voltage 108 is decreasing, then the load 110 is shorted and the scalable SCP 512 is selected to protect the power supply 302 from harsh currents. Additionally or alternatively, the example logic gate 508 can be an OR gate, a NOR gate, an AND gate, an NAND gate, an XNOR gate, an XOR gate, etc., and the first and second inputs of the logic gate 508 can both be inverting inputs, both be non-inverting inputs, one be an inverting input and one be a non-inverting input, etc.

[0048] In Figure 5A In some examples, the example system 500 diagram includes an example pulse stretcher 510 to impose a time extension on the determination output 526 when the determination output 526 is high (e.g., a logic 1). For example, the pulse stretcher 510 can cause a high pulse to last for a specified period of time set by an example timer Tl 544. In some examples, the timer Tl 544 is set by the inherent parasitic inductance of the Lsupply 308A in the power supply path, the input capacitance of the Cin 310, and / or the like. Figure 3determining the output capacitance of Cbulk 312. The extended time period depends on the components of the example power supply circuit 300 for the purpose of determining the amount of time it takes for the electrical energy stored in each component during a transient to return to steady state after the transient. In this way, the example pulse stretcher 510 ensures that the scalable SCP 512 is not enabled during a transient (e.g., to ensure that power to the load 110 is not removed in error). To further understand, the pulse stretcher 510 is included in this system 500 diagram because the example logic gate 508 can output a high signal to indicate a transient, but that high signal can be a short pulse, where the pulse returns low as soon as the output voltage 108 begins to decrease. In this way, the load current 314 can still be above the scalable SCP current threshold, and thus, if the select input 528 selects the value on the scalable SCP output 532, the scalable SCP 512 will attempt to remove the power provided to the load 110. To avoid this from happening, the pulse stretcher 510 stretches the pulse (e.g., logic 1) indicating the transient so that the scalable SCP 512 is not selected. If the maximum SCP 514 is enabled, it is still possible to turn off the current to the load 110 during this time. For example, the sense node 536 can sense that the load current 314 is above the maximum threshold current (e.g., the maximum defined value), and thus, when the select input 528 selects the output 534 “B,” it can forward the signal to the example gate driver 540, which will decrease the voltage at the gate terminal of the example powerFET 530 to remove the current provided to the load 110.

[0049] In some examples, the pulse stretcher 510 can be bypassed. For example, if the output 526 is determined to be low (LOW) (e.g., logic 0), the pulse stretcher 510 can not extend the signal. The example pulse stretcher 510 is coupled to the example multiplexer 522 via the select input 528, which is a selector of the example multiplexer 522. The example pulse stretcher 510 can include a number of components that receive an input and produce an output that is longer than the input when the signal is high. The example pulse stretcher 510 is described in more detail below in connection with the example multiplexer 522.

[0050] In Figure 5AIn some examples, the example system 500 graph includes an example scalable short circuit protection (SCP) 512 to sense the load current 314 and determine when the load current 314 exceeds a threshold current determined by a user. For example, the scalable SCP 512 is a current limit set by a user to protect the load 110 from operating at potentially damaging levels. The scalable SCP 512 includes as an input a sense node 536 that is also coupled to a source terminal of the example powerFET 530. The example sense node 536 senses the load current 314 and can provide a value to the scalable SCP 512 and the maximum SCP 514. In some examples, the current value can be an analog number, a digital value, a signal, etc., and the SCP blocks 512, 514 receive the value and determine the output it should provide. For example, if the scalable SCP 512 is set to be enabled at a load current 314 greater than or equal to 3 amps, and the sense node 536 provides an analog value representing 3 amps, then the scalable SCP 512 generates a logic 1 on an output 532 to provide to the multiplexer 522. If the output 532 (e.g., an upper input A of the example multiplexer 522) is selected by the selection input 528, then the logic 1 on the output 532 indicates the value sent to the output 524.

[0051] In Figure 5A In some examples, the example system 500 graph includes an example maximum SCP 514 to sense the load current 314 and determine when the load current 314 exceeds a maximum current threshold of the example load 110. For example, the maximum SCP 514 receives a value from the sense node 536 indicating the load current 314 and determines whether the load current 314 is greater than or equal to the maximum threshold current. In some examples, if the maximum threshold current is 7 amps, and the sense node 536 senses a value of 7 amps, then the maximum SCP 514 generates a logic 1 on an output 534 to provide to the multiplexer 522. If the output 534 (e.g., a lower input B of the example multiplexer 522) is selected by the selection input 528, then the logic 1 on the output 534 indicates the value sent to the output 524.

[0052] In Figure 5AIn some examples, when the determination output 526 of the logic gate 508 is a logic 0, the pulse expander 510 is not enabled and a logic 0 is provided as the select input 528 to the multiplexer 522 to select the output 532. For example, if the sense node 536 senses a current higher than the threshold current for the scalable SCP, the scalable SCP 512 is enabled and the output 532A is 1, and if the current increase detector 504 detects an increase in current through the load 110, but the Vout drop detector 506 detects that the output voltage is dropping (e.g., thus not increasing), the select input 528 is a logic 0 and the select output 532A is selected to be forwarded to the output 524, where the gate driver 540 further turns off the powerFET 530 by providing a low voltage signal to the gate terminal.

[0053] In some examples, when the determination output 526 of the logic gate 508 is a logic 0, the pulse expander 510 is not enabled and a logic 0 is provided as the select input 528 to the multiplexer 522 to select the output 532. For example, if the sense node 536 senses a current higher than the threshold current for the scalable SCP, the scalable SCP 512 is enabled and the output 532A is 1, and if the current increase detector 504 detects an increase in current through the load 110, but the Vout drop detector 506 detects that the output voltage is dropping (e.g., thus not increasing), the select input 528 is a logic 0 and the select output 532A is selected to be forwarded to the output 524, where the gate driver 540 further turns off the powerFET 530 by providing a low voltage signal to the gate terminal.

[0054] In some examples, when the determination output 526 of the logic gate 508 is a logic 1, the pulse stretcher 510 is activated and extends the logic 1 signal for a specified amount of time set by the pulse stretcher 510. Further, a logic high signal is provided to the select input 528 of the example multiplexer 522 to select the output 534“B”. For example, the sense node 536 senses a current higher than the threshold current for the scalable SCP, but does not sense a current higher than the maximum threshold current set by the maximum SCP 514, so the maximum SCP is not enabled, and a logic 0 on“B” of the 534 output. Further, the example current increase detector 504 and the example Vout drop detector 506 detect an increase in the load current 314 and the voltage on the Vout 108, so the example logic gate 508 outputs a logic 1 that is extended (e.g., until the load current 314 and the output voltage 108 decrease) to select the output of the maximum SCP“B” which is a logic 0, and the logic 0 is forwarded to the example gate driver 540, which produces a high voltage to keep the power FET 530 on.

[0055] Turning to Figure 5B , the example system 500 diagram includes an example input voltage (Vin) rise detector 542 in place of the example Vout drop detector 506. Figure 5A The example Vin rise detector 542 determines when the input voltage 102 is rising in place of determining when the output voltage 108 is dropping. The example Vin rise detector 542 receives the input voltage 102 and a detector voltage supply, where the input voltage 102 is monitored and the detector voltage supply provides sufficient voltage to the circuitry used to power the example Vin rise detector 542. In some examples, an increase in current to the load 110 and an increase in the input voltage 102 indicates a supply transient. Thus, when the example current increase detector 504 detects an increased output current and when the example Vin rise detector 542 detects an increased input voltage 102, the example system 500 diagram will disable the scalable SCP 512 and enable the maximum SCP 514.

[0056] In Figure 5B , the example system 500 diagram includes an example logic gate 508 having two non-inverting input pins. The example logic gate 508 is an AND logic gate and outputs high when both inputs are high and further outputs low when either of the two inputs is low. For example, when the current increase detector 504 outputs a high voltage on the first output 518 and when the Vin rise detector 542 outputs a high voltage on the second output 520, the logic gate 508 outputs a high voltage on the determination output 526. When the determination output 526 is high, the example pulse stretcher 510 extends the high voltage as a means to disable the scalable SCP 512, as described above in connection with Figure 5A .

[0057] In other examples, the example logic gate 508 outputs a low voltage on the determination output 526 when the example current increase detector 504 outputs a high voltage on the first output 518 and when the example Vin rise detector 542 outputs a low voltage on the second output 520. In this way, the example pulse stretcher 510 bypasses the low voltage and provides it directly to the example multiplexer 522 to select the scalable SCP output 532, as described above in connection with Figure 5A .

[0058] As Figure 5A illustrated in the example system 500 diagram, Figure 5B the example system 500 diagram provides similar functionality for the example power path 106. For example, the system 500 diagram triggers the scalable SCP 512 when the load 110 is shorted in order to protect the example power source 302 from being damaged due to excess current. The example system 500 diagram also functions to prevent triggering of the scalable SCP 512 for a period of time when the power source 302 produces a transient, and further enables the maximum SCP 514. Figure 5A and Figure 5B The system 500 diagrams of

[0059] represent Figure 5A the functionality of the example system 500 diagram in Figure 6 . Figure 6 The power shutdown procedure of begins at block 602, where the example system 500 diagram initiates the example current monitor 502 to monitor the current of the output current of the example power FET 530. For example, the current monitor 502 receives the output voltage 108 and compares it to the input voltage 102 to provide a value to the example current increase detector 504. The example current increase detector 504 determines whether the current through the power FET 530 has increased (block 604). For example, the current increase detector 504 receives the output of the current monitor 502 and compares it to a threshold current. If the current increase detector 504 determines that the current through the power FET has not increased, the process returns to block 602. If the example current increase detector 504 determines that the current has increased, the process moves to block 606, where the example Vout decrease detector 506 determines whether the output voltage 108 is decreasing. For example, the Vout decrease detector 506 monitors the output voltage 108 and detects when the output voltage 108 is decreasing.

[0060] Alternatively, at block 606, a Vin rise detector can be used to indicate whether the input voltage Vin 102 is rising. For example, if detecting when the output voltage 108 is falling indicates that a power supply transient exists at the input, then using a Vin rise detector to determine when the input voltage Vin 102 is increasing also indicates when a power supply transient exists at the input. In this way, the condition of block 606 does not change whether the example Vout fall detector 506 or the Vin rise detector is used. Thus, control passes to either block 608 or 610, as described below.

[0061] If the example Vout fall detector 506 determines that the output voltage 108 is falling (block 606), the example system 500 graph determines that the example load 110 has a valid fault and takes a corresponding action (block 608). For example, the logic gate 508 outputs a logic 0 to the example multiplexer 522, where the logic 0 is the selector and selects the enable short circuit protection 512 as the corresponding action. If the example Vout fall detector 506 determines that the output voltage is not falling, the example system 500 graph determines that a transient has occurred and starts the example pulse stretcher 510 and sets the timer Tl 544 (block 610). For example, the logic gate 508 outputs a logic 1 and provides it to the pulse stretcher 510, which stretches the logic 1 signal for a particular amount of time, n. The system 500 graph determines whether the timer Tl 544 is equal to n (block 612). For example, the pulse stretcher 510 continues to output a logic 1 until the timer Tl 544 is equal to n.

[0062] When the example pulse stretcher 510 determines that the timer Tl 544 is equal to n (block 612), the example system 500 graph determines whether the current through the example powerFET 530 is still higher than the fault threshold, which can be a scalable SCP threshold (block 614). For example, after the pulse stretcher 510 stretches the logic 1 for the specified amount of time, n, the select input 528 will become 0. Also, the example multiplexer 522 selects the scalable SCP output 532, A. At this point, if the load current 314 is still higher than the scalable SCP threshold, the scalable SCP output 532 will be 1 and the output 524 will be 1, which forces the example gate driver 540 to turn off the powerFET 530. In this way, the process passes to block 608, where the example system 500 graph determines that a valid fault condition exists and takes a corresponding action. If the example system 500 graph does not determine that the current through the example powerFET 530 is not greater than the scalable SCP threshold current, the process returns to block 602.

[0063] Figure 7An example current monitor 502 operating with an example current increase detector 504 to determine when the load current 314 is increasing is illustrated. The example current monitor 502 includes an example first amplifier 702, an example resistor Rdom 704, an example capacitor Cdom 710, an example beta (β) 712, and an example second amplifier 714. The example current increase detector 504 includes an example current offset Ioffset 716 and an example comparator 618.

[0064] In Figure 7 the example current monitor 502 includes an example first amplifier 702 to distinguish between the first and second outputs of the example current sensor 501 and output a current based on the differential input between the two voltages. For example, the first amplifier 702 is a transconductance amplifier that includes a non-inverting input and an inverting input, and the difference between the voltage at the non-inverting input and the voltage at the inverting input creates a current as an output. The current produced by the example first amplifier 702 can represent a differential current. The differential current is applied across the resistor Rdom 704 and the capacitor Cdom 710, which produces a monitor voltage Vmon 706. A capacitor is a two-terminal component that stores and then discharges electrical energy when a positive and / or increasing voltage is applied to one of the two terminals. The example capacitor Cdom 710 fights changes in voltage (e.g., the monitor voltage Vmon 706), and the current versus voltage relationship for a capacitor is:

[0065]

[0066] The variable Icharge 708 indicates the current through the capacitor, the variable C is the capacitance (e.g., farads) of the capacitor Cdom 710, and the variable dV / dt indicates the rate of change of the voltage Vmon 706. If the value of Icharge 708 is positive, then the differential current is increasing, and if the value of Icharge 708 is negative, then the differential current is decreasing. Thus, if the load current 314 is increasing, then the monitor voltage Vmon 706 will increase, which charges the capacitor Cdom 710, and the charged capacitor Cdom 710 provides a voltage back to the inverting input pin of the example first amplifier 702 via the example beta 712.

[0067] In Figure 7In some examples, the example current monitor 502 has an example β 712 as a feedback factor for the closed loop of the example current monitor 502. For example, β 712 is a fraction of the output provided to the input of the first amplifier 702. In some examples, β 712 can include two resistors to form a voltage divider, a capacitor and an inductor to form a filter, etc. The example β 712 determines the amount of the monitor voltage 706 provided to the inverting input of the example first amplifier 702. In some examples, β 712 determines the amount of the monitor voltage 706 provided to the second amplifier 714. The analog feedback loop including the example first amplifier 702 and the example β 712 is used to equalize the two outputs of the example current sensor 501 to enable current sensing by the example current sensor 501.

[0068] In some examples, the example current monitor 502 includes an example second amplifier 714 as a replica of the example first amplifier 702 to replicate the differential current from the example first amplifier 702. The replicated current is provided to the example current increase detector 504 via the current monitor output 516. In some examples, the second amplifier 714 is a trans-impedance amplifier that receives two input voltages (e.g., the input voltage 102 and the monitor voltage 706) and generates an output current on the current monitor output 516. The example second amplifier 714 generates a current that represents whether the load current 314 is increasing or decreasing. Figure 7 In some examples, the example current monitor 502 includes an example second amplifier 714 as a replica of the example first amplifier 702 to replicate the differential current from the example first amplifier 702. The replicated current is provided to the example current increase detector 504 via the current monitor output 516. In some examples, the second amplifier 714 is a trans-impedance amplifier that receives two input voltages (e.g., the input voltage 102 and the monitor voltage 706) and generates an output current on the current monitor output 516. The example second amplifier 714 generates a current that represents whether the load current 314 is increasing or decreasing.

[0069] Figure 7 In some examples, the example current monitor 502 includes an example second amplifier 714 as a replica of the example first amplifier 702 to replicate the differential current from the example first amplifier 702. The replicated current is provided to the example current increase detector 504 via the current monitor output 516. In some examples, the second amplifier 714 is a trans-impedance amplifier that receives two input voltages (e.g., the input voltage 102 and the monitor voltage 706) and generates an output current on the current monitor output 516. The example second amplifier 714 generates a current that represents whether the load current 314 is increasing or decreasing. Figure 5A Figure 5B In some examples, the example current increase detector 504 includes an example comparator 718 to determine when the output current of the example second amplifier 714 increases beyond the Ioffset current 716. In some examples, the comparator 718 is an analog comparator that compares two input currents (516, 716) and outputs a digital signal indicating which is greater. For example, the output of the analog comparator 718 is a binary digital output and will output a logic 1 if the current on 516 is greater than the Ioffset current 716, or will output a logic 0 if the current on 516 is less than the Ioffset current 716. In some examples, the Ioffset current 716 should be zero to detect when the current on 516 is positive, however, the Ioffset current 716 is set to a minimum value in order to account for non-idealities such as mismatch. Thus, if the example second amplifier 714 provides a current output greater than the Ioffset current 716, the example comparator 718 will output a logic 1 to the example logic gate 508 via the first output 518. In this way, the example logic gate 508 operates as described above in connection with

[0070] While the implementation Figure 5A and​​Figure 5B Example implementations of the current monitor 502 and the current increase detector 504 are in Figure 7 The diagram illustrates this, but in Figure 7 One or more of the elements, processes, and / or devices illustrated in the figures may be combined, separated, rearranged, omitted, eliminated, and / or implemented in any other way. Furthermore, the example first amplifier 702, the exemplary β 712, the example second amplifier 714, the example comparator 618, and / or more generally, Figure 5A and Figure 5B The example current monitor 502 and current increase detector 504 can be implemented by hardware, software, firmware, and / or any combination of hardware, software, and / or firmware. Therefore, for example, the example first amplifier 702, example β712, example second amplifier 714, example comparator 618, and / or more generally, any of the example current monitor 502 and current increase detector 504 can be implemented by one or more analog or digital circuits, logic circuits, one or more programmable processors, one or more programmable controllers, one or more graphics processing units (GPUs), one or more digital signal processors (DSPs), one or more application-specific integrated circuits (ASICs), one or more programmable logic devices (PLDs), and / or one or more field-programmable logic devices (FPLDs). When reading any of the device or system claims of this patent to cover purely software and / or firmware implementations, at least one of the example first amplifier 702, example β 712, example second amplifier 714, and / or example comparator 718 is hereby expressly defined to include non-transitory computer-readable storage devices or storage disks containing software and / or firmware, such as memory, digital universal disc (DVD), optical disc (CD), Blu-ray disc, etc. Furthermore, Figure 4 Example current monitor 502 and current increase detector 504 (except for) Figure 6 In addition to or in place of those described in the text Figure 6 The elements described herein may include one or more elements, processes, and / or devices, and / or may include any or all of the elements, processes, and devices illustrated herein. As used herein, the phrase “in communications,” (including variations thereof) covers direct communication and / or indirect communication via one or more intermediate components, and does not require direct physical (e.g., wired) communication and / or continuous communication, but additionally includes selective communication at periodic intervals, scheduled intervals, non-periodic intervals, and / or one-off events.

[0071] Figure 8 It is a description Figure 5AFIG. 8 is an example schematic diagram of an example Vout drop detector 506. The example Vout drop detector 506 includes a detector voltage supply (e.g., a low voltage supply different from Vin 102 to enable faster response time and lower area and quiescent current), an output voltage 108, a second output 520 of the Vout drop detector circuit 406 to an example logic gate 508, and a ground reference. The example schematic diagram of the Vout drop detector 506 also includes a plurality of transistors, a capacitor C0 832, an example inverter 830, an example first resistor 812, and an example second resistor 872. In some examples, the output voltage 108 is a control voltage because the output voltage 108 initiates the example schematic diagram to leave or enter a stable operating state.

[0072] In Figure 8 the example schematic diagram includes a plurality of transistors 804, 818, 852, 854 that are N-channel metal-oxide-semiconductor field-effect transistors (NMOSFETs). Alternatively, the transistors 804, 818, 852, 854 can be P-channel MOSFETs, PNP BJTs, NPN BJTs, or the like. Alternatively, the transistors 804, 818, 852, 854 can be switches or any other type of power switching device. In Figure 8 the example first transistor 804 includes an example first drain terminal 806, an example first gate terminal 808, and an example first source terminal 810. The example first transistor 804 is biased by a reference current source (IREF) 814. The example schematic diagram includes the IREF 814 to provide a fixed current to the MN2 804 independent of the detector Vsupply voltage. The example first transistor 804 is in a diode-connected configuration with an example resistor Rl 812, where the first gate terminal 808 is coupled to the first drain terminal 806 via the example resistor Rl 812. The example Rl 812 is coupled to the IREF 814 and the first drain terminal 806. In this way, a diode-connected voltage is generated at the first gate terminal 808 of the example first transistor 804, and a voltage equal to the current of the IREF 814 multiplied by the value of the example resistor Rl 812 will drop across the example resistor Rl 812. Further, the voltage drop across the example resistor Rl 812 results in a reference voltage at the node VREF 802 equal to the diode-connected voltage minus the IREF 814 multiplied by Rl 812. The example first drain terminal 806 is coupled to a fourth gate terminal 848 of an example fourth transistor (MP4) 838 at the node VREF 802.

[0073] In Figure 8The example schematic includes an example second transistor 818 (MN1 818). Example MN1 818 includes a second drain terminal 820, a second gate terminal 822, and a second source terminal 824. The second drain terminal 820 is coupled to a second reference current source (IREF2) 826 at node GAIN2 828. In some examples, IREF2 826 produces a fixed current equal to that of IREF 814. The second source terminal 824 is grounded, and the second gate terminal 822 is coupled to the sixth drain terminal 862 of a sixth transistor (MN4) 854 at node AMPOUT 816. In some examples, MN1 804 has the same dimensions as MN2 804 (e.g., both transistors have the same width-to-length (W / L) ratio for their respective gate terminals). In other examples, if IREF2826 is not the same as IREF 814, then MN1 818 can have a different size relative to MN2 804, where the W / L ratio of MN1 818 is proportional to the W / L ratio of MN2 804. For example, if IREF2 826 is to generate 1 ampere more than IREF 814, then the ratio between the two current sources is 2:1. In this way, the W / L ratio of the two transistors 804 and 818 must also be 2:1, where the width and length of MN2 804 are 1 micrometer smaller than the width and length of MN1 818.

[0074] exist Figure 8 The example schematic includes example transistors 838, 836, 852, and 854, which can form an amplifier with an example current source I1 874 providing bias current. For example, third transistors (MP3) 836 and MP4 838 are the inputs of the amplifier, and the sixth drain terminal 862 of MN4 854 is the output of the amplifier. Example MP3 836 includes an example third source terminal 840, an example third gate terminal 842, and an example third drain terminal 844. The third source terminal 840 is coupled to I1 874, the third gate terminal is coupled to capacitor C0 832 at node VFB 834, and the third drain terminal 844 is coupled to the sixth drain terminal 862 at node AMPOUT 816 and to example second resistor R2 872. Resistor R2 872 is also coupled to capacitor C0 832. The third gate terminal 842 is one of the two inputs that receive voltage from capacitor C0 832 via node VFB 834.

[0075] The example MP4 838 includes a fourth source terminal 846 coupled to the I1 874, a fourth gate terminal 848 coupled to a first drain terminal of the MN2 804 at the node VREF 802, and a fourth drain terminal 850 coupled to a fifth drain terminal 856 of a fifth transistor (MN3) 852 at the ampi node 870. The fourth gate terminal 848 is one of two different inputs from the third gate terminal 842 that receives a voltage from the MN2 804 at the node VREF 802.

[0076] In Figure 8 the MN1 818 is coupled to an output (e.g., the node AMPOUT 816) of an amplifier formed by the MP3 836, the MP4 838, the MN3 852, and the MN4 854. The output (the node AMPOUT 816) of the amplifier is fed back through the resistor R2 872 to the input of the amplifier at the node VFB 834. The amplifier connected with the feedback resistor R2 872 forms a unity gain. A unity gain is a buffer with a gain of 1, which means that the output voltage is equal to the input voltage. In some examples, the unity gain is utilized because some amplifiers (e.g., operational amplifiers) have a high input impedance and a low output impedance, and the unity gain formed by the output of the amplifier and the R2 872 maintains the input voltage at the output due to the impedance created by the resistor R2.

[0077] In Figure 8 the example capacitor CO 832 is a two-terminal electrical component that stores potential energy in an electric field. The example capacitor includes a first capacitor terminal coupled to the output voltage 108 and a second capacitor terminal coupled to the second resistor R2 872 and the third gate terminal 842. The capacitor CO 832 is coupled in parallel with the feedback resistor R2 872. In this way, the capacitor CO 832 forms a high-pass filter with the amplifier (e.g., the transistors MP3, MP4, MN3, and MN4) connected as a unity gain by the resistor feedback R2 872. The high-pass filter receives an input signal (e.g., the output voltage 108) with the capacitor and passes high-frequency signals but blocks low-frequency signals.

[0078] In an example steady state operation of the Vout fall detector 506, the signal on the output voltage (vout) node 108 is constant (e.g., the voltage does not change with respect to time). In steady state operation, the voltage at node VREF 802 is equal to the voltage on node VFB 834, and II 874 is split between the two transistors MP3 836 and MP4 838, as the gate-source voltage of a transistor determines the amount of current that will conduct through it. For example, the current conducting through the third drain terminal 844 is half of II 874, and the current conducting through the fourth drain terminal 850 is half of II 874. When II 874 conducts through the fourth drain terminal 850, current is provided to the drain terminal of the fifth transistor MN3 856. The drain terminal 856 and the gate terminal 858 of MN3 852 are shorted together at the Amp 1 node 870. In this way, when the current flowing through MP4 838 flows to the drain terminal 856 of MN3 852, the transistor MN3 852 can modulate the voltage at the gate terminal 858 to accept the current provided by MP4 838. For example, due to the channel characteristics and size of MN3 852 and the short between the drain terminal and the gate terminal, the transistor MN3 852 will generate a voltage large enough to accept the current of MP4 838. The gate terminal of a transistor has a high impedance. Therefore, the current at the fifth gate terminal 858 is essentially zero amperes, and all amperes are conducted into the fifth drain terminal 856.

[0079] In some examples, MN4 854 has the same size as MN3 852. Therefore, the gate-source voltage of MN4 854 is the same as the gate-source voltage of MN3 852. In this way, the drain terminal 862 of MN4 854 accepts the same amount of current as the drain terminal of MN3 852 accepts.

[0080] Further, in steady state operation, the voltage at node VREF 802 is equal to the voltage at node AMPOUT 816. Equation 3 determines the voltage at node VREF 802:

[0081] V ref = Vgs (MN2) - (R1 x Iref) (Equation 3)

[0082] The variable VREF corresponds to the voltage value at node 802, the variable Vgs(mn2) corresponds to the voltage from the first gate terminal 808 to the first source terminal 810, the variable Rl corresponds to the resistance (ohms) of the first resistor 812, and the variable IREF corresponds to the current conducted at the reference current source 814. In this way, the voltage value at node 802 is the gate-source voltage of the first transistor 804 minus the voltage drop across the first resistor 812. The voltage drop across any resistor is directly proportional to the current through its resistance value.

[0083] In this way, because the voltage at node VREF 802 is equal to the voltage at node AMPOUT 816 during steady state operation (e.g., when the Vout node 108 is constant with respect to time), the gate-source voltage of MNl 818 is equal to the voltage at node VREF 802. For example, the voltage at node AMPOUT 816 is coupled to the second gate terminal 822 of MNl 818. The second source terminal 824 of MNl 818 is coupled to a ground reference (e.g., 0 volts). Thus, when the Vout drop detector 506 is operating in the steady state mode, the gate-source voltage of MNl 818 is the voltage value at node AMPOUT 816.

[0084] In Figure 8 because the example MNl 818 has the same dimensions as the example MN2 804, the example MNl 818 conducts less current than the first transistor 804. For example, when the voltage across the first gate terminal 808 is greater than the voltage across the first source terminal 810, MN2 804 conducts IREF 814. Further, MNl 818 receives the voltage at the second gate terminal 822, which is equal to the voltage at node VREF 802. The voltage at node VREF 802 is less than the gate-source voltage of MN2 804 (e.g., refer to Equation 3), and thus, the gate-source voltage of the second transistor 818 is less than the gate-source voltage of the first transistor 804. In this way, the drain current of MNl 818 is lower than the drain current of MN2 804. As described above, IREF2 826 is related to IREF 814. For example, IREF2 826 can be equal to IREF 814. Thus, IREF2 826 is greater than the drain current drawn by MNl 818. This causes the GAIN2 node 828 to go high and the circuit output 520 to go low. In transistors (e.g., MOSFETs, BJTs, etc.), the current conducted through a transistor is proportional to the square of the fixed gate-source voltage. In some examples, this means that the greater the gate voltage, the greater the amount of current conducted through the transistor (e.g., for N-channel MOSFETs).

[0085] In some examples, IREF 814 conducts a different amount of current than IREF2 826. In some examples, the value of IREF2 826 can be a fixed ratio of the current IREF 814, and the length and width of example MN1 818 have the same ratio as example MN2 808. When the current conducted through second drain terminal 820 is less than the current value at IREF2 826, the voltage at GAIN2 node 828 increases to match the detector Vsupply voltage (e.g., goes high). The node GAIN2 828 voltage is high because the current of IREF2 826 charges the GAIN2 828 node, and this current is not shorted to ground by example second transistor 818 because example MN1 818 is able to conduct lower current when the Vgs of MN1 818 is less than the Vgs of MN2 804. In some examples, the output voltage 108 drops and capacitor CO 832 is used to maintain the change in voltage. For example, if the output voltage 108 drops from 12 volts to 11 volts, the voltage on node VFB 834, which is 1 volt, drops to zero volts and capacitor CO 832 maintains the original voltage drop (e.g., 11 volt drop, from 12 volts at output voltage 108 and 1 volt from node VREF 802 at VFB 834), resulting in a decrease in voltage at node VFB 834. When the voltage at node VFB 834 drops to zero volts, example MP3 836 provides increased current to node AMPOUT 816. For example, the third gate terminal 842 receives zero volts, so the current conducted through MP3 842 increases due to its P-channel characteristics. In this way, the voltage at example third gate terminal 842 is lower than the voltage at example fourth gate terminal 848 (e.g., the voltage at node VREF 802), so example MP3 836 conducts more current than example MP4 838. When example MP3 836 is on and current is being conducted through third drain terminal 844, node AMPOUT 816 charges (e.g., increases to a higher voltage).

[0086] In some examples, when Vout 108 decreases, the voltage value at node AMPOUT 816 is a different value than the voltage at node VREF 802. The voltage value at node AMPOUT 816 increases as Vout 108 decreases, and the increased voltage of node AMPOUT 816 is provided to the example second gate terminal 822 of example MN1 818. In some examples, the presence of the increased voltage at second gate terminal 822 turns on MN1 818, and the current of IREF2 826 is conducted through second drain terminal 820 to second source terminal 824, to the ground reference. In this way, because the current from MN1 818 is greater than IREF2 826, the voltage at example GAIN2 node 828 decreases (e.g., goes low). For example, GAIN2 node 828 goes low, and a low voltage is provided to inverter 830, which inverts the low signal to a high signal (e.g., a logic 1) and outputs the high signal to logic gate 50 via second output 520. The logic 1 provided to example logic gate 508 indicates that output voltage 108 is decreasing.

[0087] In Figure 8 , R1 812 has been added to manage non-idealities in the device. For example, transistors MN2 804 and MN1 818 are designed to be the same type and have the same width and length. But after fabrication, there will still be some mismatch in their width, length, and other electrical characteristics. Similarly, MP4 838 and MP3 836, MN3 852 and MN4 854 will have mismatches, causing the amplifier to have a finite input reference offset (e.g., an amplifier with a mismatch can be defined as a voltage that, when applied at the input of the amplifier, restores the output to the same value as the expected output of the amplifier). Furthermore, current sources IREF 814 and IREF2 826 will have mismatches. Because of all the non-idealities, if R1 812 were not added, the voltage applied to the second gate terminal 822 of MN1 818 can be greater than the voltage described, causing a current to be drawn greater than IREF2 826. Thus, GAIN2 node 828 would be low, and second output 520 would be falsely provided as high, even during steady state.

[0088] In some examples, Figure 9 the schematic diagram can detect an increase in output voltage 108 by rearranging, removing, and / or adding transistors, logic gates, and other electrical components. In some examples, second output 520 can indicate that output voltage 108 is increasing by providing a logic 1 to example logic gate 508, or by providing a logic 0 to example logic gate 508 via second output 520 to indicate that the output is decreasing.

[0089] Figure 10An example timing diagram 900 is illustrated that depicts a response of the example system 500 diagram when a short occurs at the example load 110. The example timing diagram 900 includes signals corresponding to the current and voltage of the inputs and outputs of the example system 500 diagram. The example timing diagram 900 includes an example second graph 902, an example third graph 904, an example fourth graph 906, an example fifth graph 908, an example sixth graph 910, an example seventh graph 912, an example eighth graph 914, an example ninth graph 916, and an example tenth graph 918.

[0090] In the example second graph 902, the input voltage 102 signal decreases at time ti. In some examples, the input voltage 102 can decrease due to a short in the load 110, as the load 110 can be drawing a higher level of current due to the short, and due to the limited impedance of the power supply, the Vin 102 can decrease. The input voltage 102 decreases from a steady 12 volts to 11.9 volts (e.g., 100 millivolts). In the example third graph 904, the current Iload 314 increases from time ti (e.g., approximately 10 amps) to time t2 (e.g., approximately 90 amps). The time in nanoseconds between ti and t2 is 40 nanoseconds. For example, the current Iload 314 can be increasing due to a short in the load 110.

[0091] In the example fourth graph 906, the scalable short circuit protection 512 is triggered when the current Iload 314 reaches the threshold current set by the user and the scalable SCP output 532 becomes high. In the example fourth graph 906, the scalable SCP output 532 becomes high at a time before t2. In the example fifth graph 908, the example current increase detector 504 outputs high on the example first output 518 in response to the current Iload 314 increasing. In the example sixth graph 910, the output voltage 108 is decreasing. The output voltage 108 begins to decrease at time ti (e.g., due to the short at the output load 110) and further drops at time t2 (e.g., due to the powerFET 530 turning off and stopping the supply of current to the load 110). For example, the sixth graph 910 is not a high resolution scale, and thus the decrease in the output voltage 108 is not seen at time ti.

[0092] When the output voltage 108 begins to decrease, the example Vout fall detector 506 outputs a logic one on the example second output 520, as illustrated in the example seventh graph 912. Now, the example timing diagram 900 illustrates that the current through the example load 110 is increasing and the output voltage 108 is falling, and in response, the example current increase detector 504 outputs high on the first output 518 and the example Vout fall detector 506 outputs high on the second output 520, indicating a decrease in the output voltage 108. In this way, the example eighth graph 914 illustrates the determined output 526 of the example logic gate 508, which is zero volts. The example logic gate 508 outputs zero volts because the second output 520 is inverted at the example logic gate 508. The example ninth graph 916 illustrates the output of the example pulse stretcher 510, which is the select input 528. The select input 528 is depicted as zero volts, which is provided to the example multiplexer 522.

[0093] The example multiplexer 522 receives the zero volt select input 528 and selects the value of the output 532 of the scalable SCP 512, which is high. The example tenth graph 918 depicts the output 524 of the example multiplexer 522, which reflects the example signal on the output 532, where at time t2, the signal on the output 532 goes high, and the output 524 of the multiplexer also goes high. The high signal on 524 is provided to the example gate driver 540, which turns off the example power FET 530 until time t3. At time t3, the example first output 518 goes low (e.g., indicated in the fourth graph 906), indicating that the load current 314 is no longer increasing. When the load current 314 falls below the scalable SCP threshold, the scalable SCP output 532 goes low, which causes the output 524 of the multiplexer 522 to also go low.

[0094] ​An example timing diagram 1000 is illustrated that depicts the response of the example system 500 diagram when a power supply transient occurs. The example timing diagram 1000 includes an example second graph 1002, an example third graph 1004, an example fourth graph 1006, an example fifth graph 1008, an example sixth graph 1010, an example seventh graph 1012, an example eighth graph 1014, an example ninth graph 916, an example tenth graph 1018, and an example eleventh graph 1020. The example second graph 1002 illustrates the example input voltage 102, the example third graph 1004 illustrates the example load current 314, the example fourth graph 1006 illustrates the example scalable SCP output 532, the example fifth graph 1008 illustrates the example first output 518 of the current increase detector 504, the example sixth graph 1010 illustrates the output voltage 108, the example seventh graph 1012 illustrates the second output 520 of the Vout drop detector 506, the example eighth graph 1014 illustrates the determined output 526 of the example logic gate 508, the example ninth graph 1016 illustrates the select input 528 of the example pulse stretcher 510, the example tenth graph 1018 illustrates the maximum SCP output 534, and the example eleventh graph 1020 illustrates the output 524 of the example multiplexer 522.

[0095] In the example second graph 1002, the input voltage 102 increases at time ti. The input voltage 102 can increase due to the removal of the second power path 106 from the power supply circuit 300 and the resulting power supply transient. In response to the power supply transient, the load current depicted in the third graph 1004 increases at time ti. When the load current 314 increases, the scalable SCP 512 is triggered and the scalable SCP output 532 becomes high at time ti. The example current increase detector 504 also detects the increase in the load current 314 at time ti and outputs a high on the first output 518, as illustrated by the example fifth graph 1008.

[0096] In response to the power supply transient, the output voltage 108 increases at time ti, which indicates that the load 110 is experiencing a power supply transient and not a short circuit. In this way, the example system 500 prevents the scalable SCP 512 from removing power from the load 110 undesirably via the powerFET 530. At time ti, as the output voltage 108 increases, the Vout down detector 506 outputs a low on the second output 520 at time ti, as illustrated by the sixth graph 1010, as illustrated by the graph 1012. The low on the second output 520 is provided to the inverting input of the logic gate 508, which inverts the low to a high and also outputs a high on the determine output 526, as illustrated in the example eighth graph 1014. In response to the decrease in the output voltage 108, the determine output 526 goes low at time t2. However, the short time period between ti and t2, in which the determine output 526 is high, is sufficient time to provide a high pulse to the example pulse stretcher 510.

[0097] The example pulse stretcher 510 extends the high pulse on the select input 528 for a time n. The select input 528 remains high (e.g., logic 1) and is provided to the example multiplexer 522 to select the maximum SCP output 534. The maximum SCP output 534 is illustrated as zero volts in the example tenth graph 1018. The zero volts on the maximum SCP output 534 indicates that the increase in the load current 314 does not satisfy (e.g., exceed) the threshold set by the manufacturer (e.g., maximum current limit). Accordingly, the multiplexer 522 provides the output 524 of zero volts to the example gate driver 540, where the gate driver 540 does not turn off the example powerFET 530. At time t3, the pulse stretcher 510 outputs a low signal on the select input 528, where the load current 314 is at the initial amperage before the power supply transient, and power to the load 110 is not removed erroneously.

[0098] “Comprise” and “comprising” (and all forms of these terms, i.e., comprise / comprising / comprises / comprised of) are used herein as open-ended terms. Thus, whenever a claim employs any form of “comprise” or “comprising” (e.g., comprises, comprise, comprising, comprised of, etc.), it is to be understood that additional elements, terms, etc. can be present beyond those recited in the corresponding claim or description without falling outside the scope of that claim or description. As used herein, the phrase “at least” followed by a comma followed by a listing of terms with “and / or” or “or” inserted before at least one member of the list has the same open-ended meaning as the term “comprise” as set forth above. As used herein, the phrase “at least one of’ followed by a listing of terms with “and / or” or “or” inserted before at least one member of the list has the same open-ended meaning as the term “comprise” as set forth above. As used herein in context with describing a structure, component, item, object, and / or thing, the phrase “at least one of’ is intended to refer to implementations involving: (1) at least one, (2) at least one, and (3) any combination or subset of one or more of the listed terms. As used herein in context with describing a structure, component, item, object, and / or thing, the phrase “at least one of’ is intended to refer to implementations involving: (1) at least one, (2) at least one, and (3) any combination or subset of one or more of the listed terms. As used herein in context with describing a process, instruction, action, and / or step of execution or implementation, the phrase “at least one of’ is intended to refer to implementations involving: (1) at least one, (2) at least one, and (3) any combination or subset of one or more of the listed terms. As used herein in context with describing a process, instruction, action, activity, and / or step of execution or implementation, the phrase “at least one of’ is intended to refer to implementations involving: (1) at least one, (2) at least one, and (3) any combination or subset of one or more of the listed terms.

[0099] From the foregoing, it will be appreciated that example methods, apparatus, and articles of manufacture have been disclosed that detect a supply transient with an output short to implement short circuit protection when an effective fault condition occurs. Example methods, apparatus, and articles of manufacture also include a fast response time to increasing load current to protect the load from damaging currents.

[0100] Although certain example methods, apparatus, and articles of manufacture have been disclosed herein, the scope of coverage of this patent is not limited thereto. On the contrary, this patent covers all methods, apparatus, and articles of manufacture falling within the scope of the claims.

Claims

1. An electronic device comprising: an input terminal and an output terminal; a current increase detection circuit having inputs coupled to the input terminal and the output terminal, and having a current increase output, the current increase detection circuit configurable to output a current increase detection signal in response to detecting an increase in load current of the electronic device; a voltage detection circuit having a detector voltage input, having a voltage detection input coupled to one of the output terminal and the input terminal, and having a voltage detection output, the voltage detection circuit configurable to output a voltage detection output signal at the voltage detection output in response to detecting that an output voltage at the output terminal is not decreasing or an increase in input voltage at the input terminal; a logic gate having a first input coupled to the current increase output, having a second input coupled to the voltage detection output, and having a gate output, the logic gate configurable to output a pulse at the gate output indicating a transient in response to the current increase detection signal and the voltage detection output signal; a pulse stretcher circuit having a stretcher input coupled to the gate output, and having a pulse output; and a multiplexer having a select input coupled to the pulse output, having a first multiplexer input, having a second multiplexer input, and having a multiplexer output. the device includes a current sensor circuit having inputs coupled to the input terminal and the output terminal, and having a current sensor output coupled to the stretcher input.

2. The apparatus of claim 1, wherein, 3. The device of claim 1, including a first short circuit protection circuit having an output coupled to the first multiplexer input of the multiplexer, and including a second short circuit protection circuit having an output coupled to the second multiplexer input of the multiplexer. the voltage detection circuit is an output voltage drop detector circuit, the voltage detection input is coupled to the output terminal, and the voltage detection circuit is configurable to output the voltage detection output signal at the voltage detection output in response to detecting that an output voltage at the output terminal is not falling.

4. The apparatus of claim 1, wherein, the voltage detection circuit is an input voltage rise detector circuit, the voltage detection input is coupled to the input terminal, and the voltage detection circuit is configurable to output the voltage detection output signal at the voltage detection output in response to detecting a rise in input voltage at the input terminal.

5. The apparatus of claim 1, wherein, 6. An electronic device comprising: an input terminal and an output terminal; a current increase detection circuit having inputs coupled to the input terminal and the output terminal, and having a current increase output, the current increase detection circuit configurable to output a current increase detection signal in response to detecting an increase in load current of the electronic device; ​ a voltage detection circuit having an input coupled to one of the input terminal and the output terminal, and having a voltage detection output, the voltage detection circuit configurable to output a voltage detection output signal at the voltage detection output in response to detecting that an output voltage at the output terminal is not decreasing or an increase in an input voltage at the input terminal; a logic gate having a first input coupled to the current increase output, having a second input coupled to the voltage detection output, and having a gated output, the logic gate configurable to output a pulse at the gated output indicating a transient in response to the current increase detection signal and the voltage detection output signal; a pulse stretcher having an input coupled to the gated output, and having a stretched gated output; and a multiplexer having a select input coupled to the stretched gated output, and having an information output. The multiplexer has a first protection device input and a second protection device input.

7. The apparatus of claim 6, wherein, The first protection device input is enabled in response to an output current satisfying a first threshold, and the second protection device input is enabled in response to the output current satisfying a second threshold.

8. The apparatus of claim 7, wherein, The voltage detection circuit converts a high voltage to a low voltage.

9. The apparatus of claim 6, wherein, The voltage detection circuit is an input voltage rise detector circuit, and the voltage detection input is coupled to the input terminal.

10. The apparatus of claim 6, wherein, The voltage detection circuit is an output voltage drop detector circuit, and a voltage detection input is coupled to the output terminal.

11. The apparatus of claim 6, wherein, 12. A system comprising: an input terminal and an output terminal; a current increase detection circuit having inputs coupled to the input terminal and the output terminal, and having a current increase output, the current increase detection circuit configurable to output a current increase detection signal in response to detecting an increase in a load current of an electronic device; a voltage detection circuit having a voltage detection input coupled to one of the input terminal and the output terminal, and having a voltage detection output, the voltage detection circuit configurable to output a voltage detection output signal at the voltage detection output in response to detecting that an output voltage at the output terminal is not decreasing or an increase in an input voltage at the input terminal; a logic gate having a first input coupled to the current increase output, having a second input coupled to the voltage detection output, and having a gated output, the logic gate configurable to output a pulse at the gated output indicating a transient in response to the current increase detection signal and the voltage detection output signal; a pulse stretcher having an input coupled to the gated output, and having a stretched gated output; and a first short circuit protection circuit having a first short circuit output, the first short circuit protection circuit configurable to output a first signal in response to a current satisfying a first threshold; a second short circuit protection circuit having a second short circuit output, the second short circuit protection circuit configurable to output a second signal in response to a current satisfying a second threshold higher than the first threshold; ​ a multiplexer having a select input coupled to the expansion gate output, having a first input coupled to the first short output, having a second input coupled to the second short output, and having a driver output; a gate driver circuit having an input coupled to the driver output, and having a gate output; and a power transistor having a gate input coupled to the gate output, having a first current terminal coupled to the input terminal, and having a second current terminal coupled to the output terminal.

13. The system of claim 12, wherein, the voltage detection circuit is an output voltage drop detector circuit, and the voltage detection input is coupled to the output terminal, the voltage detection circuit configurable to output the voltage detection output signal at the voltage detection output in response to detecting a lack of a drop in output voltage at the output terminal.

14. The system of claim 12, wherein, the voltage detection circuit is an input voltage rise detector circuit, and the voltage detection input is coupled to the input terminal, the voltage detection circuit configurable to output the voltage detection output signal at the voltage detection output in response to detecting a rise in input voltage at the input terminal. the voltage detection circuit is an output voltage drop detector circuit, and the voltage detection input is coupled to the output terminal, the voltage detection circuit configurable to output the voltage detection output signal at the voltage detection output in response to detecting a lack of a drop in output voltage at the output terminal. the voltage detection circuit is an input voltage rise detector circuit, and the voltage detection input is coupled to the input terminal, the voltage detection circuit configurable to output the voltage detection output signal at the voltage detection output in response to detecting a rise in input voltage at the input terminal.

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